CN205103314U - Faint signal frequency and phase place automatic check out system based on singlechip - Google Patents

Faint signal frequency and phase place automatic check out system based on singlechip Download PDF

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Publication number
CN205103314U
CN205103314U CN201520680322.5U CN201520680322U CN205103314U CN 205103314 U CN205103314 U CN 205103314U CN 201520680322 U CN201520680322 U CN 201520680322U CN 205103314 U CN205103314 U CN 205103314U
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pin
connects
resistance
chip
ground wire
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王如刚
沈兆军
郑都民
徐航
袁鑫
薛霖霖
俞延江
叶锴
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Yangcheng Institute of Technology
Yancheng Institute of Technology
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Yangcheng Institute of Technology
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Abstract

The utility model discloses a faint signal frequency and phase place automatic check out system based on singlechip, including coupler and power module, connected gradually first order amplifier circuit, second level amplifier circuit, shaping circuit, frequency dividing circuit and single chip microcomputer system on the coupler, single chip microcomputer system's the other end is connected with display module and storage module respectively, it has the amplitude detection circuitry who connects in parallel mutually with second level amplifier circuit still to establish ties on the first order amplifier circuit, and amplitude detection circuitry's the other end is connected in single chip microcomputer system, still be connected with phase detecting circuit on the coupler, phase detecting circuit's the other end is connected in single chip microcomputer system, power module is the entire system power supply. The utility model discloses combine single chip microcomputer control, utilize the multistage amplification technique to the implementation method that frequency divider and trigger combined together obtains the intelligent signal automated inspection of high performance, the utility model discloses degree of automation is high, and fast measurement of efficiency is high, and the security performance is good, convenient operation.

Description

SCM Based feeble signal frequency and phase place automatic checkout system
Technical field
The utility model relates to infomation detection control technology, is specifically related to a kind of SCM Based feeble signal frequency and phase place automatic checkout system.
Background technology
In electronic technology, frequency is one of the most basic parameter, and therefore the measurement of frequency just seems particularly important, and frequency meter is then a kind of electronic measuring instrument measured measured signal frequency specially,
In electronic technology, frequency and phase place are most important and the most basic parameters, and have very close relationship with the measurement scheme of many electric parameters, measurement result, therefore the frequency of signal and phase measuring system and method seem extremely important in every field such as computing machine, communication, scientific researches.
At present, common frequency meter is made up of signal input circuit, signal processing circuit and counting display circuit mostly, and this kind of frequency meter fast response time, cost are low.2010, (application number: 201010574470.0), utilized single-chip microcomputer to obtain easy frequency meter in conjunction with amplifying circuit to the utility model patent of the big proposition of money; 2013, Wang Huoming propose utility model patent (application number: 201310411422.3), the method utilizing logical circuit and timer to combine measures the frequency of signal; 2014, (application number: 201410164401.0), utilized dsp chip in conjunction with shaping circuit, devises digital frequency meter the utility model patent that Hu Tianji proposes; (application number: 201510082488.1) utilizes CPLD chip to make modulation domain frequency counter and continuous frequency measuring method thereof to the utility model patent that in February, 2015, Wang Xue proposed.
Above prior art has certain use value, but, the frequency band of these systems is narrower, unstable properties, and cannot measure the frequency of signal complicated and changeable, and the method for many employings technology can accurately the waveform of measuring-signal in measuring process, the shaping of signal is undesirable, can not the phase place of simultaneously measuring-signal, therefore, the application surface of these system and methods is narrower, limits its application in electronic surveying.
Utility model content
Goal of the invention: the purpose of this utility model is the defect solving prior art existence, provides a kind of SCM Based feeble signal frequency and phase place automatic checkout system.
Technical scheme: the SCM Based feeble signal frequency of one of the present utility model and phase place automatic checkout system, comprise coupling mechanism and power module; Described coupling mechanism is connected with first order amplifying circuit, second level amplifying circuit, shaping circuit, frequency dividing circuit and Single Chip Microcomputer (SCM) system in turn, the other end of Single Chip Microcomputer (SCM) system is connected to display module and memory module; Described first order amplifying circuit is also in series with the amplitude detection circuit be in parallel with second level amplifying circuit, the other end of amplitude detection circuit is connected to Single Chip Microcomputer (SCM) system; Described coupling mechanism is also connected with phase detecting circuit, and the other end of phase detecting circuit is connected to Single Chip Microcomputer (SCM) system; Described power module is that whole system is powered.
Further, described Single Chip Microcomputer (SCM) system is any one in dsp controller, ARM controller and common singlechip controller; Described display module be liquid crystal display and LED display in any one.
Further, described memory module is any one in dynamic RAM, static memory and synchronous DRAM.
Further, described power module is linear stabilized power supply.
Further, described first order amplifying circuit comprises the first amplifier chip, power supply and some resistance, electric capacity; One end of described resistance R1 connects ground wire, the input end of other end connection signal and the first pin of the first amplifier chip; One end of resistance R2 connects ground wire, and the other end connects the 8th pin of the first amplifier chip; 3rd pin of the first amplifier chip is by resistance R4 contact resistance R3 and resistance R5 respectively, and wherein the other end of resistance R4 connects Single Chip Microcomputer (SCM) system, and the other end of resistance R5 connects power supply; 5th pin contact resistance R6 of the first amplifier chip, the signal output terminal of the other end of resistance R6; 6th pin of the first amplifier chip connects electric capacity C2, and the other end of electric capacity C2 connects ground wire; 7th pin of the first amplifier chip connects electric capacity C1, and the other end of electric capacity C1 connects ground wire, meanwhile, the first amplifier chip the 6th, seven pins connect power module respectively.
Further, described amplitude detection circuit comprises root mean square direct current conversion chip, power supply and some resistance, electric capacity; Described resistance R7 one end connects the 4th pin of root mean square direct current conversion chip, and the another two ends of resistance R7 connect power module; One end of 6th pin contact resistance R8 of root mean square direct current conversion chip, the resistance R8 other end connects the 11st pin of root mean square direct current conversion chip; 12nd pin of root mean square direct current conversion chip is connected with ground wire with electric capacity C3 respectively by electric capacity C4 with the 13rd pin, and meanwhile, the 12nd pin of root mean square direct current conversion chip is connected power module respectively with the 13rd pin; 15th pin of root mean square direct current conversion chip connects the output terminal of first order amplifying circuit, and the 11st pin of root mean square direct current conversion chip connects Single Chip Microcomputer (SCM) system.
Further, described second level amplifying circuit comprises the second amplifier chip, power supply and some resistance, electric capacity; The output terminal of described first order amplifying circuit is connected to the second pin of the second amplifier chip by resistance R9; Resistance R10 one end connects ground wire, and the other end connects the 3rd pin of the second amplifier chip; One end of electric capacity C7 connects ground wire, and the other end connects the 4th pin of the second amplifier chip, and is connected with power supply, and meanwhile, the 4th pin of the second amplifier chip connects the 7th pin of the second amplifier chip by electric capacity C8; 6th pin of the second amplifier chip is by the signal output part of resistance R11 as second level amplifying circuit.
Further, in shaping circuit, from the one end of the signal contact resistance R12 that second level amplifying circuit exports, the other end of resistance R12 connects the 6th pin of first selector chip; Second pin of first selector chip connects ground wire; 16th pin of first selector chip connects power supply; 7th pin of first selector chip is as the output terminal after shaping; In frequency dividing circuit, the signal exported from shaping circuit connects the 6th pin of second selector and the 14th pin of the first counter; 1st pin of second selector connects ground wire, 16th pin connects power supply, 15th pin is connected with ground wire after connecting the 1st pin, second selector the 1st, 14 pins export respectively as a road fractional frequency signal, control the frequency of fractional frequency signal, 4th pin of second selector connects the 8th pin of the second counter, and the 5th pin of second selector connects the 8th pin of the first counter and the 14th pin of the second counter respectively; The 2nd, 3,6,7 of 1st counter is connected ground wire with 10 pins, and the 5th pin of the first counter connects power supply; The 2nd, 3,6,7 of 2nd counter is connected ground wire with 10 pins, and the 5th pin of the second counter connects power supply; 7th pin of the second counter exports as the signal after frequency division, and connects in Single Chip Microcomputer (SCM) system.
Further, the input end of described phase detecting circuit connects start signal, be divided into two paths of signals, wherein a road signal connects the 3rd pin of the 3rd amplifier chip by resistance R16, second pin of the 3rd amplifier chip connects ground wire by resistance R14, simultaneously, 2nd pin connects the 6th pin by resistance R15, 4th pin connects ground wire, 7th pin connects power supply, 6th pin connects the 3rd pin of the 4th amplifier chip, 7th pin of the 4th amplifier chip connects ground wire by electric capacity C11, 6th pin of the 4th amplifier chip is connected to the 3rd pin of flip-flop chip by diode D1 output signal, the input end of another road signal is connected to the 3rd pin of resistance R21 connection the 5th amplifier chip, 7th pin of the 5th amplifier chip connects power supply, 4th pin connects ground wire, 2nd pin connects its 6th pin by resistance R20, 6th pin of the 5th amplifier chip connects the 3rd pin of the 6th amplifier chip, the 2nd of 6th amplifier chip, 4 pins connect ground wire, 7th pin connects power supply, 6th pin connects and connects trigger the 11st pin by diode D2, the 2nd of flip-flop chip, 4, 10, 12 pins connect power supply, 1st pin connects its 8th pin, 13rd pin of flip-flop chip is connected with Single Chip Microcomputer (SCM) system as the output of phase detection signal, by the phase place of display module display.
Two bundle signals are divided into when described input signal is coupled device, wherein a road signal enters first order amplifying circuit, a signal part after amplifying enters second level amplifying circuit, through the second level, amplifying circuit amplifying signal enters shaping circuit, signal after shaping enters frequency dividing circuit and carries out frequency division, signal after frequency division enters single-chip microcomputer process, enters display module display and memory module storage afterwards; Another road signal after first order amplifying circuit amplifies enters amplitude detection circuit, the direct current signal that testing circuit exports enters single-chip microcomputer process, according to the detection threshold arranged, single-chip microcomputer return signal carries out the control of gain to first order amplifying circuit, can ensure that first order amplifying circuit carries out the automatic control of gain according to the power of input signal; Another road signal exported from coupling mechanism enters phase detecting circuit, and the signal after phase-detection enters single-chip microcomputer process, and carries out storing and showing through memory module and display module.
Beneficial effect: the utility model, in conjunction with Single-chip Controlling, utilizes multistage amplifying technique, the implementation method combined with frequency divider and trigger, obtains the intelligent automatic signal detection of high-performance; Specifically comprise following advantage:
(1) the utility model can realize frequency and the phase place of automatic detection signal, without the need to artificial too much intervention operation, greatly improves and measures efficiency;
(2) control system in the utility model can realize the processing capacities such as data communication, data processing, Systematical control and interruption.
In sum, the utility model automaticity is high, and it is high that speed measures efficiency soon, and security performance is good, easy to operate.
Accompanying drawing explanation
Fig. 1 is that system of the present utility model connects block diagram;
Fig. 2 is first order amplifying circuit schematic diagram in embodiment;
Fig. 3 is amplitude detection circuit schematic diagram in embodiment;
Fig. 4 is amplifying circuit schematic diagram in the second level in embodiment;
Fig. 5 is shaping and frequency dividing circuit schematic diagram in embodiment;
Fig. 6 is phase detecting circuit schematic diagram in embodiment;
Fig. 7 is the low frequency oscillogram detected in embodiment;
Fig. 8 is the high frequency waveforms figure detected in embodiment;
Fig. 9 is phase difference detection analogous diagram in the utility model embodiment.
Embodiment
Below technical solutions of the utility model are described in detail, but protection domain of the present utility model is not limited to described embodiment.
As shown in Figure 1, the SCM Based feeble signal frequency of the present embodiment and phase place automatic checkout system, comprise the coupling mechanism 100, first order amplifying circuit 101, second level amplifying circuit 102, shaping circuit 103, frequency dividing circuit 104, Single Chip Microcomputer (SCM) system 105, amplitude detection circuit 106, display module 107, phase detecting circuit 108, memory module 109 and the power module 110 that connect successively.
Wherein, Single Chip Microcomputer (SCM) system 105 comprises Freescale single-chip microcomputer MC9S12XS128MAL chip, clock circuit, reset circuit and JIAG structure.
As shown in Figure 2, first order amplifying circuit 101 comprises resistance R1 (50 ohm), R2 (25 ohm), R3 (1K ohm), R4 (2K ohm slide rheostat), R5 (1K ohm) and R6 (50 ohm), electric capacity C1 (0.1 μ F), C2 (0.1 μ F), what the first amplifier chip adopted is the VCA810 amplification chip of TI company, has 8 pins.1st pin of CVA810 is as the input end of measured signal, and the 1st pin of CVA810 is connected with ground wire by resistance R1 simultaneously; 2nd pin of CVA810 is connected with ground wire; 6th pin of VA810 is connected with the power supply of+5, and the 6th pin is connected with ground wire by electric capacity C2 simultaneously; 7th pin of CVA810 is connected with the power supply of-5, and the 6th pin is connected with ground wire by electric capacity C1 simultaneously; 8th pin of CVA810 is connected with ground wire by resistance R2; No. three pin of CVA810 connects the sliding end connection of slide rheostat R4, and second joint of slide rheostat R4 is connected with-5V power supply by R5, and the 3rd joint is connected with Single Chip Microcomputer (SCM) system by resistance R3, controls the gain of first order amplifying circuit; 4th pin of CVA810 is unsettled; 5th pin of CVA810 is exported as the amplifying signal of first order amplifying circuit by resistance R6.
As shown in Figure 3, what adopt in amplitude detection circuit 106 is the main devices of AD637 high precision broadband root mean square direct current transducer as amplitude detection circuit of AD company, this device is+5V and-5V dual power supply, there are 16 pins, this circuit also comprises resistance R7 (50K ohm slide rheostat), R8 (50K ohm slide rheostat), electric capacity C3 (0.1 μ F), C4 (0.1 μ F), C5 (10 μ F) and C6 (0.1 μ F).AD637 the 1st, 3 pins are connected with ground wire; Second, five, seven, eight, nine, 14 and 16 pins of AD637 are unsettled; No. four pin of AD637 connects swept resistance R7 sliding end, and the two ends of resistance R7 connect+5V and-5V power supply respectively; 6th pin of AD637 is connected to the 11st pin of AD637 by swept resistance R8; 10th pin of AD637 is connected to the 11st pin of AD637 by electric capacity C5; 11st pin of AD637 is connected to ground wire by electric capacity C6, and is connected to Single Chip Microcomputer (SCM) system, utilizes the gain of Single Chip Microcomputer (SCM) system to first order amplifying circuit automatically to control; 12nd pin of AD637 connects-5V power supply, and is connected to ground wire by electric capacity C4; 13rd pin of AD637 connects+5V power supply, and is connected to ground wire by electric capacity C3; 15th pin of AD637 is connected with the output terminal of first order amplifying circuit, and the signal as amplitude detection circuit inputs.
As shown in Figure 4, the main devices of OPA842 wide-band amplify chip as amplifying circuit of what second level amplifying circuit 102 in the present embodiment adopted is TI company, this device is+5V and-5V dual power supply, there are 8 pins, this circuit also comprises resistance R9 (82 ohm), R10 (68 ohm), R11 (470 ohm) and R12 (50 ohm), electric capacity C7 (0.1 μ F), C8 (0.1 μ F) and C9 (0.1 μ F).1st, 5 and 8 pins of OPA842 are unsettled; 2nd pin of OPA842 is connected to the 6th pin of OPA842 by resistance R11; The first order amplifying signal exported from the output terminal of first order amplifying circuit is connected by the 2nd pin of resistance R9 and OPA842; 3rd pin of OPA842 is connected to ground wire by resistance R10; 4th pin of OPA842 is connected with-5V power supply, and the 4th pin of OPA842 is connected with ground wire by electric capacity C7, and the 4th pin of OPA842 connects the 7th pin of OPA842 by electric capacity C8 simultaneously; 7th pin of OPA842 is connected with ground wire by electric capacity C9, and the 7th pin of OPA842 connects+5V power supply simultaneously; 6th pin of OPA842 connects ground wire by resistance R12, and the 6th pin of OPA842 connects the input end of shaping and frequency dividing circuit as the output signal end of second level amplifying circuit simultaneously.
As shown in Figure 5, what shaping and frequency dividing circuit (103,104) adopted is two data selector chip 74HC153 and two counter 74LS90 chips are as the main devices of shaping and frequency dividing circuit, this circuit is+5V and-5V dual power supply, and this circuit also comprises resistance R13.Selector switch 74HC153 has 16 pins, and 74LS90 has 14 pins.First 74HC153 resistance is as shaping circuit, the signal (output of the OPA842 Fig. 4 the 6th pin) exported from second level amplifying circuit is input to the 6th pin of first 74HC153 by resistance R13 (1K ohm), as the input end of shaping and frequency dividing circuit; 1st, 2 pins of first 74HC153 connect ground wire, and the 8th pin connects ground wire, and the 14th, 15 pins connect ground wire, and the 16th pin connects+5V power supply; 3rd, 4,5,9,10,11,12,13 pins are unsettled; 7th pin of first 74HC153 connects the input end of the output terminal connection frequency dividing circuit as shaping circuit, is connected respectively to the 6th pin of second 74HC153 and the 14th pin of first and second 74LS90; The 1st pin ground connection of second 74HC153, the 1st pin is connected with its 15th pin simultaneously; 2nd pin and No. 14 pin are respectively frequency division 1 and frequency division 2, are connected with Single Chip Microcomputer (SCM) system, when Single Chip Microcomputer (SCM) system to frequency division 1 and frequency division 2 not enable time, output is 1 frequency division, being 10 frequency divisions when there being a frequency division high level, when two frequency divisions are all high level, being 100 frequency divisions; 3rd, 9,10,11,12 and 13 pins of second 74HC153 are unsettled; 16th pin of second 74HC153 connects+5V power supply, 8th pin ground connection, 4th pin connects the 8th pin of second 74LS90,5th pin connects the 8th pin of first 74LS90 and the 14th pin of second 74LS, and the 7th pin of second 74HC153 connects Single Chip Microcomputer (SCM) system as the signal after the output terminal output frequency division of frequency divider; 1st pin of first 74LS90 connects its 12nd pin, and the 2nd, 3,6 are connected ground wire with 7 pins, and the 10th pin connects ground wire, and the 5th pin connects+5V power supply, and all the other pins are unsettled; 1st pin of second 74LS90 connects its 12nd pin, and the 2nd, 3,6 are connected ground wire with 7 pins, and the 10th pin connects ground wire, and the 5th pin connects+5V power supply, and all the other pins are unsettled.
As shown in Figure 6, the amplification chip OPA657 of the Shi Liangge TI company that the phase detecting circuit 108 in the present embodiment adopts, the main devices of two OPA843 amplification chips and a double frequency d type flip flop 74HC74, this circuit is+5V and-5V dual power supply, this circuit also comprises resistance R14 (50 ohm), R15 (453 ohm), R16 (50 ohm), R17 (10K ohm), R18 (10K ohm), R19 (50 ohm), R20 (453 ohm), R21 (50 ohm), R22 (10K ohm) and R23 (10K ohm), electric capacity C11 (0.1 μ F), C12 (0.1 μ F), C10 (0.1 μ F), C13 (0.1 μ F), C14 (10 μ F), C17 (0.1 μ F), C15 (0.1 μ F) and C16 (0.1 μ F), diode D1 and D2.Phase detecting circuit is divided into upper and lower two parts, and upper part comprises first OPA657, first OPA843 and 74HC74, and lower part comprises second OPA657 and second OPA843.Detected signal is divided into two-way, first via signal enters the upper part of phase detecting circuit, connect the 3rd pin of first OPA657, 3rd pin is connected with ground wire by resistance R16, 2nd pin is connected with ground wire by resistance R14, simultaneously, 2nd pin connects the 6th pin by resistance R1, 4th pin connects-5V power supply, connect electric capacity C10 to be connected with ground wire simultaneously, 7th pin connects+5V power supply, connect electric capacity C11 to be connected with ground wire simultaneously, other pins are unsettled, from first OPA843 the 3rd pin of the signal connection upper part that the 6th pin of first OPA657 exports, first OPA843 the 2nd pin ground connection, 4th pin connects-5V power supply, connect electric capacity C13 to be connected with ground wire simultaneously, 7th pin connects+5V power supply, connect electric capacity C12 to be connected with ground wire simultaneously, 6th pin connects the 7th pin by resistance R17, and the 6th pin is by the 3rd pin of diode D1 connection d type flip flop 74HC74 simultaneously, is connected between the 3rd pin of diode D1 and 74HC74 with resistance R18 with ground wire.In the lower part of phase-detection, input signal connects the 3rd pin of second OPA657, 3rd pin is connected with ground wire by resistance R21 simultaneously, 2nd pin of second OPA657 connects ground wire by resistance R19, 2nd pin is connected with the 6th pin by resistance R20 simultaneously, 4th pin connects-5V power supply, connect electric capacity C15 to be connected with ground wire simultaneously, 7th pin connects+5V power supply, connect electric capacity C14 to be connected with ground wire simultaneously, 6th pin connects the 3rd pin of second OPA843, 2nd pin of second OPA843 is connected with ground wire, 4th pin connects-5V power supply, connect electric capacity C16 to be connected with ground wire simultaneously, 7th pin connects+5V power supply, connect electric capacity C17 to be connected with ground wire simultaneously, 6th pin connects the 7th pin by resistance R22, 6th pin connects the 11st pin of d type flip flop 74HC74 by diode D2 simultaneously, be connected with ground wire with resistance R23 between the 11st pin of diode D2 and 74HC74, its the 8th pin is connected at the 1st pin of d type flip flop 74HC74,2nd is connected+5V power supply with the 4th pin, and the 10th is connected-5V power supply with the 12nd pin, and the 7th pin connects ground wire, 5th and 13 output in Single Chip Microcomputer (SCM) system and carry out com-parison and analysis, and show phase place on display module.
The detection method of above-mentioned SCM Based feeble signal frequency and phase place automatic checkout system, comprise the following steps: input signal is coupled device and is divided into two bundle signals, wherein a road signal enters first order amplifying circuit, a signal part after amplifying enters second level amplifying circuit, through the second level, amplifying circuit amplifying signal enters shaping circuit, signal after shaping enters frequency dividing circuit and carries out frequency division, signal after frequency division enters single-chip microcomputer process, enters display module display and memory module storage afterwards; Another road signal after first order amplifying circuit amplifies enters amplitude detection circuit, the direct current signal that testing circuit exports enters single-chip microcomputer process, according to the detection threshold arranged, single-chip microcomputer return signal carries out the control of gain to first order amplifying circuit, can ensure that first order amplifying circuit carries out the automatic control of gain according to the power of input signal; Another road signal exported from coupling mechanism enters phase detecting circuit, and the signal after phase-detection enters single-chip microcomputer process, and carries out storing and showing through memory module and display module.
In the present embodiment, input 2Hz and the 53MHz signal of sinusoidal signal respectively as shown in FIG. 7 and 8 through measuring 50mV, as can be seen from Figure 7, the frequency of signal is lower show on oscillograph be less than 10Hz, what show in fig. 8 is the high-frequency signal of 53MHz, and the result of measurement is 53.08MHz.
Fig. 9 is the figure signal that in the present embodiment, phase detecting circuit exports, and wherein comprises detected signal, through the signal that compares, and two paths of signals relatively after figure, the phase place of measured signal can be obtained from the width of the pulse signal after relatively.

Claims (9)

1. SCM Based feeble signal frequency and a phase place automatic checkout system, is characterized in that: comprise coupling mechanism and power module;
Described coupling mechanism is connected with first order amplifying circuit, second level amplifying circuit, shaping circuit, frequency dividing circuit and Single Chip Microcomputer (SCM) system in turn, the other end of Single Chip Microcomputer (SCM) system is connected to display module and memory module; Described first order amplifying circuit is also in series with the amplitude detection circuit be in parallel with second level amplifying circuit, the other end of amplitude detection circuit is connected to Single Chip Microcomputer (SCM) system; Described coupling mechanism is also connected with phase detecting circuit, and the other end of phase detecting circuit is connected to Single Chip Microcomputer (SCM) system;
Described power module is that whole system is powered.
2. SCM Based feeble signal frequency according to claim 1 and phase place automatic checkout system, is characterized in that: described Single Chip Microcomputer (SCM) system is any one in dsp controller, ARM controller and common singlechip controller; Described display module be liquid crystal display and LED display in any one.
3. SCM Based feeble signal frequency according to claim 1 and phase place automatic checkout system, is characterized in that: described memory module is any one in dynamic RAM, static memory and synchronous DRAM.
4. SCM Based feeble signal frequency according to claim 1 and phase place automatic checkout system, is characterized in that: described power module is linear stabilized power supply.
5. SCM Based feeble signal frequency according to claim 1 and phase place automatic checkout system, is characterized in that: described first order amplifying circuit comprises the first amplifier chip, power supply and some resistance, electric capacity;
Described some resistance comprises resistance R1, and one end of resistance R1 connects ground wire, the input end of other end connection signal and the first pin of the first amplifier chip; One end of resistance R2 connects ground wire, and the other end connects the 8th pin of the first amplifier chip; 3rd pin of the first amplifier chip is by resistance R4 contact resistance R3 and resistance R5 respectively, and wherein the other end of resistance R4 connects Single Chip Microcomputer (SCM) system, and the other end of resistance R5 connects power supply; 5th pin contact resistance R6 of the first amplifier chip, the signal output terminal of the other end of resistance R6; 6th pin of the first amplifier chip connects electric capacity C2, and the other end of electric capacity C2 connects ground wire; 7th pin of the first amplifier chip connects electric capacity C1, and the other end of electric capacity C1 connects ground wire, meanwhile, the first amplifier chip the 6th, seven pins connect power module respectively.
6. SCM Based feeble signal frequency according to claim 1 and phase place automatic checkout system, is characterized in that: described amplitude detection circuit comprises root mean square direct current conversion chip, power supply and some resistance, electric capacity;
Described some resistance comprises resistance R7, and resistance R7 one end connects the 4th pin of root mean square direct current conversion chip, and the another two ends of resistance R7 connect power module; One end of 6th pin contact resistance R8 of root mean square direct current conversion chip, the resistance R8 other end connects the 11st pin of root mean square direct current conversion chip; 12nd pin of root mean square direct current conversion chip is connected with ground wire with electric capacity C3 respectively by electric capacity C4 with the 13rd pin, and meanwhile, the 12nd pin of root mean square direct current conversion chip is connected power module respectively with the 13rd pin; 15th pin of root mean square direct current conversion chip connects the output terminal of first order amplifying circuit, and the 11st pin of root mean square direct current conversion chip connects Single Chip Microcomputer (SCM) system.
7. SCM Based feeble signal frequency according to claim 1 and phase place automatic checkout system, is characterized in that: described second level amplifying circuit comprises the second amplifier chip, power supply and some resistance, electric capacity;
The output terminal of described first order amplifying circuit is connected to the second pin of the second amplifier chip by resistance R9; Resistance R10 one end connects ground wire, and the other end connects the 3rd pin of the second amplifier chip; One end of electric capacity C7 connects ground wire, and the other end connects the 4th pin of the second amplifier chip, and is connected with power supply, and meanwhile, the 4th pin of the second amplifier chip connects the 7th pin of the second amplifier chip by electric capacity C8; 6th pin of the second amplifier chip is by the signal output part of resistance R11 as second level amplifying circuit.
8. SCM Based feeble signal frequency according to claim 1 and phase place automatic checkout system, it is characterized in that: in shaping circuit, from the one end of the signal contact resistance R12 that second level amplifying circuit exports, the other end of resistance R12 connects the 6th pin of first selector chip; Second pin of first selector chip connects ground wire; 16th pin of first selector chip connects power supply; 7th pin of first selector chip is as the output terminal after shaping;
In frequency dividing circuit, the signal exported from shaping circuit connects the 6th pin of second selector and the 14th pin of the first counter; 1st pin of second selector connects ground wire, 16th pin connects power supply, 15th pin is connected with ground wire after connecting the 1st pin, second selector the 1st, 14 pins export respectively as a road fractional frequency signal, control the frequency of fractional frequency signal, 4th pin of second selector connects the 8th pin of the second counter, and the 5th pin of second selector connects the 8th pin of the first counter and the 14th pin of the second counter respectively; The 2nd, 3,6,7 of 1st counter is connected ground wire with 10 pins, and the 5th pin of the first counter connects power supply; The 2nd, 3,6,7 of 2nd counter is connected ground wire with 10 pins, and the 5th pin of the second counter connects power supply; 7th pin of the second counter exports as the signal after frequency division, and connects in Single Chip Microcomputer (SCM) system.
9. SCM Based feeble signal frequency according to claim 1 and phase place automatic checkout system, is characterized in that: described phase detecting circuit comprises power supply, four amplifier chips, flip-flop chip and some resistance, electric capacity and diodes;
The input end of described phase detecting circuit connects start signal, be divided into two paths of signals, wherein a road signal connects the 3rd pin of the 3rd amplifier chip by resistance R16, second pin of the 3rd amplifier chip connects ground wire by resistance R14, simultaneously, 2nd pin connects the 6th pin by resistance R15, 4th pin connects ground wire, 7th pin connects power supply, 6th pin connects the 3rd pin of the 4th amplifier chip, 7th pin of the 4th amplifier chip connects ground wire by electric capacity C11, 6th pin of the 4th amplifier chip is connected to the 3rd pin of flip-flop chip by diode D1 output signal, the input end of another road signal is connected to the 3rd pin of resistance R21 connection the 5th amplifier chip, 7th pin of the 5th amplifier chip connects power supply, 4th pin connects ground wire, 2nd pin connects its 6th pin by resistance R20, 6th pin of the 5th amplifier chip connects the 3rd pin of the 6th amplifier chip, the 2nd of 6th amplifier chip, 4 pins connect ground wire, 7th pin connects power supply, 6th pin connects and connects trigger the 11st pin by diode D2, the 2nd of flip-flop chip, 4, 10, 12 pins connect power supply, 1st pin connects its 8th pin, 13rd pin of flip-flop chip is connected with Single Chip Microcomputer (SCM) system as the output of phase detection signal, by the phase place of display module display.
CN201520680322.5U 2015-09-02 2015-09-02 Faint signal frequency and phase place automatic check out system based on singlechip Expired - Fee Related CN205103314U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105116217A (en) * 2015-09-02 2015-12-02 盐城工学院 Single-chip microcomputer-based weak signal frequency and phase automatic detection system and detection method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105116217A (en) * 2015-09-02 2015-12-02 盐城工学院 Single-chip microcomputer-based weak signal frequency and phase automatic detection system and detection method thereof

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