CN205092571U - Direct current transient state surge voltage suppression circuit based on PMOS pipe - Google Patents

Direct current transient state surge voltage suppression circuit based on PMOS pipe Download PDF

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Publication number
CN205092571U
CN205092571U CN201520891442.XU CN201520891442U CN205092571U CN 205092571 U CN205092571 U CN 205092571U CN 201520891442 U CN201520891442 U CN 201520891442U CN 205092571 U CN205092571 U CN 205092571U
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CN
China
Prior art keywords
voltage
surge voltage
pmos
circuit
utility
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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CN201520891442.XU
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Chinese (zh)
Inventor
周成龙
李子森
刘强
郭艳辉
丁永平
王添文
党丽
苏醒
杨宝山
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BEIJING ZHONGBEI INNOVATION TECHNOLOGY Co Ltd
CHINA NORTH INDUSTRY NEW TECHNOLOGY PROMOTION INSTITUTE
Original Assignee
BEIJING ZHONGBEI INNOVATION TECHNOLOGY Co Ltd
CHINA NORTH INDUSTRY NEW TECHNOLOGY PROMOTION INSTITUTE
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Priority to CN201520891442.XU priority Critical patent/CN205092571U/en
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Publication of CN205092571U publication Critical patent/CN205092571U/en
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Abstract

The utility model relates to a direct current transient state surge voltage suppression circuit based on PMOS pipe belongs to electronic equipment protection circuit field. The utility model discloses being the core by adjustable reposition of redundant personnel reference source of three -terminal and optoelectronic coupler and constituteing sampling feedback control circuit, the principle is simple, easily realizes, product reliability is high, compact structure, and the volume is less, and it is low to switch on the internal resistance, gives out heat for a short time, and the voltage drop is little.

Description

Based on the DC transient surge voltage-suppressing circuit of PMOS
Technical field
The utility model relates to electronic equipment protective circuit technical field, is specifically related to a kind of DC transient surge voltage-suppressing circuit based on PMOS.
Background technology
The standards such as army of country mark GJB181-86, GJB181A-2003 define air environment and must can bear certain transient surge voltage (as 80V/50ms).Therefore, air environment all needs to install electrical surge suppression module.Transient overvoltage surge has the features such as source impedance low (0.5 Ω), duration long (50ms), gross energy are larger, and electrical surge suppression module is all realize surge voltage protection based on the control circuit of power field effect pipe.Overvoltage surge suppression module at present based on power field effect pipe design has two types: NMOS tube surge suppression modules and PMOS surge suppression modules.
NMOS tube surge suppression module circuit theory diagram as shown in Figure 1.NMOS tube surge suppression module circuit operation principle is: powered to oscillating circuit by the voltage stabilizing circuit adopting voltage stabilizing didoe and current-limiting resistance to form.Oscillating circuit adopts NE555 chip, produces the high frequency square wave of amplitude 12V.The charge pump be made up of diode, resistance and electric capacity carries out peak detection and level shift to gate terminal capacitor charging.The reference voltage of output sampled voltage and voltage control circuit compares by sample circuit, controls conducting and the cut-off of the triode of fet gate end, and then the voltage of the extreme electric capacity of control gate.When normal input 28V voltage, gate source voltage V gS>V gS (th), NMOS tube forward conduction.When there being 80V surge voltage, output sampled voltage is greater than reference voltage (2.5V), gate terminal triode ON, gate terminal capacitor discharge, and grid voltage declines, gate source voltage V gS<0V, NMOS tube is ended.Then, output voltage decline, sampled voltage is less than reference voltage 2.5V, gate terminal triode end, charge pump to gate terminal capacitor charging, gate source voltage V gS>V gS (th), NMOS tube forward conduction.Loop control NMOS tube like this, makes output voltage not higher than set point 36V.
The similar adjusting and voltage-reduction switch voltage stabilizing circuit of PMOS surge suppression module circuit principle, theory diagram as shown in Figure 2.PMOS surge suppression module circuit operation principle is: protective circuit is the voltage stabilizing didoe of voltage stabilizing value 15V, to protect V gSvoltage is super-P metal-oxide-semiconductor grid source puncture voltage not.Output end voltage feeds back to by the composition control such as triode, biasing resistor circuit by sampling resistor, controls the grid voltage of PMOS.When normal input 28V voltage, voltage stabilizing didoe makes gate source voltage V gS=-15V, PMOS forward conduction.When there being 80V surge voltage, output sampled voltage is greater than 2.5V, makes transistor base voltage forward bias and V bE>V on, triode ON.And then causing the triode ON of control end, gate pmos pole tension rises, and PMOS is ended.Then, output voltage declines, triode V bE<V on, triode ends.Gate pmos pole tension is drop-down, PMOS conducting.Loop control PMOS like this, makes output voltage not higher than set point 36V.
From Fig. 1 and Fig. 2, NMOS tube surge suppression modules and PMOS surge suppression modules are all made up of metal-oxide-semiconductor and control circuit.For the surge suppression modules of different capacity size, its control circuit (principle and volume) is substantially the same, and just changing can not the metal-oxide-semiconductor of power.When the power of surge suppression modules is larger, because the volume of metal-oxide-semiconductor is comparatively large, the therefore small volume of control circuit volume accounting suppression module.But when the power of surge suppression modules is less, the small volume of required metal-oxide-semiconductor, and control circuit is still the same.Therefore, the volume of small-power (being less than 50W) surge suppression modules is controlled the restriction of circuit, is difficult to realize miniaturization.
Utility model content
(1) technical problem that will solve
The technical problems to be solved in the utility model is: how to design that a kind of circuit theory is simple, reliability is high, the small-power surge restraint circuit of compact conformation, compact.
(2) technical scheme
In order to solve the problems of the technologies described above, the utility model provides a kind of DC transient surge voltage-suppressing circuit based on PMOS, comprising: field effect transistor Q1, diode D1, resistance R1 ~ R5, electric capacity C1 ~ C2, photoelectrical coupler U1 and three end adjustable shunt reference source U2;
The source electrode of Q1 is power input, is connected with the first end of U1 and one end of D1, and second end of grid and U1, the other end of D1 and one end of R3 are connected, and drain electrode is connected with one end of C1 and one end of R1, and as output; One end of the three-terminal link R5 of U1, the 4th end connects one end of one end of C2, the first end of U2 and R4; The other end of C2 connects second end of the other end U2 of C1, the other end of R1 and one end of R2; The other end of R4 is connected with the other end of R5 and described output.
Preferably, the 3rd end of U1 and the 4th end are front level led port, and first end and the second end are the port of rear class triode.
Preferably, the 3rd end ground connection of the other end of R3, the other end of R2 and U2.
(3) beneficial effect
The utility model is that core forms sampling feedback control circuit by three end adjustable shunt reference sources and photoelectrical coupler, and principle is simple, and be easy to realize, product reliability is high, compact conformation, small volume, and conducting internal resistance is low, and caloric value is little, and voltage drop is little.
Accompanying drawing explanation
Fig. 1 is that existing charge pump charges driving surge restraint circuit schematic diagram;
Fig. 2 is the driving surge restraint circuit schematic diagram of existing PMOS;
Fig. 3 is the circuit theory diagrams of the utility model embodiment.
Embodiment
For making the purpose of this utility model, content and advantage clearly, below in conjunction with drawings and Examples, embodiment of the present utility model is described in further detail.
As shown in Figure 3, the utility model provides a kind of DC transient surge voltage-suppressing circuit based on PMOS, comprising: field effect transistor Q1, diode D1, resistance R1 ~ R5, electric capacity C1 ~ C2, photoelectrical coupler U1 and three end adjustable shunt reference source U2;
The source electrode of Q1 is power input, is connected with the first end of U1 and one end of D1, and second end of grid and U1, the other end of D1 and one end of R3 are connected, and drain electrode is connected with one end of C1 and one end of R1, and as output; One end of the three-terminal link R5 of U1, the 4th end connects one end of one end of C2, the first end of U2 and R4; The other end of C2 connects second end of the other end U2 of C1, the other end of R1 and one end of R2; The other end of R4 is connected with the other end of R5 and described output.
3rd end of U1 and the 4th end are front level led port, and first end and the second end are the port of rear class triode.
The 3rd end ground connection of the other end of R3, the other end of R2 and U2.
As shown in Figure 3, surge suppression modules operation principle of the present utility model is: power supply holds input by P1, P2 end is outputted to through field effect transistor Q1 (FQB22P10), by controlling the grid voltage of field effect transistor Q1, it is made to be operated in the switch transition state of saturation region, cut-off region or linear zone, by the switching loss of field effect transistor Q1, overvoltage surge power conversion is become thermal dissipation, and then the voltage of clamper output P2.Input P1 holds powered on moment, and the grid voltage due to field effect transistor Q1 is low level, the gate source voltage V of field effect transistor Q1 gSbe less than-2V, field effect transistor Q1 saturation conduction, the voltage follow input P1 voltage of output P2.The voltage stabilizing circuit be made up of 15V voltage stabilizing didoe D1 (1N4744) and current-limiting resistance R3 (27K), to protect V gSvoltage is super-P metal-oxide-semiconductor grid source puncture voltage not, ensures the normal work of Q1.Resistance R1 and resistance R2 forms voltage sampling circuit, and three end adjustable shunt reference source U2 (TL431IDBV), resistance R5 (5.1K), resistance R4 (1K) and photoelectrical coupler U1 (PC817) form sampling feedback circuit.When power supply normal (B point voltage is less than 36V), the voltage V of sampled point E ebe less than 2.5V, three end adjustable shunt reference source U2 end, and F point is high level, and photoelectrical coupler U1 previous diodes ends.When producing overvoltage surge (B point voltage is greater than 36V), the voltage V of sampled point E ebe greater than 2.5V, three end adjustable shunt reference source U2 conductings, F point is low level, and the conducting of photoelectrical coupler U1 previous diodes is luminous, photoelectrical coupler U1 rear class triode saturation conduction, the therefore voltage V of A, C point-to-point transmission aCbe about 0.7V, i.e. the gate source voltage V of Q1 gSbe about-0.7V, field effect transistor Q1 ends.Then, output voltage declines, the voltage V of sampled point E ebe less than 2.5V, three end adjustable shunt reference source U2 end, and F point is high level, level led cut-off before photoelectrical coupler U1, and photoelectrical coupler U1 rear class triode ends, V gSfor-15V, field effect transistor Q1 conducting again.Circulation like this controls field effect transistor Q1, makes output voltage not higher than set point 36V.In circuit, electricity group R4 (1K) provides dead band electric current for three end adjustable shunt reference source U2, field effect transistor Q1 conducting when ensureing low-voltage.Electric capacity C2 (0.1 μ F) is three end adjustable shunt reference source U2 loop compensation networks, for promoting phase place.Electric capacity C1 (0.1 μ F) is for improving the powered on moment sampling feedback response time.
The above is only preferred implementation of the present utility model; should be understood that; for those skilled in the art; under the prerequisite not departing from the utility model know-why; can also make some improvement and distortion, these improve and distortion also should be considered as protection range of the present utility model.

Claims (3)

1. based on a DC transient surge voltage-suppressing circuit for PMOS, it is characterized in that, comprising: field effect transistor Q1, diode D1, resistance R1 ~ R5, electric capacity C1 ~ C2, photoelectrical coupler U1 and three end adjustable shunt reference source U2;
The source electrode of Q1 is power input, is connected with the first end of U1 and one end of D1, and second end of grid and U1, the other end of D1 and one end of R3 are connected, and drain electrode is connected with one end of C1 and one end of R1, and as output; One end of the three-terminal link R5 of U1, the 4th end connects one end of one end of C2, the first end of U2 and R4; The other end of C2 connects second end of the other end U2 of C1, the other end of R1 and one end of R2; The other end of R4 is connected with the other end of R5 and described output.
2., as claimed in claim 1 based on the DC transient surge voltage-suppressing circuit of PMOS, it is characterized in that, the 3rd end of U1 and the 4th end are front level led port, and first end and the second end are the port of rear class triode.
3., as claimed in claim 1 or 2 based on the DC transient surge voltage-suppressing circuit of PMOS, it is characterized in that, the 3rd end ground connection of the other end of R3, the other end of R2 and U2.
CN201520891442.XU 2015-11-10 2015-11-10 Direct current transient state surge voltage suppression circuit based on PMOS pipe Expired - Fee Related CN205092571U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201520891442.XU CN205092571U (en) 2015-11-10 2015-11-10 Direct current transient state surge voltage suppression circuit based on PMOS pipe

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201520891442.XU CN205092571U (en) 2015-11-10 2015-11-10 Direct current transient state surge voltage suppression circuit based on PMOS pipe

Publications (1)

Publication Number Publication Date
CN205092571U true CN205092571U (en) 2016-03-16

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108332137A (en) * 2018-03-02 2018-07-27 国网山东省电力公司泗水县供电公司 A kind of electric power first-aid lighting device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108332137A (en) * 2018-03-02 2018-07-27 国网山东省电力公司泗水县供电公司 A kind of electric power first-aid lighting device

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C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20160316

Termination date: 20161110

CF01 Termination of patent right due to non-payment of annual fee