CN204597799U  Based on the threephase VIENNA rectifier of 60 ° of coordinate systems  Google Patents
Based on the threephase VIENNA rectifier of 60 ° of coordinate systems Download PDFInfo
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 CN204597799U CN204597799U CN201520355563.2U CN201520355563U CN204597799U CN 204597799 U CN204597799 U CN 204597799U CN 201520355563 U CN201520355563 U CN 201520355563U CN 204597799 U CN204597799 U CN 204597799U
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Abstract
Description
Technical field
The utility model relates to a kind of threephase VIENNA rectifier, is specifically related to, based on the threephase VIENNA rectifier under 60 ° of coordinate systems, belong to high efficiency rectifier technical field.
Background technology
Along with the development of science and technology, a large amount of power electronic equipments is used in daily life, causes the quality of power supply and declines.In order to improve the power factor of electrical network, reduce current total harmonic distortion rate, PWM commutation technique obtains the growing interest of people.Due to the raising of voltage and power grade, traditional two level converters are difficult to realize hightension highpower, and the electric current and voltage ability of bearing of device is also restricted.
Compared with two level PWM converters, threelevel pwm can effectively reduce system harmonics content, reduces the requirement to network reactor, thus reduces system cost.Along with the development of this three level and Multilevel PWM, there is novel threelevel topology structure rectifying device, as diode clamping circuit and VIENNA rectifier, wherein VIENNA rectifier has that circuit structure is simple, power device voltage stress is low, efficiency is high, there is not the advantages such as bridge arm direct pass problem.
Utility model content
The purpose of this utility model is that the power factor of electric network in order to solve prior art is low, and side harmonics composition is high, the problem of stability of a system difference.
The technical solution of the utility model is: based on the threephase VIENNA rectifier under 60 ° of coordinate systems, comprise inductive bank, main circuit, DSP control system, driver module, voltage on line side signal processing circuit, current on line side signal processing circuit, direct voltage sampling module and load, described inductive bank comprises the first inductance, second inductance and the 3rd inductance, main circuit comprises threephase VIENNA rectification circuit, electrical network is respectively by the first inductance, the input of the second inductance and the 3rd inductance and threephase VIENNA rectification circuit connects, output and the load of threephase VIENNA rectification circuit connect, the input of voltage on line side signal processing circuit is connected between electrical network and inductive bank, the input of current on line side signal processing circuit is connected between the threephase input end of inductive bank and threephase VIENNA rectification circuit, the output of voltage on line side signal processing circuit is connected DSP control system with the output of current on line side signal processing circuit, the input of direct voltage sampling module connects the output of threephase VIENNA rectification circuit, the output of direct voltage sample circuit connects DSP control system, the output of DSP control system is connected by driver module and VIENNA rectification circuit.
Describedly comprise auxiliary circuit based on the threephase VIENNA rectifier under 60 ° of coordinate systems; auxiliary circuit comprises Switching Power Supply and current foldback circuit; described current foldback circuit comprises voltage comparator and clamp diode; the inverting input of voltage comparator and the output of current on line side signal processing circuit connect; the output of voltage comparator connects through the mid point of clamp diode and DSP control system, and guarantee system works in a safe current.
Described threephase VIENNA rectification circuit comprises the first identical brachium pontis of three structures, second brachium pontis and the 3rd brachium pontis, first brachium pontis comprises power tube, first flywheel diode, second flywheel diode, first clamp circuit and the second clamp circuit, first clamp circuit comprises the first switching diode and the second switch diode of series connection, second clamp circuit comprises the 3rd switching diode and the 4th switching diode of series connection, the collector electrode of described power tube connects the positive pole of the first flywheel diode, the emitter of power tube connects the negative pole of the second flywheel diode, one end of first clamp circuit and an end of the second clamp circuit are connected between the first flywheel diode and the collector electrode of power tube, the other end of the first clamp circuit other end and the second clamp circuit be connected on the source electrode of power tube and the second flywheel diode and between, compared with diode clamping circuit, topological structure is simple, power tube is only 1/4th of clamp circuit, for these needs three drive circuits.Described rectification circuit adopts power tube IGBT, has switching loss little, and voltage endurance capability is strong, saturation pressure reduces, and the advantages such as voltage, current capacity are larger, can improve the current class of power tube for this reason.Power device is few, only needs three drive circuits, and reduce system cost, the breakmake of power tube can not cause bridge arm direct pass phenomenon, without the need to arranging dead band, simplifies hardware circuit, reduces the volume of circuit; By making input current sineization, realizing unity power factor and running.
Described voltage on line side signal processing circuit comprises transformer, RC filter circuit, comparator, diode and antiphase shaping circuit, the output of transformer connects the inphase input end of comparator by RC filter circuit, the output of comparator connects antiphase shaping circuit by diode, and the output of antiphase shaping circuit is the output of voltage on line side signal processing circuit.
Described current on line side signal processing circuit comprises current Hall transducer, sampling resistor, voltage follower circuit, antiphase add circuit and antiphase ratio circuit, the output end voltage follow circuit of described current Hall transducer, the output of voltage follower circuit connects the input of antiphase add circuit, the output of antiphase add circuit connects the input of antiphase ratio circuit, the output of antiphase ratio circuit is the output of current on line side signal processing circuit, one end of sampling resistor is connected to the input of current Hall transducer and voltage follower circuit, other end ground connection, current Hall transducer secondary current carries out sampling by resistance RM and obtains UM, through isolation, biased, be input in A/D conversion chip after lowpass filtering and clamped process.
Described antiphase add circuit comprises operational amplifier, the first resistance, the second resistance and the 3rd resistance, one end of first resistance is connected with the output of voltage follower, the inverting input of the other end concatenation operation amplifier of the first resistance, the inverting input of one end concatenation operation amplifier of the second resistance, the other end is power input, 3rd resistance is attempted by between the inverting input of operational amplifier and output, the resistance of resistance=the 3rd resistance of resistance=the second resistance of described first resistance.
Described driver module comprises three identical drive circuits of structure, described drive circuit comprises optocoupler and backpressure circuit, the output of optocoupler connects the input of backpressure circuit, the output of backpressure circuit and the power tube of threephase VIENNA rectification circuit connect, the input of optocoupler is the input of driver module, and the output of backpressure circuit is the output of driver module.
Based on the control method of the threephase VIENNA rectifier under 60 ° of coordinate systems, comprise the following steps:
Step one, initialization is carried out to DSP control system, start to catch interrupt routine, be specially: trigger condition is set, by voltage on line side signal processing circuit, sinusoidal network voltage signal transposition squarewave pulse signal is delivered to the interrupt trap end of DSP control system, the signal of twice feeding interruption DSP control system is made the mains frequency that difference obtains system, when mains frequency meets trigger condition, enters interruption subroutine;
Step 2, carry out interrupt routine, specifically comprise: first judge whether system is in malfunction, when system malfunctions, record fault type, and close PWM module, cutting system main circuit simultaneously, when system failure, enter A/D sampling subprogram, read A/D sampled result, offset current command signal is calculated by Harmonic Detecting Algorithm, 60 ° of coordinate system SVPWM modulation are used to realize current followup control, draw the comparison value in the comparand register of DSP control system, finally utilize the power tube in DSP control system task manager output pwm pulse driving threephase VIENNA rectification circuit,
Based on the control method of the threephase VIENNA rectifier under 60 ° of coordinate systems, also comprise the action time utilizing Hysteresis control method to regulate positive and negative small vector, the step that the balance realizing midpoint voltage controls, being specially: setting hysteresis band, judging that capacitance voltage regulates direction, when voltage difference is greater than the hysteresis band of default by detecting DC partial voltage capacitance voltage difference, adjust the action time of positive and negative small vector, thus derided capacitors voltage is tended to balance, if regulatory factor is f, T _{0}for the negative small vector action time before regulating, negative small vector T action time after adjustment _{p}for:
Positive small vector T action time _{q}for:
Action time after adjustment is redistributed, and then voltage vector is changed action time.
Described 60 ° of coordinate system SVPWM modulated processs comprise the following steps:
Step 1, utilizes the Double closedloop of voltage and current strategy of Feedforward Decoupling, obtains the component of voltage vector under dq coordinate system, obtains gh coordinate system through Park inverse transformation;
Step 2, according to gh establishment of coordinate system space vector graph of a relation, a given reference voltage space vector U _{ref}, space vector of voltage coordinate is rounded up or down and obtains reference voltage space vector U _{ref}4 basic vector V _{uD}, V _{dU}, V _{uU}and V _{dD}, be specially:
Wherein, V _{uD}, V _{dU}be respectively the first basic vector and the second basic vector V _{uU}and V _{dD}be the 3rd basic vector, V _{rh}for reference vector is in the projection of h axle; V _{rg}for reference vector is in the projection of g axle; reference vector rounds downwards in the projection of h axle; reference vector rounds downwards in the projection of g axle; reference vector rounds up in the projection of h axle; reference vector rounds up in the projection of g axle;
Step 3, judges the large sector region at reference voltage space vector place and little sector region, utilizes the basic vector that step 2 obtains, and obtains vector T action time by voltagesecond balance principle _{1}, T _{2}and T _{3}, expression formula is:
When the 3rd basic vector is for being V _{uU}in time, obtains:
When the 3rd basic vector is V _{dD}in time, obtains:
Wherein, Ts: system communication cycle; V _{refh}: for reference vector is in the projection of h axle; V _{refg}: for reference vector is in the projection of g axle;
Step 4, if all on off states corresponding to switching vector selector are:
In formula, g, h are the basic voltage vectors coordinate figure of synthesized reference vector, by selecting k value in rational scope, draw the threephase switch state of threelevel converter.
The utility model compared with prior art has following effect: device of the present utility model improves the power factor of electrical network, namely remaining can effective harmonic inhabitation, harmonic reduction composition, make the advantage that current distortion reduces, also traditional SVPWM control algolithm is optimized, make algorithm more succinct, improve system response time, thus improve the stability of system.Control method of the present utility model adopts the space vector technique under 60 ° of nonsine coordinate systems, the division of sector is carried out under 60 ° of coordinate systems, and each basic voltage vectors can use integer representation, regional determination process is simple, do not relate to trigonometric function operation, realize the drived control to power tube in VIENNA rectification circuit, threelevel PWM rectifier harmonic wave of output voltage content is little, thus reduce the design difficulty of AC filter inductance, not only reduce system bulk, and simplify the judgement of sector and the synthesis of basic vector, shorten computing time, improve system response time, the stability of enhancing system, reduce the cost of system simultaneously, improve the object of the quality of power supply, it is simple that described VIENNA rectification circuit has circuit structure, power device voltage stress is low, efficiency is high, there is not the advantage of bridge arm direct pass.
Accompanying drawing explanation
Fig. 1, overall structure block diagram of the present utility model;
Fig. 2, VIENNA topology diagram;
Fig. 3, VIENNA rectifier simplified electrical circuit diagram;
Fig. 4, VIENNA rectifier operation principle (the positive half cycle of line voltage);
Fig. 5, VIENNA rectifier operation principle (line voltage negative half period);
Fig. 6, three level SVPWM three dimensional vector diagram;
Fig. 7, VIENNA rectifier vector control block diagram;
Fig. 8, gh coordinate system 3 level space vector figure;
Fig. 9, the little sector chart in reference voltage vector place;
Figure 10, action time, profiles versus schemed;
Figure 11, voltage on line side signal processing circuit figure;
Figure 12, current on line side signal processing circuit figure;
Figure 13, drive circuit circuit diagram;
Figure 14, current foldback circuit figure;
Figure 15, system main program flow chart;
Figure 16, capture interrupt flow chart;
Figure 17, A/D interrupt routine flow chart;
Figure 18, midpoint voltage regulates program flow diagram.
Embodiment
Accompanying drawings embodiment of the present utility model, of the present utility model based on the threephase VIENNA rectifier under 60 ° of coordinate systems, comprise inductive bank, main circuit, DSP control system, driver module, voltage on line side signal processing circuit, current on line side signal processing circuit and direct voltage sampling module, described inductive bank comprises the first inductance, second inductance and the 3rd inductance, main circuit comprises threephase VIENNA rectification circuit, electrical network is respectively by the first inductance L a, the input of the second inductance L b and the 3rd inductance L c and threephase VIENNA rectification circuit connects, the input of voltage on line side signal processing circuit is connected between electrical network and inductive bank, the input of current on line side signal processing circuit is connected between the threephase input end of inductive bank and threephase VIENNA rectification circuit, the output of voltage on line side signal processing circuit is connected DSP control system with the output of current on line side signal processing circuit, the input of direct voltage sampling module connects the output of threephase VIENNA rectification circuit, the output of direct voltage sample circuit connects DSP control system, the output of DSP control system is connected by driver module and VIENNA rectification circuit, the DSP control system of present embodiment comprises TMS320F2812 chip, wherein DSP2812 highest frequency can reach 150MHz, this chip peripheral hardware comprises 12,16 tunnel Precision A/D C, a 2 road SCI and two event manager module EVA, EVB, each event manager module comprises 6 tunnels and entirely compares PWM/CMP, 2 road QEP and 3 road CAP.
Describedly comprise current foldback circuit based on the threephase VIENNA rectifier under 60 ° of coordinate systems, described current foldback circuit comprises voltage comparator 1 and clamping diode circuit 2, the inverting input of voltage comparator 1 and the output of current on line side signal processing circuit connect, the output of voltage comparator 1 connects through the mid point of clamping diode circuit 2 and DSP control system, described voltage comparator 1 is LM393, current signal connects the inverting input of LM393, when in circuit, electric current is in normal range (NR), LM393 exports+5V high level, through+3.3V and diode clamp, final output+3.3V high level, when in circuit, electric current is excessive, LM393 exports 0V low level, circuit finally exports as 0V, now will trigger PDPINTA to interrupt, DSP responds interruption, block PWM output signal, to reach the object of overcurrent protection.
Described threephase VIENNA rectification circuit comprises the first brachium pontis, second brachium pontis, 3rd brachium pontis and four bridge legs, described first brachium pontis, second brachium pontis, 3rd bridge arm structure is identical, four bridge legs comprises the first electric capacity C1 and the second electric capacity C2 of series connection, first brachium pontis comprises power tube Sa, first sustained diode+, second sustained diode, first clamp circuit and the second clamp circuit, first clamp circuit comprises the first switching diode D1 and the second switch diode D3 of series connection, second clamp circuit comprises the 3rd switching diode D2 and the 4th switching diode D4 of series connection, the collector electrode of described power tube Sa connect the first sustained diode+positive pole, the emitter of power tube Sa connect the second sustained diodenegative pole, one end of first clamp circuit and an end of the second clamp circuit are connected between the collector electrode of the first sustained diode+and power tube Sa, the other end of the first clamp circuit other end and the second clamp circuit be connected on the emitter of power tube Sa and the second sustained diodeand between, the bidirectional switch of a power tube Sa and four diode formation of each brachium pontis of threephase VIENNA rectification circuit, first sustained diode+and the second sustained diodeplay afterflow effect.
Second brachium pontis of described threephase VIENNA rectification circuit comprises the second brachium pontis and comprises power tube Sb, the second sustained diode 2+, the second sustained diode 2, the 3rd clamp circuit and the 4th clamp circuit, 3rd clamp circuit comprises the 5th switching diode D5 and the 7th switching diode D7 of series connection, and the 4th clamp circuit comprises the 6th switching diode D6 and the 8th switching diode D8 of series connection; 3rd brachium pontis comprises power tube Sc, the first sustained diode 3+, the second sustained diode 3, the 5th clamp circuit and the 6th clamp circuit, 5th clamp circuit comprises the 9th switching diode D9 and the 11 switching diode D11 of series connection, and the 6th clamp circuit comprises the tenth switching diode D10 and the twelvemo pass diode D12 of series connection.
The operation principle of described threephase VIENNA rectification circuit is: the operating state of threephase VIENNA rectification circuit is relevant with the sense of current of AC with the on off state of power device, each phase brachium pontis equivalence can become a forward and antiphase Boost circuit, the phase current that threephase threewire system structure flows into M point forms loop by other twophase, for a phase current circulation path, can be discussed respectively according to the polarity of line voltage.
(1) when line voltage is at positive half cycle, gained loop as shown in Figure 4.
When power tube Sa conducting is, electric current passes through NLaD1SaD4M, in this process, and electric current Va>0, electric current constantly increases, inductance L a charging energystoring, and now A point current potential current potential for mid point electric capacity is 0; When power tube Sa shutoff is that electric current is by sustained diodeafterflow, and current path is NLaD1D+C1M, and inductance releases energy, and charges to electric capacity C1, and now A point is 1/2Vdc relative to electric capacity midpoint potential.This process is equivalent to the process of Boost circuit discharge and recharge.
(2) when line voltage is at negative half period, gained loop as shown in Figure 5.
When line voltage is negative half period, during power tube conducting, A point current potential is clamped to electric capacity mid point M, and A point alignment current potential is 0.Current flow paths MD2SaD3LaN.When power tube turns off, electric current is by sustained diode+afterflow, and freewheeling path is MC2D1D3LaN.A point is1/2Vdc relative to electric capacity midpoint potential.This process is equivalent to reverse Boost circuit.
When removing the first flywheel diode and second flywheel diode of each brachium pontis of described threephase VIENNA rectification circuit, residual circuit extracted, and obtain its equivalent circuit diagram, wherein equivalent gained circuit diagram can regard bidirectional switch Sa, Sb and Sc as respectively; By simplifying each brachium pontis, obtain the equivalent circuit diagram of threephase trilevel VIENNA rectifier, as shown in Figure 3.
In circuit after simplification, the inverse peak voltage that switch bears is that direct current exports total head, and the maximum reverse voltage that before simplifying, all diodes and power tube bear is the half of output voltage.
In threephase trilevel circuit, by controlling the breakmake of each brachium pontis bidirectional switch in conjunction with current direction, there are 1/2Vdc ,1/2Vdc, 0 three kinds of level states in every cross streams side.Redefine a switch function, if S _{i}(i=a, b, c) is the switch function of the ith phase, then can by S _{i}be expressed as.
So threelevel rectifier has 3 ^{3}level state in=27, wherein, (1 1 1) and (111) are two kinds of disarmed states.Then obtain 25 kinds of voltage vectors for 25 kinds of level states, comprising 12 small vectors (wherein 6 positive small vectors and 6 negative small vectors), 6 middle vectors, 6 large vectors, 1 zero vector, thinks V _{c1}=V _{c2}=V _{dc}/ 2, different by modulus value, 25 vectors are divided into by size zero vector, small vector, middle vector, large vector.Corresponding modulus value is respectively 0, V _{dc}/ 3, 2V _{dc}/ 3, can produce 19 voltage vectors do not waited, 25 summits constitute an orthohexagonal three dimensional vector diagram, as shown in Figure 6 ([1 01] three quantity of states of the corresponding VIENNA of [P O N] difference), and vector table is:
Table 1 vector table:
Described voltage on line side signal processing circuit comprises transformer T, RC filter circuit 3, comparator 4, diode D and antiphase shaping circuit 5, the output of transformer T connects the inphase input end of comparator 4 by RC filter circuit 3, the output of comparator 4 connects antiphase shaping circuit 5 by diode D, the output of antiphase shaping circuit 5 is the output of voltage on line side signal processing circuit, the comparator 4 of present embodiment is LM339, antiphase shaping circuit 5 comprises reverser 74HC06, with the stepdown transformer T that noload voltage ratio is 220:6, stepdown process is carried out to line voltage, obtaining effective value is about 6V and the sinusoidal signal of electrical network with frequency homophase, this signal accesses the inphase input end of LM339 after RC filter circuit 3, the end of oppisite phase ground connection of LM339, now, when line voltage is greater than zero, LM339 exports the high level of+15V, when line voltage is less than zero, LM339 exports the low level of 0V, by+5V power supply and pullup resistor R2 ,+15V high level signal is become+5V, diode D plays oneway conduction effect, signal is now the squarewave signal of 50% duty ratio, this signal is through 74HC06 shaping, from+3.3V power supply and pullup resistor R4, the squarewave signal of+5V is become the squarewave signal of+3.3V, to meet the voltage range requirement of DSP2812 to input signal, now enter DSP with the squarewave signal of line voltage with same frequency and reversedphase.Caught the trailing edge of this squarewave signal by the capturing unit interface CAP3 of DSP, can obtain the zero crossing of line voltage, the adjacent time interval of catching operation for twice is cycle of line voltage.
Described current on line side signal processing circuit comprises current Hall transducer, sampling resistor RM, voltage follower circuit 7, antiphase add circuit 8 and antiphase ratio circuit 9, the output end voltage follow circuit 7 of described current Hall transducer, the output of voltage follower circuit 7 connects the input of antiphase add circuit 8, the output of antiphase add circuit 8 connects the input of antiphase ratio circuit 9, the output of antiphase ratio circuit 9 is the output of current on line side signal processing circuit, one end of sampling resistor RM is connected to the input of current Hall transducer and voltage follower circuit 7, sampling resistor RM other end ground connection, described current Hall transducer adopts current Hall module CHB25NP to realize threephase current detection, the current signal that transducer exports is converted to voltage signal by sampling resistor RM, this voltage signal is the AC signal that there is certain proportionate relationship with tested electric current, just can enter DSP after needing to be superposed certain bias voltage to calculate.Because the voltage range of the inner A/D sampling of DSP2812 is 0 ~ 3V, therefore bias voltage elects 1.5V as, voltage corresponding to sample rate current maximum elects 2.5V as, and voltage corresponding to sample rate current minimum value elects 0.5V as, namely the amplitude of voltage is set to 1V, and the voltage magnitude namely on measuring resistance is 1V.V _{m}antiphase add circuit 8 is together entered with 1.5V direct current biasing after voltage follower circuit 7 impedance isolation.Voltage signal is now between2.5V ~0.5V, then through antiphase ratio circuit 9, the voltage signal finally exporting 0.5V ~ 2.5V enters the A/D mouth of DSP.
Described antiphase add circuit 8 comprises operation amplifier 6, first resistance R1, the second resistance R2 and the 3rd resistance R3, one end of first resistance R1 is connected with the output of voltage follower circuit 7, the inverting input of 6 is amplified in the other end concatenation operation of the first resistance R1, between the inverting input that 3rd resistance R3 is attempted by operation amplifier 6 and output, the inverting input of 6 is amplified in one end concatenation operation of the second resistance R2, the other end is power input, the resistance of resistance=the 3rd resistance R3 of the resistance=the second resistance R2 of described first resistance R1.
Described driver module comprises three identical drive circuits of structure, described drive circuit comprises optocoupler 10 and backpressure circuit 11, the output of optocoupler 10 connects the input of backpressure circuit 11, the connect input of optocoupler 10 of the output of backpressure circuit 11 and the power tube of threephase VIENNA rectification circuit is the input of driver module, the output of backpressure circuit 11 is the output of driver module, use TLP250 as system drive control chip herein, optocoupler 10 is used to drive the isolation that can realize strong and weak electricity signal, reduce system power unit to the interference of key control unit.Meanwhile, optocoupler 10 output connect backpressure circuit 11 can the reliable turnoff of guaranteed output pipe, prevent from misleading and cause device for power switching to damage, improve system reliability.
Based on the control method of the threephase VIENNA rectifier under 60 ° of coordinate systems, comprise the following steps:
Step one, initialization is carried out to DSP control system, start to catch interrupt routine, be specially: trigger condition is set, by voltage on line side signal processing circuit, sinusoidal network voltage signal transposition squarewave pulse signal is delivered to the interrupt trap end of DSP control system, the signal of twice feeding interruption DSP control system is made the mains frequency that difference obtains system, when mains frequency meets trigger condition, enters interruption subroutine;
Step 2, carry out interrupt routine, specifically comprise: first judge whether system is in malfunction, when system malfunctions, record fault type, and close PWM module, cutting system main circuit simultaneously, when system failure, enter A/D sampling subprogram, read A/D sampled result, offset current command signal is calculated by Harmonic Detecting Algorithm, 60 ° of coordinate system SVPWM modulation are used to realize current followup control, draw the comparison value in the comparand register of DSP control system, DSP control system task manager is finally utilized to export the power tube of pwm pulse driving threephase VIENNA rectification circuit,
Described 60 ° of coordinate system SVPWM modulated processs comprise the following steps:
Harmonic Detecting Algorithm: Clark, Park convert, and Clark is transformed to: by coordinate transform, by variable by under converting twophase static α β coordinate system under three phase static coordinate to, that is:
Wherein,
In formula, i _{a}, i _{b}, i _{c}for the instantaneous value of threephase current; i _{α}, i _{β}for the biphase current after conversion;
To i _{α}and i _{β}carry out Park conversion and obtain meritorious and reactive current component i _{d}and i _{q}, be specially following formula:
Wherein,
According to the meritorious and idle component of the electric current and voltage of gained, drawn by current feedforward Uncoupling Control Based:
In formula: the active voltage value of gained after decoupling zero; the reactive voltage value of gained after decoupling zero; K _{p}: proportionality coefficient; K _{i}: integral coefficient; the sampled value of output voltage and setpoint do the voltage instruction value that difference obtains; system Reactive Power current instruction value; ω L: the equivalent inductive reactance of net side input inductance; V _{d}, V _{q}for after coordinate transform, the voltage of gained is gained merit and idle component.
Obtain the component of command voltage vector value at dq coordinate system by above formula, then the component under α β coordinate system can be obtained through Park inverse transformation; The namely projection of command voltage vector in α β reference axis.Because d axle represents real component, q axle represents idle component, can distinguish the meritorious and idle of control system by the electric current and voltage after decoupling zero.Instruction current vector can be obtained by formula below:
In formula, V _{ref}direct voltage setpoint; V _{dc}: actual DC voltage sample value; K _{1}: proportionality coefficient; K _{2}: integral coefficient, by the component of voltage under α β coordinate system through Park inverse transformation, obtains (the V under α β coordinate system _{r α}, V _{r β}), the coordinate under utilizing following formula transformation matrix C to obtain gh coordinate system,
In formula, (V _{rg}, V _{rh}) be the coefficient under gh axle after coordinate transform, Matrix C is the transformation matrix that alphabeta coordinate is tied to gh coordinate system, by abovementioned coordinate transform, uses the mode of similar Traditional Space vector, the space vector graph of a relation under gh coordinate system can be obtained, as shown in Figure 8;
Step 1, utilizes the Double closedloop of voltage and current strategy of Feedforward Decoupling, obtains the component of voltage vector under dq coordinate system, obtains gh coordinate system, specifically comprise through Park inverse transformation:
As Fig. 7, sampled value and the setpoint of output voltage do difference, can obtain current instruction value through pi regulator;
Step 2, according to gh establishment of coordinate system space vector graph of a relation, a given reference voltage space vector U _{ref}, space vector of voltage coordinate is rounded up or down and obtains reference voltage space vector U _{ref}4 basic vector V _{uD}, V _{dU}, V _{uU}and V _{dD}, be specially:
Wherein, V _{uD}, V _{dU}be respectively the first basic vector and the second basic vector V _{uU}and V _{dD}be the 3rd basic vector, V _{rh}for reference vector is in the projection of h axle; V _{rg}for reference vector is in the projection of g axle; reference vector rounds downwards in the projection of h axle; reference vector rounds downwards in the projection of g axle; reference vector rounds up in the projection of h axle; reference vector rounds up in the projection of g axle;
Can determine that spatial relationship the synthesis of reference vector must need V _{uD}, V _{dU}these two basic vectors, and the determination of the 3rd basic vector, then determined by the relation of reference vector and this two basic vector, V _{uD}, V _{dU}on coordinate line, the gh coordinate sum of any point is equal to V _{uD}, V _{dU}gh coordinate sum, that is:
g+h＝V _{UDg}+V _{UDh}
In formula, g, h: be gh coordinate under 60 ° of coordinate systems; V _{uDg}, V _{uDh}: be the projection of resultant vector under gh coordinate system on g, h axle.
Therefore, only reference vector U need be judged _{ref}gh coordinate sum and U _{uD}or U _{dU}gh coordinate sum between relation just can determine the 3rd basic voltage vectors, when the gh coordinate sum of reference vector is greater than U _{uD}gh coordinate sum time, U _{uU}be the 3rd basic voltage vectors, otherwise, U _{dD}be the 3rd basic voltage vectors.Relational expression is as follows:
Step 3, judges the large sector region at reference voltage space vector place and little sector region, is specially: work as U _{ref}when dropping in different quadrant, its projection in gh reference axis has heterogeneite, works as U _{ref}when dropping on I sector, its projection in gh reference axis is all greater than 0, works as U _{ref}when dropping on IV sector, its projection in gh reference axis is all less than 0, so just can judge U _{ref}whether in I, IV sector.II, the projection positivenegative relationship in III sector in gh reference axis is identical, so just need to introduce new criterion to judge sector, reference voltage vector place situation, different by Urg+Urh value in research discovery II, III sector, therefore by judging that the relation of Urg+Urh and 0 just can determine concrete sector, V, VI sector can use identical determination methods.Just can complete by the way and draw judgement, large sector judges as shown in table 2:
Table 2, large sector judges table:
According to the large sector at reference vector place, for the judgement of little sector and traditional SVPWM modulation system similar, need special straight line to distinguish the little sector at reference vector place, as shown in Figure 9, by judging  V _{rg},  V _{rh} can V be distinguished with the relation of numerical value 1 _{ref}in two kinds of situations of sector 2,4; For little sector 1,3, │ V _{rg}│, │ V _{rh}│ symbol is identical, and forming linear equation by (1,0) and (0,1) coordinate is V _{rg}+ V _{rh}=1, and sector 1,3 is respectively in these straight line both sides, therefore by judging V _{rg}+ V _{rh}can to distinguish medium and small sector, large sector, sector the 1,3, the Ith defining method as shown in table 3 with 1 relation, and the defining method of other medium and small sector, each large sector is similar.
The determination table of table 3 sector:
According to the interval at the reference vector place that said process obtains, the basic resultant vector utilizing step 2 to obtain, obtains vector T action time by voltagesecond balance principle _{1}, T _{2}and T _{3}, expression formula is:
When the 3rd vector V _{3}for V _{uU}in time, obtains:
When the 3rd vector V _{3}for V _{dD}in time, obtains:
T _{1}, T _{2}, T _{3}the action time of three vectors respectively; T _{s}: system communication cycle; V _{refh}: for reference vector is in the projection of h axle; V _{refg}: for reference vector is in the projection of g axle;
Step 4, if all on off states corresponding to switching vector selector are:
In formula, g, h are the basic voltage vectors coordinate figure of synthesized reference vector, by selecting k value in rational scope, drawing the threephase switch state of threelevel converter, such as, working as V _{ref}when dropping on I great Qu 1 little sector, one in its 3 basic vectors is [1,0] ^{t}, the threephase switch state corresponding by above formula this vector known is: [1,0,0] ^{t}, [2,1,1] ^{t}.In like manner can obtain other on off states, these on off states be carried out sequence and obtain seven segmentation pwm pulse signals, show the vector state order in I sector as table 4.([2 1 0] are corresponding on off state [1 01] respectively)
Table 4 basic vector order of action table:
The step that the balance realizing midpoint voltage controls, be specially: draw large vector and small vector by step 2 and step 3, from the operation principle of VIENNA rectifier, each actuating switch in the operating state that large vector is corresponding is all connected on DC bus, can not form loop with derided capacitors mid point, therefore alignment voltage is without impact; Equally, during zero vector effect, current circuit can not be set up with mid point electric capacity, midpoint voltage also can not be caused to fluctuate.Under middle vector operative condition in rectifier threephase one is connected with mid point, and twophase is connected to the positive and negative two ends of DC bus respectively in addition, at this moment all has electric current in two derided capacitors and flows through, when size of current is inconsistent, cause midpoint voltage to fluctuate.Small vector is understood alignment voltage equally and is impacted, this is because each small vector can make one in derided capacitors to produce voltage fluctuation, the principal element affecting midpoint potential is middle vector small vector, concludes the impact of each vector alignment voltage as table 5:
Table 5 voltage vector alignment current potential impact table:
Wherein small vector is divided into positive small vector and negative small vector according to the difference of affected electric capacity, and the impact of positive and negative small vector alignment current potential is just the opposite, and the action time therefore by reasonably distributing small vector can effectively control by alignment current potential.
The present embodiment adopts the midpoint voltage control method of modulating based on block ring regulation SVPWM, though middle vector alignment has impact, it does not have redundant state available, is therefore uncontrollable, so by regulating the action time of positive and negative small vector, the balance that can realize midpoint voltage controls.
Hysteresis control method is utilized to regulate the action time of positive and negative small vector, go out three basic vectors of reference vector and after the time of basic vector effect, by conducting and the shutoff of conversion and control VIENNA rectifier switching tube, the midpoint potential caused due to asymmetric, the lowfrequency current component of VIENNA rectification circuit and the fluctuation of load voltage is uneven, thus to cause be switching device and diode, the voltage stress value of electric capacity increases, switching loss is caused to increase, reduce the reliability of system, therefore need alignment voltage to carry out balance and control.
The balance realizing midpoint voltage controls, be specially: setting hysteresis band, judge that capacitance voltage regulates direction by detecting DC partial voltage capacitance voltage difference, when voltage difference is greater than the hysteresis band of default, adjust the action time of positive and negative small vector, thus derided capacitors voltage is tended to balance, if regulatory factor is f, T _{0}for the negative small vector action time before regulating, negative small vector T action time after adjustment _{p}for:
Positive small vector T action time _{q}for:
Action time after adjustment is redistributed, and then voltage vector is changed action time.
Figure 15 shows that the main program flow chart of system, it is mainly configured the operational environment of dsp system, in system correlated variables initialization, each interrupt initialization, judge whether opens interrupters subprogram etc., then enter and receive and send in the circulation of data, wait for the generation of interrupt event simultaneously.When interruption is unlocked, temporarily stop major cycle, enter into corresponding interrupt service subroutine and carry out various computing and configuration pwm control signal.After having interrupted, return major cycle, continued to wait for the generation next time interrupted.
Shown in Figure 16, capture interrupt subroutine flow chart, phaselocked function is realized by DSP trapping module, by aforementioned line voltage sync detection circuit, sinusoidal network voltage signal is converted to squarewave pulse signal, and pin is caught in the access of this signal, unlatching capturing unit interrupts, and the down trigger condition of capturing unit is set, the trigger condition setting capturing unit in the present embodiment is that trailing edge interrupts, the result twice being entered interruption makes the mains frequency that difference calculates system, the upper lower limit value of mains frequency is set in system, judged by program, when calculating gained electric voltage frequency is within the scope of this, think that this result is effective, and then run phaselocked program, otherwise jump out and this time interrupt.
Figure 17 is system A/D interruption subroutine flow chart, first the initialization of system A/D sampling module is carried out, complete the setting of A/D sampling module relevant parameter according to system design considerations, start A/D sampling afterwards, need to judge whether system is in malfunction before entering A/D sampling subprogram, when system malfunctions, record fault type, and close PWM module, simultaneously cutting system main circuit, prevent power tube misoperation, cause the damage of system hardware circuit.When system failure flag bit does not have set, namely during system failure, enter A/D sampling subprogram, read A/D sampled result, judge whether system starts simultaneously, if system is not activated, carry out system soft start, after certainty annuity starts, offset current command signal is calculated by Harmonic Detecting Algorithm, use 60 ° of coordinate system SVPWM modulation algorithms to realize current followup control, draw the comparison value in comparand register, finally utilize task manager to export pwm pulse driving power unit.
Figure 18 shows that Hysteresis control mode neutral balance program flow diagram, detect rectifier current output signal, capacitance voltage is detected simultaneously, calculate the sideplay amount of midpoint voltage, as judging whether the mark carrying out midpoint voltage control, when sideplay amount is greater than system program set point, enter the balance of voltage and regulate subprogram, first sector, reference vector place is judged, enter the value that voltageregulation subprogram calculates regulatory factor f, and the action time of basic vector is redistributed with it, generate seven segmentation pwm pulses and control the balance control that power tube realizes midpoint voltage.
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Cited By (9)
Publication number  Priority date  Publication date  Assignee  Title 

CN104836466A (en) *  20150528  20150812  哈尔滨理工大学  60degree coordinate systembased threephase VIENNA rectifier and control method 
CN105762833A (en) *  20160302  20160713  上海电力学院  Dead zone compensation method for gridconnected inverter 
CN106505853A (en) *  20161214  20170315  李矞辉  The single supply that band is simply protected turns twosupply circuit 
CN106849702A (en) *  20170412  20170613  哈尔滨理工大学  A kind of Novel rotary rectifier with malfunction monitoring function 
CN106911277A (en) *  20170407  20170630  哈尔滨理工大学  Control system for permanentmagnet synchronous motor based on matrix converter 
FR3064127A1 (en) *  20170315  20180921  Renault S.A.S  Method of controlling a battery charger of electric batteries. 
CN110535366A (en) *  20190701  20191203  山东大学  Seven level converters of one kind and its striding capacitance voltage control method, system 
CN111342684A (en) *  20200417  20200626  广东工业大学  Singlephase threelevel Buck PFC rectifier and control method thereof 
WO2020177238A1 (en) *  20190306  20200910  山东大学  Neutral point balance control method and system for threelevel converter of full power factor range 

2015
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Cited By (11)
Publication number  Priority date  Publication date  Assignee  Title 

CN104836466A (en) *  20150528  20150812  哈尔滨理工大学  60degree coordinate systembased threephase VIENNA rectifier and control method 
CN105762833A (en) *  20160302  20160713  上海电力学院  Dead zone compensation method for gridconnected inverter 
CN106505853A (en) *  20161214  20170315  李矞辉  The single supply that band is simply protected turns twosupply circuit 
FR3064127A1 (en) *  20170315  20180921  Renault S.A.S  Method of controlling a battery charger of electric batteries. 
CN106911277A (en) *  20170407  20170630  哈尔滨理工大学  Control system for permanentmagnet synchronous motor based on matrix converter 
CN106911277B (en) *  20170407  20190322  哈尔滨理工大学  Control system for permanentmagnet synchronous motor based on matrix converter 
CN106849702A (en) *  20170412  20170613  哈尔滨理工大学  A kind of Novel rotary rectifier with malfunction monitoring function 
WO2020177238A1 (en) *  20190306  20200910  山东大学  Neutral point balance control method and system for threelevel converter of full power factor range 
CN110535366A (en) *  20190701  20191203  山东大学  Seven level converters of one kind and its striding capacitance voltage control method, system 
CN110535366B (en) *  20190701  20200609  山东大学  Sevenlevel converter and flying capacitor voltage control method and system thereof 
CN111342684A (en) *  20200417  20200626  广东工业大学  Singlephase threelevel Buck PFC rectifier and control method thereof 
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