CN204556697U - A kind of oscillograph front-end circuit and there is its oscillograph - Google Patents

A kind of oscillograph front-end circuit and there is its oscillograph Download PDF

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CN204556697U
CN204556697U CN201520088813.0U CN201520088813U CN204556697U CN 204556697 U CN204556697 U CN 204556697U CN 201520088813 U CN201520088813 U CN 201520088813U CN 204556697 U CN204556697 U CN 204556697U
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circuit
resistance
zeroing
voltage
oscillograph
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邓珊珊
符兴建
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邓珊珊
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Abstract

The utility model relates to a kind of oscillograph front-end circuit and has its oscillograph.Described oscillograph front-end circuit comprises the differential conversion circuit, differential amplifier circuit and the analog-to-digital conversion module that connect successively, described oscillograph front-end circuit comprises zeroing circuit further, described zeroing circuit is arranged on the input end of described differential conversion circuit, described zeroing circuit for the equal zeroing circuit offset voltage of the zero migration voltage swing exported with described oscillograph front-end circuit produces, for offsetting described zero migration voltage.The beneficial effects of the utility model are: zeroing circuit is arranged on the input end of differential conversion circuit, zeroing circuit is made only to act on input end without differential conversion circuit, carry out compared with zeroing respectively to two paths of differential signal after needing zeroing circuit to carry out differential conversion with prior art, simplify the structure of zeroing circuit, reduce the cost of oscillograph front-end circuit.

Description

A kind of oscillograph front-end circuit and there is its oscillograph
Technical field
The utility model belongs to oscillograph technical field, is specifically related to a kind of oscillograph front-end circuit and has its oscillograph.
Background technology
Oscillograph, as a kind of surveying instrument, is widely used in the fields such as circuit debugging, signal measurement and collection.Oscillographic measuring amount is simulating signal, for high-precision oscillograph, requires that it can measure the voltage signal of millivolt (1 millivolt=0.001 volt) rank.
In oscillograph circuit, for reducing the interference to measuring-signal, and the measuring-signal of oscillograph front-end circuit is converted to the voltage range that oscillograph back-end circuit can sample, can between the data acquisition circuit and voltage signal to be measured of oscillograph front-end circuit design input pre-process circuit.But because electric elements precision exists the reasons such as deviation, the deviation voltage (deviation voltage is generally the voltage of the non-zero measured when input signal ground connection) of small millivolt rank can be produced in this oscillograph front-end circuit, if do not offset this deviation, measure amplitude comparatively small-signal time, can because the impact of this deviation causes measurement result inaccurate, so, how to eliminate this deviation voltage, deviation voltage zeroing is most important for the oscillographic measuring accuracy of raising.
Oscillograph front-end circuit of the prior art is generally differential configuration.Oscillograph front-end circuit shown in Fig. 1 is made up of pre-process circuit 101, first differential conversion circuit 102, differential amplifier circuit 103, analog-to-digital conversion module 104, second differential conversion circuit 110 and zeroing circuit 111.Voltage signal 105 to be measured converts inner voltage signal to be measured 106 to after pre-process circuit 101 processes, inner voltage signal 106 to be measured converts differential signal 107 (differential signal 107 comprises the reversed-phase output signal of positive output signal and the reversed-phase output output exported from the positive output end of the first differential conversion circuit 102) to after the first differential conversion circuit 102 processes, differential signal 107 converts differential amplification signal 109 (the positive differential amplification signal that the positive output end that differential amplification signal 109 comprises self difference amplifying signal 109 exports and the anti-phase differential amplification signal that reversed-phase output exports) to after differential amplifier circuit 103 amplifies, differential amplification signal 109 passes to after analog-to-digital conversion module 104 by analog-to-digital conversion module 104 data acquisition and process.Wherein, zeroing circuit 111 is arranged between differential amplifier circuit 103 and analog to digital conversion circuit 104.The signal passing to analog to digital conversion circuit 104 due to differential amplifier circuit 103 is differential amplification signal 109 (namely above-mentioned positive differential amplification signal and anti-phase differential amplification signal), therefore needs zeroing circuit 111 to return to zero respectively to two signals being passed to analog to digital conversion circuit 104 by differential amplifier circuit 103.Respectively zeroing process is carried out to these two signals to make zeroing circuit 111, therefore, the zeroed signal 108 that zeroing circuit 111 sends needs after the second differential conversion circuit 110, become corresponding two zeroed signal, make one of them zeroed signal act on above-mentioned positive differential amplification signal, and another zeroed signal act on above-mentioned anti-phase differential amplification signal.Adopt this structure, zeroing circuit 111 complex structure, adds the cost of oscillograph front-end circuit.
Therefore, wish that a kind of oscillograph front-end circuit overcomes or at least alleviates at least one above-mentioned defect of prior art.
Utility model content
In order to solve the problems referred to above that prior art exists, the utility model provides a kind of oscillograph front-end circuit.Described oscillograph front-end circuit comprises: the differential conversion circuit connected successively, differential amplifier circuit and analog-to-digital conversion module, described differential conversion circuit is used for converting the voltage signal to be measured received from its input end to differential signal, and pass to described differential amplifier circuit by its output terminal, described differential amplifier circuit is used for passing to described analog-to-digital conversion module by after the described differential signal amplification received from its output terminal, described analog-to-digital conversion module is for receiving the described differential signal after described differential amplifier circuit amplifies, described oscillograph front-end circuit comprises zeroing circuit further, described zeroing circuit is arranged on the input end of described differential conversion circuit, described zeroing circuit is for the equal zeroing circuit offset voltage of the zero migration voltage swing exported with described oscillograph front-end circuit produces, for offsetting described zero migration voltage.
Preferably, described differential conversion circuit comprises the first feedback loop, the second feedback loop, the first resistance, the second resistance and single-ended transfer difference device; Described single-ended transfer difference device has first input end, the second input end, positive output end and reversed-phase output; Described first feedback loop is used for the signal feedback of described positive output end to described first input end; Described second feedback loop is used for the signal feedback of described reversed-phase output to described second input end; Described first resistance is connected with described first input end, and described second resistance is connected with described second input end, and wherein, described first input end is for receiving the voltage signal to be measured after described first resistance; Described second input end is used for connecing reference voltage.
Preferably, described zeroing circuit comprises the first zeroing branch road, the output terminal of described first zeroing branch road is connected with described second resistance, described first zeroing branch road is for generation of the first zeroing branch road offset voltage, and described first zeroing branch road offset voltage is used for partly or wholly offsetting zero migration voltage.
Preferably, described first zeroing branch road comprises the first variable voltage source, the output terminal of described first variable voltage source is connected with described second resistance, and the mode that described first zeroing branch road changes voltage swing by described first variable voltage source adjusts its first zeroing circuit offset voltage exported.
Preferably, described zeroing circuit comprises the second zeroing branch road and voltage attenuation circuit further; The output terminal of described second zeroing branch road is arranged between described first resistance and described first input end, and described second zeroing branch road reduces rear output second and to return to zero branch road offset voltage with being used for the voltage scale that inputted by its input end; The output terminal of described voltage attenuation circuit is arranged between described second resistance and described second input end; Described voltage attenuation circuit is used for being exported after the reduction of its input terminal voltage by output terminal, and its reduction ratio and described second returns to zero, branch road reduction ratio is identical; Wherein, described second zeroing branch road offset voltage is used for offsetting remaining described zero migration voltage when described first zeroing branch road offset voltage partly offsets zero migration voltage.
Preferably, described second zeroing branch road comprises the second variable voltage source and the 3rd resistance, and described 3rd resistance is arranged between described second variable voltage source and described first input end; Described voltage attenuation circuit comprises fixed voltage source and the 4th resistance, and described 4th resistance is arranged between described fixed voltage source and described second input end; Wherein, the resistance of described 3rd resistance is greater than the resistance of described first resistance, and the resistance of described 4th resistance is greater than the resistance of described second resistance.
Preferably, the resistance value ratio between described 3rd resistance and described first resistance equals the resistance value ratio between described 4th resistance and described second resistance.
Preferably, described oscillograph front-end circuit comprises analog-digital chip further, and described first variable voltage source and described second variable voltage source are produced by described analog-digital chip and export.
Preferably, described oscillograph front-end circuit comprises digital regulation resistance further, and described first variable voltage source and described second variable voltage source are produced by described digital regulation resistance and export.
The utility model additionally provides a kind of oscillograph, comprises oscillograph front-end circuit as above.
The technical scheme that the utility model adopts is: zeroing circuit is arranged on the input end of differential conversion circuit, zeroing circuit for the equal zeroing circuit offset voltage of the zero migration voltage swing exported with oscillograph front-end circuit produces, for offsetting described zero migration voltage.
The beneficial effects of the utility model are: zeroing circuit is arranged on the input end of differential conversion circuit, zeroing circuit is made only to act on input end without differential conversion circuit, zeroing circuit is needed to carry out compared with zeroing respectively to two signals being passed to analog to digital conversion circuit by differential amplifier circuit with prior art, simplify the structure of zeroing circuit, reduce the cost of oscillograph front-end circuit.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of the oscillograph front-end circuit of differential configuration in prior art
Fig. 2 is the schematic diagram of oscillograph front-end circuit of the present utility model.
Fig. 3 is the schematic diagram of differential conversion circuit in the oscillograph front-end circuit shown in Fig. 2 and zeroing circuit.
In figure: 101, pre-process circuit; 102, the first differential conversion circuit; 103, differential amplifier circuit; 104, analog-to-digital conversion module; 105, voltage signal to be measured; 106, inner voltage signal to be measured; 107, the first differential signal; 108, zeroed signal; 109, the second differential signal; 110, the second differential conversion circuit; 111, zeroing circuit; 202, differential conversion circuit; 2021, single-ended transfer difference device; 2022, the first resistance; 2023, the second resistance; 2024, the first negative feedback resistor; 2025, the second negative feedback resistor; 203, differential amplifier circuit; 204, analog-to-digital conversion module; 205, voltage signal to be measured; 207, differential signal; 208, zeroing circuit; 2081, the 3rd resistance; 2082, the 4th resistance; 2083, the second variable voltage source; 2085, fixed voltage source; 2086, the first variable voltage source.
Embodiment
The object implemented for making the utility model, technical scheme and advantage clearly, below in conjunction with the accompanying drawing in the utility model embodiment, are further described in more detail the technical scheme in the utility model embodiment.In the accompanying drawings, same or similar label represents same or similar element or has element that is identical or similar functions from start to finish.Described embodiment is the utility model part embodiment, instead of whole embodiments.Be exemplary below by the embodiment be described with reference to the drawings, be intended to for explaining the utility model, and can not be interpreted as restriction of the present utility model.Based on the embodiment in the utility model, those of ordinary skill in the art are not making the every other embodiment obtained under creative work prerequisite, all belong to the scope of the utility model protection.Below in conjunction with accompanying drawing, embodiment of the present utility model is described in detail.
In description of the present utility model, it will be appreciated that, term " " center ", " longitudinal direction ", " transverse direction ", " front ", " afterwards ", " left side ", " right side ", " vertically ", " level ", " top ", " end " " interior ", orientation or the position relationship of the instruction such as " outward " are based on orientation shown in the drawings or position relationship, only the utility model and simplified characterization for convenience of description, instead of indicate or imply that the device of indication or element must have specific orientation, with specific azimuth configuration and operation, therefore the restriction to the utility model protection domain can not be interpreted as.
Fig. 2 is the schematic diagram of oscillograph front-end circuit of the present utility model.Fig. 3 is the schematic diagram of differential conversion circuit in the oscillograph front-end circuit shown in Fig. 2 and zeroing circuit.
Oscillograph front-end circuit shown in Fig. 2 comprises the differential conversion circuit 202, differential amplifier circuit 203, analog-to-digital conversion module 204 and the zeroing circuit 208 that connect successively.Wherein, this zeroing circuit 208 is arranged on the input end of differential conversion circuit 202.Particularly, differential conversion circuit 202 is for converting the voltage signal to be measured 205 received from its input end to differential signal 207, and pass to differential amplifier circuit 203 by its output terminal, differential amplifier circuit 203 passes to described analog-to-digital conversion module 204 from its output terminal after being amplified by the differential signal 207 of reception, and analog to digital conversion circuit 204 is for receiving the differential signal 207 after differential amplifier circuit 203 amplifies.Zeroing circuit 208 for the equal zeroing circuit offset voltage of the zero migration voltage swing exported with oscillograph front-end circuit produces, for offsetting zero migration voltage.
See Fig. 3, differential conversion circuit 202 comprises the first resistance 2022, second resistance 2023, single-ended transfer difference device 2021, first negative feedback resistor 2024 and the second negative feedback resistor 2025.Single-ended transfer difference device 2021 has first input end, the second input end, positive output end and reversed-phase output.
See Fig. 3, between the positive output end that first negative feedback resistor 2024 is arranged on single-ended transfer difference device 2021 and first input end, make positive output end, the first negative feedback resistor 2024 forms the first feedback loop with first input end, for the signal feedback of the positive output end by single-ended transfer difference device 2021 to first input end.
In like manner, second negative feedback resistor 2025 is arranged between the negative output terminal of single-ended transfer difference device 2021 and the second input end, make negative output terminal, the second negative feedback resistor 2025 and the second input end form the second feedback loop, the second feedback loop is used for the signal feedback of the reversed-phase output of single-ended transfer difference device 2021 to the second input end.
See Fig. 3, the first resistance 2022 is connected with first input end, and the second resistance 2023 is connected with the second input end; Wherein, first input end is for receiving the voltage signal to be measured 205 after the first resistance 2022; Second input end is used for connecing reference voltage.
Be understandable that, first input end and second input end of differential conversion circuit 202 can exchange, and can realize the purpose of this utility model too.Such as, in an alternative embodiment, first input end is used for connecing reference voltage; Second input end is for receiving the voltage signal to be measured after the first resistance.Other structure and working principle of differential conversion circuit in this alternative all with embodiment illustrated in fig. 3 in differential conversion circuit 202 identical, do not repeat them here.
Be understandable that, differential conversion circuit 202 has various structures, and the structure of differential conversion circuit 202 all belongs to known technology, and therefore, any differential conversion circuit that can realize the object of the utility model is all within protection domain of the present utility model.
See Fig. 3, in the present embodiment, zeroing circuit 208 comprises the first zeroing branch road, the second zeroing branch road and voltage attenuation circuit.
The output terminal of the first zeroing branch road is connected with the second resistance 2023, and described first zeroing branch road is for generation of the first zeroing branch road offset voltage.In the present embodiment, the first zeroing branch road offset voltage is used for partly offsetting zero migration voltage.Particularly, first zeroing branch road comprises the first variable voltage source 2086, the output terminal of the first variable voltage source 2086 is connected with the second resistance 2023, and the mode that the first zeroing branch road changes voltage swing by the first variable voltage source 2086 adjusts its first zeroing circuit offset voltage exported.
In another alternative, the first zeroing circuit offset voltage is used for offsetting zero migration voltage fully.Saying of citing, in this alternative, when second input end (namely connecing reference voltage terminal) of single-ended transfer difference device 2021 has zero migration voltage+V0, by regulating the voltage swing of the first variable voltage source 2086, make the first variable voltage source 2086 export one and+V0 equal and opposite in direction zeroing circuit offset voltage-V0, thus offset zero migration voltage+V0.
Be understandable that, the precision of the zeroing circuit offset voltage that this kind of structure exports for variable voltage source 2086 proposes higher requirement, namely as a rule, + V0 the size that first variable voltage source 2086 exports is difficult to be equal to zeroing circuit offset voltage-V0, and namely+V0 and-V0 sum are not equal to 0.Therefore, advantageously, in the present embodiment, the second zeroing branch road and voltage attenuation circuit is added.
The output terminal of the second zeroing branch road is arranged between the first resistance 2022 and first input end, and the second zeroing branch road reduces rear output second and to return to zero branch road offset voltage with being used for the voltage scale that inputted by its input end.Particularly, the second zeroing branch road comprises the second variable voltage source 2083 and the 3rd resistance the 2081, three resistance 2081 is arranged between the second variable voltage source 2083 and described first input end.
In the present embodiment, the second zeroing branch road offset voltage is used for offsetting remaining zero migration voltage when the first zeroing branch road offset voltage partly offsets zero migration voltage.Namely the second zeroing branch road offset voltage and first branch road offset voltage absolute value sum numerically that return to zero equals the numerical value of offset voltage at zero point, and counteracting zero migration voltage jointly.Namely, in above-mentioned citing, when namely+V0 and-V0 sum are not equal to 0, export one by the second zeroing branch road offset voltage and equal+V0 and the voltage of the difference of the absolute value of-V0, for offsetting zero migration voltage further, reaching the object of accurately zeroing.
The output terminal of voltage attenuation circuit is arranged between the second resistance 2023 and the second input end, and voltage attenuation circuit is used for being exported after the reduction of its input terminal voltage by output terminal, and its reduction ratio and second returns to zero, branch road reduction ratio is identical.Particularly, voltage attenuation circuit comprises fixed voltage source 2085 and the 4th resistance the 2082, four resistance 2082 is arranged between fixed voltage source 2085 and the second input end.Be understandable that, increasing voltage attenuation circuit is due to itself symmetry feature of differential conversion circuit, can have same attenuation ratio to make two of difference channel input ends.Should be known technology, namely not illustrate herein.
Be understandable that, fixed voltage source 2085 can be replaced by the 3rd variable voltage source, namely, in a not shown embodiment, voltage attenuation circuit comprises the 3rd variable voltage source and the 4th resistance, and the 4th resistance is arranged between fixed voltage source and the second input end.Similarly, due to difference channel symmetry feature, make in this embodiment, both can adjust the mode that voltage attenuation circuit also can return to zero branch road by adjustment second and reach the effect that in the present embodiment, the second zeroing branch road should reach, certainly, adjustment voltage attenuation circuit or the second zeroing branch road also can simultaneously.
Be understandable that, at above-mentioned first input end for connecing in the alternative of reference voltage, first zeroing branch road is connected with the first resistance of differential conversion circuit, for exporting the first zeroing circuit offset voltage to first input end, concrete structure and the principle of work of this first zeroing branch road and embodiment illustrated in fig. 3 in the first zeroing circuit substantially identical, namely repeat no more hereinafter.
In the present embodiment, the resistance of the 3rd resistance 2081 is greater than the resistance of the first resistance 2022, and the resistance of the 4th resistance 2082 is greater than the resistance of the second resistance 2023.
Conveniently calculate the output quantity of each adjustable voltage, advantageously, the resistance value ratio between the 3rd resistance 2081 and the first resistance 2022 equals the resistance value ratio between the 4th resistance 2082 and the second resistance 2023.
More advantageously, the resistance of the 3rd resistance 2081 is the resistance integer multiple of the first resistance 2022, and the resistance of the 4th resistance 2082 is the integer multiple of the resistance of the second resistance 2023.
In the present embodiment, oscillograph front-end circuit comprises analog-digital chip further, and the first variable voltage source 2086 and the second variable voltage source 2083 are produced by analog-digital chip and export.
Be understandable that, the first variable voltage source 2086 and the second variable voltage source 2083 can be produced by same analog-digital chip and export, and also can be produced by different analog-digital chips and export.
In the present embodiment, analog-digital chip is 12 analog-digital chips.It is pointed out that analog-digital chip is not limited to 12 analog-digital chips, any analog-digital chip that can realize the object of the utility model is all in protection domain of the present utility model.
Be understandable that, other any can reaching provide the mode of the first variable voltage source 2086 and the second variable voltage source 2083 in the present embodiment all in protection domain of the present utility model.Such as, the first variable voltage source and the second variable voltage source can be produced by digital regulation resistance and export.
Be understandable that, the first variable voltage source 2086 and the second variable voltage source 2083 can be produced by same digital regulation resistance and export, and also can be produced by different digital regulation resistances and export.
Again such as, the first variable voltage source and the second variable voltage source also can be produced by the voltage digital-to-analog conversion output circuit based on PWM and be exported.
Be understandable that, the first variable voltage source 2086 and the second variable voltage source 2083 can be produced by the same voltage digital-to-analog conversion output circuit based on PWM and be exported, and also can be produced by the different voltage digital-to-analog conversion output circuits based on PWM and be exported.
The utility model additionally provides a kind of oscillograph, comprises oscillograph front-end circuit as above.
Zeroing circuit in oscillograph front-end circuit of the present utility model is arranged on the input end of differential conversion circuit, zeroing circuit is made only to act on input end without differential conversion circuit, zeroing circuit is needed to carry out compared with zeroing respectively to two signals being passed to analog to digital conversion circuit by differential amplifier circuit with prior art, simplify the structure of zeroing circuit, reduce the cost of oscillograph front-end circuit.
The utility model is not limited to above-mentioned preferred forms; anyone can draw other various forms of products under enlightenment of the present utility model; no matter but any change is done in its shape or structure; every have identical with the application or akin technical scheme, all drops within protection domain of the present utility model.

Claims (10)

1. an oscillograph front-end circuit, is characterized in that, comprising: the differential conversion circuit (202) connected successively, differential amplifier circuit (203) and analog-to-digital conversion module (204),
Described differential conversion circuit (202) for converting the voltage signal to be measured received from its input end (205) to differential signal (207), and passes to described differential amplifier circuit (203) by its output terminal,
Described differential amplifier circuit (203) passes to described analog-to-digital conversion module (204) from its output terminal after being amplified by the described differential signal (207) received,
Described analog-to-digital conversion module (204) for receive through described differential amplifier circuit (203) amplify after described differential signal (207),
Described oscillograph front-end circuit comprises zeroing circuit (208) further, described zeroing circuit (208) is arranged on the input end of described differential conversion circuit (202), described zeroing circuit (208) for the equal zeroing circuit offset voltage of the zero migration voltage swing exported with described oscillograph front-end circuit produces, for offsetting described zero migration voltage.
2. oscillograph front-end circuit as claimed in claim 1, it is characterized in that, described differential conversion circuit (202) comprises the first feedback loop, the second feedback loop, the first resistance (2022), the second resistance (2023) and single-ended transfer difference device (2021);
Described single-ended transfer difference device (2021) has first input end, the second input end, positive output end and reversed-phase output;
Described first feedback loop is used for the signal feedback of described positive output end to described first input end;
Described second feedback loop is used for the signal feedback of described reversed-phase output to described second input end;
Described first resistance (2022) is connected with described first input end, and described second resistance (2023) is connected with described second input end, wherein,
Described first input end is used for receiving the voltage signal to be measured (205) after described first resistance (2022); Described second input end is used for connecing reference voltage.
3. oscillograph front-end circuit as claimed in claim 2, it is characterized in that, described zeroing circuit (208) comprises the first zeroing branch road, the output terminal of described first zeroing branch road is connected with described second resistance (2023), described first zeroing branch road is for generation of the first zeroing branch road offset voltage, and described first zeroing branch road offset voltage is used for partly or wholly offsetting zero migration voltage.
4. oscillograph front-end circuit as claimed in claim 3, it is characterized in that, described first zeroing branch road comprises the first variable voltage source (2086), the output terminal of described first variable voltage source (2086) is connected with described second resistance (2023), and the mode that described first zeroing branch road changes voltage swing by described first variable voltage source (2086) adjusts its first zeroing circuit offset voltage exported.
5. oscillograph front-end circuit as claimed in claim 4, it is characterized in that, described zeroing circuit (208) comprises the second zeroing branch road and voltage attenuation circuit further;
The output terminal of described second zeroing branch road is arranged between described first resistance (2022) and described first input end, and described second zeroing branch road reduces rear output second and to return to zero branch road offset voltage with being used for the voltage scale that inputted by its input end;
The output terminal of described voltage attenuation circuit is arranged between described second resistance (2023) and described second input end; Described voltage attenuation circuit is used for being exported after the reduction of its input terminal voltage by output terminal, and its reduction ratio and described second returns to zero, branch road reduction ratio is identical; Wherein,
Described second zeroing branch road offset voltage is used for offsetting remaining described zero migration voltage when described first zeroing branch road offset voltage partly offsets zero migration voltage.
6. oscillograph front-end circuit as claimed in claim 5, it is characterized in that, described second zeroing branch road comprises the second variable voltage source (2083) and the 3rd resistance (2081), and described 3rd resistance (2081) is arranged between described second variable voltage source (2083) and described first input end;
Described voltage attenuation circuit comprises fixed voltage source (2085) and the 4th resistance (2082), and described 4th resistance (2082) is arranged between described fixed voltage source (2085) and described second input end; Wherein,
The resistance of described 3rd resistance (2081) is greater than the resistance of described first resistance (2022), and the resistance of described 4th resistance (2082) is greater than the resistance of described second resistance (2023).
7. oscillograph front-end circuit as claimed in claim 6, it is characterized in that, the resistance value ratio between described 3rd resistance (2081) and described first resistance (2022) equals the resistance value ratio between described 4th resistance (2082) and described second resistance (2023).
8. oscillograph front-end circuit as claimed in claim 7, it is characterized in that, described oscillograph front-end circuit comprises analog-digital chip further, and described first variable voltage source (2086) and described second variable voltage source (2083) are produced by described analog-digital chip and export.
9. oscillograph front-end circuit as claimed in claim 7, it is characterized in that, described oscillograph front-end circuit comprises digital regulation resistance further, and described first variable voltage source and described second variable voltage source are produced by described digital regulation resistance and export.
10. an oscillograph, is characterized in that, comprises oscillograph front-end circuit as claimed in any one of claims 1-9 wherein.
CN201520088813.0U 2015-02-06 2015-02-06 A kind of oscillograph front-end circuit and there is its oscillograph Expired - Fee Related CN204556697U (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107315153A (en) * 2017-06-09 2017-11-03 中国电子科技集团公司第四十研究所 A kind of peak power probe hardware adjustments zero offset circuit and method
CN107782942A (en) * 2016-08-31 2018-03-09 北京普源精电科技有限公司 Oscilloscope measurement circuit and its Active Front End, test system, measuring method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107782942A (en) * 2016-08-31 2018-03-09 北京普源精电科技有限公司 Oscilloscope measurement circuit and its Active Front End, test system, measuring method
CN107782942B (en) * 2016-08-31 2021-03-02 北京普源精电科技有限公司 Oscilloscope measuring circuit, active front end thereof, testing system and measuring method
CN107315153A (en) * 2017-06-09 2017-11-03 中国电子科技集团公司第四十研究所 A kind of peak power probe hardware adjustments zero offset circuit and method

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