CN204425509U - A kind of mosaic display screen being provided with Built-in Image processor - Google Patents
A kind of mosaic display screen being provided with Built-in Image processor Download PDFInfo
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- CN204425509U CN204425509U CN201520093138.0U CN201520093138U CN204425509U CN 204425509 U CN204425509 U CN 204425509U CN 201520093138 U CN201520093138 U CN 201520093138U CN 204425509 U CN204425509 U CN 204425509U
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Abstract
The utility model discloses a kind of mosaic display screen being provided with Built-in Image processor, described mosaic display screen comprises at least two display units, described display unit is provided with Built-in Image processor, described Built-in Image processor comprises output signal processing module and high speed serialization processing module, the display unit Built-in Image processor be connected with original input signal source also comprises input signal processing module, and each display unit is interconnected by high speed serialization processing module.The mosaic display screen being provided with Built-in Image processor adopts multichannel independent serial connection mechanism, any one processing module breaks down and large-size screen monitors all can not be caused to occur the phenomenon that blank screen can not show, ensure that the long-time running safety of large-size screen monitors, and the direct access of vision signal decreases the conversion and process that repeatedly access signal, ensure that the best display effect of picture quality.
Description
Technical field
The utility model relates to Large Screen Display Technology field, particularly relates to a kind of mosaic display screen being provided with Built-in Image processor.
Background technology
For multi-screen splicing display system, in order to realize the display of arbitrary signal arbitrary size optional position on mosaic screen, substantially be all adopt external image processor in the market, as shown in Figure 7, various signal source comprises CVBS, VGA, DVI, IP streaming media video signal is all input to external processor, then by the process of external image processor, the Built-in Image processor of the display unit of each mosaic screen is outputted to eventually through DVI mouth, the Built-in Image processor of the unit of each display the DVI signal of input is converted to display screen or the signal of DLP projection needed for movement shows.
When being driven large-size screen monitors display by external image processor, if external image processor breaks down, part mosaic screen display unit or all display units of mosaic screen will be caused not to show, and various image signal source is through repeatedly image conversion process, can cause picture quality loss to a certain degree.
Utility model content
In view of current mosaic screen image procossing above shortcomings, the utility model provides a kind of mosaic display screen being provided with Built-in Image processor, the mosaic display screen being provided with Built-in Image processor adopts multichannel independent serial connection mechanism, any one processing module breaks down and large-size screen monitors all can not be caused to occur the phenomenon that blank screen can not show, ensure that the long-time running safety of large-size screen monitors, and the direct access of vision signal decreases the conversion and process that repeatedly access signal, ensure that the best display effect of picture quality.
For achieving the above object, embodiment of the present utility model adopts following technical scheme:
A kind of mosaic display screen being provided with Built-in Image processor, described mosaic display screen comprises at least two display units, described display unit is provided with Built-in Image processor, described Built-in Image processor comprises output signal processing module and high speed serialization processing module, the display unit Built-in Image processor be connected with original input signal source also comprises input signal processing module, and each display unit is interconnected by high speed serialization processing module.
According to an aspect of the present utility model, described high speed serialization processing module comprises the input-buffer, high-speed transfer buffer memory and the output buffer memory that connect successively.
According to an aspect of the present utility model, the high-speed transfer buffer memory of described high speed serialization processing module comprises write scheduler module, write line cache module, sense wire cache module and reads scheduler module, said write scheduler module is flexibly connected with write line cache module, sense wire cache module is flexibly connected with reading scheduler module, after write line cache module writes with sense data after sense wire cache module carry out position and exchange function.
According to an aspect of the present utility model, said write scheduler module is provided with high speed serialization processing module Data Input Interface and display unit input-buffer Data Input Interface, and described reading scheduler module is provided with high speed serialization processing module data output interface and display unit exports data cached output interface.
According to an aspect of the present utility model, described high speed serialization processing module is high-speed figure process chip FPGA or DSP.
According to an aspect of the present utility model, described input signal processing module comprises multichannel CVBS SD analog input signal processing module, the input signal processing module being provided with DVI-Integrated, IP Streaming Media input signal processing module and multiple signals and selects processing module, and described multichannel CVBS SD analog input signal processing module, the input signal processing module being provided with DVI-Integrated select processing module to be connected with multiple signals with IP Streaming Media input signal processing module respectively.
According to an aspect of the present utility model, described input signal processing module also comprises signal conversion module, described signal conversion module and multiple signals select processing module to be connected, and described signal conversion module is connected with IP Streaming Media input signal processing module with multichannel CVBS SD analog input signal processing module, the input signal processing module that is provided with DVI-Integrated respectively.
According to an aspect of the present utility model, described input signal processing module is provided with signal input interface, signal output interface and high speed serialization processing module data output interface.
According to an aspect of the present utility model, described output signal processing module comprises the convergent-divergent cutting process module and multiple signals lamination processing module that are connected.
According to an aspect of the present utility model, described output signal processing module is provided with high speed serialization processing module data receiver interface.
The advantage that the utility model is implemented: the mosaic display screen being provided with Built-in Image processor adopts multichannel independent serial connection mechanism, any one processing module breaks down and large-size screen monitors all can not be caused to occur the phenomenon that blank screen can not show, ensure that the long-time running safety of large-size screen monitors, and the direct access of vision signal decreases the conversion and process that repeatedly access signal, ensure that the best display effect of picture quality.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme in the utility model embodiment, be briefly described to the accompanying drawing used required in embodiment below, apparently, accompanying drawing in the following describes is only embodiments more of the present utility model, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is a kind of structural representation being provided with the Built-in Image processor of the mosaic display screen of Built-in Image processor described in the utility model;
Fig. 2 is a kind of structural representation being provided with the Built-in Image processor high speed serial process module of the mosaic display screen of Built-in Image processor described in the utility model;
Fig. 3 is a kind of structural representation being provided with the high-speed transfer buffer memory of the high speed serialization processing module of the Built-in Image processor of the mosaic display screen of Built-in Image processor described in the utility model;
Fig. 4 is a kind of structural representation being provided with the input signal processing module of the Built-in Image processor of the mosaic display screen of Built-in Image processor described in the utility model;
Fig. 5 is a kind of structural representation being provided with the output signal processing module of the Built-in Image processor of the mosaic display screen of Built-in Image processor described in the utility model;
Fig. 6 is the structural representation of the mosaic display screen adopting Built-in Image processor;
Fig. 7 is the structural representation that prior art is provided with the mosaic display screen of external processor;
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, be clearly and completely described the technical scheme in the utility model embodiment, obviously, described embodiment is only the utility model part embodiment, instead of whole embodiments.Based on the embodiment in the utility model, those of ordinary skill in the art are not making the every other embodiment obtained under creative work prerequisite, all belong to the scope of the utility model protection.
As shown in Fig. 1, Fig. 6, a kind of mosaic display screen being provided with Built-in Image processor, described mosaic display screen comprises at least two display units 1, described display unit 1 is provided with Built-in Image processor, described Built-in Image processor comprises output signal processing module 4 and high speed serialization processing module 2, the display unit 1 be connected with original input signal source also comprises input signal processing module 3, and each display unit 1 is interconnected by high speed serialization processing module 2.
As shown in Figure 2, high speed serialization processing module 2 comprises the input-buffer 21, high-speed transfer buffer memory 22 and the output buffer memory 23 that connect successively.
As shown in Fig. 1, Fig. 6, two or four high speed serialization processing modules are configured according to project demands, input signal processing module is matched according to the input signal quantity of user's request, and when input signal quantity is few, part Built-in Image processor can not configure input signal processing module.
The raw video signal source being provided with display unit connection in the mosaic display screen of Built-in Image processor described in the utility model is exported by after the process of input signal processing module point of two-way, the display screen unit display that signal output module enters at original video signal source is exported on one tunnel, another road outputs to the first high speed serialization processing module or the second high speed serialization processing module is supplied to other its unit display units, the vision signal of other display unit is transferred to the first high speed serialization processing module or the second high speed serialization processing module by high speed serialization connecting line, export be transferred to the output signal processing module process of display unit by high speed serialization processing module after and drive the display screen of display unit or projection light machine to show.In whole image real time transfer process, as long as input signal to be converted in input signal processing module to the 24BIT digital image format of standard, do not need to carry out format conversion to signal again, owing to there being Liang Zhi tetra-road high speed serialization processing module, when a high speed serialization processing module breaks down, other high speed serialization processing module can ensure the image transmitting between each display unit.
As shown in Figure 3, in the present embodiment, the high-speed transfer buffer memory 22 of high speed serialization processing module 2 comprises write scheduler module 221, write line cache module 222, sense wire cache module 223 and reads scheduler module 224, said write scheduler module 221 is flexibly connected with write line cache module 222, sense wire cache module 223 is flexibly connected with reading scheduler module 224, after write line cache module 222 writes with sense data after sense wire cache module 223 carry out position and exchange function.
In the present embodiment, write scheduler module 221 is provided with high speed serialization processing module 2 Data Input Interface and display unit input-buffer 21 Data Input Interface, and described reading scheduler module 224 is provided with high speed serialization processing module 2 data output interface and display unit exports buffer memory 23 data output interface.
In the present embodiment, high speed serialization processing module 2 is high-speed figure process chip FPGA or DSP.
As shown in Figure 2, high speed serialization processing module is realized by high-speed figure process chip FPGA or DSP, the data exported by input signal processing module are by input-buffer write high-speed transfer buffer memory, and the data write output buffer memory read by high-speed transfer is supplied to output signal processing module.
Every road high-speed transfer bandwidth can reach more than 20Gbit/S, multi-path high-definition vision signal can be transmitted, in order to reduce because transmit the signal delay caused, whole buffer memory adopts line cache mode, such as full HD 1920*1080 form, one frame picture has 1080 lines, whole process is time delay 1 line only, vision for people can be ignored and not remember, by write scheduling, high speed serialization is connected the data of input and the video data write lambda line cache module of this unit input-buffer, the source data from different videos writes different line buffer memorys; Wholely be cached with the same cache module of two groups of size structures, when one group for writing, another group is used for exporting; When reading and writing next line, these two groups of pooling features exchange; By reading scheduling, the data reading of line cache module is supplied to high speed serialization connection delivery outlet and this unit output buffer memory.
As shown in Figure 4, input signal processing module 3 comprises multichannel CVBS SD analog input signal processing module 31, is provided with the input signal processing module 32 of DVI-Integrated, IP Streaming Media input signal processing module 33 selects processing module 34 with multiple signals, and described multichannel CVBS SD analog input signal processing module 31, the input signal processing module 32 being provided with DVI-Integrated select processing module 34 to be connected with multiple signals with IP Streaming Media input signal processing module 33 respectively.
As shown in Figure 4, input signal processing module 3 also comprises signal conversion module 35, described signal conversion module 35 and multiple signals select processing module 34 to be connected, and described signal conversion module 35 is connected with IP Streaming Media input signal processing module 33 with multichannel CVBS SD analog input signal processing module 31, the input signal processing module 32 that is provided with DVI-Integrated respectively.
In the present embodiment, input signal processing module 3 is provided with signal input interface, signal output interface and high speed serialization processing module 2 data output interface.
Modules is according to the demand flexible configuration used, and each input processing module converts input signal the video format of standard to by multiple signals selection processing module process output by signal conversion module.
As shown in Figure 5, output signal processing module 4 and comprise the convergent-divergent cutting process module 41 and multiple signals lamination processing module 42 that are connected.
In the present embodiment, output signal processing module 4 and be provided with high speed serialization processing module 2 data receiver interface.
From the multiple signals of input signal processing module and the multiple signals that export from high speed serialization after respective convergent-divergent cutting process resume module again lamination process export formation one road signal and drive this unit display screen or projection light machine display, realize unit display multiple signals, the effect that multiple unit is shown across screen display.
The advantage that the utility model is implemented: the mosaic display screen being provided with Built-in Image processor adopts multichannel independent serial connection mechanism, any one processing module breaks down and large-size screen monitors all can not be caused to occur the phenomenon that blank screen can not show, ensure that the long-time running safety of large-size screen monitors, and the direct access of vision signal decreases the conversion and process that repeatedly access signal, ensure that the best display effect of picture quality.
The above; be only embodiment of the present utility model; but protection range of the present utility model is not limited thereto; the technical staff of any skilled is in technical scope disclosed in the utility model; the change that can expect easily or replacement, all should be encompassed within protection range of the present utility model.Therefore, protection range of the present utility model should be as the criterion with the protection range of described claim.
Claims (10)
1. one kind is provided with the mosaic display screen of Built-in Image processor, it is characterized in that, described mosaic display screen comprises at least two display units, described display unit is provided with Built-in Image processor, described Built-in Image processor comprises output signal processing module and high speed serialization processing module, the display unit Built-in Image processor be connected with original input signal source also comprises input signal processing module, and each display unit is interconnected by high speed serialization processing module.
2. the mosaic display screen being provided with Built-in Image processor according to claim 1, is characterized in that, described high speed serialization processing module comprises the input-buffer, high-speed transfer buffer memory and the output buffer memory that connect successively.
3. the mosaic display screen being provided with Built-in Image processor according to claim 2, it is characterized in that, the high-speed transfer buffer memory of described high speed serialization processing module comprises write scheduler module, write line cache module, sense wire cache module and reads scheduler module, said write scheduler module is flexibly connected with write line cache module, sense wire cache module is flexibly connected with reading scheduler module, after write line cache module writes with sense data after sense wire cache module carry out position and exchange function.
4. the mosaic display screen being provided with Built-in Image processor according to claim 3, it is characterized in that, said write scheduler module is provided with high speed serialization processing module Data Input Interface and display unit input-buffer Data Input Interface, and described reading scheduler module is provided with high speed serialization processing module data output interface and display unit exports data cached output interface.
5. the mosaic display screen being provided with Built-in Image processor according to claim 4, is characterized in that, described high speed serialization processing module is high-speed figure process chip FPGA or DSP.
6. the mosaic display screen being provided with Built-in Image processor according to claim 1, it is characterized in that, described input signal processing module comprises multichannel CVBS SD analog input signal processing module, the input signal processing module being provided with DVI-Integrated, IP Streaming Media input signal processing module and multiple signals and selects processing module, and described multichannel CVBS SD analog input signal processing module, the input signal processing module being provided with DVI-Integrated select processing module to be connected with multiple signals with IP Streaming Media input signal processing module respectively.
7. the mosaic display screen being provided with Built-in Image processor according to claim 6, it is characterized in that, described input signal processing module also comprises signal conversion module, described signal conversion module and multiple signals select processing module to be connected, and described signal conversion module is connected with IP Streaming Media input signal processing module with multichannel CVBS SD analog input signal processing module, the input signal processing module that is provided with DVI-Integrated respectively.
8. the mosaic display screen being provided with Built-in Image processor according to claim 7, is characterized in that, described input signal processing module is provided with signal input interface, signal output interface and high speed serialization processing module data output interface.
9. according to the mosaic display screen being provided with Built-in Image processor one of claim 1 to 8 Suo Shu, it is characterized in that, described output signal processing module comprises the convergent-divergent cutting process module and multiple signals lamination processing module that are connected.
10. the mosaic display screen being provided with Built-in Image processor according to claim 9, is characterized in that, described output signal processing module is provided with high speed serialization processing module data receiver interface.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105991954A (en) * | 2015-02-10 | 2016-10-05 | 上海纬而视科技股份有限公司 | Spliced display screen with built-in image processors |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105991954A (en) * | 2015-02-10 | 2016-10-05 | 上海纬而视科技股份有限公司 | Spliced display screen with built-in image processors |
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