CN204304824U - A kind of many level efficient inverter - Google Patents
A kind of many level efficient inverter Download PDFInfo
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- CN204304824U CN204304824U CN201420721514.1U CN201420721514U CN204304824U CN 204304824 U CN204304824 U CN 204304824U CN 201420721514 U CN201420721514 U CN 201420721514U CN 204304824 U CN204304824 U CN 204304824U
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Abstract
The utility model provides a kind of many level efficient inverter, belongs to inverter technology field.Described many level efficient inverter, comprise dc source Vdc, AC power Vac, first switching tube S1, second switch pipe S2, 3rd switching tube S3, 4th switching tube S4, 5th switching tube S5, 6th switching tube S6, 7th switching tube S7, 8th switching tube S8, first diode D1, second diode D2, 3rd diode D3, 4th diode D4, 5th diode D5, 6th diode D6, 7th diode D7, 8th diode D8, first filter inductance L1, second filter inductance L2, first bus capacitor C1, second bus capacitor C2, power frequency filter capacitor C0, microcontroller.The utility model is be applicable to promote inverter efficiency and the efficient inverter improving direct solenoid interference.
Description
Technical field
The present invention relates to a kind of inverter, particularly relate to a kind of many level efficient inverter.
Background technology
Inverter is a kind of device for converting electric energy, mainly to realize by the power conversion of direct current energy to alternating current.Combining inverter comprises photovoltaic combining inverter, wind power grid-connected inverter, fuel cell combining inverter etc.The energy efficient that regenerative resource can produce by combining inverter can be converted to can and be connected to civil power with civil power same frequency, synchronous alternating current.
Divide by its circuit form: semi-bridge inversion power supply and full bridge inverse conversion power.Wherein the control mode of full bridge inverse conversion power has two kinds: Unipolar SPWM is modulated, and bipolar SPWM is modulated.Bipolar SPWM modulates two switching tube complementary drive of same brachium pontis, inconsistent due to the inconsistency of switching tube conducting, cut-off characteristics and the control circuit parameter of Dead Time, two switching tubes conducting simultaneously of same brachium pontis may be caused, and then cause switching tube to damage.Unipolar SPWM controls to be had: all only have a switching tube to make high frequency at civil power negative half period and switch, cause the utilization rate of outputting inductance to decline, and then reduce the efficiency of inverter power supply.
Summary of the invention
The technical problem to be solved in the present invention is: provide a kind of simple, is applicable to promote inverter efficiency and the efficient inverter improving direct solenoid interference.For achieving the above object, the invention provides a kind of efficient inverter, its feature comprises: the first switching tube S1, second switch pipe S2, 3rd switching tube S3, 4th switching tube S4, 5th switching tube S5, 6th switching tube S6, 7th switching tube S7, 8th switching tube S8, first diode D1, second diode D2, 3rd diode D3, 4th diode D4, 5th diode D5, 6th diode D6, 7th diode D7, 8th diode D8, first filter inductance L1, second filter inductance L2, first bus capacitor C1, second bus capacitor C2, power frequency filter capacitor C0.
The current input terminal that first switching tube S1 controls is connected with the cathodic electricity of the positive pole of dc source Vdc, the positive pole of the first bus capacitor C1 and the first diode D1 simultaneously, is connected the while of the current output terminal of the first switching tube S1 with the input of the input of second switch pipe S2, the anode of the first diode D1, the negative electrode of the second diode D2 and the first filter inductance L1; The output of second switch pipe S2 is connected with the positive pole of the input of the 3rd switching tube S3, the negative electrode of the 3rd diode D3, the negative pole of the first bus capacitor C1 and the second bus capacitor C2 simultaneously; The output of the output of the 3rd switching tube S3, the anode of the 3rd diode D3, the input of the 4th switching tube S4, the negative electrode of the 4th diode D4 and the second filter inductance L2 is connected; Five, the input closing pipe S5, S6 is connected with the output of the negative electrode of the 5th, the 6th diode D5, D6, the positive pole of power frequency filter capacitor Co and the first filter inductance L1 simultaneously; The output of the 5th switching tube S5 opens the light with the anode, the 7th of the 5th diode D5 the input of pipe S7, the negative electrode of the 7th diode D7 and to exchange the one end exported connected simultaneously; The output of the 6th switching tube S6 is simultaneously with anode, the input of the 8th switching tube S8, the anode of the 8th diode D8 of the 6th diode D6 and to exchange the other end exported connected; The output of the 7th switching tube S7, the 8th switching tube S8 is connected with the input of the anode of the 7th diode D7, the 8th diode D8, the negative pole of power frequency filter capacitor Co and the second filter inductance L2 simultaneously; The output of the 4th switching tube S4 is connected with the negative electrode of the 4th diode D4, the negative terminal of the second bus capacitor C2, the negative pole of dc source Vdc simultaneously.
The positive and negative electrode two ends of described dc source Vdc are provided with filter capacitor C1, C2, for reducing input ripple and the bus dividing potential drop of inverter link.Dc source Vdc is DC energy generation device, as: solar panel, wind energy, fuel cell etc.
The control end of described first switching tube S1, second switch pipe S2, the 3rd switching tube S3, the 4th switching tube S4 respectively through the first high-frequency pulse signal output of modulation circuit and microcontroller, the second high-frequency pulse signal output, third high frequently pulse signal output end, the 4th high-frequency pulse signal output, be connected, described 5th switching tube S5, the 6th switching tube S6, the 7th switching tube S7, the 8th switching tube S8 are respectively at four work product pulse signal output ends connections for air MCU;
The high-frequency pulse signal that described modulation circuit is used for microcontroller exports becomes to be used for sinusoidal signal modulation the high frequency trigger signal driving the first described switching tube S1, second switch pipe S2, the 3rd switching tube S3 and the 4th switching tube S4; AC power same frequency on described sinusoidal signal and described AC power Vac and same-phase;
During work, make the first switching tube S1, second switch pipe S2, the 3rd switching tube S3 and the 4th switching tube S4 in HF switch work, make output AC power source outside the first filter inductance L1, the second filter inductance L2 be half-sinusoid; When exporting as positive half cycle, microcontroller makes the 5th switching tube S5, the 8th switching tube S8 open-minded at whole positive half cycle, make the 6th switching tube S6 and the 7th switching tube S7 end, be export as positive half cycle by switch the 5th switching tube S5 and the 8th switching tube S8 simultaneously; When exporting as negative half period, microcontroller makes the 6th switching tube S6, the 7th switching tube S7 open-minded at whole negative half period, makes the 5th switching tube S5 and the 8th switching tube S8 end simultaneously, is export as positive half cycle by the 6th switching tube S6 and the 7th switching tube S7; And so go round and begin again.
Be between positive half period at the outboard end output AC power source Vac of described 5th switching tube S5, the 6th switching tube S6, the 7th switching tube S7, the 8th switching tube S8, five, the 8th switching tube S5, S8 is open-minded at whole positive half cycle, and the 6th switching tube S6, the 7th switching tube S7 close at whole positive half cycle; When the high frequency trigger signal that the high frequency trigger signal of the first switching tube S1 is high level the 4th switching tube S4 is simultaneously low level, the positive pole of dc source Vdc, the first switching tube S1, the first filter inductance L1, the 5th switching tube S5, output AC power source Vac, the 8th switching tube S8, the second filter inductance L2, the 3rd diode D3 or the 3rd switching tube S3, the second bus capacitor C2 and dc source Vdc negative pole form current loop successively; When the high frequency trigger signal of the first, the 4th switching tube S1, S4 is high level, first, fourth switching tube S1, S4 conducting, the positive pole of dc source Vdc, the first switching tube S1, the first filter inductance L1, the 5th switching tube S5, output AC power source Vac, the 8th switching tube S8, the second filter inductance L2, the 4th switching tube S4 and dc source Vdc negative pole form current loop successively; When the high frequency trigger signal of the first switching tube S1 is low level, the 4th switching tube S4 triggering signal is high simultaneously, dc source Vdc positive pole, the first bus capacitor C1, the second diode pipe D2 or second switch pipe S2, the first filter inductance L1, the 5th switching tube S5, output AC power source Vac, the 8th switching tube S8, the second filter inductance L2, the 4th switching tube S4 and dc source Vdc negative pole form current loop successively; When first, fourth S1, S4 switching tube high frequency trigger signal is all low, the second diode D2 or second switch pipe S2, the first filter inductance L1, the 5th switching tube S5, output AC power source Vac, the 8th switching tube S8, the second filter inductance L2, the 3rd switching tube S3 form current loop successively.
Be between negative half-cycle at the outboard end output AC power source Vac of described 5th, the 6th, the 7th, the 8th switching tube S5, S6, S7, S8, six, the 7th switching tube S6, S7 is open-minded at whole negative half period, and the 5th, the 8th switching tube S5, S8 closes at whole negative half period; When the high frequency trigger signal that the high frequency trigger signal of the first switching tube S1 is high level the 4th switching tube S4 is simultaneously low level, the positive pole of dc source Vdc, the first switching tube S1, the first filter inductance L1, the 6th switching tube S6, output AC power source Vac, the 7th switching tube S7, the second filter inductance L2, the 3rd diode D3 or the 3rd switching tube S3, the second bus capacitor C2 and dc source Vdc negative pole form current loop successively; When the high frequency trigger signal of the first, the 4th switching tube S1, S4 is high level, first, fourth switching tube S1, S4 conducting, the positive pole of dc source Vdc, the first switching tube S1, the first filter inductance L1, the 6th switching tube S6, output AC power source Vac, the 7th switching tube S7, the second filter inductance L2, the 4th switching tube S4 and dc source Vdc negative pole form current loop successively; When the high frequency trigger signal of the first switching tube S1 is low level, the 4th switching tube S4 triggering signal is high simultaneously, dc source Vdc positive pole, the first bus capacitor C1, the second diode pipe D2 or second switch pipe S2, the first filter inductance L1, the 6th switching tube S6, output AC power source Vac, the 7th switching tube S7, the second filter inductance L2, the 4th switching tube S4 and dc source Vdc negative pole form current loop successively; When first, fourth S1, S4 switching tube high frequency trigger signal is all low, the second diode D2 or second switch pipe S2, the first filter inductance L1, the 6th switching tube S6, output AC power source Vac, the 7th switching tube S7, the second filter inductance L2, the 3rd switching tube S3 form current loop successively.
Technique scheme of the present invention has a little following compared to existing technology: 1 efficient inverter of the present invention relatively and conventional full bridge circuit, connect the first switching tube S1 in loop of power circuit, second switch pipe S2, and at the first switching tube S1, second switch pipe S2 and commutation power tube directly seal in the first filter inductance L1, second filter inductance L2, and add second switch pipe S2 at the mid point of the output of the first switching tube S1 and the input of second switch pipe S2 and the first bus capacitor C1 and the second bus capacitor C2, 3rd switching tube S3 and the second diode D2, 3rd diode D3, make no matter at positive half cycle or negative half period, two inductance work simultaneously, while raising inductance utilization rate, improve the electromagnetic interference problem of DC.Relative to traditional inverter circuit structure, this circuit improves the utilization rate of inductance, decreases free wheeling path, improves overall efficiency; Reduce the DC electromagnetic interference problem of machine simultaneously, make the various aspects performance boost of inverter.2 due to the introducing of current following device, energy storage device is made not participate in afterflow process, a in chart 1, the current potential that b is 2 current potential in afterflow process keeps substantially equal, and inverter mode and freewheeling state a, b 2 potential change amounts are less, this reduces DC electromagnetic interference problem, three switching tubes that inverter in 3 the present invention adopts all are made high frequency and are switched, this makes no matter in positive-negative half-cycle, first filter inductance L1, the current potential of the interior side terminal of the second filter inductance L2 is all high-frequency impulse, its outer side terminal is civil power, which increase the utilization rate of filter inductance.The circuit that 4 the present invention introduce, can realize five level modes, the first filter inductance L1, the second filter inductance L2 can reduce, and improve overall efficiency.5, because the voltage of main switch high frequency conversion is the half of Vdc, the switching loss of main switch reduces, and then improves overall efficiency.
Accompanying drawing explanation
Below in conjunction with accompanying drawing, by the specific embodiment of the present invention describe in detail, will make technical scheme of the present invention and other beneficial effect apparent.
In accompanying drawing,
Fig. 1 is the efficient inverter structural representation in example;
Oscillogram when Fig. 2 is the efficient inverter work in example on each parts;
Fig. 3 is current loop one schematic diagram of the efficient inverter in example when exporting positive half cycle alternating current;
Fig. 4 is current loop two schematic diagram of the efficient inverter in example when exporting positive half cycle alternating current;
Fig. 5 is current loop three schematic diagram of the efficient inverter in example when exporting positive half cycle alternating current;
Fig. 6 is the continuous current circuit schematic diagram of the efficient inverter in example when exporting positive half cycle alternating current;
Current loop one schematic diagram when Fig. 7 is the efficient inverter output negative half period alternating current in example;
Current loop two schematic diagram when Fig. 8 is the efficient inverter output negative half period alternating current in example;
Current loop three schematic diagram when Fig. 9 is the efficient inverter output negative half period alternating current in example;
Continuous current circuit schematic diagram when Figure 10 is the efficient inverter output negative half period alternating current in example.
Detailed description of the invention
For further setting forth the technological means and effect thereof that the present invention takes, be described in detail below in conjunction with the preferred embodiments of the present invention and accompanying drawing thereof.
As illustrated in chart 1, the current input terminal of the first switching tube S1 is connected with the negative electrode of the positive pole of dc source (Vdc), the positive pole of the first bus capacitor C1 and the first diode D1 simultaneously; The current output terminal of the first switching tube S1 is connected with the input of the input of second switch pipe S2, the anode of the first diode D1, the negative electrode of the second diode D2 and the first filter inductance L1 simultaneously; The output of second switch pipe S2 is connected with the positive pole of the input of the 3rd switching tube S3, the negative electrode of the 3rd diode D3, the negative pole of the first bus capacitor C1 and the second bus capacitor C2 simultaneously; The output of the output of the 3rd switching tube S3, the anode of the 3rd diode D3, the input of the 4th switching tube S4, the negative electrode of the 4th diode D4 and the second filter inductance L2 is connected; Five, the input closing pipe S5, S6 is connected with the output of the negative electrode of the 5th, the 6th diode D5, D6, the positive pole of power frequency filter capacitor Co and the first filter inductance L1 simultaneously; The output of the 5th switching tube S5 opens the light with the anode, the 7th of the 5th diode D5 the input of pipe S7, the negative electrode of the 7th diode D7 and to exchange the one end exported connected simultaneously; The output of the 6th switching tube S6 is simultaneously with anode, the input of the 8th switching tube S8, the anode of the 8th diode D8 of the 6th diode D6 and to exchange the other end exported connected; Seven, the output of eight switching tube S7, S8 is connected with the input of the anode of the 7th, eight diode D7, D8, the negative pole of power frequency filter capacitor Co and the second filter inductance L2 simultaneously; The output of the 4th switching tube S4 is connected with the negative electrode of the 4th diode D4, the negative terminal of the second bus capacitor C2, the negative pole of dc source Vdc simultaneously; Its course of work is as follows:
During work, make S1, S2, S3, S4 in HF switch work, make output AC power source outside L1, L2 be half-sinusoid; When exporting as positive half cycle, microcontroller makes S5, S8 open-minded at whole positive half cycle, makes S6 and S7 end simultaneously, is export as positive half cycle by switch S 5 and S8; When exporting as negative half period, microcontroller makes S6, S7 open-minded at whole negative half period, makes S5 and S8 end simultaneously, is export as positive half cycle by switch S 6 and S7; And so go round and begin again.
Be between positive half period at the outboard end output AC power source Vac of described 5th, the 6th, the 7th, the 8th switching tube S5, S6, S7, S8, five, the 8th switching tube S5, S8 is open-minded at whole positive half cycle, and the 6th, the 7th switching tube S6, S7 closes at whole positive half cycle; When the high frequency trigger signal of the first switching tube S1 is high level while, the high frequency trigger signal of the 4th switching tube S4 is low level, the positive pole of dc source Vdc, the first switching tube S1, the first filter inductance L1, the 5th switching tube S5, output AC power source Vac, the 8th switching tube S8, the second filter inductance L2, the 3rd diode D3 or the 3rd switching tube S3, the second bus capacitor C2 and dc source Vdc negative pole form current loop successively, see chart 3; When the high frequency trigger signal of the first, the 4th switching tube S1, S4 is high level, first, fourth switching tube S1, S4 conducting, the positive pole of dc source Vdc, the first switching tube S1, the first filter inductance L1, the 5th switching tube S5, output AC power source Vac, the 8th switching tube S8, the second filter inductance L2, the 4th switching tube S4 and dc source Vdc negative pole form current loop successively, see chart 4; When the high frequency trigger signal of the first switching tube S1 is low level, the 4th switching tube S4 triggering signal is high simultaneously, dc source Vdc positive pole, the first bus capacitor C1, the second diode pipe D2 or second switch pipe S2, first filter inductance L1, the 5th switching tube S5, output AC power source Vac, the 8th switching tube S8, the second filter inductance L2, the 4th switching tube S4 and dc source Vdc negative pole form current loop successively, see chart 5; When first, fourth S1, S4 switching tube high frequency trigger signal is all low, second diode D2 or second switch pipe S2, the first filter inductance L1, the 5th switching tube S5, output AC power source Vac, the 8th switching tube S8, the second filter inductance L2, the 3rd switching tube S3 form current loop successively, see chart 6.
Be between negative half-cycle at the outboard end output AC power source Vac of described 5th, the 6th, the 7th, the 8th switching tube S5, S6, S7, S8, six, the 7th switching tube S6, S7 is open-minded at whole negative half period, and the 5th, the 8th switching tube S5, S8 closes at whole negative half period; When the high frequency trigger signal of the first switching tube S1 is high level while, the high frequency trigger signal of the 4th switching tube S4 is low level, the positive pole of dc source Vdc, the first switching tube S1, the first filter inductance L1, the 6th switching tube S6, output AC power source Vac, the 7th switching tube S7, the second filter inductance L2, the 3rd diode D3 or the 3rd switching tube S3, the second bus capacitor C2 and dc source Vdc negative pole form current loop successively, see chart 7; When the high frequency trigger signal of the first, the 4th switching tube S1, S4 is high level, first, fourth switching tube S1, S4 conducting, the positive pole of dc source Vdc, the first switching tube S1, the first filter inductance L1, the 6th switching tube S6, output AC power source Vac, the 7th switching tube S7, the second filter inductance L2, the 4th switching tube S4 and dc source Vdc negative pole form current loop successively, see chart 8; When the high frequency trigger signal of the first switching tube S1 is low level, the 4th switching tube S4 triggering signal is high simultaneously, dc source Vdc positive pole, the first bus capacitor C1, the second diode pipe D2 or second switch pipe S2, first filter inductance L1, the 6th switching tube S6, output AC power source Vac, the 7th switching tube S7, the second filter inductance L2, the 4th switching tube S4 and dc source Vdc negative pole form current loop successively, see chart 9; When first, fourth S1, S4 switching tube high frequency trigger signal is all low, second diode D2 or second switch pipe S2, the first filter inductance L1, the 6th switching tube S6, output AC power source Vac, the 7th switching tube S7, the second filter inductance L2, the 3rd switching tube S3 form current loop successively, see chart 10.
The above, for the person of ordinary skill of the art, can make other various corresponding change and distortion according to technical scheme of the present invention and technical conceive, and all these change and be out of shape the protection domain that all should belong to the claims in the present invention.
Claims (5)
1. level efficient inverter more than a kind, comprise dc source Vdc, AC power Vac is characterized in that: this many level efficient inverter also comprises: modulation circuit, first switching tube S1, second switch pipe S2, 3rd switching tube S3, 4th switching tube S4, 5th switching tube S5, 6th switching tube S6, 7th switching tube S7, 8th switching tube S8, first diode D1, second diode D2, 3rd diode D3, 4th diode D4, 5th diode D5, 6th diode D6, 7th diode D7, 8th diode D8, first filter inductance L1, second filter inductance L2, first bus capacitor C1, second bus capacitor C2, power frequency filter capacitor C0, microcontroller, the current input terminal that first switching tube S1 controls is connected with the cathodic electricity of the positive pole of dc source Vdc, the positive pole of the first bus capacitor C1 and the first diode D1 simultaneously, is connected the while of the current output terminal of the first switching tube S1 with the input of the input of second switch pipe S2, the anode of the first diode D1, the negative electrode of the second diode D2 and the first filter inductance L1, the output of second switch pipe S2 is connected with the positive pole of the input of the 3rd switching tube S3, the negative electrode of the 3rd diode D3, the negative pole of the first bus capacitor C1 and the second bus capacitor C2 simultaneously, the output of the output of the 3rd switching tube S3, the anode of the 3rd diode D3, the input of the 4th switching tube S4, the negative electrode of the 4th diode D4 and the second filter inductance L2 is connected, five, the input closing pipe S5, S6 is connected with the output of the negative electrode of the 5th, the 6th diode D5, D6, the positive pole of power frequency filter capacitor Co and the first filter inductance L1 simultaneously, the output of the 5th switching tube S5 opens the light with the anode, the 7th of the 5th diode D5 the input of pipe S7, the negative electrode of the 7th diode D7 and to exchange the one end exported connected simultaneously, the output of the 6th switching tube S6 is simultaneously with anode, the input of the 8th switching tube S8, the anode of the 8th diode D8 of the 6th diode D6 and to exchange the other end exported connected, the output of the 7th switching tube S7, the 8th switching tube S8 is connected with the input of the anode of the 7th diode D7, the 8th diode D8, the negative pole of power frequency filter capacitor Co and the second filter inductance L2 simultaneously, the output of the 4th switching tube S4 is connected with the negative electrode of the 4th diode D4, the negative terminal of the second bus capacitor C2, the negative pole of dc source Vdc simultaneously.
2. according to claim 1 level efficient inverter more than a kind, it is characterized in that, the high-frequency pulse signal that described modulation circuit is used for microcontroller exports becomes to be used for sinusoidal signal modulation the high frequency trigger signal driving the first described switching tube S1, second switch pipe S2, the 3rd switching tube S3 and the 4th switching tube S4; AC power same frequency on described sinusoidal signal and described AC power Vac and same-phase.
3. one many level efficient inverter according to claim 1, it is characterized in that, described first switching tube S1, second switch pipe S2, the 3rd switching tube S3 and the 4th switching tube S4, in HF switch work, make output AC power source outside the first filter inductance L1, the second filter inductance L2 be half-sinusoid; When exporting as positive half cycle, microcontroller makes the 5th switching tube S5, the 8th switching tube S8 open-minded at whole positive half cycle, make the 6th switching tube S6 and the 7th switching tube S7 end, be export as positive half cycle by switch the 5th switching tube S5 and the 8th switching tube S8 simultaneously; When exporting as negative half period, microcontroller makes the 6th switching tube S6, the 7th switching tube S7 open-minded at whole negative half period, makes the 5th switching tube S5 and the 8th switching tube S8 end simultaneously, is export as positive half cycle by the 6th switching tube S6 and the 7th switching tube S7.
4. one many level efficient inverter according to claim 1, it is characterized in that, the outboard end output AC power source Vac of described 5th switching tube S5, the 6th switching tube S6, the 7th switching tube S7, the 8th switching tube S8 is between positive half period, five, the 8th switching tube S5, S8 is open-minded at whole positive half cycle, and the 6th switching tube S6, the 7th switching tube S7 close at whole positive half cycle; When the high frequency trigger signal that the high frequency trigger signal of the first switching tube S1 is high level the 4th switching tube S4 is simultaneously low level, the positive pole of dc source Vdc, the first switching tube S1, the first filter inductance L1, the 5th switching tube S5, output AC power source Vac, the 8th switching tube S8, the second filter inductance L2, the 3rd diode D3 or the 3rd switching tube S3, the second bus capacitor C2 and dc source Vdc negative pole form current loop successively; When the high frequency trigger signal of the first, the 4th switching tube S1, S4 is high level, first, fourth switching tube S1, S4 conducting, the positive pole of dc source Vdc, the first switching tube S1, the first filter inductance L1, the 5th switching tube S5, output AC power source Vac, the 8th switching tube S8, the second filter inductance L2, the 4th switching tube S4 and dc source Vdc negative pole form current loop successively; When the high frequency trigger signal of the first switching tube S1 is low level, the 4th switching tube S4 triggering signal is high simultaneously, dc source Vdc positive pole, the first bus capacitor C1, the second diode pipe D2 or second switch pipe S2, the first filter inductance L1, the 5th switching tube S5, output AC power source Vac, the 8th switching tube S8, the second filter inductance L2, the 4th switching tube S4 and dc source Vdc negative pole form current loop successively; When first, fourth S1, S4 switching tube high frequency trigger signal is all low, the second diode D2 or or second switch pipe S2, the first filter inductance L1, the 5th switching tube S5, output AC power source Vac, the 8th switching tube S8, the second filter inductance L2, the 3rd switching tube S3 form current loop successively.
5. one many level efficient inverter according to claim 1, it is characterized in that, the outboard end output AC power source Vac of described 5th, the 6th, the 7th, the 8th switching tube S5, S6, S7, S8 is between negative half-cycle, six, the 7th switching tube S6, S7 is open-minded at whole negative half period, and the 5th, the 8th switching tube S5, S8 closes at whole negative half period; When the high frequency trigger signal that the high frequency trigger signal of the first switching tube S1 is high level the 4th switching tube S4 is simultaneously low level, the positive pole of dc source Vdc, the first switching tube S1, the first filter inductance L1, the 6th switching tube S6, output AC power source Vac, the 7th switching tube S7, the second filter inductance L2, the 3rd diode D3 or the 3rd switching tube S3, the second bus capacitor C2 and dc source Vdc negative pole form current loop successively; When the high frequency trigger signal of the first, the 4th switching tube S1, S4 is high level, first, fourth switching tube S1, S4 conducting, the positive pole of dc source Vdc, the first switching tube S1, the first filter inductance L1, the 6th switching tube S6, output AC power source Vac, the 7th switching tube S7, the second filter inductance L2, the 4th switching tube S4 and dc source Vdc negative pole form current loop successively; When the high frequency trigger signal of the first switching tube S1 is low level, the 4th switching tube S4 triggering signal is high simultaneously, dc source Vdc positive pole, the first bus capacitor C1, the second diode pipe D2 or second switch pipe S2, the first filter inductance L1, the 6th switching tube S6, output AC power source Vac, the 7th switching tube S7, the second filter inductance L2, the 4th switching tube S4 and dc source Vdc negative pole form current loop successively; When first, fourth S1, S4 switching tube high frequency trigger signal is all low, the second diode D2 or second switch pipe S2, the first filter inductance L1, the 6th switching tube S6, output AC power source Vac, the 7th switching tube S7, the second filter inductance L2, the 3rd switching tube S3 form current loop successively.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111541389A (en) * | 2020-05-15 | 2020-08-14 | 西安交通大学 | Multi-level inverter topological structure |
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| CN111541389A (en) * | 2020-05-15 | 2020-08-14 | 西安交通大学 | Multi-level inverter topological structure |
| CN111541389B (en) * | 2020-05-15 | 2021-02-12 | 西安交通大学 | Multi-level inverter topological structure |
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