CN203970383U - A kind of electrocardiogram signal acquisition device - Google Patents
A kind of electrocardiogram signal acquisition device Download PDFInfo
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- CN203970383U CN203970383U CN201420222511.3U CN201420222511U CN203970383U CN 203970383 U CN203970383 U CN 203970383U CN 201420222511 U CN201420222511 U CN 201420222511U CN 203970383 U CN203970383 U CN 203970383U
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Abstract
A kind of electrocardiogram signal acquisition device, it comprises cardiac diagnosis lead circuit, pre-amplification circuit, level lifting circuit, bandwidth-limited circuit, 50HZ trap circuit, A/D convertor circuit, detection alarm circuit and the central processing unit of coming off leads, described cardiac diagnosis lead circuit is for importing detected electrocardiosignal, and pass through successively pre-amplification circuit, level lifting circuit, bandwidth-limited circuit, 50HZ trap circuit and A/D convertor circuit amplify described electrocardiosignal, level lifting, filtering, after trap and analog-to-digital conversion process, send to central processing unit, described central processing unit carries out characteristic point identification to the electrocardiosignal after processing, the described detection alarm circuit that comes off that leads, for the detection that comes off that described electrocardiosignal is led.This utility model has increased reliability and the motility of system design, has avoided causing due to resistance and capacitance difference the distortion of the inconsistent electrocardiosignal causing of filtering characteristic, has that performance is good, precision is high, volume is little and the feature such as energy consumption is lower.
Description
Technical field
This utility model relates to Signal Collection Technology field, specifically a kind of electrocardiogram signal acquisition device.
Background technology
Heart disease has become one of principal disease of harm humans health.According to statistics, cardiovascular disease is the principal disease that threatens human life, and cardiopathic mortality rate still accounts for first place in the world.Therefore, the diagnosis of cardiovascular disease, treatment being paid attention to by countries in the world medical circle always, carried out exactly electrocardiosignal extraction, is important and significant problems for doctor provides effective assistant analysis means.Along with developing rapidly of electronic technology, oneself applies gradually medical electric monitor system in clinical diagnosis in recent years.
Electrocardiogram is one of most important bio-electrical information of human body.Electrocardiosignal is a kind of periodic electricity physiological signal, through tissue, passes to body surface, at body surface, produces potential difference.Clinically, the potential difference measurement that can body surface be produced with various instrument and equipments out and depict curve as, to form electrocardiogram.The electrocardiosignal measuring method of body surface normally adopts the electrode that is attached to body surface ad-hoc location to obtain faint electrocardiosignal, and after above-mentioned faint electrocardiosignal being sent into electrocardio pre-process circuit and is processed by cardiac diagnosis lead-line, through A/D digitized, be converted into digital signal, and send into MCU, by MCU, carried out identification and the processing of ECG characteristic points, finally send the electrocardiosignal after processing and identifying to host computer and show.
Traditional electrocardiogram acquisition system and device have adopted discrete components and parts to gather electrocardiosignal, have mainly comprised that prime holding circuit, electric knife suppress circuit, front end impedance matching circuit, identification circuit, main amplifying circuit, pace-making testing circuit, high-pass filtering circuit, second amplifying circuit, low-pass filter circuit, driven-right-leg circuit, A/D change-over circuit and the MCU the electric circuit constitute of coming off leads.Because the discrete component adopting is realized, inevasiblely used a large amount of integrated circuits, the components and parts such as resistance and electric capacity, cause the volume of this device large, power consumption is high, the shortcomings such as design Complex Flexible is low, due to integrated circuit, the diversity of resistance and capacitance component individuality, caused each parameter of leading of electrocardiogram and index to there is diversity (typical in common mode rejection ratio, input impedance etc.), resistance and the excessive variation that also easily causes front-end filtering circuit filtering characteristic of the capacitance difference opposite sex, filtered Electrocardiographic useful signal, lost the diagnostic value of ECG signal.
Utility model content
For above-mentioned deficiency, this utility model provides a kind of electrocardiogram signal acquisition device with degree of precision and signal to noise ratio.
This utility model solves the technical scheme that its technical problem adopts: a kind of electrocardiogram signal acquisition device, it is characterized in that, comprise cardiac diagnosis lead circuit, pre-amplification circuit, level lifting circuit, bandwidth-limited circuit, 50HZ trap circuit, A/D convertor circuit, detection alarm circuit and the central processing unit of coming off leads
Described cardiac diagnosis lead circuit is for importing detected electrocardiosignal, and pass through successively pre-amplification circuit, level lifting circuit, bandwidth-limited circuit, 50HZ trap circuit and A/D convertor circuit amplify described electrocardiosignal, level lifting, filtering, after trap and analog-to-digital conversion process, send to central processing unit, described central processing unit carries out characteristic point identification to the electrocardiosignal after processing, described the come off input of detection alarm circuit and the outfan of described pre-amplification circuit of leading is connected, outfan is connected with central processing unit, for the detection that comes off that described electrocardiosignal is led,
Described cardiac diagnosis lead circuit comprises right breast top electrode, left abdomen bottom electrode, right abdomen bottom electrode, buffer amplifier circuit and driven-right-leg circuit, described right breast top electrode and left abdomen bottom electrode are electrocardiosignal sampling electrode, right breast top electrode is connected with pre-amplification circuit through buffer amplifier circuit respectively with left abdomen bottom electrode, for electrocardiosignal is isolated; Described right abdomen bottom electrode is right lower limb drive electrode, and right abdomen bottom electrode is connected with pre-amplification circuit through driven-right-leg circuit, for eliminate the interchange forming when electrocardio detects, disturbs, and reduces the common-mode voltage of human body, improves signal to noise ratio.
As preferably, described pre-amplification circuit comprises the differential amplifier circuit of both-end input, both-end output, common mode sampling drive circuit, resaistance-capacity coupling circuit, and the differential amplifier circuit of both-end input, Single-end output; The double input end of the differential amplifier circuit of described both-end input, both-end output is connected with organism contact electrode, and double input end is connected with the double input end of the differential amplifier circuit of both-end input, Single-end output with resaistance-capacity coupling circuit through common mode sampling drive circuit successively.
As preferably, the differential amplifier circuit of described both-end input, both-end output comprises the first operational amplifier U1, the second operational amplifier U2, resistance R 1, resistance R 2 and resistance R 3, described common mode sampling drive circuit comprises the 3rd operational amplifier U3, resistance R 4 and resistance R 5, described resaistance-capacity coupling circuit comprises capacitor C 1, capacitor C 2, resistance R 6 and resistance R 7, and the differential amplifier circuit of described both-end input, Single-end output comprises instrument amplifier A1 and varistor R8; The positive input of described the first operational amplifier U1 and the second operational amplifier U2 is connected with organism contact electrode respectively, series resistance R3 between reverse input end, difference series resistance R1 and resistance R 2 between the reverse input end of the first operational amplifier U1 and the second operational amplifier U2 and outfan; After the outfan series capacitance C1 of described the first operational amplifier U1, be connected with the reverse input end of instrument amplifier A1, after the outfan series capacitance C2 of described the second operational amplifier U2, be connected with the positive input of instrument amplifier A1; The positive input of described the 3rd operational amplifier U3 is connected with the outfan of the second operational amplifier U2 with the first operational amplifier U1 with resistance R 5 through resistance R 4 respectively, inverting input is connected with outfan, and outfan is connected with positive input with the reverse input end of instrument amplifier A1 with resistance R 7 through resistance R 6 respectively; Described varistor R8 is the external gain-adjusted resistance of instrument amplifier A1.
As preferably, described bandwidth-limited circuit comprises high-pass filtering circuit and low-pass filter circuit, and described high-pass filtering circuit and low-pass filter circuit are connected in series;
Described high-pass filtering circuit comprises four-operational amplifier U4, resistance R 9 and capacitor C 3, the positive input of described four-operational amplifier U4 is through resistance R 9 ground connection, through capacitor C 3, be connected with the outfan of pre-amplification circuit, inverting input is connected with outfan simultaneously;
Described low-pass filter circuit comprises the 5th operational amplifier U5, resistance R 10, resistance R 11, capacitor C 4 and capacitor C 5, the positive input of described the 5th operational amplifier U5 is through capacitor C 4 ground connection, simultaneously successively series resistance R11 with after resistance R 10 with four-operational amplifier U4 outfan be connected, inverting input is connected with outfan, after the outfan series capacitance C5 of the 5th operational amplifier U5, is connected between resistance R 10 and resistance R 11.
As preferably, described level lifting circuit comprises the 6th operational amplifier U6, resistance R 12, resistance R 13, resistance R 14, resistance R 15 and the first adjustable resistance RW1, the positive input of described the 6th operational amplifier U6 is through resistance R 15 ground connection, after inverting input series resistance R12, be connected with the outfan of bandwidth-limited circuit, through resistance R 14, be connected with the adjustable end of the first adjustable resistance RW1 simultaneously, the two ends of described the first adjustable resistance RW1 are connected with positive and negative voltage end respectively, series resistance R13 between inverting input and outfan.
As preferably, described 50HZ trap circuit comprises the 7th operational amplifier U7, the 8th operational amplifier U8, resistance R 16, resistance R 17, resistance R 18, resistance R 19, resistance R 20, resistance R 21, capacitor C 6, capacitor C 7, capacitor C 8 and capacitor C 9; The positive input of described the 7th operational amplifier U7 is connected with the outfan of level lifting circuit through parallel circuit, described parallel circuit is formed in parallel by the series circuit of the series circuit of resistance R 16, resistance R 17 and capacitor C 6, capacitor C 7, and the inverting input of the 7th operational amplifier U7 is connected with outfan; The positive input of described the 8th operational amplifier U8 is connected with the outfan of the 7th operational amplifier U7 through resistance R 20, pass through resistance R 21 ground connection simultaneously, inverting input is connected with outfan, outfan is connected between capacitor C 6 and capacitor C 7 through the parallel circuit of resistance R 18 and resistance R 19, and the parallel circuit through capacitor C 8 and capacitor C 9 is connected between resistance R 16 and resistance R 17 simultaneously.
As preferably, described A/D convertor circuit adopts ADC0809 chip.
As preferably, the described detection alarm circuit that comes off of leading comprises differential amplifier circuit, window comparator circuit and warning circuit, the input of described differential amplifier circuit is connected with the outfan of described pre-amplification circuit, outfan is connected with the input of window comparator circuit, the outfan of described window comparator circuit is connected with warning circuit, described warning circuit is connected with central processing unit, for the detection that comes off that described electrocardiosignal is led, and the Check processing that comes off according to leading provides to described central processing unit the detection signal that comes off that leads.
As preferably, described differential amplifier circuit comprises the 9th operational amplifier U9, described window comparator circuit comprises the tenth operational amplifier U10, the 11 operational amplifier U11, the second adjustable resistance RW2, the 3rd adjustable resistance RW3, the first diode D1 and the second diode D2, described warning circuit comprise the 4th adjustable resistance RW4, light emitting diode D3 and with door G1; Described the 9th positive input of operational amplifier U9 and the outfan of pre-amplification circuit are connected, and outfan is connected with the reverse input end of the 11 operational amplifier U11 with the reverse input end of the 9th operational amplifier U9, the positive input of the tenth operational amplifier U10 respectively; The tenth reverse input end of operational amplifier U10 and the positive input of the 11 operational amplifier U11 are connected with the adjustable end of the 3rd adjustable resistance RW3 with the adjustable end of the second adjustable resistance RW2 respectively, described the second adjustable resistance RW2 and the 3rd adjustable resistance RW3 form series circuit, and series circuit two ends connect respectively generating positive and negative voltage and be connected with isoelectric level between the second adjustable resistance RW2 and the 3rd adjustable resistance RW3; The tenth outfan of operational amplifier U10 and the outfan of the 11 operational amplifier U11 first diode D1 that connects is respectively connected with one end of the 4th adjustable resistance RW4 with after the second diode D2; The other end of described the 4th adjustable resistance RW4 connects isoelectric level, adjustable end with is connected with the input of door G1, described and the outfan of a G1 are connected after light emitting diode D3 and are connected with central processing unit.
As preferably, described buffer amplifier circuit comprises resistance R 22 and the 12 operational amplifier U12, described resistance R 22 one end are connected with the outfan of right breast top electrode or left abdomen bottom electrode, the other end is connected with the positive input of the 12 operational amplifier U12, and the inverting input of described the 12 operational amplifier U12 is connected with outfan; Described driven-right-leg circuit comprises resistance R 23, resistance R 24, capacitor C 10 and the 13 operational amplifier U13, described resistance R 23 one end are connected with the outfan of right abdomen bottom electrode, the other end is connected with the inverting input of the 12 operational amplifier U12, between the inverting input of described the 12 operational amplifier U12 and outfan, be in series with the parallel circuit of resistance R 24 and capacitor C 10, the positive input ground connection of the 12 operational amplifier U12.
The utlity model has following outstanding beneficial effect: because electrocardiosignal is small-signal, so this utility model is provided with pre-amplification circuit, amplify electrocardiosignal; In order to suppress the severe jamming of baseline drift and elimination high-frequency harmonic, be provided with the bandwidth-limited circuit by high-pass filtering circuit and low-pass filter circuit Zhucheng; Undistorted for electrocardiosignal, designed level lifting circuit; In order to eliminate 50 Hz power frequencies, disturb, be provided with 50HZ trap circuit, be finally provided with A/D convertor circuit, make signal frequency reach sampling request.This utility model by electrocardiosignal is amplified, the processing such as level lifting, filtering, trap and analog digital conversion, reliability and the motility of system design have been increased, avoided causing due to resistance and capacitance difference the distortion of the inconsistent electrocardiosignal causing of filtering characteristic, had that performance is good, precision is high, volume is little and the feature such as energy consumption is lower.
Accompanying drawing explanation
Below in conjunction with accompanying drawing, the utility model is described in further detail:
Fig. 1 is theory diagram of the present utility model;
Fig. 2 is the circuit diagram of pre-amplification circuit described in the utility model;
Fig. 3 is the circuit diagram of high-pass filtering circuit described in the utility model;
Fig. 4 is the circuit diagram of low-pass filter circuit described in the utility model;
Fig. 5 is the circuit diagram of level lifting circuit described in the utility model;
Fig. 6 is the circuit diagram of 50HZ trap circuit described in the utility model;
Fig. 7 is the circuit diagram of detection alarm circuit of coming off that leads described in the utility model;
Fig. 8 is the circuit diagram of buffer amplifier circuit described in the utility model;
Fig. 9 is the circuit diagram of driven-right-leg circuit described in the utility model.
The specific embodiment
Disclosing below provides many different embodiment or example to be used for realizing different structure of the present utility model.Of the present utility model open in order to simplify, hereinafter the parts of specific examples and setting are described.In addition, this utility model can be in different examples repeat reference numerals and/or letter.This repetition is in order to simplify and object clearly, itself do not indicate the relation between discussed various embodiment and/or setting.It should be noted that illustrated parts are not necessarily drawn in proportion in the accompanying drawings.This utility model has omitted the description of known assemblies and treatment technology and technique to avoid unnecessarily limiting this utility model.
As shown in Figure 1, of the present utility model
Described cardiac diagnosis lead circuit comprises right breast top electrode, left abdomen bottom electrode, right abdomen bottom electrode, buffer amplifier circuit and driven-right-leg circuit, described right breast top electrode and left abdomen bottom electrode are electrocardiosignal sampling electrode, right breast top electrode is connected with pre-amplification circuit through buffer amplifier circuit respectively with left abdomen bottom electrode, for electrocardiosignal is isolated; Described right abdomen bottom electrode is right lower limb drive electrode, and right abdomen bottom electrode is connected with pre-amplification circuit through driven-right-leg circuit, for eliminate the interchange forming when electrocardio detects, disturbs, and reduces the common-mode voltage of human body, improves signal to noise ratio.
Because electrocardiosignal is small-signal, so being provided with pre-amplification circuit, this utility model amplifies electrocardiosignal.Described pre-amplification circuit comprises the differential amplifier circuit of both-end input, both-end output, common mode sampling drive circuit, and resaistance-capacity coupling circuit, and both-end is inputted, the differential amplifier circuit of Single-end output; The double input end of the differential amplifier circuit of described both-end input, both-end output is connected with organism contact electrode, and double input end is connected with the double input end of the differential amplifier circuit of both-end input, Single-end output with resaistance-capacity coupling circuit through common mode sampling drive circuit successively.
Fig. 2 is the circuit diagram of pre-amplification circuit described in the utility model, as shown in Figure 2, the differential amplifier circuit of described both-end input, both-end output comprises the first operational amplifier U1, the second operational amplifier U2, resistance R 1, resistance R 2 and resistance R 3, described common mode sampling drive circuit comprises the 3rd operational amplifier U3, resistance R 4 and resistance R 5, described resaistance-capacity coupling circuit comprises capacitor C 1, capacitor C 2, resistance R 6 and resistance R 7, and the differential amplifier circuit of described both-end input, Single-end output comprises instrument amplifier A1 and varistor R8; The positive input of described the first operational amplifier U1 and the second operational amplifier U2 is connected with organism contact electrode respectively, series resistance R3 between reverse input end, difference series resistance R1 and resistance R 2 between the reverse input end of the first operational amplifier U1 and the second operational amplifier U2 and outfan; After the outfan series capacitance C1 of described the first operational amplifier U1, be connected with the reverse input end of instrument amplifier A1, after the outfan series capacitance C2 of described the second operational amplifier U2, be connected with the positive input of instrument amplifier A1; The positive input of described the 3rd operational amplifier U3 is connected with the outfan of the second operational amplifier U2 with the first operational amplifier U1 with resistance R 5 through resistance R 4 respectively, inverting input is connected with outfan, and outfan is connected with positive input with the reverse input end of instrument amplifier A1 with resistance R 7 through resistance R 6 respectively; Described varistor R8 is the external gain-adjusted resistance of instrument amplifier A1.Preposition amplification is the link that whole signal amplifies most critical, is related to the service behaviour of whole analog acquisition part.
In order to suppress the severe jamming of baseline drift and elimination high-frequency harmonic, be provided with bandwidth-limited circuit.Described bandwidth-limited circuit comprises high-pass filtering circuit and low-pass filter circuit, and described high-pass filtering circuit and low-pass filter circuit are connected in series;
Fig. 3 is the circuit diagram of high-pass filtering circuit described in the utility model; As shown in Figure 3, described high-pass filtering circuit comprises four-operational amplifier U4, resistance R 9 and capacitor C 3, the positive input of described four-operational amplifier U4, through resistance R 9 ground connection, is connected with the outfan of pre-amplification circuit through capacitor C 3 simultaneously, and inverting input is connected with outfan;
Fig. 4 is the circuit diagram of low-pass filter circuit described in the utility model.As shown in Figure 4, described low-pass filter circuit comprises the 5th operational amplifier U5, resistance R 10, resistance R 11, capacitor C 4 and capacitor C 5, the positive input of described the 5th operational amplifier U5 is through capacitor C 4 ground connection, simultaneously successively series resistance R11 with after resistance R 10 with four-operational amplifier U4 outfan be connected, inverting input is connected with outfan, after the outfan series capacitance C5 of the 5th operational amplifier U5, is connected between resistance R 10 and resistance R 11.
Undistorted for electrocardiosignal, designed level lifting circuit.As shown in Figure 5, described level lifting circuit comprises the 6th operational amplifier U6, resistance R 12, resistance R 13, resistance R 14, resistance R 15 and the first adjustable resistance RW1, the positive input of described the 6th operational amplifier U6 is through resistance R 15 ground connection, after inverting input series resistance R12, be connected with the outfan of bandwidth-limited circuit, through resistance R 14, be connected with the adjustable end of the first adjustable resistance RW1 simultaneously, the two ends of described the first adjustable resistance RW1 are connected with positive and negative voltage end respectively, series resistance R13 between inverting input and outfan.
In order to eliminate 50 Hz power frequencies, disturb, be provided with 50HZ trap circuit.As shown in Figure 6, described 50HZ trap circuit comprises the 7th operational amplifier U7, the 8th operational amplifier U8, resistance R 16, resistance R 17, resistance R 18, resistance R 19, resistance R 20, resistance R 21, capacitor C 6, capacitor C 7, capacitor C 8 and capacitor C 9; The positive input of described the 7th operational amplifier U7 is connected with the outfan of level lifting circuit through parallel circuit, described parallel circuit is formed in parallel by the series circuit of the series circuit of resistance R 16, resistance R 17 and capacitor C 6, capacitor C 7, and the inverting input of the 7th operational amplifier U7 is connected with outfan; The positive input of described the 8th operational amplifier U8 is connected with the outfan of the 7th operational amplifier U7 through resistance R 20, pass through resistance R 21 ground connection simultaneously, inverting input is connected with outfan, outfan is connected between capacitor C 6 and capacitor C 7 through the parallel circuit of resistance R 18 and resistance R 19, and the parallel circuit through capacitor C 8 and capacitor C 9 is connected between resistance R 16 and resistance R 17 simultaneously.
In order to make signal frequency reach sampling request, this utility model is finally also provided with A/D convertor circuit, and described A/D convertor circuit adopts ADC0809 chip.ADC0809 be sampling resolution be 8, with device that successively approximation theory carries out mould-number conversion.There are 8 passage variable connectors its inside, and it can latch the signal after decoding according to address code, and one in a gating 8 road analog input signals is carried out A/D conversion.The work process of ADC0809 is: first input 3 bit address, and make ALE=1, address is deposited in address latch.Comparator is arrived through one of decoding gating 8 tunnel analog inputs in this address.START rising edge resets successive approximation register.Trailing edge starts A/D conversion, and EOC output signal step-down, indicates conversion to carry out afterwards.Until A/D converts, EOC becomes high level, indication A/D EOC, and result data has deposited latch in, and this signal can be used as interrupting application.When OE input high level, output triple gate is opened, and the digital output of transformation result is to data/address bus.
In order to judge fast to lead, to come off and report to the police, thereby guaranteeing the reliability of electrocardiograph monitoring device diagnostic result, this utility model the being provided with detection alarm circuit that comes off that leads.The described detection alarm circuit that comes off of leading comprises differential amplifier circuit, window comparator circuit and warning circuit, the input of described differential amplifier circuit is connected with the outfan of described pre-amplification circuit, outfan is connected with the input of window comparator circuit, the outfan of described window comparator circuit is connected with warning circuit, described warning circuit is connected with central processing unit, for the detection that comes off that described electrocardiosignal is led, and the Check processing that comes off according to leading provides to described central processing unit the detection signal that comes off that leads.The described central processing unit detection signal that comes off according to leading determines whether to occur leading to come off, and sends the marking signal that comes off that leads being determined to be to lead while coming off, and shows.
Fig. 7 is the circuit diagram of detection alarm circuit of coming off that leads described in the utility model.As shown in Figure 7, described differential amplifier circuit comprises the 9th operational amplifier U9, described window comparator circuit comprises the tenth operational amplifier U10, the 11 operational amplifier U11, the second adjustable resistance RW2, the 3rd adjustable resistance RW3, the first diode D1 and the second diode D2, described warning circuit comprise the 4th adjustable resistance RW4, light emitting diode D3 and with door G1; Described the 9th positive input of operational amplifier U9 and the outfan of pre-amplification circuit are connected, and outfan is connected with the reverse input end of the 11 operational amplifier U11 with the reverse input end of the 9th operational amplifier U9, the positive input of the tenth operational amplifier U10 respectively; The tenth reverse input end of operational amplifier U10 and the positive input of the 11 operational amplifier U11 are connected with the adjustable end of the 3rd adjustable resistance RW3 with the adjustable end of the second adjustable resistance RW2 respectively, described the second adjustable resistance RW2 and the 3rd adjustable resistance RW3 form series circuit, and series circuit two ends connect respectively generating positive and negative voltage and be connected with isoelectric level between the second adjustable resistance RW2 and the 3rd adjustable resistance RW3; The tenth outfan of operational amplifier U10 and the outfan of the 11 operational amplifier U11 first diode D1 that connects is respectively connected with one end of the 4th adjustable resistance RW4 with after the second diode D2; The other end of described the 4th adjustable resistance RW4 connects isoelectric level, adjustable end with is connected with the input of door G1, described and the outfan of a G1 are connected after light emitting diode D3 and are connected with central processing unit.
Fig. 8 is the circuit diagram of buffer amplifier circuit described in the utility model.As shown in Figure 8, described buffer amplifier circuit comprises resistance R 22 and the 12 operational amplifier U12, described resistance R 22 one end are connected with the outfan of right breast top electrode or left abdomen bottom electrode, the other end is connected with the positive input of the 12 operational amplifier U12, the inverting input of described the 12 operational amplifier U12 is connected with outfan, in order to input electrode signal is isolated.Buffer amplifier circuit is the pith of electrocardiogram acquisition input circuit, is actually an impedance transducer, plays buffer action in circuit.
In order to reduce displacement current, in cardiac diagnosis lead circuit, designed driven-right-leg circuit.As shown in Figure 9, described driven-right-leg circuit comprises resistance R 23, resistance R 24, capacitor C 10 and the 13 operational amplifier U13, described resistance R 23 one end are connected with the outfan of right abdomen bottom electrode, the other end is connected with the inverting input of the 12 operational amplifier U12, between the inverting input of described the 12 operational amplifier U12 and outfan, be in series with the parallel circuit of resistance R 24 and capacitor C 10, the positive input ground connection of the 12 operational amplifier U12.Because human body picks up 50Hz alternating voltage under normal conditions through various channels, will when detect, electrocardio in signal, form to exchange and disturb like this, be everlasting more than several volts, in order to eliminate this interference, conventionally adopt driven-right-leg circuit.The operation principle of driven-right-leg circuit is the defeated the Huis' body of mode that the common-mode voltage being obtained by body surface is amplified by negative feedback, thereby reaches the effect of offsetting common mode disturbances, fundamentally suppresses common-mode voltage.During wiring, electrode is connected with amplifier earth terminal through resistance, can greatly reduce the common-mode voltage of human body.It is an essential link during electrocardiosignal is extracted that right lower limb drives, the common-mode noise mixing in original electrocardiographicdigital signal is extracted, after one-level paraphase is amplified, turn back to again human body, they are superposeed mutually, thereby reduce the absolute value of human body common mode disturbances, improve signal to noise ratio, it can disturb the power frequency of 50Hz to be reduced to 1% once, and the 50Hz useful signal in electrocardiosignal can not removed, with the method comparison of right lower limb ground connection, right lower limb actuation techniques is better to suppressing to exchange interference effect.
In above-mentioned embodiment, the involved all operational amplifiers of this utility model all can adopt LM324 integrated circuit, and instrument amplifier A1 can adopt AD620 amplifier.
The above is preferred implementation of the present utility model; for those skilled in the art; not departing under the prerequisite of this utility model principle, can also make some improvements and modifications, these improvements and modifications are also regarded as protection domain of the present utility model.
Claims (10)
1. an electrocardiogram signal acquisition device, is characterized in that, comprises cardiac diagnosis lead circuit, pre-amplification circuit, level lifting circuit, bandwidth-limited circuit, 50HZ trap circuit, A/D convertor circuit, detection alarm circuit and the central processing unit of coming off that lead,
Described cardiac diagnosis lead circuit is for importing detected electrocardiosignal, and pass through successively pre-amplification circuit, level lifting circuit, bandwidth-limited circuit, 50HZ trap circuit and A/D convertor circuit amplify described electrocardiosignal, level lifting, filtering, after trap and analog-to-digital conversion process, send to central processing unit, described central processing unit carries out characteristic point identification to the electrocardiosignal after processing, described the come off input of detection alarm circuit and the outfan of described pre-amplification circuit of leading is connected, outfan is connected with central processing unit, for the detection that comes off that described electrocardiosignal is led,
Described cardiac diagnosis lead circuit comprises right breast top electrode, left abdomen bottom electrode, right abdomen bottom electrode, buffer amplifier circuit and driven-right-leg circuit, described right breast top electrode and left abdomen bottom electrode are electrocardiosignal sampling electrode, right breast top electrode is connected with pre-amplification circuit through buffer amplifier circuit respectively with left abdomen bottom electrode, for electrocardiosignal is isolated; Described right abdomen bottom electrode is right lower limb drive electrode, and right abdomen bottom electrode is connected with pre-amplification circuit through driven-right-leg circuit, for eliminate the interchange forming when electrocardio detects, disturbs, and reduces the common-mode voltage of human body, improves signal to noise ratio.
2. a kind of electrocardiogram signal acquisition device according to claim 1, it is characterized in that, described pre-amplification circuit comprises the differential amplifier circuit of both-end input, both-end output, common mode sampling drive circuit, resaistance-capacity coupling circuit, and both-end is inputted, the differential amplifier circuit of Single-end output; The double input end of the differential amplifier circuit of described both-end input, both-end output is connected with organism contact electrode, and double input end is connected with the double input end of the differential amplifier circuit of both-end input, Single-end output with resaistance-capacity coupling circuit through common mode sampling drive circuit successively.
3. a kind of electrocardiogram signal acquisition device according to claim 2, it is characterized in that, the differential amplifier circuit of described both-end input, both-end output comprises the first operational amplifier U1, the second operational amplifier U2, resistance R 1, resistance R 2 and resistance R 3, described common mode sampling drive circuit comprises the 3rd operational amplifier U3, resistance R 4 and resistance R 5, described resaistance-capacity coupling circuit comprises capacitor C 1, capacitor C 2, resistance R 6 and resistance R 7, and the differential amplifier circuit of described both-end input, Single-end output comprises instrument amplifier A1 and varistor R8; The positive input of described the first operational amplifier U1 and the second operational amplifier U2 is connected with organism contact electrode respectively, series resistance R3 between reverse input end, difference series resistance R1 and resistance R 2 between the reverse input end of the first operational amplifier U1 and the second operational amplifier U2 and outfan; After the outfan series capacitance C1 of described the first operational amplifier U1, be connected with the reverse input end of instrument amplifier A1, after the outfan series capacitance C2 of described the second operational amplifier U2, be connected with the positive input of instrument amplifier A1; The positive input of described the 3rd operational amplifier U3 is connected with the outfan of the second operational amplifier U2 with the first operational amplifier U1 with resistance R 5 through resistance R 4 respectively, inverting input is connected with outfan, and outfan is connected with positive input with the reverse input end of instrument amplifier A1 with resistance R 7 through resistance R 6 respectively; Described varistor R8 is the external gain-adjusted resistance of instrument amplifier A1.
4. a kind of electrocardiogram signal acquisition device according to claim 1, is characterized in that, described bandwidth-limited circuit comprises high-pass filtering circuit and low-pass filter circuit, and described high-pass filtering circuit and low-pass filter circuit are connected in series;
Described high-pass filtering circuit comprises four-operational amplifier U4, resistance R 9 and capacitor C 3, the positive input of described four-operational amplifier U4 is through resistance R 9 ground connection, through capacitor C 3, be connected with the outfan of pre-amplification circuit, inverting input is connected with outfan simultaneously;
Described low-pass filter circuit comprises the 5th operational amplifier U5, resistance R 10, resistance R 11, capacitor C 4 and capacitor C 5, the positive input of described the 5th operational amplifier U5 is through capacitor C 4 ground connection, simultaneously successively series resistance R11 with after resistance R 10 with four-operational amplifier U4 outfan be connected, inverting input is connected with outfan, after the outfan series capacitance C5 of the 5th operational amplifier U5, is connected between resistance R 10 and resistance R 11.
5. a kind of electrocardiogram signal acquisition device according to claim 1, it is characterized in that, described level lifting circuit comprises the 6th operational amplifier U6, resistance R 12, resistance R 13, resistance R 14, resistance R 15 and the first adjustable resistance RW1, the positive input of described the 6th operational amplifier U6 is through resistance R 15 ground connection, after inverting input series resistance R12, be connected with the outfan of bandwidth-limited circuit, through resistance R 14, be connected with the adjustable end of the first adjustable resistance RW1 simultaneously, the two ends of described the first adjustable resistance RW1 respectively with just, negative voltage side connects, series resistance R13 between inverting input and outfan.
6. a kind of electrocardiogram signal acquisition device according to claim 1, it is characterized in that, described 50HZ trap circuit comprises the 7th operational amplifier U7, the 8th operational amplifier U8, resistance R 16, resistance R 17, resistance R 18, resistance R 19, resistance R 20, resistance R 21, capacitor C 6, capacitor C 7, capacitor C 8 and capacitor C 9; The positive input of described the 7th operational amplifier U7 is connected with the outfan of level lifting circuit through parallel circuit, described parallel circuit is formed in parallel by the series circuit of the series circuit of resistance R 16, resistance R 17 and capacitor C 6, capacitor C 7, and the inverting input of the 7th operational amplifier U7 is connected with outfan; The positive input of described the 8th operational amplifier U8 is connected with the outfan of the 7th operational amplifier U7 through resistance R 20, pass through resistance R 21 ground connection simultaneously, inverting input is connected with outfan, outfan is connected between capacitor C 6 and capacitor C 7 through the parallel circuit of resistance R 18 and resistance R 19, and the parallel circuit through capacitor C 8 and capacitor C 9 is connected between resistance R 16 and resistance R 17 simultaneously.
7. a kind of electrocardiogram signal acquisition device according to claim 1, is characterized in that, described A/D convertor circuit adopts ADC0809 chip.
8. a kind of electrocardiogram signal acquisition device according to claim 1, it is characterized in that, the described detection alarm circuit that comes off of leading comprises differential amplifier circuit, window comparator circuit and warning circuit, the input of described differential amplifier circuit is connected with the outfan of described pre-amplification circuit, outfan is connected with the input of window comparator circuit, the outfan of described window comparator circuit is connected with warning circuit, described warning circuit is connected with central processing unit, for the detection that comes off that described electrocardiosignal is led, and the Check processing that comes off according to leading provides to described central processing unit the detection signal that comes off that leads.
9. a kind of electrocardiogram signal acquisition device according to claim 8, it is characterized in that, described differential amplifier circuit comprises the 9th operational amplifier U9, described window comparator circuit comprises the tenth operational amplifier U10, the 11 operational amplifier U11, the second adjustable resistance RW2, the 3rd adjustable resistance RW3, the first diode D1 and the second diode D2, described warning circuit comprise the 4th adjustable resistance RW4, light emitting diode D3 and with door G1; Described the 9th positive input of operational amplifier U9 and the outfan of pre-amplification circuit are connected, and outfan is connected with the reverse input end of the 11 operational amplifier U11 with the reverse input end of the 9th operational amplifier U9, the positive input of the tenth operational amplifier U10 respectively; The tenth reverse input end of operational amplifier U10 and the positive input of the 11 operational amplifier U11 are connected with the adjustable end of the 3rd adjustable resistance RW3 with the adjustable end of the second adjustable resistance RW2 respectively, described the second adjustable resistance RW2 and the 3rd adjustable resistance RW3 form series circuit, and series circuit two ends connect respectively generating positive and negative voltage and be connected with isoelectric level between the second adjustable resistance RW2 and the 3rd adjustable resistance RW3; The tenth outfan of operational amplifier U10 and the outfan of the 11 operational amplifier U11 first diode D1 that connects is respectively connected with one end of the 4th adjustable resistance RW4 with after the second diode D2; The other end of described the 4th adjustable resistance RW4 connects isoelectric level, adjustable end with is connected with the input of door G1, described and the outfan of a G1 are connected after light emitting diode D3 and are connected with central processing unit.
10. according to a kind of electrocardiogram signal acquisition device described in claim 1-9 any one, it is characterized in that, described buffer amplifier circuit comprises resistance R 22 and the 12 operational amplifier U12, described resistance R 22 one end are connected with the outfan of right breast top electrode or left abdomen bottom electrode, the other end is connected with the positive input of the 12 operational amplifier U12, and the inverting input of described the 12 operational amplifier U12 is connected with outfan; Described driven-right-leg circuit comprises resistance R 23, resistance R 24, capacitor C 10 and the 13 operational amplifier U13, described resistance R 23 one end are connected with the outfan of right abdomen bottom electrode, the other end is connected with the inverting input of the 12 operational amplifier U12, between the inverting input of described the 12 operational amplifier U12 and outfan, be in series with the parallel circuit of resistance R 24 and capacitor C 10, the positive input ground connection of the 12 operational amplifier U12.
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