CN203288217U - Pixel circuit and display device - Google Patents

Pixel circuit and display device Download PDF

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Publication number
CN203288217U
CN203288217U CN2013203355285U CN201320335528U CN203288217U CN 203288217 U CN203288217 U CN 203288217U CN 2013203355285 U CN2013203355285 U CN 2013203355285U CN 201320335528 U CN201320335528 U CN 201320335528U CN 203288217 U CN203288217 U CN 203288217U
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transistor
voltage
light emitting
electrode
pixel circuit
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CN2013203355285U
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Chinese (zh)
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尹静文
吴仲远
段立业
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京东方科技集团股份有限公司
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Abstract

The utility model discloses a pixel circuit and a display device, and relates to the technical field of display. The pixel circuit and the display device aim at compensating TFT threshold voltage drift, improving non-uniformity of display brightness of the display device and prolonging the service life of the display device. The pixel circuit comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a first storage capacitor, a second storage capacitor and a light-emitting device. The pixel circuit and the display device are applicable to manufacturing of display panels.

Description

一种像素电路及显示装置技术领域 A pixel circuit and a display device Technical Field

[0001] 本实用新型涉及显示技术领域,尤其涉及一种像素电路及显示装置。 [0001] The present invention relates to display technology, and more particularly, to a pixel circuit and a display device.

背景技术 Background technique

[0002] 随着显示技术的急速进步,作为显示装置核心的半导体元件技术也随之得到了飞跃性的进步。 [0002] With rapid advances in display technology, the display device as a semiconductor element technology also will be the core of the progress of the leap. 对于现有的显示装置而言,有机发光二极管(Organic Light EmittingDiode, OLED)作为一种电流型发光器件,因其所具有的自发光、快速响应、宽视角和可制作在柔性衬底上等特点而越来越多地被应用于高性能显示领域当中。 For a conventional display device, an organic light emitting diode (Organic Light EmittingDiode, OLED) as a current-type light emitting device, because it has a self-emission, fast response, wide viewing angle, and can be produced in the flexible substrate superior characteristics and more and more high-performance display which it is applied to the field. OLED按驱动方式可分为PMOLED (Passive Matrix Driving 0LED,无源矩阵驱动有机发光二极管)和AMOLED (ActiveMatrix Driving 0LED,有源矩阵驱动有机发光二极管)两种,由于AMOLED显示器具有低制造成本、高应答速度、省电、可用于便携式设备的直流驱动、工作温度范围大等等优点而可望成为取代LCD(liquid crystal display,液晶显示器)的下一代新型平面显示器。 OLED driving method can be divided by PMOLED (Passive Matrix Driving 0LED, the passive matrix organic light emitting diode) and AMOLED (ActiveMatrix Driving 0LED, active matrix driving organic light emitting diode) in two, since the AMOLED display has a low manufacturing cost, high response speed, low power, portable device can be used for direct drive, wide operating temperature range, etc. are expected to be advantages substituted LCD (liquid crystal display, liquid crystal display) of the new generation flat panel display.

[0003] 在现有的AMOLED显示面板中,每个OLED均包括多个TFT (Thin Film Transistor,薄膜晶体管)开关电路,由于生产工艺和制作水平等的限制,导致在大面积玻璃基板上制作的TFT开关电路常常在诸如阈值电压、迁移率等电学参数上出现非均匀性,从而使得流经AMOLED的电流不仅会随着TFT长时间导通所产生的导通电压应力的变化而改变,而且还会随着TFT的阈值电压漂移而有所不同。 [0003] In a conventional AMOLED display panel, each OLED includes a plurality of TFT (Thin Film Transistor, a thin film transistor) circuit switching, due to the production process and production levels, etc., resulting in production on a large area glass substrate TFT switching circuits often appear non-uniformity in electrical parameters such as threshold voltage, mobility, etc., so that the current flowing through the AMOLED varies not only a TFT on-voltage stress generated by the conduction time is changed, but also as will TFT threshold voltage shift vary. 如此一来,将会影响到显示器的亮度均匀性与亮度恒定性。 Thus, it will affect the uniformity of brightness of the display brightness constant. 另一方面,工作状态下的AMOLED还将长时间处于偏压状态,加快了显示装置衰减的速率,从而降低了显示装置的寿命。 On the other hand, in the operating state of an AMOLED also a long time in a biased state, to accelerate the rate of decay of the display device, thereby reducing the life of the display device.

实用新型内容 SUMMARY

[0004] 本实用新型的实施例提供一种像素电路及显示装置,用以对TFT阈值电压漂移进行补偿,改善显示装置显示亮度的不均匀性,延长显示装置的使用寿命。 [0004] Example embodiments of the present invention provides a pixel circuit and a display device for the TFT threshold voltage shift is compensated, the display means displays improved brightness unevenness, extended service life of the display device.

[0005] 为达到上述目的,本·实用新型的实施例采用如下技术方案: [0005] To achieve the above object, the present invention · embodiment adopts the following technical solutions:

[0006] 本实用新型实施例的一方面,提供一种像素电路,包括: [0006] In one aspect of the present invention embodiment, there is provided a pixel circuit, comprising:

[0007] 第一晶体管、第二晶体管、第三晶体管、第四晶体管、第五晶体管、第一存储电容、第二存储电容及发光器件; [0007] The first transistor, second transistor, a third transistor, a fourth transistor, a fifth transistor, a first storage capacitor, a second storage capacitor and a light emitting device;

[0008] 所述第一晶体管的栅极连接所述第三晶体管的第一极,其第一极连接所述第五晶体管的第二极,其第二极连接第一电压; [0008] The gate electrode of the first transistor is connected to a first electrode of the third transistor, a first electrode connected to the second electrode of the fifth transistor, a second electrode connected to a first voltage;

[0009] 所述第二晶体管的栅极连接第一控制线,其第一极连接所述第四晶体管的第二极,其第二极连接所述第五晶体管的第二极; A first control line connected to the gate of [0009] the second transistor, a first electrode connected to a second electrode of the fourth transistor, a second electrode connected to the second electrode of the fifth transistor;

[0010] 所述第三晶体管的栅极连接所述第一控制线,其第一极连接所述第一存储电容的一端,其第二极连接可变电压; A gate [0010] The third transistor is connected to the first control line, a first electrode connected to a first end of the storage capacitor, a second electrode connected to a variable voltage;

[0011] 所述第四晶体管的栅极连接第二控制线,其第一极连接数据线; [0011] The gate connected to the second control line of the fourth transistor, a first electrode connected to a data line;

[0012] 所述第五晶体管的栅极连接发光控制线,其第一极连接所述发光器件的阳极; [0012] The light emission control line connected to the gate of the fifth transistor, a first electrode connected to an anode of the light emitting device;

[0013] 所述第二存储电容的一端与所述第一存储电容的另一端相连,其另一端连接所述可变电压; [0013] One end of the second storage capacitor and the other end of the first storage capacitor is connected to the other end connected to the variable voltage;

[0014] 所述发光器件的阴极连接第二电压。 [0014] The cathode of the light emitting device connected to the second voltage.

[0015] 本实用新型实施例的另一方面,提供一种显示装置,包括如上所述的像素电路。 [0015] Example embodiment of the present invention aspect, there is provided a display device comprising a pixel circuit as described above.

[0016] 本实用新型实施例提供的像素电路及显示装置,通过多个晶体管和电容对电路进行开关和充放电控制,可以使得存储电容保持第一晶体管栅极和源极之间的栅源电压不变,从而使得通过第一晶体管的电流与该第一晶体管的阈值电压及第一电压无关,从而对第一晶体管阈值电压的不一致或漂移进行了补偿,避免了第一电压的电阻压降(1-Rdrop)对流过发光器件的电流所造成的影响,显著改善了显示装置显示亮度的均匀性,另一方面,通过清除发光器件阳极的电荷,避免了发光器件长时间处于正偏压状态,从而有效减缓了发光器件衰减的速率,大大提高了显示装置的使用寿命。 [0016] The pixel circuit embodiment of the present invention and a display device provided by a plurality of transistors and a capacitor, and circuit switching charge and discharge control may be such that the storage capacitor holds the gate-source voltage between the gate and the source of the first transistor unchanged, so that regardless of the threshold voltage of the first transistor and a first voltage current through the first transistor, so that the threshold voltage of the first transistor is inconsistent or drift compensation, to avoid the first voltage drop resistor ( 1-Rdrop) Effect of current flowing through the light emitting device caused by the significantly improved brightness uniformity of the display device of the display, on the other hand, the light emitting device by removing the charge of the anode, the light emitting device to avoid positive bias state for a long time, thereby to effectively reduce the rate of decay of the light emitting device, greatly improving the life of the display device.

附图说明 BRIEF DESCRIPTION

[0017] 为了更清楚地说明本实用新型实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本实用新型的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。 [0017] In order to more clearly illustrate the embodiments of the present invention or the technical solution in the prior art, accompanying drawings for describing the embodiments or the prior art described in the introduction required simply Apparently, the description below the drawings are only some embodiments of the present invention embodiments, those of ordinary skill in the art is concerned, without creative efforts, can derive from these drawings other drawings.

[0018] 图1为本实用新型实施例提供的一种像素电路的连接结构示意图; A pixel circuit connection structure embodiments provide novel [0018] Figure 1 is a schematic diagram useful;

[0019] 图2为驱动图1所述像素电路时各信号线的时序图; [0019] FIG. 2 is a timing chart of each signal line driving circuit when said pixel map;

[0020] 图3为图1所示像素电路在初始化阶段的等效电路示意图; [0020] FIG. 3 is a schematic circuit diagram of the pixel shown in FIG. 1 in the equivalent circuit of the initialization phase;

[0021] 图4为图1所示像素电路在采集阶段的等效电路示意图; [0021] FIG. 4 is an equivalent circuit diagram of the pixel circuit shown in FIG. 1 in the acquisition phase;

[0022] 图5为图1所示像素电路在数据输入阶段的等效电路示意图; [0022] FIG. 5 is a schematic circuit diagram of FIG. 1 in the equivalent circuit of the pixel data input stage;

[0023] 图6为图1所示像素电路在发光阶段的等效电路示意图; [0023] FIG. 6 is a schematic diagram of an equivalent circuit of the light emitting pixel circuit shown in stages;

[0024] 图7为本实用新型实施例提供的一种像素电路驱动方法的流程示意图。 A pixel circuit for driving a schematic flow chart of a method [0024] FIG. 7 embodiment of the present invention provides.

具体实施方式 detailed description

[0025] 下面将结合本实用新型实施例中的附图,对本实用新型实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本实用新型一部分实施例,而不是全部的实施例。 [0025] below with reference to the present invention, the embodiment of the drawings, the present invention embodiment of the technical solution will be clearly and completely described, obviously, the described embodiments are merely embodiments of the present invention a part, rather than all embodiments. 基于本实用新型中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本实用新型保护的范围。 Based on the embodiments of the present invention, all other embodiments to those of ordinary skill in the art without any creative effort shall fall within the scope of protection of the present invention.

[0026] 本实用新型实施例提供的像素电路1,如图1所示,包括: [0026] The pixel circuit embodiment of the present invention is provided in Example 1 shown in Figure 1, comprising:

[0027] 第一晶体管Tl、第二晶体管T2、第三晶体管T3、第四晶体管T4、第五晶体管T5、第一存储电容Cl、第二存储电容C2以及发光器件L。 [0027] The first transistor Tl, a second transistor T2, third transistor T3, a fourth transistor T4, a fifth transistor T5, a first storage capacitor Cl, a second storage capacitor C2, and the light emitting device L.

[0028] 第一晶体管Tl的栅极连接第三晶体管T3的第一极,其第一极连接第五晶体管T5的第二极,其第二极连接第一电压(Vdd)。 A gate [0028] of the first transistor Tl is connected to a first electrode of the third transistor T3, which is connected to a first electrode of the fifth transistor T5, a second electrode, a second electrode connected to a first voltage (Vdd).

[0029] 第二晶体管T2的栅极连接第一控制线Sn-1,其第一极连接第四晶体管T4的第二极,其第二极连接第五晶体管T5的第二极。 [0029] The gate of the second transistor T2 is connected to a first control line Sn-1, which is connected to a first electrode of the fourth transistor T4, a second electrode, a second electrode connected to a second electrode of the fifth transistor T5.

[0030] 第三晶体管T3的栅极连接第一控制线Sn-1,其第一极连接第一存储电容Cl的一端,其第二极连接可变电压(Vref)。 [0030] The gate of the third transistor T3 is connected to a first control line Sn-1, one end of which is connected to a first electrode of the first storage capacitor Cl, a second electrode connected to the variable voltage (Vref).

[0031] 第四晶体管T4的栅极连接第二控制线Sn,其第一极连接数据线Date。 [0031] The gate of the fourth transistor T4 is connected to the second control line Sn, a first electrode connected to data line Date. [0032] 所述第五晶体管T5的栅极连接发光控制线Em,其第一极连接发光器件L的阳极。 [0032] The gate of the fifth transistor connected to the light emitting control line Em T5, which is connected to a first electrode of the anode of the light emitting device L.

[0033] 第二存储电容C2的一端与第一存储电容Cl的另一端相连,其另一端连接可变电压(Vref) ο [0033] One end of the second storage capacitor C2 is connected to the other end of the first storage capacitor Cl, and the other end connected to the variable voltage (Vref) ο

[0034] 发光器件L的阴极连接第二电压(Vss)。 [0034] L is a light emitting device connected to the cathode of the second voltage (Vss).

[0035] 需要说明的是,本实用新型实施例中的发光器件L可以是现有技术中包括LED (Light Emitting Diode,发光二极管)或OLED (Organic Light Emitting Diode,有机发光二极管)在内的多种电流驱动发光器件。 [0035] Incidentally, the light emitting device of the present invention embodiment, L may be a prior art comprises a LED (Light Emitting Diode, a light emitting diode) or OLED (Organic Light Emitting Diode, OLED) including a plurality kinds of current-driven light emitting device. 在本实用新型实施例中,是以OLED为例进行的说明。 In the embodiment of the present invention, it is described as an example of the OLED.

[0036] 本实用新型实施例提供的像素电路及显示装置,通过多个晶体管和电容对电路进行开关和充放电控制,可以使得存储电容保持第一晶体管栅极和源极之间的栅源电压不变,从而使得通过第一晶体管的电流与该第一晶体管的阈值电压及第一电压无关,从而对第一晶体管阈值电压的不一致或漂移进行了补偿,避免了第一电压的电阻压降(1-Rdrop)对流过发光器件的电流所造成的影响,显著改善了显示装置显示亮度的均匀性,另一方面,通过清除发光器件阳极的电荷,避免了发光器件长时间处于正偏压状态,从而有效减缓了发光器件衰减的速率,大大提高了显示装置的使用寿命。 [0036] The pixel circuit embodiment of the present invention and a display device provided by a plurality of transistors and a capacitor, and circuit switching charge and discharge control may be such that the storage capacitor holds the gate-source voltage between the gate and the source of the first transistor unchanged, so that regardless of the threshold voltage of the first transistor and a first voltage current through the first transistor, so that the threshold voltage of the first transistor is inconsistent or drift compensation, to avoid the first voltage drop resistor ( 1-Rdrop) Effect of current flowing through the light emitting device caused by the significantly improved brightness uniformity of the display device of the display, on the other hand, the light emitting device by removing the charge of the anode, the light emitting device to avoid positive bias state for a long time, thereby to effectively reduce the rate of decay of the light emitting device, greatly improving the life of the display device.

[0037] 需要说明的是,在本实用新型实施例中,电压Vdd可以是指高电压,电压Vss可以是低电压或接地端。 [0037] Incidentally, in the embodiment of the present invention, may refer to a high voltage Vdd voltage, low voltage Vss may be a voltage or a ground terminal.

[0038] 其中,第一晶体管T1、第二晶体管T2、第三晶体管T3、第四晶体管T4和第五晶体管T5可以均为N型晶体管;或者第一晶体管Tl可以为N型晶体管,第二晶体管T2、第三晶体管T3、第四晶体管T4以及第五晶体管T5可以均为P型晶体管;或者第一晶体管Tl、第二晶体管T2、第三晶体管T3、第四晶体管T4和第五晶体管T5可以均为P型晶体管;或者第一晶体管Tl可以为P型晶体管,第二晶体管T2、第三晶体管T3、第四晶体管T4以及第五晶体管T5可以均为N型晶体管。 [0038] wherein the first transistor T1, a second transistor T2, third transistor T3, the fourth transistor T4 and the fifth transistor T5 may all be N-type transistors; a first transistor Tl or may be a N-type transistor, the second transistor T2, a third transistor T3, the fourth transistor T4 and the fifth transistor T5 may be P-type transistor are; or the first transistor Tl, a second transistor T2, third transistor T3, the fourth transistor T4 and the fifth transistor T5 may each P-type transistors; a first transistor Tl or may be a P-type transistor, a second transistor T2, third transistor T3, the fourth transistor T4 and the fifth transistor T5 may all be N-type transistors. 当采用不同类型的晶体管时,像素电路的外部控制信号也各不相同。 When different types of transistors, the pixel circuit of an external control signal is also different.

[0039] 例如,以N型晶体管为例,在本实用新型实施例所提供的像素电路中,第一晶体管Tl、第二晶体管T2、第三晶体管T3、第四晶体管T4以及第五晶体管T5均可以为N型增强型TFT (Thin Film Transistor,薄膜晶体管)或N型耗尽型TFT。 [0039] For example, the N-type transistor as an example, in the pixel circuit embodiment of the present invention is provided, the first transistor Tl, a second transistor T2, third transistor T3, the fourth transistor T4 and the fifth transistor T5 are It may be N-type enhancement TFT (thin film transistor, a thin film transistor) or an N-type depletion type TFT. 其中,第一晶体管Tl、第二晶体管T2、第三晶体管T3、第四晶体管T4和第五晶体管T5的第一极均可以指的是源极,第二极则均可以指的是漏极。 Wherein the first transistor Tl, a second transistor T2, third transistor T3, the fourth transistor T4 and the fifth transistor may each refer to a first electrode of T5 is a source, the second pole may each refer to a drain.

[0040] 以下以第一晶体管Tl、第二晶体管T2、第三晶体管T3、第四晶体管T4和第五晶体管T5均为N型耗尽型TFT为例,对本实用新型实施例提供的像素电路的工作过程进行详细说明。 [0040] In the following a first transistor Tl, a second transistor T2, third transistor T3, the fourth transistor T4 and the fifth transistor T5 are N-type depletion type TFT as an example, the pixel circuit of the present embodiment of the invention provided work process in detail.

[0041] 图1所示的像素电路工作时,其工作过程具体可以分为四个阶段,分别为:初始化阶段、采集阶段、数据输入阶段和发光阶段。 When the pixel circuit shown in [0041] FIG 1, particularly its work process can be divided into four stages, namely: the initialization phase, the acquisition stage, the input data phase and an emission phase. 图2是图1所示像素电路工作过程中各信号线的时序图。 Figure 2 shows a pixel circuit during operation timing chart of each signal line in FIG. 如图2所示,在图中分别用Pr、PU P2和P3来相应地表示初始化阶段、采集阶段、数据输入阶段和发光阶段。 As shown in the figure, respectively Pr, PU P2 and P3, respectively represent the initialization phase, the acquisition stage, the input data phase and an emission phase 2.

[0042] 第一阶段为初始化阶段,该阶段的等效电路如图3所示,其中,实际通电线路和器件采用实线表示,未通电单元采用虚线表示,以下各等效电路图与改图表示方式相同。 [0042] The first stage of the initialization phase, the phase of the equivalent circuit shown in Figure 3, wherein the actual power line and a solid line indicates devices are unpowered unit with dashed lines, following an equivalent circuit diagram showing the change in the same way. 在初始化阶段,第一控制线Sn-1、第二控制线Sn和发光控制线Em输入高电平,可变电压(Vref)和数据线Data输出的数据电压(Vdata)为低电平。 In the initialization phase, a first control line Sn-1, the second control line Sn and the light emitting control line Em input high, the variable voltage (Vref) and the data line Data output from the data voltage (Vdata) is low. 如图3所示第二晶体管T2、第三晶体管T3、第四晶体管T4、第五晶体管T5被导通,关闭第一晶体管Tl,第一存储电容Cl和第二存储电容C2被重置,并且第二晶体管T2的第一极与第四晶体管T4的第二极相连的节点b处的电压为低电压(Vdate),所以发光器件L的阳极电位为该低电位(Vdata),所以发光器件L上储存的电荷通过被导通的第五晶体管T5、第二晶体管T2及第四晶体管T4输出,这样一来,可以使得OLED阳极长时间存储的电荷清除,从而确保其不处于正偏压状态,从而减缓OLED衰减的速度,提高显示装置的寿命。 3 a second transistor T2, third transistor T3, a fourth transistor T4, a fifth transistor T5 are turned on, turn off the first transistor Tl, a first storage capacitor Cl and the second storage capacitor C2 is reset, and a second voltage at the node b is connected to a first electrode of the second transistor T2 and the fourth transistor T4 is a low voltage (Vdate), so that the anode potential of the light emitting device L for low potential (Vdata), the light emitting element L the stored charge through the fifth transistor T5 is turned on, the second transistor T2 and the fourth output transistor T4, this way, can clear the anode of the OLED such that the charge storage time, thus ensuring it is not in a positive bias state, thereby slowing the rate of decay OLED, improve the life of the display device.

[0043] 第二阶段为采集阶段,该阶段的等效电路如图4所示。 [0043] The second stage of the acquisition phase, the phase of the equivalent circuit shown in FIG. 在该采集阶段,可变电压(Vref)和数据线Data输出的数据电压(Vdata)为高电平,第一控制线Sn-1输入高电平、第二控制线Sn和发光控制线Em输入低电平。 In the acquisition phase, the variable voltage (Vref) and the data line Data output from the data voltage (Vdata) is high, the first control line Sn-1 input high, the second control line Sn and the light emitting control line Em input low level. 如图4所示,关闭第四晶体管T4、第五晶体管T5,第二晶体管T2、第三晶体管T3被导通,可变电压(Vref)输入的高电平使得第一晶体管Tl导通,第一晶体管Tl的栅极与第三晶体管T3的第一极相连的节点a处的电压为高电压(Vref),因为该电压使得第一晶体管Tl刚好导通,从而使得与第一存储电容的另一端电位相同的c点电位升为Vref-Vth,其中Vth为第一晶体管的阈值电压,其被存储在第一存储电容Cl中。 4, closes the fourth transistor T4, a fifth transistor T5, a second transistor T2, third transistor T3 is turned on, the variable high voltage (Vref) input of the first transistor Tl is turned on such that the first the gate of the transistor Tl of a third transistor a first voltage at node T3 is connected to the gate of a high voltage (Vref), such as the voltage of the first transistor Tl is turned on immediately, so that the first storage capacitor and the other One end of the same electric potential point potential promoted c Vref-Vth, where Vth is the threshold voltage of the first transistor, which is stored in the first storage capacitor Cl.

[0044] 第三阶段为数据输入阶段,该阶段的等效电路如图5所示。 [0044] The third stage is the input phase data, the phase of the equivalent circuit shown in FIG. 在这个阶段可变电压(Vref)和数据线Data输出的数据电压(Vdata)为高电平,第二控制线Sn输入高电平、第一控制线Sn-1和发光控制线Em输入低电平。 At this stage the variable voltage (Vref) and the data line Data output from the data voltage (Vdata) is high, the second control input high line Sn, a first control line Sn-1 and the light emitting control line Em input low level. 如图5所示,关闭第二晶体管T2、第三晶体管T3、第五晶体管T5,第四晶体管T4被导通,数据线Data输出的数据电压(Vdata)存储于第二存储电容C2中。 5, closes the second transistor T2, third transistor T3, the fifth transistor T5, the fourth transistor T4 is turned on, the data line Data output from the data voltage (Vdata) is stored in the second storage capacitor C2. 此时,节点b的电压为(Vdata)。 At this time, the voltage of the node b (Vdata). 因为第二阶段中第一晶体管的阈值电压Vth已存储于第一存储电容Cl中,从而使得节点a的电位提升为:A = Vref+Vdata-Vref+Vth =Vdata+Vtho Since the second stage of the threshold voltage Vth of the first transistor is already stored in the first storage capacitor Cl, so that the potential of a node promoted to: A = Vref + Vdata-Vref + Vth = Vdata + Vtho

[0045] 第四阶段为发光阶段,该阶段的等效电路如图6所示。 [0045] The fourth stage is the emission phase, the phase of the equivalent circuit shown in FIG. 6. 在这个阶段,可变电压(Vref)、发光控制线Em为高电平,第一控制线Sn_l、第二控制线Sn和数据线Data输出的数据电压(Vdata)输入低电平`。 At this stage, a variable voltage (Vref), the light emitting control line Em is high, the first control line Sn_l, the second control line Sn and the data line Data output from the data voltage (Vdata) `input low. 如图6所示,第二晶体管T2、第三晶体管T3、第四晶体管T4关闭,第一晶体管Tl、第五晶体管T5被导通。 6, a second transistor T2, third transistor T3, the fourth transistor T4 is turned off, the first transistor Tl, the fifth transistor T5 is turned on. 此时,使得第一晶体管导通的电压为第三阶段中节点a处的电压,即Vgs = Vdata+Vth,因此流过第一晶体管Tl的电流驱动OLED发光,该电流1led为: At this time, the first transistor is turned on so that the voltage of the third phase voltage at a node, i.e. Vgs = Vdata + Vth, the first transistor Tl flowing through the OLED light emitting driving current, the current is 1led:

[0046] I 賴)=JxKxi Fgs — Fth)2 =jxK x( Fdata + “ fh)2 [0046] I LAI) = JxKxi Fgs - Fth) 2 = jxK x (Fdata + "fh) 2

[0047] (I) [0047] (I)

[0048] = -x ^ x( Fdata )2 [0048] = -x ^ x (Fdata) 2

[0049] 其中,K为关联于第一晶体管Tl的电流常数,Vdata为数据电压,Vref为可变电压,Vth为晶体管的阈值电压。 [0049] where, K is a constant associated with the current of the first transistor Tl, Vdata is a data voltage, Vref is a variable voltage, Vth is the threshold voltage of the transistor. 现有技术中,不同像素单元之间的Vth不尽相同,且同一像素中的Vth还有可能随时间发生漂移,这将造成显示亮度差异,由于这种差异与之前显示的图像有关,因此常呈现为残影现象。 In the prior art, among the different pixel units Vth varies, and the Vth of the same pixel also may drift over time, this will result in display brightness difference, this difference since the image previously displayed, and therefore often presented as image retention.

[0050] 由以上公式⑴可知,用于驱动OLED发光的电流Imd与第一晶体管Tl的阈值电压Vth无关,而且该电流也不受第一电压(Vdd)的控制。 [0050] From the above equation ⑴, a current for driving the light emitting OLED Imd independent of the threshold voltage Vth of the first transistor Tl, and this current is also not a first voltage (Vdd) control. 因此消除了晶体管阈值电压非均匀型及第一电压的电阻压降(1-R drop)对显示效果的影响。 Thus eliminating the influence of non-uniform threshold voltage of the transistor and a resistor-type voltage drop of the first (1-R drop) on the display. 通过多个晶体管和电容对电路进行开关和充放电控制,可以使得存储电容保持第一晶体管栅极和源极之间的栅源电压不变,从而使得通过第一晶体管的电流与该第一晶体管的阈值电压及第一电压无关,从而对第一晶体管阈值电压的不一致或漂移进行了补偿,避免了第一电压的1-R drop对流过发光器件的电流所造成的影响,显著改善了显示装置显示亮度的均匀性,另一方面,通过清除发光器件阳极的电荷,避免了发光器件长时间处于正偏压状态,从而有效减缓了发光器件衰减的速率,大大提高了显示装置的使用寿命。 By a plurality of transistors and a capacitor, and circuit switching charge and discharge control may be such that the storage capacitor holds the gate-source voltage between the gate and the source of the first transistor constant, so that the current through the first transistor to the first transistor threshold voltage and a first voltage independent, so that the threshold voltage of the first transistor is inconsistent or drift compensation, to avoid the influence of 1-R drop convection first voltage current through the light emitting device caused by significantly improving the display device uniformity of display brightness, on the other hand, the light emitting device by removing the charge of the anode, the light emitting device to avoid positive bias state for a long time, thereby to effectively reduce the rate of decay of the light emitting device, greatly improving the life of the display device.

[0051] 需要说明的是,在上述实施例中,晶体管均是以N型耗尽型TFT为例进行的说明。 [0051] Incidentally, in the above embodiment, the transistors are N-type depletion type is described as an example of TFT. 或者,同样可以采用N型增强型TFT,其不同之处在于,对于耗尽型TFT,阈值电压Vth为负值,而对于增强型TFT,阈值电压Vth为正值。 Alternatively, use can also be N-type enhancement the TFT, which is different from that for the TFT depletion type, the threshold voltage Vth is negative, and for enhanced the TFT, the threshold voltage Vth is a positive value.

[0052] 此外,第一晶体管Tl还可以采用N型晶体管,第二晶体管T2、第三晶体管T3、第四晶体管T4以及第五晶体管T5均可以为P型晶体管,驱动这样一种结构的像素电路的外部信号的时序也应当做相应的调整,其中,第一控制线Sn-1、第二控制线Sn以及发光控制线Em的时序与图2中所示的相应的信号时序相反(即二者的相位差为180度)。 [0052] Further, the first transistor Tl may also be employed N-type transistor, a second transistor T2, third transistor T3, the fourth transistor T4 and the fifth transistor T5 may each be a P-type transistor, driving a pixel circuit of such a structure external timing signal should be adjusted accordingly, wherein the first control line Sn-1, corresponding to the opposite signal timing shown in FIG timing control line Sn, and a second light emitting control line Em 2 (i.e., both the phase difference of 180 degrees).

[0053] 或者,第一晶体管Tl、第二晶体管T2、第三晶体管T3、第四晶体管T4和第五晶体管T5均为P型晶体管,驱动这样一种结构的像素电路的外部信号的时序也应当做相应的调整,其中,第一控制线Sn-1、第二控制线Sn、可变电压(Vref)、数据电压(Vdata)以及发光控制线Em的时序与图2中所示的相应的信号时序相反(即二者的相位差为180度)。 [0053] Alternatively, the first transistor Tl, a second transistor, a third transistor T3, are P-type transistor, the fourth transistor T4 and the timing T2 fifth transistor T5 driving a pixel circuit of such a configuration of the external signal should adjusted accordingly, wherein the first control line Sn-1, the respective timing signals shown in FIG second control line Sn, the variable voltage (Vref), a data voltage (Vdata) and the light emitting control line Em, 2 Instead timing (i.e., both the phase difference of 180).

[0054] 或者,第一晶体管Tl为P型晶体管,第二晶体管T2、第三晶体管T3、第四晶体管T4以及第五晶体管T5均为N型晶体管,驱动这样一种结构的像素电路的外部信号的时序也应当做相应的调整,其中,可变电压Vref和数据电压(Vdata)的时序与图2中所示的相应的信号时序相反(即二者的相位差为180度)。 [0054] Alternatively, the first transistor Tl is a P-type transistor, a second transistor T2, third transistor T3, the fourth transistor T4 and the fifth transistor T5 are N-type transistors, the pixel drive circuit having such a configuration of the external signal the timing should be adjusted accordingly, wherein, opposite to the respective timing signals shown in the timing diagram of a variable voltage Vref and the data voltage (Vdata) of 2 (i.e., both the phase difference of 180 degrees).

[0055] 本实用新型实施例还提供一种显示装置,包括如上所述的任意一种像素电路。 [0055] Example embodiments of the present invention further provides a display apparatus comprising any one of the pixel circuit as described above. 所述显示装置可以包括多个像素单元阵列,每一个像素单元包括如上所述的任意一个像素电路。 The display device may include a plurality of array of pixel cells, each pixel cell comprising a pixel circuit of any above. 具有与本实用新型前述实施例提供的像素电路相同的有益效果,由于像素电路在前述实施例中已经进行了详细说明,此处不再赘述。 The pixel circuit has the same advantageous effects provided in the embodiment of the present invention, since the pixel circuit in the embodiment has been described in detail in the foregoing embodiments is not repeated here.

[0056] 具体的,本实用新型实施例所提供的显示装置可以是包括LED显示器或OLED显示器在内的具有电流驱动发光器件的显示装置。 [0056] Specifically, the display device of the present invention embodiments may be provided a display device having a current-driven light emitting device includes an LED display or OLED display, including.

[0057] 本实用新型实施例提供的显示装置,包括像素电路,通过多个晶体管和电容对电路进行开关和充放电控制,可以使得存储电容保持第一晶体管栅极和源极之间的栅源电压不变,从而使得通过第一晶体管的电流与该第一晶体管的阈值电压及第一电压无关,从而对第一晶体管阈值电压的不一致或漂移进行了补偿,避免了第一电压的1-R drop对流过发光器件的电流所造成的影响,显著改善了显示装置显示亮度的均匀性,另一方面,通过清除发光器件阳极的电荷,避免了发光器件长时间处于正偏压状态,从而有效减缓了发光器件衰减的速率,大大提高了显示装置的使用寿命。 The display device [0057] embodiment of the present invention is provided, including pixel circuits, and charge-discharge switching control circuit by a plurality of transistors and capacitors, may be such that the storage capacitor holds the gate between the source of the first transistor gate and the source constant voltage, so that regardless of the threshold voltage of the first transistor and a first voltage current through the first transistor, so that the threshold voltage of the first transistor is inconsistent or drift compensation, to avoid the voltage of the first 1-R Effect of drop current flowing through the light emitting device caused by the significantly improved brightness uniformity of the display device of the display, on the other hand, the light emitting device by removing the charge of the anode, the light emitting device to avoid positive bias state for a long time, thereby effectively slowing decay rate of the light emitting device, greatly improving the life of the display device.

[0058] 本实用新型实施例提供的像素电路驱动方法,可以应用于前述实施例中所提供的像素电路,如图7所示,包括: [0058] The method of driving the pixel circuit of embodiment of the present invention provided, the embodiment may be applied to a pixel circuit provided in the preceding embodiments, shown in Figure 7, comprising:

[0059] S701、导通第二晶体管、第三晶体管、第四晶体管、第五晶体管,控制第一晶体管处于关闭状态,同时数据线输入低电平,清除发光器件阳极的电荷。 [0059] S701, turning on the second transistor, a third transistor, a fourth transistor, a fifth transistor, the first control transistor is turned off, while the low-level input data line, the light emitting device of the anode charge clearing. [0060] S702、关闭第四晶体管和第五晶体管,导通第二晶体管和第三晶体管,可变电压控制第一晶体管导通,第一晶体管阈值电压存储在第一存储电容中; [0060] S702, closes the fourth and fifth transistors, the second transistor is turned on and the third transistor, a first variable voltage control transistor, the first transistor threshold voltage is stored in the first storage capacitor;

[0061] S703、导通第四晶体管,关闭第二晶体管、第三晶体管、第五晶体管,数据线输入的高电平储存在第二存储电容中; [0061] S703, turning on the fourth transistor, the second transistor is turned off, the high level of the third transistor, a fifth transistor, the input data line stored in the second storage capacitor;

[0062] S704、关闭第二晶体管、第三晶体管和第四晶体管,导通第一晶体管、第五晶体管,通过第一晶体管和第五晶体管的电流驱动所述发光器件发光。 [0062] S704, closing a second transistor, a third transistor and a fourth transistor, the first transistor is turned on, the fifth transistor, a current of the first transistor and the fifth transistor by driving the light emitting device to emit light.

[0063] 本实用新型实施例提供的像素电路驱动方法,通过多个晶体管和电容对电路进行开关和充放电控制,可以使得存储电容保持第一晶体管栅极和源极之间的栅源电压不变,从而使得通过第一晶体管的电流与该第一晶体管的阈值电压及第一电压无关,从而对第一晶体管阈值电压的不一致或漂移进行了补偿,避免了第一电压的1-R drop对流过发光器件的电流所造成的影响,显著改善了显示装置显示亮度的均匀性,另一方面,通过清除发光器件阳极的电荷,避免了发光器件长时间处于正偏压状态,从而有效减缓了发光器件衰减的速率,大大提高了显示装置的使用寿命。 [0063] The method of driving the pixel circuit of embodiment of the present invention provided by a plurality of transistors and a capacitor, and circuit switching charge and discharge control may be such that the storage capacitor holds the gate-source voltage between the gate and the source of the first transistor is not becomes, so that regardless of the threshold voltage of the first transistor and a first voltage current through the first transistor, so that the threshold voltage of the first transistor is inconsistent or drift compensation, to avoid the voltage of the first 1-R drop convection Effect of the current through the light emitting device caused by the significantly improved brightness uniformity of the display device of the display, on the other hand, the anode of the light emitting device by removing the charge, the light-emitting device to avoid positive bias state for a long time, thereby to effectively reduce emission attenuation rate of the device, greatly improving the life of the display device.

[0064] 需要说明的是,本实用新型实施例中的发光器件可以是现有技术中包括LED或OLED在内的多种电流驱动发光器件。 [0064] Incidentally, the light emitting device of the present invention, the embodiment may be included in the prior art, including a plurality of LED or OLED driving current of the light emitting device.

[0065] 其中,第一晶体管、第二晶体管、第三晶体管、第四晶体管以及第五晶体管均可以为N型晶体管;或者第一晶体管为N型晶体管,第二晶体管T2、第三晶体管T3、第四晶体管T4以及第五晶体管T5均可以为P型晶体管;或者第一晶体管Tl、第二晶体管T2、第三晶体管T3、第四晶体管T4和第五晶体管T5均为P型晶体管;或者第一晶体管Tl为P型晶体管,第二晶体管T2、第三晶体管T3、第四晶体管T4以及第五晶体管T5均为N型晶体管。 [0065] wherein the first transistor, a second transistor, a third transistor, a fourth transistor and a fifth transistor each may be N-type transistor; or the first transistor is an N-type transistor, a second transistor T2, third transistor T3, The fourth transistor T4 and the fifth transistor T5 may each be a P-type transistor; or the first transistor Tl, a second transistor T2, third transistor T3, the fourth transistor T4 and the fifth transistor T5 are P-type transistors; or the first transistor Tl is a P-type transistor, a second transistor T2, third transistor T3, the fourth transistor T4 and the fifth transistor T5 are N-type transistors.

[0066] 例如,以N型晶体管为例,在本实用新型实施例所提供的像素电路中,第一晶体管Tl、第二晶体管T2、第三晶体管T3、第四晶体管T4以及第五晶体管T5均可以为N型增强型TFT或N型耗尽型TFT。 [0066] For example, the N-type transistor as an example, in the pixel circuit embodiment of the present invention is provided, the first transistor Tl, a second transistor T2, third transistor T3, the fourth transistor T4 and the fifth transistor T5 are a depletion type TFT may be an N-type or N-type enhancement type TFT.

[0067] 需要说明的是,当第一晶体管、第二晶体管、第三晶体管、第四晶体管以及第五晶体管均为N型耗尽型晶体管时,控制信号的时序可以如图2所示,包括: [0067] Incidentally, when the first transistor, a second transistor, a third transistor, the fourth transistor and the fifth transistor are N-type depletion type transistors, the control signal may be a timing shown in Figure 2, comprising :

[0068] 初始化阶段:第一控制线、第二控制线和发光控制线输入高电平,可变电压和数据线输入低电平; [0068] The initialization phase: a first control line, the second emission control line and a control line high level is input, a variable input voltage and the data line low;

[0069] 采集阶段:第二控制线和发光控制线输入低电平,第一控制线、可变电压和数据线输入高电平; [0069] Acquisition Phase: second control line and a low-level emission control line input, a first control line, data line, and the variable voltage input is high;

[0070] 数据输入阶段:第一控制线和发光控制线输入低电平,第二控制线、可变电压和数据线输入高电平; [0070] Data input stage: a first control line and a low light emission control line input, a second control line, the variable voltage input and the data line high;

[0071] 发光阶段:第一控制线、第二控制线和数据线输入低电平,可变电压和发光控制线输入高电平。 [0071] emission phase: a first control line, the second control line and the data line input low, the variable voltage and the light emitting control line input high.

[0072] 例如,当该第一晶体管、第二晶体管、第三晶体管、第四晶体管以及第五晶体管均为N型耗尽型薄膜晶体管时,步骤S701具体可以包括: [0072] For example, when the first transistor, a second transistor, a third transistor, the fourth transistor and the fifth transistor are N-type depletion type thin film transistor, the step S701 may include:

[0073] 该步骤即为初始化阶段,参照图2所示,在初始阶段中,第一控制线Sn-1、第二控制线Sn和发光控制线Em输入高电平,可变电压(Vref)和数据线Data输出的数据电压(Vdata)为低电平。 [0073] This step is the initialization phase, with reference to FIG. 2, in the initial stage, the first control line Sn-1, the second control line Sn and the light emitting control line Em input high, the variable voltage (Vref) and the data voltage (Vdata) of the data line data output is low. 如图3所示第二晶体管T2、第三晶体管T3、第四晶体管T4、第五晶体管T5被导通,关闭第一晶体管Tl,第一存储电容Cl和第二存储电容C2被重置,并且第二晶体管T2的第一极与第四晶体管T4的第二极相连的节点b处的电压为低电压(Vdate),所以发光器件L的阳极电位为该低电压(Vdata),所以发光器件L上储存的电荷通过被导通的第五晶体管T5、第二晶体管T2及第四晶体管T4输出,这样一来,可以使得OLED阳极长时间存储的电荷清除,从而确保其不处于正偏压状态,从而减缓OLED衰减的速度,提高显示装置的寿命。 3 a second transistor T2, third transistor T3, a fourth transistor T4, a fifth transistor T5 are turned on, turn off the first transistor Tl, a first storage capacitor Cl and the second storage capacitor C2 is reset, and a second voltage at the node b is connected to a first electrode of the second transistor T2 and the fourth transistor T4 is a low voltage (Vdate), so that the anode potential of the light emitting device L for low voltage (Vdata), the light emitting element L the stored charge through the fifth transistor T5 is turned on, the second transistor T2 and the fourth output transistor T4, this way, can clear the anode of the OLED such that the charge storage time, thus ensuring it is not in a positive bias state, thereby slowing the rate of decay OLED, improve the life of the display device.

[0074] 相应的,步骤S702具体可以包括: [0074] Accordingly, step S702 may include:

[0075] 该步骤为采集阶段,在该采集阶段,可变电压(Vref)和数据线Data输出的数据电压(Vdata)为高电平,第一控制线Sn-1输入高电平、第二控制线Sn和发光控制线Em输入低电平。 [0075] The present step is the acquisition phase, in the acquisition phase, the variable voltage (Vref) and the data line Data output from the data voltage (Vdata) is high, the first control line input high Sn-1, a second Sn and emission control lines Em control line input low. 如图4所示,关闭第四晶体管T4、第五晶体管T5,第二晶体管T2、第三晶体管T3被导通,可变电压(Vref)输入的高电平使得第一晶体管Tl导通,第一晶体管Tl的栅极与第三晶体管T3的第一极相连的节点a处的电压为高电压(Vref),因为该电压使得第一晶体管Tl刚好导通,从而使与第一存储电容的另一端电位相同的c点电位升为Vref-Vth,其中Vth为第一晶体管的阈值电压,其被存储在第一存储电容Cl中。 4, closes the fourth transistor T4, a fifth transistor T5, a second transistor T2, third transistor T3 is turned on, the variable high voltage (Vref) input of the first transistor Tl is turned on such that the first the gate of the transistor Tl of a third transistor a first voltage at node T3 is connected to the gate of a high voltage (Vref), such as the voltage of the first transistor Tl is turned on immediately, so that the other of the first storage capacitor One end of the same electric potential point potential promoted c Vref-Vth, where Vth is the threshold voltage of the first transistor, which is stored in the first storage capacitor Cl.

[0076] 步骤S703具体可以包括: [0076] Step S703 may include:

[0077] 该阶段为数据输入阶段,在这个阶段可变电压(Vref)和数据线Data输出的数据电压(Vdata)为高电平,第二控制线Sn输入高电平、第一控制线Sn-1和发光控制线Em输入低电平。 [0077] The data input stage to stage, at this stage the variable voltage (Vref) and the data line Data output from the data voltage (Vdata) is high, the second control input high line Sn, a first control line Sn -1 and a low-level emission control line input Em. 如图5所示,关闭第二晶体管T2、第三晶体管T3、第五晶体管T5,第四晶体管T4被导通,数据线Data输出的数据电压(Vdata)存储于第二存储电容C2中。 5, closes the second transistor T2, third transistor T3, the fifth transistor T5, the fourth transistor T4 is turned on, the data line Data output from the data voltage (Vdata) is stored in the second storage capacitor C2. 此时,节点b的电压为(Vdata)。 At this time, the voltage of the node b (Vdata). 因为第二阶段中第一晶体管的阈值电压Vth已存储于第一存储电容Cl中,从而使得节点a的电位提升为:A = Vref+Vdata-Vref+Vth = Vdata+Vth。 Since the second stage of the threshold voltage Vth of the first transistor is already stored in the first storage capacitor Cl, so that the potential of a node promoted to: A = Vref + Vdata-Vref + Vth = Vdata + Vth.

[0078] 步骤S704具体可以包括: [0078] Step S704 may include:

[0079] 该阶段为发光阶段,在这个阶段,可变电压(Vref)、发光控制线Em为高电平,第一控制线Sn-1、第二控制线Sn和数据线Data输出的数据电压(Vdata)输入低电平。 [0079] The light emission phase stage, at this stage, a variable voltage (Vref), the light emitting control line Em is high, the first control line Sn-1, the second control line Sn and the data line Data output from the data voltage (Vdata) input low. 如图6所示,第二晶体管T2、第三晶体管T3、第四晶体管T4关闭,第一晶体管Tl、第五晶体管T5被导通。 6, a second transistor T2, third transistor T3, the fourth transistor T4 is turned off, the first transistor Tl, the fifth transistor T5 is turned on. 此时,使得第一晶体管导通的电压为第三阶段中节点a处的电压,即Vgs = Vdata+Vth,因此流过第一晶体管Tl的电流驱动OLED发光,该电流Imd与第一晶体管Tl的阈值电压Vth无关,而且该电流也不受第一电压(Vdd)的控制。 In this case, so that the voltage of the first transistor is a voltage of the node at the third stage, i.e. Vgs = Vdata + Vth, the first transistor Tl flowing through the OLED light emitting driving current, the current of the first transistor Tl Imd independent of the threshold voltage Vth, but the current is not a first voltage (Vdd) control. 因此消除了晶体管阈值电压非均匀型及第一电压的电阻压降1-R drop对显示效果的影响。 Thus eliminating the influence of the resistance drop to the 1-R drop display non-uniform pattern and the first voltage of the transistor threshold voltage.

[0080] 本领域普通技术人员可以理解:实现上述方法实施例的全部或部分步骤可以通过程序指令相关的硬件来完成,前述的程序可以存储于一计算机可读取存储介质中,该程序在执行时,执行包括上述方法实施例的步骤;而前述的存储介质包括:R0M、RAM、磁碟或者光盘等各种可以存储程序代码的介质。 [0080] Those of ordinary skill in the art can be appreciated: realize all or part of the steps of the method described above may be implemented by a program instructing relevant hardware to complete, the program may be stored in a computer readable storage medium, the program execution when, comprising the step of performing the above-described embodiment of the method; and the storage medium comprising: a variety of medium may store program codes R0M, RAM, magnetic disk, or optical disk.

[0081] 以上所述,仅为本实用新型的具体实施方式,但本实用新型的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本实用新型揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本实用新型的保护范围之内。 [0081] The above are only the present invention specific embodiments, the scope of protection of the present invention is not limited thereto, any skilled in the art in the art within the technical scope disclosed in the present invention can be easily variations or replacement that, shall fall within the scope of the present invention. 因此,本实用新型的保护范围应以所述权利要求的保护范围为准。 Accordingly, the scope of protection of the present invention should be defined by the scope of the claims.

Claims (6)

1.一种像素电路,其特征在于,包括: 第一晶体管、第二晶体管、第三晶体管、第四晶体管、第五晶体管、第一存储电容、第二存储电容及发光器件; 所述第一晶体管的栅极连接所述第三晶体管的第一极,其第一极连接所述第五晶体管的第二极,其第二极连接第一电压; 所述第二晶体管的栅极连接第一控制线,其第一极连接所述第四晶体管的第二极,其第二极连接所述第五晶体管的第二极; 所述第三晶体管的栅极连接所述第一控制线,其第一极连接所述第一存储电容的一端,其第二极连接可变电压; 所述第四晶体管的栅极连接第二控制线,其第一极连接数据线; 所述第五晶体管的栅极连接发光控制线,其第一极连接所述发光器件的阳极; 所述第二存储电容的一端与所述第一存储电容的另一端相连,其另一端连接所述可变电压; 所述发光器件的 1. A pixel circuit comprising: a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a first storage capacitor, a second storage capacitor and a light emitting device; the first connecting a first gate electrode of the transistor of the third transistor, a first electrode connected to the second electrode of the fifth transistor, a second electrode connected to a first voltage; a gate of the second transistor connected to a first control line, a first electrode connected to the second electrode of the fourth transistor, a second electrode connected to the second electrode of the fifth transistor; a third transistor connected to said first gate control line which a first end of the first electrode is connected to the storage capacitor, a second electrode connected to the variable voltage; a second control line connected to the gate of the fourth transistor, a first electrode connected to the data lines; the fifth transistor light emission control line connected to a gate, a first electrode connected to an anode of the light emitting device; and the other end connected to one end of the second storage capacitor and the first storage capacitor and the other end connected to the variable voltage; the said light emitting device 极连接第二电压。 Electrode connected to the second voltage.
2.根据权利要求1所述的像素电路,其特征在于,所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管和所述第五晶体管均为N型晶体管;或, 所述第一晶体管为N型晶体管,所述第二晶体管、所述第三晶体管、所述第四晶体管和所述第五晶体管均为P型晶体管;或, 所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管和所述第五晶体管均为P型晶体管;或, 所述第一晶体管为P型晶体管,所述第二晶体管、所述第三晶体管、所述第四晶体管和所述第五晶体管均为N型晶体管。 2. The pixel circuit according to claim 1, wherein said first transistor, the second transistor, the third transistor, the fourth transistor and the fifth transistor are N-type transistors ; or, the first transistor is an N-type transistor, said second transistor, the third transistor, the fourth transistor and the fifth transistor are P-type transistors; or, the first transistor, the second transistor, the third transistor, the fourth transistor and the fifth transistor are P-type transistors; or, the first transistor is a P-type transistor, said second transistor, said first third transistor, the fourth transistor and the fifth transistor are N-type transistors.
3.根据权利要求1所述的像素电路,其特征在于,所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管和所述第五晶体管的第一极均为源级,第二极均为漏级。 The pixel circuit according to claim 1, wherein said first transistor, the second transistor, the third transistor, the fourth transistor and a first electrode of the fifth transistor are source level, both the second drain electrode.
4.根据权利要求1或3所述的像素电路,其特征在于,所述晶体管包括耗尽型薄膜晶体管TFT或增强型TFT。 The pixel circuit according to claim 1 or claim 3, wherein the transistor comprises a depletion-type thin film transistor TFT or enhancement type TFT.
5.根据权利要求1或3所述的像素电路,其特征在于,所述发光器件为有机发光二极管。 The pixel circuit according to claim 13, wherein said light emitting device is an organic light emitting diode.
6.一种显示装置,其特征在于,包括如权利要求1至5中任一所述像素电路。 A display device comprising a pixel circuit according to any of claims 1 to 5.
CN2013203355285U 2013-06-09 2013-06-09 Pixel circuit and display device CN203288217U (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103310732A (en) * 2013-06-09 2013-09-18 京东方科技集团股份有限公司 Pixel circuit, driving method thereof and display device
CN104200771A (en) * 2014-09-12 2014-12-10 上海天马有机发光显示技术有限公司 Pixel circuit, array substrate and display device
WO2015127760A1 (en) * 2014-02-28 2015-09-03 京东方科技集团股份有限公司 Pixel circuit, driving method therefor, display panel, and display apparatus
CN104916257A (en) * 2015-07-15 2015-09-16 京东方科技集团股份有限公司 Pixel circuit, drive method thereof, display panel and display device

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103310732A (en) * 2013-06-09 2013-09-18 京东方科技集团股份有限公司 Pixel circuit, driving method thereof and display device
CN103310732B (en) * 2013-06-09 2015-06-03 京东方科技集团股份有限公司 Pixel circuit, driving method thereof and display device
US9099417B2 (en) 2013-06-09 2015-08-04 Boe Technology Group Co., Ltd. Pixel circuit, driving method thereof and display device
WO2015127760A1 (en) * 2014-02-28 2015-09-03 京东方科技集团股份有限公司 Pixel circuit, driving method therefor, display panel, and display apparatus
CN104200771A (en) * 2014-09-12 2014-12-10 上海天马有机发光显示技术有限公司 Pixel circuit, array substrate and display device
CN104200771B (en) * 2014-09-12 2017-03-01 上海天马有机发光显示技术有限公司 Image element circuit, array base palte and display device
CN104916257A (en) * 2015-07-15 2015-09-16 京东方科技集团股份有限公司 Pixel circuit, drive method thereof, display panel and display device
WO2017008484A1 (en) * 2015-07-15 2017-01-19 京东方科技集团股份有限公司 Pixel drive circuit and drive method therefor, display panel and display apparatus
US10229639B2 (en) 2015-07-15 2019-03-12 Boe Technology Group Co., Ltd. Pixel driving circuit for compensating drifting threshold voltage of driving circuit portion and driving method thereof

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