CN202889508U - Electrical interface module for automatic switching between SDI and ASI, and video device - Google Patents

Electrical interface module for automatic switching between SDI and ASI, and video device Download PDF

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Publication number
CN202889508U
CN202889508U CN 201220244000 CN201220244000U CN202889508U CN 202889508 U CN202889508 U CN 202889508U CN 201220244000 CN201220244000 CN 201220244000 CN 201220244000 U CN201220244000 U CN 201220244000U CN 202889508 U CN202889508 U CN 202889508U
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China
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sdi
unit
signal
electric interfaces
interfaces module
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Expired - Fee Related
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CN 201220244000
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Chinese (zh)
Inventor
李爱琴
郝文婷
吴凯
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Sichuan Jiuzhou Electronic Technology Co Ltd
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Sichuan Jiuzhou Electronic Technology Co Ltd
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Abstract

The utility model is applied to the field of a serial interface, and provides an electrical interface module for automatic switching between an SDI and an ASI, and a video device. The electrical interface module comprises: an SDI unit for receiving a DVO signal and converting the DVO signal into an SDI signal; a TS stream unit for receiving parallel TS stream; an LVDS output buffer unit respectively connected with the SDI unit and the TS stream unit; and a parallel-series conversion unit and a driving unit that are connected with the LVDS output buffer unit. The SDI signal and an ASI signal are switched dynamically by the parallel-series conversion unit based on an external control signal. According to the electrical interface module, the SDI unit is adopted to receive the DVO signal and convert the DVO signal into the SDI signal, the parallel TS stream is received by the TS stream unit, and the SDI signal and the ASI signal are switched dynamically by the parallel-series conversion unit based on the external control signal. The electrical interface module is simple in structure, low in cost and low in power consumption.

Description

Electric interfaces module and video equipment that SDI and ASI automatically switch
Technical field
The utility model belongs to field of serial interfaces, relates in particular to electric interfaces module and video equipment that a kind of SDI and ASI automatically switch.
Background technology
At present, the specification of SDI has three kinds of single-definition (Standard Definition, SD), high definition (High Definition, HD) and 3G (3Gbit/s) SDI.SD-SDI is defined by SMPTE 259M standard, is considered to traditional SDI, and it is by the digital video of video coaxial cable serial transmission single-definition.HD-SDI is defined by SMPTE 292M standard, and is similar with SD-SDI, but transmission is the digital video of high definition.3G-SDI is defined by SMPTE 424M standard, makes improvements on the basis of HD-SDI, to support the more transmission of high-definition digital video.Make the center at digital studio and digital film, SD-SDI is widely used, and along with the development of HDTV industry, the demand of HD-SDI and 3G-SDI just increases sharply.
DVB-ASI(digital television broadcasting Asynchronous Serial Interface) be that for the video flowing that transmits mpeg encoded, transmission rate reaches 270Mb/s by a kind of serial video communication standard of DVB tissue definition.The ASI interface is to use very widely a kind of interface shape in present radio data system.
The utility model content
The purpose of this utility model is to provide a kind of electric interfaces module that can realize that sdi signal and ASI signal automatically switch.
The utility model is to realize like this, the electric interfaces module that a kind of SDI and ASI automatically switch, comprise: receive the DVO signal and convert the SDI unit of sdi signal to, receive the TS stream unit of parallel TS stream, respectively with described SDI unit be connected the LVDS output buffer cell that TS stream unit is connected, and export parallel serial conversion unit and the driver element that buffer cell is connected with described LVDS; Control signal according to the outside is dynamically switched sdi signal and ASI signal by described parallel serial conversion unit.
Further, described driver element is cable drive.
Further, described electric interfaces module also comprises: the register of depositing control or state.
Further, described electric interfaces module also comprises: clock unit.
Further, described clock unit comprises the clock of 27MHz.
Further, described SDI unit comprises: the plug-in unit that the sdi signal that receives is carried out error checking, the embedding audio unit that digital audio is embedded into the horizontal blanking zone of vision signal, finish the scrambling unit of scrambler and NRZ-nrzi encoding conversion, the Multiplexing Unit of shift register be will under the control of byte clock, be written in parallel to through the SDI parallel data stream of coding, and the byte-rate clock that is complementary and the speed selected cell of bit rate clock provided to the suitable frequency division pattern of clock Dynamic Selection and for the SDI data when pre-treatment.
Further, described TS stream unit comprises: finish the FIFO that transmitting terminal inserts synchronization character K28.5 and sends the Mpeg2 data of different pieces of information speed, and the word that each the 8Bit byte that occurs is produced the word of a 10Bit and makes described 10Bit is by the 8B/10B coding unit with fixedly output bit rate work.
The purpose of this utility model also is to provide a kind of video equipment that comprises above-mentioned electric interfaces module.
In the utility model, the electric interfaces module adopts the SDI unit to receive the DVO signal and converts sdi signal to, receives parallel TS stream by TS stream unit, and sdi signal and ASI signal is dynamically switched by parallel serial conversion unit according to the control signal of outside; Simple in structure, low-cost, low-power consumption.
Description of drawings
Fig. 1 is the principle schematic of the electric interfaces module that automaticallyes switch of the sdi signal that provides of the utility model and ASI signal;
Fig. 2 is the modular structure figure of the SDI unit that provides of the utility model;
Fig. 3 is the modular structure figure of the ASI unit that provides of the utility model.
Embodiment
In order to make the purpose of this utility model, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the utility model is further elaborated.Should be appreciated that specific embodiment described herein only in order to explaining the utility model, and be not used in restriction the utility model.
The electric interfaces module architectures that the utility model provides is simple, and required chip is few, only needs a BNC port just can realize respectively the transmission of sdi signal and ASI signal.Its energy flexible Application is in multiple occasions such as digital studio, radio and television making, digital film making, and particularly suitable interface resource anxiety and needs are supported the video equipment of multiple speed sdi signal.
Fig. 1 shows the principle of the electric interfaces module that SDI that the utility model provides and ASI automatically switch, and for convenience of explanation, only shows the part relevant with the utility model.
The electric interfaces module that sdi signal and ASI signal automatically switch comprises: SDI unit 1, TS stream unit 2, LVDS export buffer cell 3, parallel serial conversion unit 4 and driver element 5; Wherein, SDI unit 1 receives the DVO signal and converts sdi signal to, TS stream unit 2 receives parallel TS stream, and LVDS output buffer cell 3 be connected with TS with SDI unit 1 respectively that unit 2 is connected, and exports parallel serial conversion unit 4 and the driver element 5 that buffer cell 3 is connected with LVDS; Control signal according to the outside is dynamically switched sdi signal and ASI signal by parallel serial conversion unit 4.
In the utility model, driver element 5 can be cable drive.SDI unit 1 is realized from parallel DVO signal with parallel serial conversion unit 4 and driver element 5 and is met the I2S digital audio and video signals of AES/EBU form to the conversion of the sdi signal that meets the SMPTE standard.TS stream unit 2 and parallel serial conversion unit 4 and driver element 5 realize flowing to from parallel TS the conversion of the DVB-ASI signal that meets the SMPTE standard.FPGA decides output SDI or DVB-ASI by the model selection to parallel serial conversion unit 4 and driver element 5LMH0040.
In the utility model, the electric interfaces module also comprises: the register 6 of depositing control or state; And clock unit 7.
In the utility model, parallel serial conversion unit 4 and driver element 5 realize that by LMH0040 parallel-serial conversion is finished in series read-out under the control of bit clock; Except parallel-serial conversion and driver, all realize by the FPGA physical layer.The electric interfaces module can be divided into two parts, realizes respectively the transmission of how fast sdi signal and the transmission of DVB-ASI, possesses the ability of transmitting terminal SDI rate dynamic selection and the dynamic switching capability of SDI and DVB-ASI.The designed transmitter of present design need to be realized the transmission of the sdi signal of single-definition and high definition, and the transmission of ASI signal.In the process that SDI and DVB-ASI realize, FPGA(Field-Programmable Gate Array, field programmable gate array) in the whole processing procedure of signal is realized with VHDL and Verilog Programming with Pascal Language.Used parallel-serial conversion and cable driver have been selected the LMH0040 that supports these two kinds of patterns, dispose its mode of operation by FPGA.Thereby realized realizing at same electric interfaces the low cost of how fast SDI and ASI, the design of low-power consumption, low radiation.
In the utility model, as shown in Figure 2, SDI unit 1 comprises: plug-in unit 11, embedding audio unit 12, scrambling unit 13, Multiplexing Unit 14 and speed selected cell 15; Wherein plug-in unit 11 can be the TRS/CRC/EDH plug-in unit, and the sdi signal that receives is carried out error checking; The digital audio that embedding audio unit 12 will meet the AES/EBU form is embedded into the horizontal blanking zone of vision signal, thereby realizes that video/audio signal unites two into one; Scrambling unit 13 is finished scrambler and NRZ-nrzi encoding conversion; Multiplexing Unit 14 can be the Multiplexing Unit of 20:5, will be written in parallel to shift register under the control of byte clock through the SDI parallel data stream of coding; The suitable frequency division pattern of clock Dynamic Selection that 15 couples of TX PLL of speed selected cell send is for the SDI data when pre-treatment provide byte-rate clock and the bit rate clock that conforms to.
In the utility model, as shown in Figure 3, TS stream unit 2 comprises: FIFO21 and 8B/10B coding unit 22, FIFO21 are finished transmitting terminal and are inserted synchronization character K28.5, send the Mpeg2 data of different pieces of information speed, but transmission rate are constant; Each 8bit byte of 22 pairs of appearance of 8B/10B coding unit produces the word of a 10bit and these 10bit words is passed through with the fixedly parallel/serial conversion of output bit rate 270Mbps work.
As an embodiment of the present utility model, clock unit 7 can adopt the clock of 27MHz.Wherein the 27MHz clock is as system clock, for FIFO, 8B10B coding and parallel-serial conversion provide clock source signals.The parallel signal of input together with PSYNC and DVALID signal, is directly connected to DATA and CLOCK signal the input of FIFO.By reading of external logic control FIFO, the data of reading from FIFO are given the 8B10B coding module and are carried out code conversion, and with the speed output serial data of 270Mbps.Wherein, the 270MHz clock is produced by phase-locked loop by the 27MHz system clock.
In the utility model, wherein 8B10B coding and the parallel serial conversion of the parallel-serial conversion of SDI, TS stream are all finished in LMH0040.The signal electrical characteristic is LVDS(Low-Voltage Differential Signaling Low Voltage Differential Signal between FPGA and the LMH0040) level, exported by the BNC head through parallel-serial conversion and the driving of LMH0040.The electric interfaces of FPGA output pin and external reference clock input pin has all adopted the LVDS interface, can realize by the pin attribute that FPGA is set, easy to use, can realize the interconnection with the LVDS interface. have low-down EMI radiation and power consumption.
The utility model discloses a kind of multiple occasion low cost, low-power consumption, low radiation and high-performance of can be applicable to supports 2 kinds of SD-SDI forms, multiple HD-SDI format video data to send, and the DVB-ASI interface of 270Mbps, and meet the design that SMPTE shakes standard fully.The design has adopted the hardware scheme based on FPGA, is aided with few peripheral hardware, have flexibly, the characteristics such as high-performance, low cost, its mainly by serializer/driver LMH0040, have inner integrated RocketIO TMThe Serial Transmission Module of several Gbit and advanced SelectIO TMThe XILINXSPARTAN-3A series of XILINX SPARTAN-3A Series FPGA and the circuit formation such as video clock generator LMK03000C.The utility model circuit is simple, and working stability is reliable, is convenient to debugging and maintenance.
The hardware scheme based on FPGA has mainly been adopted in the design of the electric interfaces module that the utility model provides, be aided with few peripheral hardware, have flexibly, the characteristics such as high-performance, low cost, it mainly is made of circuit such as adaptive equalization/driver LMH0040, XILINX SPARTAN-3A Series FPGA and video clock generator LMK03000C.Be connected the basic electric interfaces of driver with DVB-ASI as SDI and connecting the BNC port of coaxial cable, always separately with the output that fixes, and the LMH0040 of single-chip can realize both functions neatly in solution in the past for they.This chip can support speed reaches the DVB-ASI interface of 270Mbps, also can support the serial digital interface (SDI) that single-definition/high-resolution data transmission speed is required.This chip adopts small and exquisite 48 pin LLP encapsulation, and other high definition chip products are little by 60% on the volume ratio market.XILINX SPARTAN-3A Series FPGA can be intactly provides a low cost, low-power consumption and development platform flexibly for SDI physical layer, DVB-ASI physical layer.XILINXSPARTAN-3A has abundant differential pair and a plurality of digital dock manager (DCM), and the every couple of difference IO supports the transfer of data up to 640Mbit/s.
In the utility model, to LMH0040, FPGA starts SDI or ASI module by the outer CPU configuration by common LVDS Buffer output for the output of SDI unit and the unit output of TS stream among the FPGA.FPGA by DVB-ASI control pin transmission of signal to LMH0040, when DVB-ASI LMH0040 when low is operated under the SDI pattern, when DVB-ASI when being high LMH0040 be operated under the DVB-ASI pattern.When the output sdi signal, FPGA exports 1 bit clock (TXCLK) and 5 bit data (TX0-TX4), this interface is the DDR signal, rising edge and trailing edge at clock are all sampled to data, and the LMH0040 reading data will be directly by the parallel-to-serial converter string output of inside, and the speed of output data is 2*TXCLK freq*5bps, for the 1080i program, output data rate is 1.485Gbps, and the SDI output of other speed is such as SD, and output data rate is 270Mbps.When output ASI signal, TXCLK is still as exporting with the road clock, TX0 is as the significance bit of TS flow data, TX1-TX4 is in high 4 outputs as the TS flow data of the rising edge of clock, in low 4 outputs as the TS flow data of the trailing edge of clock, 8 words that LMH0040 reads in will change into 10 words by its inner 8B/10B encoder, and then the stringization output needle is to the ASI interface of 20Mbps, output data rate is 2*TXCLK_freq*4*5/4=270Mbps, wherein TXCLK_freq=27MHz.Adopt the inner integrated TXCLK phase lock circuitry of LMH0040 to purify clock, improved noiseproof feature, thereby dynamically realized the transmission of how fast sdi signal and the transmission of DVB-ASI at same electric interfaces
What the electric interfaces module that the utility model provides considered when the circuit fabric swatch that the signal between employed high speed FPGA and the LMH0040 adopts is the LVDS signal, thus should be noted that during fabric swatch following some: select four laminate fabric swatch based on the consideration of cost; The differential pair distance between centers of tracks is less than or equal to live width; Walk short-term, straight line, reduce the mistake hole count in the wiring; Must be noted that to have good reference planes, requires the interval can not be too little to the spacing between the different differential lines, at least should be greater than 3~5 times of differential lines spacings, in case of necessity different differential lines between add crosstalking that the hole, ground isolates to prevent mutually to ask; Because selected the wiring of four laminates, then very possible LVDS and TTL use the same layer cabling, and the distance of LVDS and TTL should be enough far away so, at least should be greater than 3~5 times of differential lines spacings; The LVDS differential signal cannot be striden the plane and cut apart, and can cause because lacking reference planes the discontinuous of impedance because stride the transmission line of partitioning portion; The build-out resistor of receiving terminal is as far as possible close to the distance that receives pin, because LMH0040 has built-in build-out resistor 100 Ω, so externally can save this on the circuit; Signal impedance is 100 Ω; The impedance of cabling is controlled at 100 Ω usually.
The utility model embodiment also is to provide a kind of video equipment that comprises the electric interfaces module that above-mentioned sdi signal and ASI signal automatically switch.
In the utility model, the electric interfaces module adopts the SDI unit to receive the DVO signal and converts sdi signal to, receives parallel TS stream by TS stream unit, and sdi signal and ASI signal is dynamically switched by parallel serial conversion unit according to the control signal of outside; Simple in structure, low-cost, low-power consumption.
The above only is preferred embodiment of the present utility model; not in order to limit the utility model; all any modifications of within spirit of the present utility model and principle, doing, be equal to and replace and improvement etc., all should be included within the protection range of the present utility model.

Claims (8)

1. the electric interfaces module that automaticallyes switch of a SDI and ASI is characterized in that, comprising:
The SDI unit that is used for receiving the DVO signal and converts sdi signal to,
Be used for receiving the TS stream unit of parallel TS stream,
Respectively with described SDI unit be connected the LVDS that TS stream unit is connected and export buffer cell, and
The parallel serial conversion unit and the driver element that are connected with described LVDS output buffer cell; Control signal according to the outside is dynamically switched sdi signal and ASI signal by described parallel serial conversion unit.
2. electric interfaces module as claimed in claim 1 is characterized in that, described driver element is cable drive.
3. electric interfaces module as claimed in claim 1 is characterized in that, described electric interfaces module also comprises: the register that is used for depositing control or state.
4. electric interfaces module as claimed in claim 1 is characterized in that, described electric interfaces module also comprises: clock unit.
5. electric interfaces module as claimed in claim 4 is characterized in that, described clock unit comprises the clock of 27MHz.
6. electric interfaces module as claimed in claim 1 is characterized in that, described SDI unit comprises:
For the plug-in unit that the sdi signal that receives is carried out error checking,
Be used for digital audio is embedded into the embedding audio unit in the horizontal blanking zone of vision signal,
Be used for finishing the scrambling unit of scrambler and NRZ-NRZI transcoding, coding transform,
Be used under the control of byte clock, being written in parallel to through the SDI parallel data stream of coding the Multiplexing Unit of shift register, and
Be used for providing the byte-rate clock that is complementary and the speed selected cell of bit rate clock to the suitable frequency division pattern of clock Dynamic Selection and for the SDI data when pre-treatment.
7. electric interfaces module as claimed in claim 1 is characterized in that, described TS stream unit comprises:
Be used for finishing the FIFO that transmitting terminal inserts synchronization character K28.5 and sends the Mpeg2 data of different pieces of information speed, and
The word that is used for each the 8Bit byte that occurs is produced the word of a 10Bit and makes described 10Bit is by the 8B/10B coding unit with fixedly output bit rate work.
8. a video equipment comprises the electric interfaces module, it is characterized in that, described electric interfaces module is each described electric interfaces module of claim 1-7.
CN 201220244000 2012-05-28 2012-05-28 Electrical interface module for automatic switching between SDI and ASI, and video device Expired - Fee Related CN202889508U (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104144331B (en) * 2014-08-18 2018-01-16 中国航空无线电电子研究所 The device of multiway images/video data encoder transmission is realized using single SDI passages
CN108449567A (en) * 2018-03-23 2018-08-24 广州市奥威亚电子科技有限公司 A kind of method and device being used for transmission digital video
CN110275846A (en) * 2019-08-19 2019-09-24 广东高云半导体科技股份有限公司 I3C is bilateral along communicating circuit and electronic equipment
CN110475144A (en) * 2019-08-16 2019-11-19 福州大学 The extracting method of 16 channel audios in a kind of 12G-SDI data flow based on FPGA

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104144331B (en) * 2014-08-18 2018-01-16 中国航空无线电电子研究所 The device of multiway images/video data encoder transmission is realized using single SDI passages
CN108449567A (en) * 2018-03-23 2018-08-24 广州市奥威亚电子科技有限公司 A kind of method and device being used for transmission digital video
CN108449567B (en) * 2018-03-23 2019-03-19 广州市奥威亚电子科技有限公司 A kind of method and device being used for transmission digital video
CN110475144A (en) * 2019-08-16 2019-11-19 福州大学 The extracting method of 16 channel audios in a kind of 12G-SDI data flow based on FPGA
CN110275846A (en) * 2019-08-19 2019-09-24 广东高云半导体科技股份有限公司 I3C is bilateral along communicating circuit and electronic equipment

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Granted publication date: 20130417

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