CN202797862U - Novel intelligent controller trip circuit - Google Patents
Novel intelligent controller trip circuit Download PDFInfo
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- CN202797862U CN202797862U CN 201220519562 CN201220519562U CN202797862U CN 202797862 U CN202797862 U CN 202797862U CN 201220519562 CN201220519562 CN 201220519562 CN 201220519562 U CN201220519562 U CN 201220519562U CN 202797862 U CN202797862 U CN 202797862U
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Abstract
The utility model discloses a novel intelligent controller trip circuit, comprising an anti-misoperation logic circuit, an electrical level converting circuit, an ON-OFF control circuit, and a trip performer. The anti-misoperation logic circuit prevents interferences of control signals through logic relation operations. The electrical level converting circuit converts low voltage into high voltage and is used for improving drive voltage of the ON-OFF control circuit. The ON-OFF control circuit is used for controlling actions of the trip performer, thereby driving a breaker to trip out. The novel intelligent controller trip circuit effectively prevents problems of false tripping in the prior art, and the trip circuit is very stable and reliable in work, and rapid in trip responding speed.
Description
Technical field
The utility model relates to a kind of trip gear of circuit breaker, and specifically a kind of new intelligent controller trip circuit belongs to low-voltage electrical apparatus resist technology field.
Background technology
Intelligent Release be microprocessor take the modern times as core, by signals collecting, data process, failure diagnosis realizes the Based Intelligent Control to circuit breaker.Trip circuit is the final circuit of intelligent electrical apparatus release, it is the actuator of single-chip microcomputer order, receive the dropout order that single-chip microcomputer sends, output drives the magnetic flow convertor action, circuit breaker is disconnected, the stability of trip circuit and reliability are directly connected to whether circuit breaker disconnects, whether electrical network have a power failure, and concerns the performance of whole release.
The trip circuit of the electronic intelligence release on the market photoelectrical couplers that adopt carries out level conversion and mono signal control more, send a control signal by microprocessor, carry out level conversion through photoelectrical coupler, then by implementing the action of threading off based on the trip circuit of Resistor-Capacitor Unit and gate circuit formation.When microprocessor was in unsteady state or crashes, the signal level of the single control signal that microprocessor sends also was unsteady state or may be significant level that there is the hidden danger of very large false tripping in this situation; And, the trip circuit based on Resistor-Capacitor Unit and gate circuit formation that adopts, not only circuit is complicated, and trip circuit is output as the tooth ripple with spike, rather than required smooth shape square wave, when the unstable voltage drop of electrical network, the voltage drop at spike place reduces, the energy shortage of output this moment is to drive the dropout actuator, and this has the unsuccessful risk of threading off, and causes the circuit breaker akinesia.
The utility model content
Technical problem to be solved in the utility model is the problem that there is false tripping in the trip circuit of intelligent electrical apparatus release in the prior art, thereby provides a kind of reliability high new intelligent controller trip circuit.
For solving the problems of the technologies described above, the utility model is achieved through the following technical solutions:
A kind of trip circuit of new intelligent controller, described trip circuit comprises
The anti-misoperation logical circuit, its input receives the two path control signal of trigger control circuit output, comes the interference of prevention and control signal by the logical relation computing;
Level shifting circuit, input is connected with the output of described anti-misoperation logical circuit, and low voltage transition is become high voltage;
ON-OFF control circuit, input is connected with the voltage of described level shifting circuit output, is used for the action of control dropout actuator;
The dropout actuator, input is connected with described ON-OFF control circuit, is used for promoting circuit breaker trip.
Described trip circuit, described trigger control circuit comprises microprocessor, described microprocessor comprises power end.
Described trip circuit, described anti-misoperation logical circuit comprises three NAND gate and the first capacitor C 1, described three NAND gate are the first NAND gate U1A, the second NAND gate U1B and the 3rd NAND gate U1C, road control signal in two described two path control signal of input termination of described the first NAND gate U1A, the output of the described first NAND gate U1A of input termination of described the second NAND gate U1B, another road control signal in the described two path control signal of another input termination of described the second NAND gate U1B, one end of described the first capacitor C 1 of the power supply termination of described the second NAND gate U1B, and jointly connecing the power end of described microprocessor, the other end of the earth terminal of described the second NAND gate U1B and described the first capacitor C 1 is ground connection respectively; Two inputs of described the 3rd NAND gate U1C connect the output of described the second NAND gate U1B simultaneously.
Described trip circuit, described three NAND gate are integrated in a NAND gate chip, described NAND gate chip comprises two inputs, a power end, an earth terminal, described two inputs connect respectively the two path control signal of described circuits for triggering output, described the first capacitor C of described power supply termination 1 one ends, and jointly connect the power end of described microprocessor, the other end of the earth terminal of described NAND gate chip and described the first capacitor C 1 is ground connection respectively.
Described trip circuit, described level shifting circuit comprises comparison circuit and voltage reference circuit, described comparison circuit has two inputs, the output of a described NAND gate chip of input termination, one end of the described voltage reference circuit of another input termination, the other end ground connection of described voltage reference circuit.
Described trip circuit, described comparison circuit comprises comparator U2A, the second resistance R 2 and the 3rd resistance R 3, the in-phase input end of described comparator U2A connects the output of described NAND gate chip, one end of the described voltage reference circuit of anti-phase input termination of described comparator U2A, the inverting input of described comparator U2A and output are connected with DC power supply by the second resistance R 2, the 3rd resistance R 3 respectively.
Described trip circuit, described voltage reference circuit comprises voltage stabilizing didoe VD1, the plus earth of described voltage stabilizing didoe VD1, negative pole connects the inverting input of described comparator U2A.
Described trip circuit, described voltage reference circuit comprise voltage reference circuit chip U3.
Described trip circuit, described ON-OFF control circuit comprises control switch, the first diode D1, the second diode D2, described control switch comprises an input, a control end and an output, the output of the described comparison circuit of control termination of described control switch, the positive pole of the described second diode D2 of input termination of described control switch, the output head grounding of described control switch; The negative pole of described the second diode D2 docks with the negative pole of described the first diode D1, and the positive pole of described the first diode D1 connects DC power supply; The both positive and negative polarity of described the second diode D2 connects described dropout actuator jointly.
Described trip circuit, described ON-OFF control circuit also comprises filter circuit, described filter circuit comprises the 4th resistance R 4 and the second capacitor C 2, the input of described the 4th resistance R 4 and described the second capacitor C 2 rear described control switchs of a termination in parallel, other end ground connection.
Described trip circuit, described control switch are arbitrary one that meets in the field-effect transistor of electrical characteristic or the triode.
Described trip circuit, described anti-misoperation logical circuit also comprises the first resistance R 1, an end of described the first resistance R 1 is connected other end ground connection with the output of described NAND gate chip.
Technique scheme of the present utility model has the following advantages compared to existing technology:
(1) the utility model discloses a kind of new intelligent controller trip circuit, comprises anti-misoperation logical circuit, level shifting circuit, ON-OFF control circuit and dropout actuator; The anti-misoperation logical circuit comes the interference of prevention and control signal by the logical relation computing, level shifting circuit becomes high voltage with low voltage transition, be used for improving the driving voltage of ON-OFF control circuit, ON-OFF control circuit is used for the action of control dropout actuator, thereby promotes circuit breaker trip.Above-mentioned new intelligent controller trip circuit has effectively avoided existing in the prior art problem of false tripping, and this trip circuit work is highly stable, reliable, the dropout fast response time.
(2) the disclosed new intelligent controller trip circuit of the utility model, the anti-misoperation logical circuit comprises three NAND gate, and the state of its output only depends on the current state of input, and the circuit element of usefulness is few, and line is simple, and is time saving and energy saving, and reliability is high.
(3) the disclosed new intelligent controller trip circuit of the utility model, three NAND gate of anti-misoperation logical circuit are integrated in same NAND gate chip, and integrated level is high, saves the space.
(4) the disclosed new intelligent controller trip circuit of the utility model, level shifting circuit comprises comparison circuit and voltage reference circuit, comparison circuit has two inputs, the output of an input termination NAND gate chip, one end of another input termination voltage reference circuit, the other end ground connection of voltage reference circuit.Voltage reference circuit provides a reference voltage to comparison circuit, and the output voltage of NAND gate chip and this reference voltage compare, and output voltage will produce transition, corresponding output high level or low level.This setup improved on the one hand ON-OFF control circuit driving voltage, thereby improved conducting speed and the driving force of this ON-OFF control circuit; By voltage reference circuit, avoided earth signal to disturb the misoperation that causes on the other hand.
Description of drawings
For content of the present utility model is more likely to be clearly understood, below in conjunction with accompanying drawing, the utility model is described in further detail, wherein,
Fig. 1 is the structural representation of the trip circuit of a kind of new intelligent controller described in the utility model;
Fig. 2 is circuit theory diagrams of the trip circuit of the described a kind of new intelligent controller of the utility model Fig. 1;
Fig. 3 is another circuit theory diagrams of the trip circuit of the described a kind of new intelligent controller of the utility model Fig. 1;
Fig. 4 is another circuit theory diagrams of the trip circuit of the described a kind of new intelligent controller of the utility model Fig. 1;
Fig. 5 is another circuit theory diagrams of the trip circuit of the described a kind of new intelligent controller of Fig. 1 of the present invention.
Reference numeral is expressed as among the figure: 1-anti-misoperation logical circuit, 2-level shifting circuit, 3-ON-OFF control circuit, 4-dropout actuator.
Embodiment
Embodiment 1:
The structure of the trip circuit of new intelligent controller described in the utility model as shown in Figure 1, it comprises anti-misoperation logical circuit 1, level shifting circuit 2, ON-OFF control circuit 3 and dropout actuator 4.Physical circuit figure is referring to shown in Figure 2.
The input of described anti-misoperation logical circuit 1 receives the two path control signal of trigger control circuit output, realizes that by the logical relation of setting the interference of prevention and control signal causes the function of circuit breaker misoperation.In the present embodiment, described trigger control circuit comprises a microprocessor, and described microprocessor comprises power end, and described microprocessor sends two path control signal; Described anti-misoperation logical circuit 1 comprises three NAND gate and the first capacitor C 1, described three NAND gate are the first NAND gate U1A, the second NAND gate U1B and the 3rd NAND gate U1C, road control signal in two described two path control signal of input termination of described the first NAND gate U1A, the output of the described first NAND gate U1A of input termination of described the second NAND gate U1B, another road control signal in the described two path control signal of another input termination of described the second NAND gate U1B, one end of described the first capacitor C 1 of the power supply termination of described the second NAND gate U1B, and jointly connecing the power end of described microprocessor, the other end of the earth terminal of described the second NAND gate U1B and described the first capacitor C 1 is ground connection respectively; Two inputs of described the 3rd NAND gate U1C connect the output of described the second NAND gate U1B simultaneously.
Operation principle: after described anti-misoperation logical circuit 1 is received two path control signal DO-TRIP0, DO-TRIP1, if two path control signal DO-TRIP0 be not low level and DO-TRIP1 when the high level, the output of described the 3rd NAND gate U1C is low level; When DO-TRIP0 be low level, when DO-TRIP1 is high level, two inputs of described the first NAND gate U1A are low level, output output high level, the high level of described the first NAND gate U1A output and the high level of described control signal DO-TRIP1 are input to two inputs of described the second NAND gate U1B, described the second NAND gate U1B output is output as low level, the low level of described the second NAND gate U1B output flows to two inputs of described the 3rd NAND gate U1C, and the output of described the 3rd NAND gate U1C is output as high level.This setup has prevented the interference of two path control signal to cause the misoperation of circuit breaker well.
As other execution modes, described three NAND gate are integrated in a NAND gate chip, described NAND gate chip comprises two inputs, a power end, an earth terminal, described two inputs connect respectively the two path control signal of described circuits for triggering output, described the first capacitor C of described power supply termination 1 one ends, and jointly connect the power end of described microprocessor, the other end of the earth terminal of described NAND gate chip and described the first capacitor C 1 is ground connection respectively.
The input of described level shifting circuit 2 is connected with described anti-misoperation logical circuit 1, and low voltage transition is become high voltage, is used for improving the driving voltage of described ON-OFF control circuit 3.In the present embodiment, described level shifting circuit 2 comprises comparison circuit and voltage reference circuit, described comparison circuit has two inputs, the output of a described NAND gate U1C of input termination, one end of the described voltage reference circuit of another input termination of described comparison circuit, the other end ground connection of described voltage reference circuit; Described comparison circuit comprises comparator U2A, the second resistance R 2 and the 3rd resistance R 3, the in-phase input end of described comparator U2A connects the output of described NAND gate chip, one end of the described voltage reference circuit of anti-phase input termination of described comparator U2A, the inverting input of described comparator U2A and output are connected with+12V DC power supply by the second resistance R 2, the 3rd resistance R 3 respectively; Described voltage reference circuit comprises voltage stabilizing didoe VD1, the plus earth of described voltage stabilizing didoe VD1, and negative pole connects the inverting input of described comparator U2A.
When the circuit powered on moment is that microprocessor work is not when stablizing, because+12V DC power supply is set up early than power supply of microprocessor VCC, the in-phase input end level of described comparator U2A is lower than the inverting input level makes described comparator U2A be output as low level, the misoperation of described dropout actuator 4 when effectively having prevented microprocessor work not stablize.
As other execution modes, referring to shown in Figure 3, described voltage reference circuit comprises voltage reference circuit chip U3.
The input of described ON-OFF control circuit 3 is connected with described level shifting circuit 2, is used for the action of control dropout actuator 4.In the present embodiment, described ON-OFF control circuit 3 comprises control switch, the first diode D1, the second diode D2, described control switch comprises an input, a control end and an output, the output of the described comparator U2A of control termination of described control switch, the positive pole of the described second diode D2 of input termination of described control switch, the output head grounding of described control switch; The negative pole of described the second diode D2 docks with the negative pole of described the first diode D1, and the positive pole of described the first diode D1 connects+the 24V DC power supply; The both positive and negative polarity of described the second diode D2 connects jointly for the described dropout actuator 4 that promotes circuit breaker trip.Described control switch is arbitrary one that meets in the field-effect transistor of electrical characteristic or the triode, in the present embodiment, described control switch is field-effect transistor T1, the grid of described field-effect transistor T1 is as the control end of control switch, the drain electrode of described field-effect transistor T1 is as the input of control switch, and the source electrode of described field-effect transistor T1 is as the output of control switch.
When the output voltage of described comparator U2A is low level, when not reaching the operating voltage of described field-effect transistor T1, described field-effect transistor T1 cut-off, dropout actuator 4 is not worked; When the output voltage of described comparator U2A is high level, when reaching the operating voltage of described field-effect transistor T1, described field-effect transistor T1 conducting, 4 work of dropout actuator promote circuit breaker trip.
Microprocessor output control signal DO-TRIP0 and DO-TRIP1 consist of described anti-misoperation logical circuit 1 by described the first NAND gate U1A, described the second NAND gate U1B and described the 3rd NAND gate U1C.Only have when DO-TRIP0 be low level, when DO-TRIP1 is high level, trip circuit is just worked, and to drive described dropout actuator 4, makes circuit breaker action, the interference that has prevented the control command signal causes the misoperation of circuit breaker.In addition, consist of level shifting circuit 2 by described comparator U2A and described voltage reference circuit chip U3, improved on the one hand the gate leve driving voltage of described field-effect transistor T1, to improve conducting speed and the driving force of described field-effect transistor T1; Avoided earth signal to disturb the misoperation that causes by described voltage reference circuit chip U3 on the other hand.
Embodiment 2:
On the basis of embodiment 1, referring to shown in Figure 4, described anti-misoperation logical circuit 1 also comprises the first resistance R 1, and an end of described the first resistance R 1 is connected other end ground connection with the output of described the 3rd NAND gate U1C.
Embodiment 3:
On embodiment 1,2 basis, referring to shown in Figure 5, described ON-OFF control circuit 3 also comprises filter circuit, described filter circuit comprises the 4th resistance R 4 and the second capacitor C 2, the grid of described the 4th resistance R 4 and described the second capacitor C 2 rear described field-effect transistor T1 of a termination in parallel, other end ground connection.Described the second capacitor C 2 and described the 4th resistance R 4 are used for stablizing the quiescent potential of described field-effect transistor T1 grid.
Obviously, above-described embodiment only is for example clearly is described, and is not the restriction to execution mode.For those of ordinary skill in the field, can also make other changes in different forms on the basis of the above description.Here need not also can't give all execution modes exhaustive.And the apparent variation of being extended out thus or change still are among the protection range of the invention.
Claims (12)
1. the trip circuit of a new intelligent controller is characterized in that, described trip circuit comprises
The anti-misoperation logical circuit, its input receives the two path control signal of trigger control circuit output, comes the interference of prevention and control signal by the logical relation computing;
Level shifting circuit, input is connected with the output of described anti-misoperation logical circuit, and low voltage transition is become high voltage;
ON-OFF control circuit, input is connected with the voltage of described level shifting circuit output, is used for the action of control dropout actuator;
The dropout actuator, input is connected with described ON-OFF control circuit, is used for promoting circuit breaker trip.
2. trip circuit according to claim 1 is characterized in that, described trigger control circuit comprises microprocessor, and described microprocessor comprises power end.
3. trip circuit according to claim 2, it is characterized in that, described anti-misoperation logical circuit comprises three NAND gate and the first capacitor C 1, described three NAND gate are the first NAND gate U1A, the second NAND gate U1B and the 3rd NAND gate U1C, road control signal in two described two path control signal of input termination of described the first NAND gate U1A, the output of the described first NAND gate U1A of input termination of described the second NAND gate U1B, another road control signal in the described two path control signal of another input termination of described the second NAND gate U1B, one end of described the first capacitor C 1 of the power supply termination of described the second NAND gate U1B, and jointly connecing the power end of described microprocessor, the other end of the earth terminal of described the second NAND gate U1B and described the first capacitor C 1 is ground connection respectively; Two inputs of described the 3rd NAND gate U1C connect the output of described the second NAND gate U1B simultaneously.
4. trip circuit according to claim 3, it is characterized in that, described three NAND gate are integrated in a NAND gate chip, described NAND gate chip comprises two inputs, a power end, an earth terminal, described two inputs connect respectively the two path control signal of described circuits for triggering output, described the first capacitor C of described power supply termination 1 one ends, and jointly connecing the power end of described microprocessor, the other end of the earth terminal of described NAND gate chip and described the first capacitor C 1 is ground connection respectively.
5. trip circuit according to claim 4, it is characterized in that, described level shifting circuit comprises comparison circuit and voltage reference circuit, described comparison circuit has two inputs, the output of a described NAND gate chip of input termination, one end of the described voltage reference circuit of another input termination, the other end ground connection of described voltage reference circuit.
6. trip circuit according to claim 5, it is characterized in that, described comparison circuit comprises comparator U2A, the second resistance R 2 and the 3rd resistance R 3, the in-phase input end of described comparator U2A connects the output of described NAND gate chip, one end of the described voltage reference circuit of anti-phase input termination of described comparator U2A, the inverting input of described comparator U2A and output are connected with DC power supply by the second resistance R 2, the 3rd resistance R 3 respectively.
7. trip circuit according to claim 6 is characterized in that, described voltage reference circuit comprises voltage stabilizing didoe VD1, the plus earth of described voltage stabilizing didoe VD1, and negative pole connects the inverting input of described comparator U2A.
8. trip circuit according to claim 6 is characterized in that, described voltage reference circuit comprises voltage reference circuit chip U3.
9. according to claim 7 or 8 described trip circuits, it is characterized in that, described ON-OFF control circuit comprises control switch, the first diode D1, the second diode D2, described control switch comprises an input, a control end and an output, the output of the described comparison circuit of control termination of described control switch, the positive pole of the described second diode D2 of input termination of described control switch, the output head grounding of described control switch; The negative pole of described the second diode D2 docks with the negative pole of described the first diode D1, and the positive pole of described the first diode D1 connects DC power supply; The both positive and negative polarity of described the second diode D2 connects described dropout actuator jointly.
10. trip circuit according to claim 9, it is characterized in that, described ON-OFF control circuit also comprises filter circuit, described filter circuit comprises the 4th resistance R 4 and the second capacitor C 2, the input of described the 4th resistance R 4 and described the second capacitor C 2 rear described control switchs of a termination in parallel, other end ground connection.
11. trip circuit according to claim 10 is characterized in that, described control switch is arbitrary one that meets in the field-effect transistor of electrical characteristic or the triode.
12. trip circuit according to claim 11 is characterized in that, described anti-misoperation logical circuit also comprises the first resistance R 1, and an end of described the first resistance R 1 is connected other end ground connection with the output of described NAND gate chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220519562 CN202797862U (en) | 2012-10-11 | 2012-10-11 | Novel intelligent controller trip circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220519562 CN202797862U (en) | 2012-10-11 | 2012-10-11 | Novel intelligent controller trip circuit |
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| Publication Number | Publication Date |
|---|---|
| CN202797862U true CN202797862U (en) | 2013-03-13 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201220519562 Withdrawn - After Issue CN202797862U (en) | 2012-10-11 | 2012-10-11 | Novel intelligent controller trip circuit |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102868135A (en) * | 2012-10-11 | 2013-01-09 | 德力西电气有限公司 | Novel intelligent controller trip circuit |
| CN103312026A (en) * | 2013-05-10 | 2013-09-18 | 长城电器集团有限公司 | Intelligent controller trip circuit of automatic re-close molded case circuit breaker |
| CN109341411A (en) * | 2018-09-20 | 2019-02-15 | 中北大学 | A kind of trigger circuit |
-
2012
- 2012-10-11 CN CN 201220519562 patent/CN202797862U/en not_active Withdrawn - After Issue
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102868135A (en) * | 2012-10-11 | 2013-01-09 | 德力西电气有限公司 | Novel intelligent controller trip circuit |
| CN102868135B (en) * | 2012-10-11 | 2016-02-17 | 德力西电气有限公司 | A kind of Novel intelligent controller trip circuit |
| CN103312026A (en) * | 2013-05-10 | 2013-09-18 | 长城电器集团有限公司 | Intelligent controller trip circuit of automatic re-close molded case circuit breaker |
| CN103312026B (en) * | 2013-05-10 | 2016-08-24 | 长城电器集团有限公司 | Automatic reclosing breaker of plastic casing intelligent controller trip circuit |
| CN109341411A (en) * | 2018-09-20 | 2019-02-15 | 中北大学 | A kind of trigger circuit |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20130313 Effective date of abandoning: 20160217 |
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| C25 | Abandonment of patent right or utility model to avoid double patenting |