CN202486551U - Power-off timing circuit of automobile control unit - Google Patents
Power-off timing circuit of automobile control unit Download PDFInfo
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- CN202486551U CN202486551U CN2012200591065U CN201220059106U CN202486551U CN 202486551 U CN202486551 U CN 202486551U CN 2012200591065 U CN2012200591065 U CN 2012200591065U CN 201220059106 U CN201220059106 U CN 201220059106U CN 202486551 U CN202486551 U CN 202486551U
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Abstract
The utility model relates to a power-off timing circuit of an automobile control unit. The circuit is applicable to a control circuit of an automobile electronic control unit and comprises two digital control ports and an analog-to-digital conversion input port of a singlechip, and is combined with semiconductor elements such as a compound triode, a field effect tube, a capacitor and a resistor. A charge and discharge circuit is constructed by the capacitor and the resistor, and a switch circuit is constructed by the compound triode and the field effect tube; and in the switch circuit, the on-off control logic of the switch by the singlechip according to practical requirement, the voltage values between the two ends of the capacitor are detected by the analog-to-digital conversion input end, and power-off elapsed time is determined according to the voltage detection result, and the action of the singlechip is selected according to a power-off time threshold value set by a user. By using the power-off timing circuit of the automobile control unit, timing adjustment is convenient, control and judgment are simple, resources occupied by the singlechip are few; in the switch circuit, damage of high pressure on the singlechip can be prevented by utilizing the characteristics of a field effect tube; and the circuit is simple and the cost is lowered.
Description
Technical field:
The utility model relates to electricity field, relates in particular to timing circuit, particularly the outage timing circuit of automobile control unit.
Background technology:
Electronic control unit in the automobile is preserved status data under the situation that connects power supply; Behind the deenergization; These status datas are preserved forever or are never preserved, and after electronic control unit re-powered initialization, these status datas need be reset.For the purpose of testing or keeping in repair, sometimes need the power supply of of short duration disconnection electronic control unit.In addition, the automobile with starting/hold function is when restarting, and the improper voltage near power down may appear about 10 seconds in vehicle power supply voltage.The requirement of then not preserving for a long time for the status data that satisfies under the situation of short time outage, still can keep cutting off the power supply the time in the prior art; In available circuit, increase a real time clock circuit; And utilize an accumulation power supply that real time clock circuit is supplied power, real time clock circuit is set the power-off time that electronic control unit needs, when electronic control unit cuts off the power supply; Real time clock circuit carries out timer counter; When power-off time during, do not keep the state of last time, otherwise keep greater than design load.The method of this increase real time clock circuit can increase a lot of circuit costs, and makes the electronic control unit complicated circuit.
Summary of the invention:
The purpose of the utility model is to provide a kind of outage timing circuit of automobile control unit, and the outage timing circuit of described this automobile control unit will solve the technical matters that timing circuit is complicated, cost is high after the outage of vehicle electronic control unit in the prior art.
The outage timing circuit of this automobile control unit of the utility model; Comprise one first input/output terminal of the single-chip microcomputer of an automobile control unit, second input/output terminal and an analog to digital conversion input end; Also comprise a compound transistor and a FET; Described compound transistor is made up of a NPN type triode and a positive-negative-positive triode; Wherein, described single-chip microcomputer connects power supply through first input/output terminal, and the collector of described positive-negative-positive triode is connected with the drain electrode of described FET; Described second input/output terminal connects the grid of FET through one first resistors in series; One second resistors in series and a ground capacitor are formed filtering circuit, and the signal of FET source electrode output gets into described analog to digital conversion input end behind filtering circuit, utilize one first capacitor through described compound transistor charging; Utilizing a resistors in parallel is that first capacitor provides discharge loop, utilizes FET to realize the conducting and the cut-out of feedback signal.
Further, the base stage of described positive-negative-positive triode is connected with the collector of described NPN type triode, and described first input/output terminal is connected with the base stage of NPN type triode; The grounded emitter of NPN type triode, the emitter of positive-negative-positive triode is connected with positive source, and described analog to digital conversion input end is connected with the source electrode of FET through one second resistors in series; The collector of positive-negative-positive triode is connected with an end of first capacitor again, the other end ground connection of described first capacitor, and described resistors in parallel is parallelly connected with first capacitor; One end ground connection of resistors in parallel; The other end of resistors in parallel is connected with the drain electrode of FET, and second input/output terminal is connected with an end of one the 4th resistor again, the other end ground connection of described the 4th resistor; The grid of FET is connected with an end of one the 3rd capacitor again; The other end ground connection of described the 3rd capacitor, the source electrode of FET are connected with one second resistor again, the other end ground connection of described second resistor; The analog to digital conversion input end is connected with an end of a ground capacitor again, the other end ground connection of described ground capacitor.
Further, through changing described first capacitor volume and changing timing time with the resistance of the said first capacitor parallel resistor device.
The principle of work of the utility model is: the single-chip microcomputer of vehicle electronic control unit is when powering on Power on for the first time; The base stage output high level of the NPN type triode of first input/output terminal in compound transistor; The collector of NPN type triode is opened the positive-negative-positive triode in the compound transistor, and electric current charges to ground capacitor through the collector of positive-negative-positive triode.Simultaneously, second input/output terminal keeps low level, keeps FET and closes.Above-mentioned state keeps after the vehicle electronic control unit single-chip microcomputer is powering on Power on for the first time always.When the vehicle electronic control unit single-chip microcomputer cuts off the power supply in test, maintenance and startup/hold function operational process; The base stage output low level of the NPN type triode of first input/output terminal in compound transistor; The collector of NPN type triode is closed the positive-negative-positive triode in the compound transistor; Ground capacitor is through discharging with the first capacitor parallel resistor device, and the voltage at ground capacitor two ends descends with the increase of discharge time.When vehicle electronic control unit powers on Power on once more; First input/output terminal of the single-chip microcomputer of vehicle electronic control unit at first keeps low level; Second input/output terminal is to the grid output high level of FET; The FET conducting; The vehicle electronic control unit single-chip microcomputer is obtained the magnitude of voltage at ground capacitor two ends through the analog to digital conversion input end; The vehicle electronic control unit single-chip microcomputer is judged outage institute elapsed time according to the difference that the single-chip microcomputer of the current magnitude of voltage at ground capacitor two ends and vehicle electronic control unit powers between the magnitude of voltage of back analog to digital conversion input end for the first time, and the power-off time threshold value of setting according to the user is again selected to protect the single-chip microcomputer presence state data or abandoned presence state data, closes FET simultaneously and opens compound transistor; Capacitor is charged again, prepare to cut off the power supply timing next time.
The utility model and prior art are compared, and its effect is actively with tangible.The utility model is provided with compound transistor, FET, capacitor and resistor on the input/output terminal of the single-chip microcomputer of vehicle electronic control unit; Utilize capacitor and resistor to constitute charge-discharge circuit; Utilize compound transistor, FET to realize discharging and recharging conversion; Utilize the magnitude of voltage at the analog to digital conversion input end detection capacitor two ends of single-chip microcomputer; Judge outage institute elapsed time according to the decline situation of the voltage at capacitor two ends, the power-off time threshold value of setting according to the user is again selected the action of single-chip microcomputer.The utility model is convenient to adjust timing time, and control and judgement are simple, and it is few to take mcu resource, adopts the on-off circuit of FET can prevent under the high pressure single-chip microcomputer to be damaged, and circuit is simple, has reduced the cost of outage back timing measure.
Description of drawings:
Fig. 1 is the schematic diagram of outage timing circuit of the automobile control unit of the utility model.
Fig. 2 is the logic control chart of microcontroller power supply Power signal, the first input and output end signal, the second input and output end signal and analog to digital conversion input end signal in the outage timing circuit of automobile control unit of the utility model.
Embodiment
Embodiment 1
As depicted in figs. 1 and 2; The outage timing circuit of a kind of automobile control unit of the utility model; Comprise one first input/output terminal SW1, second an input/output terminal SW2 and an analog to digital conversion input end CHECK in the single-chip microprocessor MCU of a vehicle electronic control unit; Also comprise a compound transistor Q1 and a FET Q2, described compound transistor Q1 is made up of a NPN type triode and a positive-negative-positive triode, wherein; The single-chip microcomputer of automobile control unit is through the power supply of the direct control circuit of the first input/output terminal SW1; The collector of positive-negative-positive triode is connected with the drain electrode of described FET Q2, and the second input/output terminal SW2 directly controls the grid of FET Q2 through the first resistors in series R5, and the second resistors in series R3 and ground capacitor C2 form filtering circuit; The signal of FET Q2 source electrode output directly gets into analog to digital conversion input end CHECK behind filtering circuit; The first capacitor C1 directly charges through compound transistor Q1, and resistors in parallel R1 is that the first capacitor C1 provides corresponding discharge loop, and FET Q2 realizes the conducting and cut-out function of feedback signal.
Further, change timing time through the capacity of change capacitor C1 and the resistance of resistors in parallel R1.
The principle of work of present embodiment is: the single-chip microcomputer of vehicle electronic control unit is when powering on Power on for the first time; The base stage output high level of the NPN type triode of the first input/output terminal SW1 in compound transistor; The collector of NPN type triode is opened the positive-negative-positive triode in the compound transistor, and electric current charges to ground capacitor C2 through the collector of positive-negative-positive triode.Simultaneously, the second input/output terminal SW2 of the single-chip microcomputer of vehicle electronic control unit keeps low level, keeps FET Q2 and closes.Above-mentioned state keeps after the vehicle electronic control unit single-chip microcomputer is powering on Power on for the first time always.When the vehicle electronic control unit single-chip microcomputer cuts off the power supply in test or maintenance process; The base stage output low level of the NPN type triode of the first input/output terminal SW1 in compound transistor; The collector of NPN type triode is closed the positive-negative-positive triode in the compound transistor; Ground capacitor C2 is through resistor R 1 discharge, and the voltage at ground capacitor C2 two ends descends with the increase of discharge time.When vehicle electronic control unit powers on Power on once more; The first input/output terminal SW1 of the single-chip microcomputer of vehicle electronic control unit at first keeps low level; The second input/output terminal SW2 is to the grid output high level of FET Q2; FET Q2 conducting; The vehicle electronic control unit single-chip microcomputer is obtained the magnitude of voltage at ground capacitor C2 two ends through the analog to digital conversion input end; The vehicle electronic control unit single-chip microcomputer is judged outage institute elapsed time according to the difference that the single-chip microcomputer of the current magnitude of voltage at ground capacitor C2 two ends and vehicle electronic control unit powers between the magnitude of voltage of back analog to digital conversion input end for the first time, and the power-off time threshold value of setting according to the user is again selected to protect the single-chip microcomputer presence state data or abandoned presence state data, closes FET Q2 simultaneously and opens compound transistor; C2 charges again to ground capacitor, prepares to cut off the power supply timing next time.
Concrete, the first input/output terminal SW1 of the utility model, the second input/output terminal SW2 are the I/O output of MCU, CHECK is output as the A/D input of MCU.When MCU output SW1 is high level, the C1 charging; When MCU output SW1 was low level, C1 was through the R1 discharge, when MCU output SW2 high level; Because CHECK end is input, thus the Q2 conducting, if when the C1 voltage is higher than MCU supply voltage (5 volts); The grid maximum of Q2 can only be the voltage (5 volts) of SW1 input, thus Q2 for not exclusively opening, CHECK end signal voltage is a little less than 5 volts; When if the C1 voltage is lower than MCU supply voltage (5 volts), the grid of Q2 is the voltage (5 volts) of SW1 input, so Q2 is for open fully; CHECK end signal voltage equals the C1 voltage, detects the time of outage through the voltage that detects the CHECK end.Test is accomplished, and closes Q2, opens Q1 again, and under this state, C1 begins charging, and C2 has prepared test next time through R3, R2 discharge.
Among Fig. 2, On representes high level, and Off representes low level.
In the present embodiment, the function of each element such as following table:
The utility model embodiment more specifically is, the base stage of positive-negative-positive triode is connected with the collector of NPN type triode, and the first input/output terminal SW1 is connected with the base stage of NPN type triode; The grounded emitter of NPN type triode; The emitter of positive-negative-positive triode is connected with positive source VBAT1, and the collector of positive-negative-positive triode is connected with the drain electrode of FET Q2, and the second input/output terminal SW2 is connected with the grid of FET Q2 through the first resistors in series R5; Analog to digital conversion input end CHECK is connected with the source electrode of FET Q2 through the second resistors in series R3; The collector of positive-negative-positive triode is connected with the end of the first capacitor C1 again, the other end ground connection of the first capacitor C1 and be connected with the end of resistors in parallel R1, and the other end of resistors in parallel R1 is connected with the drain electrode of FET Q2; The second input/output terminal SW2 is connected with an end of resistor R 4 again; The other end ground connection of resistor R 4, the grid of FET Q2 are connected with the end of capacitor C3 again, the other end ground connection of capacitor C3; The source electrode of FET Q2 is connected with resistor R 2 again; The other end ground connection of resistor R 2, analog to digital conversion input end CHECK is connected with the end of ground capacitor C2 again, the other end ground connection of ground capacitor C2.
The foregoing description is merely a preferred embodiment in the utility model, and other should be contained in the protection domain of present patent application according to design circuit of the utility model or the design that derives.
Claims (2)
1. the outage timing circuit of an automobile control unit; Comprise one first input/output terminal of the single-chip microcomputer of an automobile control unit, second input/output terminal and an analog to digital conversion input end; Also comprise a compound transistor and a FET; Described compound transistor is made up of a NPN type triode and a positive-negative-positive triode; It is characterized in that: described single-chip microcomputer connects power supply through first input/output terminal; The collector of described positive-negative-positive triode is connected with the drain electrode of described FET, and described second input/output terminal is through the grid of one first resistors in series connection FET, and one second resistors in series and a ground capacitor are formed filtering circuit; The signal of FET source electrode output gets into described analog to digital conversion input end behind filtering circuit; Utilize one first capacitor through described compound transistor charging, utilizing a resistors in parallel is that first capacitor provides discharge loop, utilizes FET to realize the conducting and the cut-out of feedback signal.
2. the outage timing circuit of automobile control unit as claimed in claim 1, it is characterized in that: the base stage of described positive-negative-positive triode is connected with the collector of described NPN type triode, and described first input/output terminal is connected with the base stage of NPN type triode; The grounded emitter of NPN type triode; The emitter of positive-negative-positive triode is connected with positive source, and described analog to digital conversion input end is connected with the source electrode of FET through one second resistors in series, and the collector of positive-negative-positive triode is connected with an end of first capacitor again; The other end ground connection of described first capacitor; Described resistors in parallel is parallelly connected with first capacitor, an end ground connection of resistors in parallel, and the other end of resistors in parallel is connected with the drain electrode of FET; Second input/output terminal is connected with an end of one the 4th resistor again; The other end ground connection of described the 4th resistor, the grid of FET are connected with an end of one the 3rd capacitor again, the other end ground connection of described the 3rd capacitor; The source electrode of FET is connected with one second resistor again; The other end ground connection of described second resistor, analog to digital conversion input end are connected with an end of a ground capacitor again, the other end ground connection of described ground capacitor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012200591065U CN202486551U (en) | 2012-02-22 | 2012-02-22 | Power-off timing circuit of automobile control unit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012200591065U CN202486551U (en) | 2012-02-22 | 2012-02-22 | Power-off timing circuit of automobile control unit |
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| Publication Number | Publication Date |
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| CN202486551U true CN202486551U (en) | 2012-10-10 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN2012200591065U Expired - Lifetime CN202486551U (en) | 2012-02-22 | 2012-02-22 | Power-off timing circuit of automobile control unit |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102621881A (en) * | 2012-02-22 | 2012-08-01 | 延锋伟世通电子科技(上海)有限公司 | Power-off timing circuit of automotive control unit |
| CN110149108A (en) * | 2019-06-05 | 2019-08-20 | 浙江明德微电子股份有限公司 | A low power consumption composite SJ-MOS tube and its preparation method |
| GB2643278A (en) * | 2024-08-09 | 2026-02-11 | Mercedes Benz Group Ag | A method for operating an electronic control unit, a computer program product,a non-transitory computer-readable storage medium, an electronic control |
-
2012
- 2012-02-22 CN CN2012200591065U patent/CN202486551U/en not_active Expired - Lifetime
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102621881A (en) * | 2012-02-22 | 2012-08-01 | 延锋伟世通电子科技(上海)有限公司 | Power-off timing circuit of automotive control unit |
| CN102621881B (en) * | 2012-02-22 | 2014-04-09 | 延锋伟世通电子科技(上海)有限公司 | Power-off timing circuit of automotive control unit |
| CN110149108A (en) * | 2019-06-05 | 2019-08-20 | 浙江明德微电子股份有限公司 | A low power consumption composite SJ-MOS tube and its preparation method |
| GB2643278A (en) * | 2024-08-09 | 2026-02-11 | Mercedes Benz Group Ag | A method for operating an electronic control unit, a computer program product,a non-transitory computer-readable storage medium, an electronic control |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20121010 |