CN202058020U - Field bus link real-time monitoring device based on ARM - Google Patents
Field bus link real-time monitoring device based on ARM Download PDFInfo
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- CN202058020U CN202058020U CN201120073564XU CN201120073564U CN202058020U CN 202058020 U CN202058020 U CN 202058020U CN 201120073564X U CN201120073564X U CN 201120073564XU CN 201120073564 U CN201120073564 U CN 201120073564U CN 202058020 U CN202058020 U CN 202058020U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract
The utility model discloses a field bus link real-time monitoring device based on an ARM, comprising an ARM processor, an FPGA (field programmable gate array) module, a field bus communication interface and a human-machine interaction interface; the data on the field bus link is downloaded in the FPGA module by the field bus communication interface; the ARM processor reads the data in the FPGA module and obtains the state and alarm information on the field bus link, and the state and the alarm information of the equipment linked with the field bus link; the state and alarm information can be displayed by the human-machine interaction interface; simultaneously the generated alarm information is input to the FPGA module and is uploaded to the field bus link; the input information is input to the ARM processor by the human-machine interaction interface, is written in the FPGA module in real time, and is sent into the field bus link by the field bus communication interface. The field bus link real-time monitoring device can be flexibly applied to workshops or equipments to carry out real-time monitoring and can solve the real-time monitoring problems of the workshops or the equipments.
Description
Technical field
The utility model belongs to fields of numeric control technique, is specifically related to a kind of fieldbus link real time monitoring apparatus, is used for the real-time monitoring of numerical control device.
Background technology
For satisfy digital control system to hyperchannel, at a high speed, high-precision requirement, therefore fieldbus has become digital control system and has developed requisite communication mode, fieldbus link and chained device is monitored the assurance that becomes the digital control system reliable communication in real time.
Patent documentation 201020107777.5 discloses a kind of supervising device of fieldbus, be used for computer room is monitored, can realize calculator room equipment centralized control with different communication protocol, this equipment has switching value data I/O unit and analog data I/O unit, these I/O information all are provided with at computer room, can not be used for the monitoring of digital control system and equipment.
Patent documentation 200810048524.2 discloses a kind of supervisory system, and this supervisory system connects many lathes based on management server and hub by Industrial Ethernet, monitors the status information of many lathes simultaneously.
In existing fields of numeric control technique, most of digital control system can be monitored numerically-controlled machine, but there is following shortcoming in such monitoring form:
1, Jian Kong information biases toward the machine tooling process, has ignored the monitoring of digital control system on-the-spot bus links.
When 2, digital control system is finished real-time monitoring, increased the burden of digital control system data processing.
3, the form of the monitoring of digital control system and information are difficult for change, can cause monitoring in real time not comprehensive.
4, can not remote real-time monitoring.
The utility model content
The utility model proposes a kind of fieldbus link real time monitoring apparatus based on ARM, be arranged on the fieldbus link, by obtaining the data message on the fieldbus link in real time, equipment to the link on link layer data and the link is monitored in real time, solve present fieldbus link and monitor problem in real time, have the advantages that low cost, high reliability, function are strong, be easy to realize.
The technical solution of the utility model is:
A kind of fieldbus link real time monitoring apparatus based on ARM is arranged on the fieldbus link, and the equipment of the link on link layer data and the link is monitored in real time.This device comprises arm processor, FPGA module, field bus communication interface and human-computer interaction interface.
Data on the fieldbus link download in the FPGA module in real time through the field bus communication interface, in FPGA, realize the acquisition function of Frame, FPGA and arm processor pass through data bus, address wire and control signal wire interconnect, arm processor reads the data in real time among the FPGA by interrupt mode, carrying out data analysis through this arm processor handles, with the state on the fieldbus link, warning message and be linked at equipment state on the fieldbus link, warning message shows by human-computer interaction interface, simultaneously warning message is input to the FPGA module, uploads in the fieldbus link.
Human-computer interaction interface provides the information input function, the information of input is after the arm processor analyzing and processing, arm processor writes data by interrupt mode in real time to FPGA, realizes the sending function of Frame in FPGA, uploads in the fieldbus link through the field bus communication interface.
Arm processor is the processing core of this device, and this arm processor comprises data storage cell, data analysis unit, man-machine interaction unit.Information by the human-computer interaction interface input is input to man-machine interaction unit, is stored in the data storage cell, and this data storage cell also is used for storing the data that FPGA imports.This data storage cell is realized by the memory management in the arm processor.Data analysis unit is carried out analyzing and processing to the data of data cell stores, this unit comprises bus links monitoring subelement and device status monitoring subelement, described bus links monitoring subelement carries out analyzing and processing to the network structure and the running status of fieldbus link, and described device status monitoring subelement carries out analyzing and processing to the equipment state that is linked on the fieldbus link.The result of analyzing and processing outputs to human-computer interaction interface by man-machine interaction unit and shows, simultaneously the warning message that produces is input to the FPGA module, uploads to fieldbus link, is handled by digital control system.
The FPGA module is linked in the fieldbus link by the field bus communication interface, realizes the collection and the sending function of Frame, and will gather with data storage to be sent in FPGA.This module comprises data storage cell, data acquisition unit, data transmission unit.Data storage cell is the data of storage of collected and stores the data that need upload in the fieldbus link.Data acquisition unit is downloaded by the field bus communication interface and is duplicated the link layer data of all-links on bus, is saved in data storage cell.Data transmission unit in fieldbus link, sends data after handling to the data upload that need upload in the data storage cell to the equipment of digital control system and link.
Human-computer interaction interface is realized Presentation Function by LCD.This human-computer interaction interface is under arm processor man-machine interaction unit WinCE operating system environment, and state after the arm processor data analysis unit handled and warning message show in close friend's interface mode.Human-computer interaction interface also provides the function of information input, is input to arm processor.
The field bus communication interface comprises photoelectric conversion module and PHY chip.Link layer data in the fieldbus link are converted to electric signal with the form of Physical layer light signal through photoelectric conversion module, offer the PHY chip, and the PHY chip is converted to the link layer data to the differential signal that receives and is input to the FPGA module.The link layer data of FPGA module output are converted to differential signal through the PHY chip, are converted to the Physical layer light signal through photoelectric conversion module and are input in the fieldbus link.
This device also comprises network communication interface, download interface module, parameter configuration/display module.
Network communication interface is connected with arm processor, realizes that Ethernet data is shared, comprises RJ-45 interface, isolating transformer, network PHY chip.The data of internet are input to isolating transformer through the RJ-45 interface, and isolating transformer is input to the network PHY chip after realizing Signal Spacing, are input to arm processor after the conversion of network PHY chip signal.Data in the arm processor are input to isolating transformer after the conversion of network PHY chip signal, isolating transformer is transferred to the internet through the RJ-45 interface after realizing Signal Spacing.
The download interface module is connected with arm processor, for arm processor provides data download easily and emulation interface, comprises usb communication module, serial port module, jtag interface, FLASH interface.
Parameter configuration/display module is connected with FPGA, realizes the configurable and real-time Presentation Function of monitoring parameter, and this module comprises that button input and 8 sections charactrons show.
The beneficial effects of the utility model are:
1, the utility model employing field bus communication can be applied to workshop level flexibly or device level is monitored in real time, can be configured to multistage real time monitoring apparatus, has solved workshop level or the device level problem of monitoring in real time.
2, this device can obtain the data message on the fieldbus link in real time, and the equipment of the link on fieldbus link layer data and the link is monitored in real time.
3, the utility model adopts FPGA and arm processor to realize control, can connect dissimilar digital control systems, is used for the real-time monitoring of digital control system.
4, the utility model reliability height is easy to connect, can realize remote real-time monitoring.
5, the utility model adopts the LCD screen to realize human-computer interaction interface, has realized the operability and the integrality of monitoring interface.
6, the utility model adopts button input and 8 sections charactrons to show, realizes the configurable of monitoring parameter, has increased dirigibility of the present utility model and configurability.
Description of drawings
Fig. 1 is the general structure synoptic diagram of this device.
Fig. 2 is an arm processor specific implementation synoptic diagram.
Fig. 3 is the device status monitoring functional schematic.
Fig. 4 is a FPGA module specific implementation synoptic diagram.
Embodiment
The utility model proposes a kind of fieldbus link real time monitoring apparatus based on ARM, be arranged on the fieldbus link, by obtaining the data message on the fieldbus link in real time, equipment to the link on link layer data and the link is monitored in real time, solve present fieldbus link and monitor problem in real time, have the advantages that low cost, high reliability, function are strong, be easy to realize.
Fig. 1 is the general structure synoptic diagram of this device, and this device comprises arm processor, FPGA module, field bus communication interface and human-computer interaction interface.
Data on the fieldbus link download in the FPGA module in real time through the field bus communication interface, in FPGA, realize the acquisition function of Frame, FPGA and arm processor pass through data bus, address wire and control signal wire interconnect, arm processor reads the data in real time among the FPGA by interrupt mode, carrying out data analysis through this arm processor handles, with the state on the fieldbus link, warning message and be linked at equipment state on the fieldbus link, warning message shows by Man Machine Interface, simultaneously warning message is input to FPGA, upload in the fieldbus link, handle by digital control system.
Man Machine Interface provides the information input function, the information of input is after the arm processor analyzing and processing, arm processor writes data by interrupt mode in real time to FPGA, realizes the sending function of Frame in FPGA, uploads in the fieldbus link through the field bus communication interface.
This device also comprises network communication interface, download interface module, parameter configuration/display module.
Introducing each module concrete function below in detail realizes:
(1) arm processor
Arm processor is the processing core of this device, and Fig. 2 is an arm processor specific implementation synoptic diagram, and this arm processor comprises data storage cell, data analysis unit, man-machine interaction unit.Information by the human-computer interaction interface input is input to man-machine interaction unit, is stored in the data storage cell, and this data storage cell also is used for storing the data that FPGA imports.This data storage cell is realized by the memory management in the arm processor.Data analysis unit is carried out analyzing and processing to the data of data cell stores, this unit comprises bus links monitoring subelement and device status monitoring subelement, described bus links monitoring subelement carries out analyzing and processing to network structure on the fieldbus link and running status, and described device status monitoring subelement carries out analyzing and processing to the status information of equipment that is linked on the fieldbus link.The result of analyzing and processing outputs to human-computer interaction interface by man-machine interaction unit and shows, simultaneously the warning message that produces is input to the FPGA module, uploads to fieldbus link, is handled by digital control system.
A, bus links monitoring subelement
This bus links monitoring subelement monitoring Network Architecture of Fieldbus and running status, judge by the network state zone bit in the bus links layer data whether bus network breaks down, and the status information of fault is input to man-machine interaction unit, simultaneously if break down, warning message is uploaded to fieldbus link, handle by digital control system; This bus links monitoring subelement can judge whether receive bus data and whether receive bus data in the unit communication cycle in a plurality of units communication cycle by the bus links layer data, and status information is input to man-machine interaction unit, simultaneously if break down, warning message is uploaded to fieldbus link, handle by digital control system.
B, device status monitoring subelement
This device status monitoring subelement is by judging the error flag position judgment device state of each equipment in the bus, and the status information of fault is input to man-machine interaction unit, if break down, warning message is uploaded to fieldbus link simultaneously, handle by digital control system; This device status monitoring subelement is by reading data in link layer frame in the bus, corresponding data link layer protocol and application layer protocol, the judgment device state, and status information is input to man-machine interaction unit, simultaneously if break down, warning message is uploaded to fieldbus link, handle by digital control system.
Fig. 3 is the device status monitoring functional schematic: wherein: initial state: after system powered on, system entered initial state; After system carried out default configuration, enter waiting state; Waiting state: in waiting state, the look-at-me of system wait FPGA; The data interaction attitude: in this state, processor and FPGA carry out data interaction, read monitor data, and send monitored instruction; Attitude is handled in monitoring: in this state, the monitor data that processor processing reads is also made judgement; Man-machine interaction refresh mode: in this state, upgrade human-machine interaction data; Finish attitude: in this state, stop monitoring.
Each state transition condition:
E0: carry out system configuration, comprise slave station number and slave station type;
E1: receive look-at-me;
E2: reading and writing data complement mark;
E3: data processing complement mark;
E4; Receive and stop monitored instruction;
E5: human-machine interaction data upgrades complement mark;
(2) FPGA module
The FPGA module is linked in the fieldbus link by the field bus communication interface, realizes the collection and the sending function of Frame, and will gather with data storage to be sent in FPGA.Fig. 4 is a FPGA module specific implementation synoptic diagram, and this module comprises data storage cell, data acquisition unit, data transmission unit.
Data storage cell is the data of storage of collected and stores the data that need upload in the fieldbus link, comprises the acquired data storage subelement and upload the data buffer.
The reception data enable position that data acquisition unit produces according to the PHY chip, the device link layer data of all-links on bus duplicated in download, be saved in described data storage cell, and, send and receive data complement mark position according to the reception data enable position that this PHY chip produces.
Data transmission unit in fieldbus link, sends data after handling to the data upload of uploading the data buffer to the equipment of digital control system and link.Data upload according to upload sign with the data upload in the data buffer to bus links.Uploading flag and be written among the FPGA by ARM, to upload the home position be 1, when not needing to upload data among the AMR, is 0 uploading the mark position when needing to upload data among the ARM; The FPGA circular test is uploaded flag, when uploading flag and be 1, uploading in the data buffer data upload in fieldbus link; When uploading flag and be 0, the data that receive are not processed directly be forwarded in the fieldbus link.
(3) Man Machine Interface
Man Machine Interface is realized Presentation Function by LCD.This Man Machine Interface is under arm processor man-machine interaction unit WinCE operating system environment, and state after the arm processor data analysis unit handled and warning message show in close friend's interface mode.Man Machine Interface provides the function of information input, is input to arm processor.
Man Machine Interface comprises that the fieldbus link status information shows, the fieldbus link warning message shows, status information of equipment shows, equipment alarm information shows, configuration information is imported, the emergence message input.
(4) field bus communication interface
The field bus communication interface comprises photoelectric conversion module and PHY chip.Physical layer light signal in the fieldbus link is converted to electric signal through photoelectric conversion module, offers the PHY chip, and the PHY chip is converted to the link layer data to the differential signal that receives and is input to the FPGA module.The link layer data of FPGA module output are converted to differential signal through the PHY chip, are converted to the Physical layer light signal through photoelectric conversion module and are input in the fieldbus link.
(5) network communication interface
Network communication interface is connected with arm processor, realizes that Ethernet data is shared, comprises RJ-45 interface, isolating transformer, network PHY chip.The data of internet are input to isolating transformer through the RJ-45 interface, and isolating transformer is input to the network PHY chip after realizing Signal Spacing, are input to arm processor after the conversion of network PHY chip signal.Data in the arm processor are input to isolating transformer after the conversion of network PHY chip signal, isolating transformer is transferred to the internet through the RJ-45 interface after realizing Signal Spacing.
(6) download interface module
The download interface module is connected with arm processor, for arm processor provides data download easily and emulation interface, comprises usb communication module, serial port module, jtag interface, FLASH interface.
(7) parameter configuration/display module
Parameter configuration/display module is connected with FPGA, realizes the configurable and real-time Presentation Function of monitoring parameter, and this module comprises that button input and 8 sections charactrons show.
Claims (8)
1. fieldbus link real time monitoring apparatus based on ARM, be used for the equipment that links on link layer data and the link is monitored in real time, this device comprises arm processor, FPGA module, field bus communication interface and human-computer interaction interface, described FPGA module is connected by data bus, address wire and control signal wire with described arm processor, the field bus communication interface is connected with the FPGA module, and human-computer interaction interface is connected with arm processor;
Data on the fieldbus link download in the described FPGA module through described field bus communication interface, in this FPGA module, realize the collection of Frame, described arm processor reads the data in the FPGA module in real time, handling the back by analysis obtains state, the warning message on the fieldbus link and is linked at equipment state and warning message on the fieldbus link, and by described human-computer interaction interface demonstration, simultaneously the warning message that produces is input to the FPGA module, uploads in the fieldbus link; In addition, input information is imported described arm processor by described human-computer interaction interface, after handling by analysis, writes in the described FPGA module, realizes the transmission of data in this FPGA module, and uploads in the fieldbus link through the field bus communication interface.
2. supervising device according to claim 1, it is characterized in that, described arm processor comprises the data storage cell that is electrically connected successively, data analysis unit and man-machine interaction unit, described data storage cell is used to store data, it is realized by the memory management in the arm processor, described data analysis unit is carried out analyzing and processing to the data that read and store, described man-machine interaction unit is connected with described human-computer interaction interface communication, be used for described data analysis unit result is outputed to described human-computer interaction interface, and receive data from described human-computer interaction interface input to store described data storage cell into.
3. supervising device according to claim 1 and 2 is characterized in that, described data analysis unit comprises bus links monitoring subelement and device status monitoring subelement, wherein,
Described bus links monitoring subelement is used for network structure on the fieldbus link and running status are carried out analyzing and processing, judge by the network state zone bit in the bus links layer data whether bus network breaks down, and the status information of fault is input to man-machine interaction unit, if break down, warning message is uploaded to fieldbus link simultaneously;
Described device status monitoring subelement is used for the status information of equipment that is linked on the fieldbus link is carried out analyzing and processing, it is by reading data in link layer frame in the bus, corresponding data link layer protocol and application layer protocol, come the judgment device state, and status information is input to man-machine interaction unit, if break down, the equipment alarm information uploading is arrived fieldbus link simultaneously.
4. supervising device according to claim 1 and 2 is characterized in that, described FPGA module comprises the data acquisition unit that connects successively, data storage cell and data transmission unit; Wherein, described data storage cell is used for the data and the data that need upload to fieldbus link of storage of collected; The reception data enable position that described data acquisition unit produces according to the PHY chip, the device link layer data of all-links on bus duplicated in download, be saved in described data storage cell, and, send and receive data complement mark position according to the reception data enable position that this PHY chip produces; Described data transmission unit in fieldbus link, sends to the equipment of digital control system and link to the data upload after handling.
5. supervising device according to claim 1 and 2, it is characterized in that, described field bus communication interface comprises photoelectric conversion module and PHY chip, Physical layer light signal in the fieldbus link is converted to electric signal through photoelectric conversion module, offer the PHY chip, the PHY chip is converted to the link layer data to the differential signal that receives and is input to the FPGA module; The link layer data of FPGA module output are converted to differential signal through the PHY chip, are converted to the Physical layer light signal through photoelectric conversion module again and are input in the fieldbus link.
6. supervising device according to claim 1 and 2, it is characterized in that described supervising device also comprises network communication interface, it is connected with arm processor, the realization Ethernet data is shared, and this network communication interface comprises RJ-45 interface, isolating transformer and network PHY chip.
7. supervising device according to claim 1 and 2, it is characterized in that, described supervising device also comprises the download interface module, this download interface module is connected with arm processor, download and emulation interface for arm processor provides data, this download interface module comprises usb communication module, serial port module, jtag interface and FLASH interface.
8. supervising device according to claim 1 and 2 is characterized in that described supervising device also comprises parameter configuration/display module, and this parameter configuration/display module is connected with FPGA, is used to realize the configurable and real-time Presentation Function of monitoring parameter.
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| CN201120073564XU CN202058020U (en) | 2011-03-18 | 2011-03-18 | Field bus link real-time monitoring device based on ARM |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102117067A (en) * | 2011-03-18 | 2011-07-06 | 武汉华中数控股份有限公司 | Real-time monitoring device for field bus link based on ARM (Advanced RISC Machines) |
| CN103480885A (en) * | 2013-09-10 | 2014-01-01 | 嘉兴绵嘉数控设备有限公司 | Multistation drilling and tapping machine tool control system and multistation drilling and tapping machine tool control method |
| CN103557361A (en) * | 2013-11-04 | 2014-02-05 | 北京航空航天大学 | Digital controller of proportional valve |
-
2011
- 2011-03-18 CN CN201120073564XU patent/CN202058020U/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102117067A (en) * | 2011-03-18 | 2011-07-06 | 武汉华中数控股份有限公司 | Real-time monitoring device for field bus link based on ARM (Advanced RISC Machines) |
| CN102117067B (en) * | 2011-03-18 | 2012-08-22 | 武汉华中数控股份有限公司 | Real-time monitoring device for field bus link based on ARM (Advanced RISC Machines) |
| CN103480885A (en) * | 2013-09-10 | 2014-01-01 | 嘉兴绵嘉数控设备有限公司 | Multistation drilling and tapping machine tool control system and multistation drilling and tapping machine tool control method |
| CN103557361A (en) * | 2013-11-04 | 2014-02-05 | 北京航空航天大学 | Digital controller of proportional valve |
| CN103557361B (en) * | 2013-11-04 | 2016-03-30 | 北京航空航天大学 | A kind of digital controller of proportional valve |
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Granted publication date: 20111130 Termination date: 20140318 |