CN201886332U - Power electronic control system based on MCU and FPGA - Google Patents

Power electronic control system based on MCU and FPGA Download PDF

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CN201886332U
CN201886332U CN2010206484513U CN201020648451U CN201886332U CN 201886332 U CN201886332 U CN 201886332U CN 2010206484513 U CN2010206484513 U CN 2010206484513U CN 201020648451 U CN201020648451 U CN 201020648451U CN 201886332 U CN201886332 U CN 201886332U
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mcu
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chip
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赵剑锋
季振东
倪喜军
于鹏
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Southeast University
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Abstract

一种基于MCU和FPGA的电力电子控制系统,包括主系统模块、开关电源模块和信号调理模块,主系统模块中MCU芯片和FPGA芯片连接组成MCU+FPGA的处理器结构,MCU芯片外围连接Flash芯片、ADC电路、CAN口、编码器接口、RS232和RS485、SD/MMC卡、铁电存储器、数字输出、数字输入和光纤接口,主系统模块还设有电源模块,电源模块连接开关电源模块,ADC电路连接信号调理模块。本实用新型控制系统具有高速的计算能力、较好的扩展性和可靠性,并广泛适用于大功率电力电子领域。

Figure 201020648451

A power electronic control system based on MCU and FPGA, including main system module, switching power supply module and signal conditioning module, the MCU chip and FPGA chip in the main system module are connected to form the processor structure of MCU+FPGA, and the periphery of the MCU chip is connected to the Flash chip , ADC circuit, CAN port, encoder interface, RS232 and RS485, SD/MMC card, ferroelectric memory, digital output, digital input and optical fiber interface, the main system module also has a power module, the power module is connected to the switching power supply module, ADC The circuit is connected to the signal conditioning module. The control system of the utility model has high-speed computing capability, good expansibility and reliability, and is widely applicable to the field of high-power electric electronics.

Figure 201020648451

Description

一种基于MCU和FPGA的电力电子控制系统A Power Electronic Control System Based on MCU and FPGA

技术领域technical field

本实用新型涉及大功率电力电子控制领域,尤其涉及一种可以在大功率电力电子领域广泛应用的控制系统,为一种基于MCU和FPGA的电力电子控制系统。The utility model relates to the field of high-power electric electronic control, in particular to a control system that can be widely used in the field of high-power electric electronic, which is a power electronic control system based on MCU and FPGA.

背景技术Background technique

大功率电力电子技术是是实现高效节能的关键所在,也是智能电网发展的技术基础。随着电力电子技术的发展,客观上对电力电子装置控制系统的实时性和鲁棒性的要求越来越高,也就对控制系统的设计和开发提出了很高的要求。目前大功率电力电子控制系统的开发和设计都是针对具体应用,这样设计出的控制系统不具有通用性。同时由于设计工作需要耗费大量的人力和财力,这样也造成了资源的浪费。数字化技术的发展,数字处理器的广泛应用为发展大功率电力电子控制系统提供很好的平台。High-power power electronics technology is the key to achieving high efficiency and energy saving, and it is also the technical basis for the development of smart grids. With the development of power electronics technology, objectively, the requirements for the real-time and robustness of the control system of power electronic devices are getting higher and higher, which also puts forward very high requirements for the design and development of the control system. At present, the development and design of high-power power electronic control systems are all aimed at specific applications, and the control systems designed in this way are not universal. At the same time, because the design work needs to consume a lot of manpower and financial resources, it also causes a waste of resources. The development of digital technology and the wide application of digital processors provide a good platform for the development of high-power power electronic control systems.

发明内容Contents of the invention

本实用新型要解决的问题是:需要具有通用性的电力电子控制系统,可以对大功率电力电子领域的装置实现可靠地通用化控制,更好地为智能电网提供技术保障。The problem to be solved by the utility model is: a universal power electronic control system is needed, which can realize reliable universal control of devices in the field of high-power power electronics, and better provide technical support for smart grids.

本实用新型的技术方案为:一种基于MCU和FPGA的电力电子控制系统,包括主系统模块、开关电源模块和信号调理模块,主系统模块中MCU芯片和FPGA芯片连接组成MCU+FPGA的处理器结构,MCU芯片外围连接Flash芯片、ADC电路、CAN口、编码器接口、RS232和RS485、SD/MMC卡、铁电存储器、数字输出、数字输入和光纤接口,主系统模块还设有电源模块,电源模块连接开关电源模块,ADC电路连接信号调理模块。The technical solution of the utility model is: a power electronic control system based on MCU and FPGA, including a main system module, a switching power supply module and a signal conditioning module, the MCU chip and the FPGA chip in the main system module are connected to form a MCU+FPGA processor Structure, MCU chip peripheral connection Flash chip, ADC circuit, CAN port, encoder interface, RS232 and RS485, SD/MMC card, ferroelectric memory, digital output, digital input and optical fiber interface, the main system module also has a power module, The power supply module is connected to the switching power supply module, and the ADC circuit is connected to the signal conditioning module.

Flash芯片和ADC电路通过数据地址总线与FPGA芯片和MCU芯片连接,SD/MMC卡与MCU芯片的SPI通讯口相连接,铁电存储器与MCU芯片的I2C接口相连。The Flash chip and the ADC circuit are connected to the FPGA chip and the MCU chip through the data address bus, the SD/MMC card is connected to the SPI communication port of the MCU chip, and the ferroelectric memory is connected to the I2C interface of the MCU chip.

本实用新型采用MCU+FPGA的处理器架构,MCU芯片主要完成数据采集、检测算法、控制算法等功能,FPGA芯片负责PWM数据生成和输出、开关量输入输出的管理与扩展等工作。MCU与FPGA之间的数据交互式通过FPGA内建的双口RAM实现的。信号调理电路、数字输出、数字输入、光纤接口可以根据实际使用需求通过接插件进行扩展。The utility model adopts the MCU+FPGA processor architecture, the MCU chip mainly completes functions such as data collection, detection algorithm, and control algorithm, and the FPGA chip is responsible for PWM data generation and output, management and expansion of switching input and output, etc. The data interaction between MCU and FPGA is realized through the built-in dual-port RAM of FPGA. The signal conditioning circuit, digital output, digital input, and optical fiber interface can be expanded through connectors according to actual usage requirements.

本实用新型的有益效果为:MCU+FPGA的处理器架构可很好的满足大功率电力电子控制系统的实时性、可靠性的要求,所设外围电路使本实用新型通用于大功率电力电子领域,节约了专门设计控制系统的开发成本,加快了开发周期。丰富可扩充的模拟量输入、数字输入输出口和光纤接口能满足大功率电力电子领域装置的各种要求。The beneficial effects of the utility model are: the MCU+FPGA processor framework can well meet the real-time and reliability requirements of the high-power power electronic control system, and the set peripheral circuit makes the utility model universally applicable in the field of high-power power electronics , which saves the development cost of specially designed control system and speeds up the development cycle. The rich and expandable analog input, digital input and output ports and optical fiber interface can meet various requirements of high-power power electronic devices.

附图说明Description of drawings

图1是本实用新型电力电子控制系统的原理框图。Fig. 1 is a functional block diagram of the power electronic control system of the utility model.

图2是本实用新型的硬件结构图。Fig. 2 is a hardware structural diagram of the present utility model.

图3(a)是本实用新型主系统模块中电源模块的原理图。Fig. 3(a) is a schematic diagram of the power supply module in the main system module of the present invention.

图3(b)是本实用新型主系统模块中MCU部分的原理图。Fig. 3 (b) is the schematic diagram of the MCU part in the main system module of the utility model.

图3(c)是本实用新型主系统模块中外扩Flash芯片、铁电存储器和SD/MMC的原理图。Fig. 3 (c) is the schematic diagram of external expansion Flash chip, ferroelectric memory and SD/MMC in the main system module of the present utility model.

图3(d)是本实用新型主系统模块中485的接口原理图。Fig. 3(d) is a schematic diagram of the interface of 485 in the main system module of the present invention.

图3(e)是本实用新型主系统模块中编码器接口原理图。Fig. 3(e) is a schematic diagram of the interface of the encoder in the main system module of the utility model.

图4是本实用新型MCU和ADC芯片之间的接口电路图。Fig. 4 is the interface circuit diagram between the utility model MCU and ADC chip.

图5是本实用新型数字量输出部分的原理图。Fig. 5 is a schematic diagram of the digital quantity output part of the utility model.

图6是本实用新型数字量输入部分的原理图。Fig. 6 is a schematic diagram of the digital quantity input part of the utility model.

图7是本实用新型光纤接口电路的原理图。Fig. 7 is a schematic diagram of the optical fiber interface circuit of the present invention.

具体实施方式Detailed ways

本实用新型整个装置采用MCU+FPGA的双处理器结构。MCU采用TI公司C2000系列最新的高速浮点处理器TMS320C28346,FPGA采用ALTERA公司cyclone系列的EP3C40。在数据采集上,3片6输入16位的高速ADC芯片AD7656完全能够满足大功率电力电子装置控制的精度与实时性的要求。充足的模拟量通道数除了可以采集输入输出的模拟量,亦可进行远程DCS的控制。The whole device of the utility model adopts the double processor structure of MCU+FPGA. The MCU adopts the latest high-speed floating-point processor TMS320C28346 of the C2000 series of TI Company, and the FPGA adopts the EP3C40 of the cyclone series of ALTERA Company. In data acquisition, three 6-input 16-bit high-speed ADC chips AD7656 can fully meet the precision and real-time requirements of high-power power electronic device control. Sufficient number of analog channels can not only collect input and output analog quantities, but also carry out remote DCS control.

图1是本实用新型控制系统的原理框图,MCU芯片主要完成AD控制、测速、控制算法、与远程计算机或PLC通讯等功能,FPGA芯片负责PWM数据生成和输出、光纤收发管理、开关量输入输出的处理、MCU与FPGA之间数据缓冲等工作。Fig. 1 is a functional block diagram of the control system of the present invention, the MCU chip mainly completes functions such as AD control, speed measurement, control algorithm, and remote computer or PLC communication, and the FPGA chip is responsible for PWM data generation and output, optical fiber transceiver management, switching input and output processing, data buffering between MCU and FPGA, etc.

图2是本实用新型实施的硬件结构图,其中包括:包括主系统模块、开关电源模块18和信号调理模块3,主系统模块中MCU芯片8和FPGA芯片9连接组成MCU+FPGA的处理器结构,MCU芯片8外围连接Flash 4、ADC电路5、CAN口6、编码器接口7、RS232和RS48510、SD/MMC卡11、铁电存储器12、数字输出13、数字输入14和光纤接口16,主系统模块还设有电源模块17,电源模块17连接开关电源模块18,ADC电路5连接信号调理模块3。Flash 4和ADC电路5通过数据地址总线15与FPGA芯片9和MCU芯片8连接,SD/MMC卡11与MCU芯片8的SPI通讯口相连接,铁电存储器12与MCU芯片8的I2C接口相连。本实用新型MCU芯片8优选TMS320C28346芯片,FPGA芯片9为EP3C40芯片。信号调理电路3、数字输出13、数字输入14、光纤接口16可以根据实际使用需求通过接插件进行扩展。Fig. 2 is the hardware structural diagram that the utility model implements, and wherein comprises: comprise main system module, switching power supply module 18 and signal conditioning module 3, MCU chip 8 and FPGA chip 9 are connected to form the processor structure of MCU+FPGA in the main system module , MCU chip 8 peripheral connection Flash 4, ADC circuit 5, CAN port 6, encoder interface 7, RS232 and RS48510, SD/MMC card 11, ferroelectric memory 12, digital output 13, digital input 14 and optical fiber interface 16, the main The system module is also provided with a power module 17 , the power module 17 is connected to the switching power supply module 18 , and the ADC circuit 5 is connected to the signal conditioning module 3 . Flash 4 and ADC circuit 5 are connected with FPGA chip 9 and MCU chip 8 through data address bus 15, SD/MMC card 11 is connected with the SPI communication port of MCU chip 8, and ferroelectric memory 12 is connected with the I2C interface of MCU chip 8. The utility model MCU chip 8 is preferably a TMS320C28346 chip, and the FPGA chip 9 is an EP3C40 chip. The signal conditioning circuit 3, the digital output 13, the digital input 14, and the optical fiber interface 16 can be expanded through connectors according to actual usage requirements.

如图3(a)、图3(b)、图3(c)、图3(d)、图3(e)所示,MCU芯片TMS320C28346通过数据地址总线15的数据总线A19-A0和地址总线D15-D0与外部Flash芯片SST39VF1601相连;通过SPI-A与SD/MMC卡相连;通过I2C-A与铁电存储芯片FM24CL64相连;通过SCI-A与485接口电路相连接;通过EQEPA模块与编码器接口相连。其中外部Flash芯片用于MCU程序和数据的存储,SD/MMC卡用于运行数据的记录和监测,铁电存储芯片用于重用装置重要整定值的存储,485接口用于工业现场的远程监控,编码器接口用于测量电机的转速以便用于控制算法。As shown in Figure 3(a), Figure 3(b), Figure 3(c), Figure 3(d), and Figure 3(e), the MCU chip TMS320C28346 passes the data bus A19-A0 and the address bus of the data address bus 15 D15-D0 is connected with external Flash chip SST39VF1601; connected with SD/MMC card through SPI-A; connected with ferroelectric memory chip FM24CL64 through I2C-A; connected with 485 interface circuit through SCI-A; connected with encoder through EQEPA module The interface is connected. Among them, the external Flash chip is used for the storage of MCU programs and data, the SD/MMC card is used for the recording and monitoring of operating data, the ferroelectric memory chip is used for the storage of important setting values of reused devices, and the 485 interface is used for remote monitoring of industrial sites. The encoder interface is used to measure the rotational speed of the motor for use in the control algorithm.

图4所示为ADC芯片AD7656与TMS320C28346的接口电路,为了便于3片ADC芯片的连接和数据的处理,采样脉冲CONVSTA、CONVSTB、CONVSTC和片选信号CS通过EP3C40处理后进行连接。Figure 4 shows the interface circuit between ADC chip AD7656 and TMS320C28346. In order to facilitate the connection and data processing of the three ADC chips, the sampling pulses CONVSTA, CONVSTB, CONVSTC and chip select signal CS are processed by EP3C40 and then connected.

图5、图6、图7所示的分别为数字量输出、数字量输入和光纤接口电路。它们与EP3C40相连,可以根据实际需要通过接插件进行扩展使用。Figure 5, Figure 6, and Figure 7 show the digital output, digital input and optical fiber interface circuits respectively. They are connected with EP3C40, and can be expanded and used through connectors according to actual needs.

Claims (2)

1. power electronics control system based on MCU and FPGA, it is characterized in that comprising the main system module, switch power module (18) and signal condition module (3), MCU chip (8) and fpga chip (9) connect to form the processor structure of MCU+FPGA in the main system module, the peripheral Flash chip (4) that connects of MCU chip (8), adc circuit (5), CAN mouth (6), encoder interfaces (7), RS232 and RS485 (10), SD/MMC card (11), ferroelectric memory (12), numeral output (13), numeral input (14) and optical fiber interface (16), the main system module also is provided with power module (17), power module (17) connects switch power module (18), and adc circuit (5) connects signal condition module (3).
2. a kind of power electronics control system according to claim 1 based on MCU and FPGA, it is characterized in that Flash chip (4) is connected with MCU chip (8) with fpga chip (9) by data address bus (15) with adc circuit (5), SD/MMC card (11) is connected with the SPI communication port of MCU chip (8), and ferroelectric memory (12) links to each other with the I2C interface of MCU chip (8).
CN2010206484513U 2010-12-09 2010-12-09 Power electronic control system based on MCU and FPGA Expired - Fee Related CN201886332U (en)

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103197586A (en) * 2013-04-11 2013-07-10 南京盘谷电气科技有限公司 Automatic identification technology of distribution network terminal based on microprocessor
CN104281536A (en) * 2014-09-28 2015-01-14 株洲南车时代电气股份有限公司 Device and method for separated storage of data
CN106527272A (en) * 2016-12-01 2017-03-22 中国东方电气集团有限公司 Power electronic general control system
CN110968001A (en) * 2019-12-02 2020-04-07 杭州沃镭智能科技股份有限公司 High-speed analog acquisition board card based on FPGA + MCU
CN114355827A (en) * 2022-03-14 2022-04-15 长江三峡能事达电气股份有限公司 Autonomous controllable industrial control device
CN114545842A (en) * 2022-04-27 2022-05-27 长江三峡能事达电气股份有限公司 Autonomous controllable distributed excitation control module

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103197586A (en) * 2013-04-11 2013-07-10 南京盘谷电气科技有限公司 Automatic identification technology of distribution network terminal based on microprocessor
CN104281536A (en) * 2014-09-28 2015-01-14 株洲南车时代电气股份有限公司 Device and method for separated storage of data
CN104281536B (en) * 2014-09-28 2019-03-01 株洲南车时代电气股份有限公司 A kind of device and method of data separating storage
CN106527272A (en) * 2016-12-01 2017-03-22 中国东方电气集团有限公司 Power electronic general control system
CN106527272B (en) * 2016-12-01 2023-10-03 中国东方电气集团有限公司 Universal control system for power electronics
CN110968001A (en) * 2019-12-02 2020-04-07 杭州沃镭智能科技股份有限公司 High-speed analog acquisition board card based on FPGA + MCU
CN114355827A (en) * 2022-03-14 2022-04-15 长江三峡能事达电气股份有限公司 Autonomous controllable industrial control device
CN114545842A (en) * 2022-04-27 2022-05-27 长江三峡能事达电气股份有限公司 Autonomous controllable distributed excitation control module
CN114545842B (en) * 2022-04-27 2022-08-12 长江三峡能事达电气股份有限公司 Autonomous controllable distributed excitation control module

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