CN201491318U - Two-wire system LED drive circuit and LED drive system - Google Patents

Two-wire system LED drive circuit and LED drive system Download PDF

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Publication number
CN201491318U
CN201491318U CN2009200623628U CN200920062362U CN201491318U CN 201491318 U CN201491318 U CN 201491318U CN 2009200623628 U CN2009200623628 U CN 2009200623628U CN 200920062362 U CN200920062362 U CN 200920062362U CN 201491318 U CN201491318 U CN 201491318U
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data
differential
led
signal
interface
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钱忠东
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Shenzhen Caituo Technology Development Co ltd
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Shenzhen Caituo Technology Development Co ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B20/00Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
    • Y02B20/40Control techniques providing energy savings, e.g. smart controller or presence detection

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Abstract

The utility model relates to the LED drive field and discloses a two-wire system LED drive circuit and an LED drive system. The LED drive circuit comprises a differential receiving interface, a signal analyzing module, a signal regenerating module, a PWM generator, a lamp cluster drive circuit, a clock generator and a differential transmitting interface, wherein the signal analyzing module is used for generating pulse width modulation data according to differential signals; the PWM generator is used for obtaining pulse width modulation output with preset duty ratio according to a clock of the clock generator; the clock generator is used for timing according to outside reference time; the lamp cluster drive circuit is used for receiving the pulse width modulation output so as to drive a present-level LED lamp cluster; the signal regenerating module is used for shaping residual data of the received pulse width modulation data except data displayed by the present-level lamp cluster to obtain the next-level output data, and also transmitting the next-level output data to the differential transmitting interface; and the differential transmitting interface is used for transmitting the next-level output data to a next-level circuit in a differential form.

Description

Two-wire system LED drive circuit and LED drive system
Technical Field
The utility model relates to a LED drive field especially relates to a LED drive circuit, LED actuating system.
Background
In the application of the existing LED lamp tube redisplay field, a driving circuit of an LED generally adopts a serial structure, and generally needs to transmit 4 signals, namely DATA (DATA), shift (CLK), latch (STB) and Enable (EN), and except that the DATA adopts a daisy-chained topology form, other signals all need to be added with the driving circuit.
Specifically, as shown in fig. 1, a controller 101 sends out data, shift, latch, and enable signals, the controller 101 transmits the shift, latch, and enable control signals to a first signal driving chip 102, the controller 101 transmits the data to an adjacent first string and conversion chip 103, the first signal driving chip 102 generates enough driving signals according to the control signals to be provided to the first string and conversion chip 103 electrically connected to the first signal driving chip 102 for conversion, the driving signals are transmitted to a first light cluster 104, and the first light cluster 104 displays the data according to the control signals; meanwhile, the first serial-to-parallel conversion chip 103 transmits data (new data) not shown to the second serial-to-parallel conversion chip 1032 according to the data displayed by the first lamp cluster 104, the first signal driving chip 102 transmits the shift, latch, and enable control signals to the second signal driving chip 1031, and so on to implement the control driving of the LEDs in a cascaded signal transmission manner.
In actual light engineering, a certain distance (several centimeters to several tens of meters) is often separated between each group of LED clusters, and at the same time, as many clusters as possible need to be cascaded on a single string in order to reduce the control cost, and this mode has the following problems in practical application:
1. 4 metal wires are needed to transmit signals among all levels of lamp clusters, the transmission cost is high when the distance is long, and the requirements on the plugging piece are correspondingly improved;
2. in practical application, the cost problem is considered, each metal wire cannot be shielded independently, and signals have crosstalk with each other, so that error codes can occur to the signals transmitted to the next stage;
3. even if the interference problem is neglected, the signal is inevitably deformed in the cascading process due to the transmission effects of distributed capacitance, inductance and the like of the metal wire (and the deformation is accumulated step by step), particularly the Clock (CLK) signal with the highest frequency is cascaded to a certain number and even is annihilated;
4. the conventional driving chip must continuously refresh data to realize gray scale display, which increases the cost of the controller 101, and is limited by the data rate in the transmission channel, making it difficult to realize high-order gray scale display.
SUMMERY OF THE UTILITY MODEL
The utility model discloses a first aim at: provided is an LED drive circuit which is advantageous in improving the anti-interference performance of signal transmission and improving the LED display quality.
The utility model discloses second aim at: provided is an LED driving system which is beneficial to improving the anti-interference performance of signal transmission and improving the LED display quality.
The utility model provides a pair of LED drive circuit, include: a differential receiving interface, a signal analysis module, a signal regeneration module, a PWM generator, a lamp cluster driving circuit, a clock generator and a differential sending interface, wherein,
the differential receiving interface is used for receiving external differential signals;
the signal analysis module is electrically connected with the differential receiving interface and used for generating pulse width modulation data according to the differential signal;
the PWM generator is respectively electrically connected with the signal analysis module and the clock generator and is used for obtaining pulse width modulation output with set duty ratio according to the clock of the clock generator, wherein the clock generator is used for timing according to external reference time;
the lamp cluster driving circuit is electrically connected with the PWM generator and used for receiving pulse width modulation output to drive the LED lamp cluster of the current stage;
the signal regeneration module is electrically connected with the signal module and is used for shaping the received pulse width modulation data except the data displayed by the lamp cluster at the current stage to obtain lower-stage output data and transmitting the lower-stage output data to the differential sending interface;
the differential sending interface is electrically connected with the signal regeneration module and is used for sending the lower-level output data to a next-level circuit in a differential mode.
Optionally, the method further comprises: the device comprises a serial input interface, a logic selection module and a serial data output interface; wherein,
the serial input interface is used for accessing external serial data;
the logic selection module is arranged among the serial input interface, the logic selection module and the signal analysis module and is used for selecting whether the serial data or the differential data is input to the signal analysis module;
the serial data output interface is electrically connected with the signal regeneration module and is used for outputting in a serial mode: and the signal regeneration module is used for regenerating data obtained by the data.
Optionally, the lamp cluster driving circuit is: a constant current driving circuit.
Optionally, the clock generation circuit is: a ring oscillator circuit.
Optionally, the LED driving circuit is integrated in an integrated circuit chip.
The utility model provides an LED driving system, which comprises a multi-stage LED lamp cluster,
the LED lamp clusters at all levels are respectively connected with any one of the LED driving circuits,
the LED drive circuits of all stages are respectively and electrically connected with the LED drive circuit of the previous stage and the LED drive circuit of the next stage.
Therefore, the following beneficial effects exist by applying the technical scheme of the embodiment:
first, because the differential transmission technology is adopted in the data transmission of this embodiment, the signal of the internal single line is changed into the two-line signal with strong anti-interference performance, so even if no evaluation is added, the common mode interference and the transmission effect in the signal transmission process can be effectively suppressed, which is not only beneficial to reducing the signal interference in the transmission process, but also beneficial to improving the transmission quality, thereby improving the quality of the LED display and the luminous uniformity (which is closely related to the purity of the driving signal), and is beneficial to reducing the cost of the transmission line compared with the prior art.
Secondly, the PWM generator is arranged between the signal analysis module and the lamp cluster driving circuit, high-gray-scale display becomes possible through pulse width modulation, and experiments prove that 1024-level gray-scale display can be completely realized by applying the technical scheme.
Thirdly, a clock generating circuit is arranged in the LED driving circuit, the PWM generator outputs according to the clock signal, and a uniform clock reference can be selected in the LED driving system in application, so that the clock in the system can be kept synchronous, the data display of each level of LED lamp clusters has better synchronism, and the display quality is further improved. In addition, the use of a common clock reference is also beneficial for reducing the number of transmitted signals.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, do not constitute a limitation of the invention, and in which:
FIG. 1 is a schematic diagram of a conventional LED control circuit in the prior art;
fig. 2 is a schematic diagram of a structure of an LED control circuit provided in embodiment 1 of the present invention;
fig. 3 is a schematic diagram of a single-line control timing sequence of the LED control circuit provided in fig. 1 according to embodiment 1 of the present invention;
fig. 4 is a schematic diagram of a structure of an LED control circuit provided in embodiment 2 of the present invention;
fig. 5 is a schematic structural diagram of an LED light cluster control system provided in embodiment 3 of the present invention.
Detailed Description
The invention will be described in detail with reference to the drawings and specific embodiments, wherein the exemplary embodiments and descriptions are provided to explain the invention, but not to limit the invention.
Example 1:
referring to fig. 2, the LED driving circuit provided in this embodiment mainly includes: the circuit comprises a differential receiving interface 201, a signal analysis module 202, a signal regeneration module 206, a PWM generator 203, a lamp cluster driving circuit 204, a clock generator 205 and a differential transmitting interface 207.
The functions of each component and the connection relation of each component are as follows:
the differential receiving interface 201 is used for receiving external differential signals; the signal analysis module 202 is electrically connected to the differential receiving interface 201, and the signal analysis module 202 is configured to generate Pulse Width Modulation (PWM) data according to a differential signal input by the differential receiving interface 201; the PWM generator 203 is connected between the signal analyzing module 202 and the lamp cluster driving circuit 204, the PWM generator 203 is further electrically connected to the clock generator 205, the PWM generator 203 is configured to output pulse width modulation data to the lamp cluster driving circuit 204 according to a set duty ratio (determined according to a clock signal) according to a clock of the clock generator 205; the clock generator 205 is used for providing a clock signal in the infochip according to the external reference time. The lamp cluster driving circuit 204 is electrically connected with the LED lamp cluster of the current stage and is used for driving the LED lamp cluster of the current stage; the signal regeneration module 206 is electrically connected to the signal module, and is configured to receive pulse width modulation data corresponding to the serial data generated by the signal analysis module 202, shape remaining data of the received pulse width modulation data excluding data displayed by the lamp cluster of the current stage, obtain a data signal output to the next stage, and transmit the data signal to the differential transmission interface 207; the differential transmission interface 207 is electrically connected to the signal regeneration module 206, and is configured to transmit the data signal transmitted to the interface 207 by the signal regeneration module 206 to a next stage circuit in a differential manner.
The operating principle of the LED driving circuit of this embodiment is that the differential receiving interface 201 receives the input differential signal: the two-out-of-one logic selection module can be provided with a single-wire mode and a double-wire mode through set logic, and the signal analysis module 202 generates PWM data according to the input differential signal and serial data; the PWM generator 203 receives the PWM data from the signal analyzing module 202 and implements the output with a predetermined duty ratio according to the clock signal, and since the PWM data width determines the output accuracy, a three-way 10-bit format, i.e. 1024-level gray scale, can be adopted in this embodiment, and in practice, can be designed to be 8 bits, 12 bits, or 16 bits as required. The lamp cluster driving circuit 204 drives the LED lamp cluster of this stage according to the output of the PWM generator 203. Meanwhile, the signal regeneration module 206 shapes the remaining data and forwards the shaped data to the differential transmission interface 207, and the differential transmission interface 207 transmits the signal to the LED lamp cluster driving circuit 204 of the next stage to drive the LED lamp cluster of the next stage, where the signal analysis module 202 inputs the serial signal except for the display data of the current stage (output with 0 level), and the LED lamp cluster driving circuit 204 of the next stage and the principle can be the same as those shown in fig. 2 and 3.
Referring to fig. 3, in this embodiment, a 0 level requiring a long time is used as a start frame (301), the time span of which is larger than the period of each data BIT, and the data rate in the design is not less than 40KBPS, so the 0 level time should be more than 25 microseconds, and the clock frequency error between chips is considered, and we generally take more than 40 microseconds. Referring to DI, valid data is composed of 30 data bits each of which is composed of a section of high level and a section of low level, and by measuring the time width of the high and low levels, the data is 1 if the high level time is longer than the low level time, and is 0 otherwise. In fig. 3, 301 represents data displayed in the current stage of the lamp cluster, and the next stage signal obtained by the signal regeneration unit 206 is represented by Do in the figure, where the signal DI in the input sequence of the signal regeneration module 206 is removed from the data (301) belonging to itself (output at 0 level instead), and the remaining data is shaped (Do) and forwarded to the next stage.
Data in which a signal having a point score of more than T0 is designated as "1", data in which a signal having a level of less than T0 is designated as "0" may be set during signal transmission,
the LED driving circuit can be integrated in an integrated circuit chip (IC), and in practical application, various functions can be realized only by applying the chip, so that the LED driving circuit is convenient and quick to install and implement.
Therefore, the following beneficial effects exist by applying the technical scheme of the embodiment:
first, because the differential transmission technology is adopted in the data transmission of this embodiment, the signal of the internal single line is changed into the two-line signal with strong anti-interference performance, so even if no evaluation is added, the common mode interference and the transmission effect in the signal transmission process can be effectively suppressed, which is not only beneficial to reducing the signal interference in the transmission process, but also beneficial to improving the transmission quality, thereby improving the quality of the LED display and the luminous uniformity (which is closely related to the purity of the driving signal), and is beneficial to reducing the cost of the transmission line compared with the prior art.
Secondly, in the present embodiment, the PWM generator 203 is disposed between the signal analyzing module 202 and the lamp cluster driving circuit 204, and high gray scale display becomes possible through pulse width modulation, and experiments prove that 1024-level gray scale display can be completely realized by applying the technical solution.
Thirdly, a clock generating circuit is arranged in the LED driving circuit, the PWM generator 203 outputs according to the clock signal, and a uniform clock reference can be selected in the LED driving system in application, so that the clock in the system can be kept synchronous, the data display of each level of LED lamp clusters has better synchronism, and the display quality is further improved. In addition, the use of a common clock reference is also beneficial for reducing the number of transmitted signals.
In this embodiment, a ring oscillator circuit may be used, with a frequency of 10 megabits, an error of about plus or minus 20% based on the semiconductor process constraints, and a divided clock to the PWM generator 203 to generate a gray scale output.
In this embodiment, a constant current driving circuit can be used as the lamp cluster driving circuit 204 in the LED driving circuit, which is beneficial to improving the light emitting brightness of LEDs and the like and ensuring the light emitting uniformity thereof.
Example 2:
referring to fig. 4, the LED driving circuit of the present embodiment is different from the embodiment in the following points:
in order to further improve the compatibility of the LED driving circuit and make the circuit more adaptable, a serial input interface 401 for receiving external serial data and a serial output interface 403 for sending serial data to the outside in a serial sending manner may be further provided in this embodiment, the serial output interface 403 is electrically connected to the signal regeneration module 206, and signals transmitted from the signal regeneration module 206 to this interface are sent to the next stage in a serial manner. In addition, a logic selection module 402 is designed among the serial input interface 401, the differential input interface 201 and the signal analysis module 202.
In this way, when the application is performed, if the signal transmission of the front stage adopts a serial transmission mode, the serial input interface 401 and the signal analysis module 202 can be connected through the logic selection module 402, and an external serial signal is accessed, and the signal processing after the signal analysis module 202 refers to the foregoing description; if the signal transmission of the previous stage adopts a differential transmission mode, the logic selection module 402 may be used to connect the differential receiving interface and the signal analysis module 202, and access the external differential signal, and the signal processing after the signal analysis module 202 refers to the foregoing description.
By adopting the design of fig. 4, the compatibility of the LED driving circuit can be improved, and the LED driving circuit is further convenient to implement and apply.
Example 3:
referring to fig. 5, the LED driving system in this embodiment includes a multi-stage LED lamp cluster 502 and a multi-stage LED driving circuit 501 (each LED driving circuit 501 may be any one of embodiment 1 or embodiment 2, which may be, but is not limited to, a chip), in this system, a stage of LED driving circuit 501 is configured for each stage of LED lamp cluster 502, and each stage of LED driving circuit 501 is electrically connected to a previous stage of LED driving circuit 501 and a next stage of LED driving circuit 501.
As can be seen from the above, each stage of the LED driving circuit 501 of this embodiment has the beneficial effects described in embodiments 1 and 2, so that in a system formed by using the LED driving circuit 501, the number of signal transmission lines can be greatly reduced in a larger lighting project, the LED display performance can be improved, and the construction cost can be reduced.
The technical solutions provided by the embodiments of the present invention are described in detail above, and the principles and embodiments of the present invention are explained herein by using specific examples, and the descriptions of the above embodiments are only applicable to help understand the principles of the embodiments of the present invention; meanwhile, for a person skilled in the art, according to the embodiments of the present invention, there may be variations in the specific implementation manners and application ranges, and in summary, the content of the present description should not be construed as a limitation to the present invention.

Claims (6)

1. An LED drive circuit, comprising: a differential receiving interface, a signal analysis module, a signal regeneration module, a PWM generator, a lamp cluster driving circuit, a clock generator and a differential sending interface, wherein,
the differential receiving interface is used for receiving external differential signals;
the signal analysis module is electrically connected with the differential receiving interface and used for generating pulse width modulation data according to the differential signal;
the PWM generator is respectively electrically connected with the signal analysis module and the clock generator and is used for obtaining pulse width modulation output with set duty ratio according to the clock of the clock generator, wherein the clock generator is used for timing according to external reference time;
the lamp cluster driving circuit is electrically connected with the PWM generator and used for receiving pulse width modulation output to drive the LED lamp cluster of the current stage;
the signal regeneration module is electrically connected with the signal module and is used for shaping the received pulse width modulation data except the data displayed by the lamp cluster at the current stage to obtain lower-stage output data and transmitting the lower-stage output data to the differential sending interface;
the differential sending interface is electrically connected with the signal regeneration module and is used for sending the lower-level output data to a next-level circuit in a differential mode.
2. The LED driving circuit according to claim 1, further comprising: the device comprises a serial input interface, a logic selection module and a serial data output interface; wherein,
the serial input interface is used for accessing external serial data;
the logic selection module is arranged among the serial input interface, the logic selection module and the signal analysis module and is used for selecting whether the serial data or the differential data is input to the signal analysis module;
the serial data output interface is electrically connected with the signal regeneration module and is used for outputting in a serial mode: and the signal regeneration module is used for regenerating data obtained by the data.
3. The LED driver circuit according to claim 1,
the lamp cluster driving circuit is as follows: a constant current driving circuit.
4. The LED driver circuit according to claim 1,
the clock generation circuit is: a ring oscillator circuit.
5. The LED driver circuit according to claim 1,
the LED driving circuit is integrated in an integrated circuit chip.
6. An LED driving system comprises a multi-stage LED lamp cluster and is characterized in that,
the LED driving circuit of any one of claims 1 to 5 is respectively connected to each stage of LED lamp cluster,
the LED drive circuits of all stages are respectively and electrically connected with the LED drive circuit of the previous stage and the LED drive circuit of the next stage.
CN2009200623628U 2009-08-14 2009-08-14 Two-wire system LED drive circuit and LED drive system Expired - Fee Related CN201491318U (en)

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Application Number Priority Date Filing Date Title
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101969721A (en) * 2010-09-16 2011-02-09 深圳市明微电子股份有限公司 Dual-wire data transmission method and device thereof
CN102196629A (en) * 2011-02-01 2011-09-21 上海矽诺微电子有限公司 Dimmable LED power driving device and light source device
CN111698814A (en) * 2020-07-02 2020-09-22 东莞市华彩威科技有限公司 LED driving circuit with double-line input and output and transmission method thereof

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101969721A (en) * 2010-09-16 2011-02-09 深圳市明微电子股份有限公司 Dual-wire data transmission method and device thereof
CN101969721B (en) * 2010-09-16 2013-04-17 深圳市明微电子股份有限公司 Dual-wire data transmission method and device thereof
CN102196629A (en) * 2011-02-01 2011-09-21 上海矽诺微电子有限公司 Dimmable LED power driving device and light source device
CN111698814A (en) * 2020-07-02 2020-09-22 东莞市华彩威科技有限公司 LED driving circuit with double-line input and output and transmission method thereof

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Granted publication date: 20100526

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