CN201467324U - Low power consumption CPU standby commutation circuit - Google Patents

Low power consumption CPU standby commutation circuit Download PDF

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Publication number
CN201467324U
CN201467324U CN200920132325XU CN200920132325U CN201467324U CN 201467324 U CN201467324 U CN 201467324U CN 200920132325X U CN200920132325X U CN 200920132325XU CN 200920132325 U CN200920132325 U CN 200920132325U CN 201467324 U CN201467324 U CN 201467324U
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CN
China
Prior art keywords
triode
cpu
standby
commutation circuit
power consumption
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN200920132325XU
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Chinese (zh)
Inventor
崔昭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Konka Group Co Ltd
Original Assignee
Konka Group Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Konka Group Co Ltd filed Critical Konka Group Co Ltd
Priority to CN200920132325XU priority Critical patent/CN201467324U/en
Application granted granted Critical
Publication of CN201467324U publication Critical patent/CN201467324U/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

The utility model relates to a low power consumption CPU standby commutation circuit. The low power consumption CPU standby commutation circuit is connected between a main power source voltage output end (V1) for supplying power to CPU at normal work and a voltage stabilizer for supplying proper electricity to CPU, and comprises a diode D1, a first triode Q1 and a second triode Q2, the emitting electrode of the first triode Q1 is connected with the secondary power source voltage output end (V2) for supplying power to CPU at standby state, the collecting electrode thereof is connected with the negative electrode of the diode D1, the base electrode thereof is connected with the collecting electrode of the second triode Q2, the positive electrode the diode D1 is connected with the main power source voltage output end (V1), the base electrode the second triode Q2 is connected with the CPU standby electrical level, and the emitting electrode thereof is grounded. The utility model has the advantages of simple and reliable circuit, low cost, and low power consumption.

Description

A kind of low power consumption CPU standby commutation circuit
Technical field
The utility model relates to a kind of commutation circuit, more particularly, relates to a kind of low power consumption CPU standby commutation circuit.
Background technology
As everyone knows, the use kind of electrical equipment is more and more, and this just makes that user's power consumption is a very important problem.For example, it is very wide that face is popularized in the use of television set, when a lot of users switch off the TV machine, directly control with remote controller, and this moment, the CPU of television set is in holding state, need provide an appropriate voltage to CPU, so that when starting shooting at any time, television set can be worked at once, so there is standby in CPU, should power to CPU, make the voltage that provided can not be too small and make CPU supply power voltage deficiency again.At present, in the power supply circuits of television set, adopt the quasi-resonant switching circuit usually, this mode reduces the reliability of television set greatly; The employing power supply switch circuit that has, but its complex structure, cost is higher.
The utility model content
The technical problems to be solved in the utility model is, big, the complex structure of power supply circuits power consumption during at the above-mentioned CPU standby of prior art, cost is higher and stable not enough defective, at the bottom of a kind of simple in structure, power consumption is provided, cost is low, and the high low power consumption CPU standby commutation circuit of reliability.
The technical scheme that its technical problem that solves the utility model adopts is: construct a kind of low power consumption CPU standby commutation circuit, the main power voltage output (V1) of powering when it is connected in to the CPU operate as normal reaches and provides between the pressurizer of appropriate electrical to CPU, it comprises diode D1, the first triode Q1 and the second triode Q2, and, the emitter of the described first triode Q1 links to each other with the auxiliary power voltage output end (V2) to the CPU power supply when the standby, its collector electrode links to each other with the negative electrode of described diode D1, its base stage links to each other with the collector electrode of the described second triode Q2, the anode of diode D1 links to each other with described main power voltage output (V1), the described second triode Q2 base stage connects CPU Opportunity awaiting control for linear signal output part, its grounded emitter.
In standby commutation circuit described in the utility model, described first triode is a positive-negative-positive.
In standby commutation circuit described in the utility model, described second triode is the NPN type.
In standby commutation circuit described in the utility model, also comprise the current-limiting resistance R4 that is connected between described second triode Q2 and the MCU level.
In standby commutation circuit described in the utility model, also comprise the current-limiting resistance R3 between the base stage of the collector electrode that is connected in the described second triode Q2 and the first triode Q1.
Implement a kind of low power consumption CPU standby commutation circuit of the present utility model, circuit is simple, and cost is lower.When the machine operate as normal, power to CPU by the D1 path by the main power voltage output, when standby, the standby high level makes the Q2 conducting, Q1 is conducting thereupon also, and D1 is ended, and is powered to CPU by the auxiliary power voltage output end, thereby reduce power consumption when realizing the CPU standby, and its circuit is simple, cost is low, reliability is high.
Description of drawings
The utility model is described in further detail below in conjunction with drawings and Examples, in the accompanying drawing:
Fig. 1 is the circuit diagram of an embodiment of the utility model low power consumption CPU standby commutation circuit.
Embodiment
The utility model makes CPU can be in the low-power consumption standby operating state when standby by increase CPU standby commutation circuit between CPU and power supply.
Referring to Fig. 1, it is the circuit diagram of an embodiment of the utility model low power consumption CPU standby commutation circuit.The utility model is powered to CPU by main power voltage output V1, by pressurizer N2 it is adjusted to 5V voltage then, and the output of pressurizer N2 is directly powered to CPU.Simultaneously, when the CPU standby commutation circuit that provides by the utility model made and is implemented in the CPU standby, V2 powered to CPU by the auxiliary power voltage output end.
The CPU standby commutation circuit that the utility model provides comprises the diode D1 that links to each other with main power voltage output V1, the first triode Q1 that links to each other with auxiliary power voltage output end V2, reaches the second triode Q2 that links to each other with the first triode Q1.Wherein, diode D1 anode links to each other with main power voltage output V1, its negative electrode links to each other with the input of pressurizer and the collector electrode of the first triode Q1 simultaneously, the emitter of the first triode Q1 connects auxiliary power voltage output end V2, its base stage links to each other with the collector electrode of the second triode Q2 by current-limiting resistance R3, the grounded emitter of the second triode Q2, its collector electrode links to each other with the CPU standby level by current-limiting resistance R4.And the first triode Q1 is a positive-negative-positive, and the second triode Q2 is the NPN type.
Its operation principle is as follows: when the CPU operate as normal, the first triode Q1 and the second triode Q2 all end, and main power voltage output V1 makes diode D1 conducting, and it can provide the voltage of 5V for example so that CPU work to CPU by pressurizer N2; When the CPU standby, the standby high level of CPU makes the second triode Q2 conducting of NPN type by the STBY port, thereby make also conducting thereupon of the positive-negative-positive first triode Q1, so, the collector electrode output high voltage of the second triode Q2, this voltage is higher than the voltage of diode D1 anode, so, diode D1 ends, and then the auxiliary power voltage output end is powered to CPU by the first triode Q1, usually, during its standby 12V voltage, and electric current is constant in the circuit, thus the reduction significantly of voltage when having realized standby, energy saving purposes when reaching standby.
The auxiliary power power supply reduces the CPU power consumption greatly, and electronic devices and components that this circuit adopts seldom, and are simple in structure, and reliability height, cost are also very low.It is particularly useful for the CPU stand-by operation of television set, also can same principle be applied to the CPU stand-by operation of other electrical equipment.
The above only is a preferred embodiment of the present utility model; be not so limit claim of the present utility model; every equivalent structure or equivalent flow process conversion that utilizes the utility model specification and accompanying drawing content to be done; or directly or indirectly be used in other relevant technical fields, all in like manner be included in the scope of patent protection of the present utility model.

Claims (5)

1. low power consumption CPU standby commutation circuit, the main power voltage output (V1) of powering when it is connected in to the CPU operate as normal reaches and provides between the pressurizer of appropriate electrical to CPU, it is characterized in that, it comprises diode D1, the first triode Q1 and the second triode Q2, and the emitter of the described first triode Q1 links to each other with the auxiliary power voltage output end (V2) to the CPU power supply when the standby, its collector electrode links to each other with the negative electrode of described diode D1, its base stage links to each other with the collector electrode of the described second triode Q2, the anode of diode D1 links to each other with described main power voltage output (V1), the described second triode Q2 base stage connects CPU Opportunity awaiting control for linear signal output part, its grounded emitter.
2. standby commutation circuit according to claim 1 is characterized in that, the described first triode Q1 is a positive-negative-positive.
3. standby commutation circuit according to claim 1 is characterized in that, the described second triode Q2 is the NPN type.
4. standby commutation circuit according to claim 1 is characterized in that, also comprises the current-limiting resistance R4 that is connected between described second triode Q2 and the CPU standby level.
5. standby commutation circuit according to claim 1 is characterized in that, also comprises the current-limiting resistance R3 between the base stage of the collector electrode that is connected in the described second triode Q2 and the first triode Q1.
CN200920132325XU 2009-06-01 2009-06-01 Low power consumption CPU standby commutation circuit Expired - Fee Related CN201467324U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN200920132325XU CN201467324U (en) 2009-06-01 2009-06-01 Low power consumption CPU standby commutation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN200920132325XU CN201467324U (en) 2009-06-01 2009-06-01 Low power consumption CPU standby commutation circuit

Publications (1)

Publication Number Publication Date
CN201467324U true CN201467324U (en) 2010-05-12

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Application Number Title Priority Date Filing Date
CN200920132325XU Expired - Fee Related CN201467324U (en) 2009-06-01 2009-06-01 Low power consumption CPU standby commutation circuit

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CN (1) CN201467324U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102111002A (en) * 2011-02-22 2011-06-29 无锡东海新能源科技有限公司 Device and method for realizing micro power consumption in hibernate state
CN103001315A (en) * 2012-12-26 2013-03-27 上海斐讯数据通信技术有限公司 Power supply switching circuit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102111002A (en) * 2011-02-22 2011-06-29 无锡东海新能源科技有限公司 Device and method for realizing micro power consumption in hibernate state
CN102111002B (en) * 2011-02-22 2013-01-30 无锡东海新能源科技有限公司 Device and method for realizing micro power consumption in hibernate state
CN103001315A (en) * 2012-12-26 2013-03-27 上海斐讯数据通信技术有限公司 Power supply switching circuit
CN103001315B (en) * 2012-12-26 2016-12-28 上海斐讯数据通信技术有限公司 A kind of power supply switch circuit

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GR01 Patent grant
C14 Grant of patent or utility model
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20100512

Termination date: 20130601

C17 Cessation of patent right