CN201466021U - Lead frame-packaged type semiconductor device - Google Patents
Lead frame-packaged type semiconductor device Download PDFInfo
- Publication number
- CN201466021U CN201466021U CN2009200894028U CN200920089402U CN201466021U CN 201466021 U CN201466021 U CN 201466021U CN 2009200894028 U CN2009200894028 U CN 2009200894028U CN 200920089402 U CN200920089402 U CN 200920089402U CN 201466021 U CN201466021 U CN 201466021U
- Authority
- CN
- China
- Prior art keywords
- integrated circuit
- lead frame
- semiconductor device
- chip
- lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45147—Copper (Cu) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
- H01L2224/8592—Applying permanent coating, e.g. protective coating
Abstract
The utility model relates to a lead frame-packaged type semiconductor device, which can effectively solve the problems of the poor radiating effect, large volume, high cost and short service life of the conventional semiconductor device. The lead frame-packaged type semiconductor device is structured in a way that: a bearing substrate is downwards provided with a rectangular groove in which an integrated circuit chip is arranged; an outer surface and lead pins of a lead frame of the bearing substrate are kept in the same horizontal plane; the lead pins of the lead frame are upwards bent to form a stepped structure; the bottom of the integrated circuit chip is bonded together with the bearing substrate through a bonding agent; the integrated circuit chip is connected with the lead pins of the lead frame extended out of a plastic-packaging plastic rubber body through metal leads respectively; the surface of the integrated circuit chip is provided with a heat-conducting and insulating protective film; the plastic-packaging plastic rubber body is filled around the integrated circuit chip and the lead pins; and the plastic-packaging plastic rubber body is exposed out of the bottom surface of the bearing substrate to form a semi-enclosed packaging structure. The lead frame-packaged type semiconductor device has the characteristics of simple structure, good radiating effect, low cost, long service life and remarkable economical and social effects.
Description
One, technical field
The utility model relates to semiconductor device, particularly a kind of semiconductor device of package leadframe posture.
Two, background technology
At present, the packing forms of total incapsulation is adopted in traditional SOP/SOIC and the encapsulation of TSOP series usually, promptly with plastic packaging material the pyrotoxin of integrated circuit and carrying substrates is all sealed.At first, this traditional package cooling approach be on the one hand by connect lead, pin conducts; Dispel the heat towards periphery by the body plastic packaging material on the other hand.Because the pin volume pyroconductivity little, the body plastic packaging material of this kind encapsulation is less again and packaging body is big, so the heat energy that integrated circuit work produces can not be realized good conduction, mainly concentrate on the inside of packaging body, radiating effect is not ideal enough, and useful life is short.According to statistics, the inefficacy majority of integrated circuit be by heat can not conduct timely and effectively cause.Along with the development of semiconductor towards microminiaturization, integrated level is more and more higher, transistorized number integrated in the integrated circuit is just more and more, integrated circuit is when running like this, caloric value is just increasing, too high temperature can cause the reliability of integrated circuit to reduce and decreased performance, has destabilizing factor in the circuit application, when serious even burn integrated circuit.Someone proposes direct heat dispersion substrate with bearing integrated and is exposed to the outer idea of plastic-sealed body, though can realize the good heat transfer effect like this, therefore plants encapsulation and also occurs some problems easily.Such as, packaging body gap, lamination occur easily owing to be not the encapsulation of total incapsulation between the heat dispersion substrate of plastic packaging material and bearing integrated, cause integrated circuit when using, the easier immersion of moisture, it is to influence its air-tightness to cause one of major reason that lost efficacy that moisture infiltrates.When moisture arrives the integrated circuit (IC) chip surface, can form one deck conduction moisture film on its surface, and Na+, the Cl-of plastic packaging material itself also brought into thereupon, integrated circuit is when work, quickened chemical corrosion, finally influenced the life-span of integrated circuit the wiring of chip surface aluminium.Though, fail to obtain practicality always so this directly the heat dispersion substrate of bearing integrated to be exposed to the outer method for packing heat conduction of plastic-sealed body good.Also once the someone proposes similar packaging body device, but unresolved relevant problem, does not have a practical function, is also well used.
Secondly, adopt the packing forms of total incapsulation, the volume of encapsulation is bigger, not only take circuit board the space, be unfavorable for to development light, slimming, the also cost of the materials of Zeng Jiaing.
The heat that produces in the time of how can reasonably reducing encapsulation volume, the work of timely and effective conduction integrated circuit improves the heat efficiency, and encapsulated moulding is an indispensable link must considering.
Three, utility model content
At above-mentioned situation; for overcoming the prior art defective; the purpose of the utility model just provides a kind of semiconductor device of package leadframe posture; it is poor effectively to solve existing semiconductor device radiating effect; volume is big; the cost height; improve the problem in useful life; the technical scheme of its solution is; allow the carrying substrates of integrated circuit directly expose outside the packaging body; because pyrotoxin directly contacts carrying substrates; the heat that integrated circuit work produces is directly transferred in the air via carrying substrates; or the fin conductive of process circuit board; so can reach better heat radiating effect; improve the structure of lead frame; change air-tightness between the carrying substrates of loose plastic packaging material and integrated circuit; before the plastic packaging operation to a kind of heat conduction on the chip list millet cake; the elastomeric material of the insulation (composite material of forming by macromolecular material and some inorganic material; as silica gel etc.); after passing through roasting procedure again; form a kind of resilient at chip surface; the diaphragm of sealing; the chip surface that is immersed in that can effectively stop aqueous vapor; also well solved the problem of the packaging air tightness difference that this kind encapsulation causes; the packing forms that its encapsulation is made into partly to seal by the packing forms of total incapsulation; not only reduced the volume of packaging body; also saved the cost of materials; in view of the above; structure of the present utility model is; carrying substrates has rectangular recess downwards; be placed with integrated circuit (IC) chip in the rectangular recess; the lead frame outer surface and the lead pin of carrying substrates remain on same horizontal plane; the lead pin of lead frame is bent upwards; constitute step structure; bond together through bond between integrated circuit (IC) chip bottom and the carrying substrates; integrated circuit (IC) chip connects the lead pin of the lead frame that stretches out plastic packaging plastic cement external body respectively through plain conductor; there is a kind of heat conduction on the integrated circuit (IC) chip surface; the diaphragm of insulation; plastic packaging plastics colloid is filled in around integrated circuit (IC) chip and the lead frame; plastic packaging plastics colloid is exposed in the carrying substrates bottom surface; constitute semi-enclosed encapsulating structure; the utility model is simple in structure; good heat dissipation effect; cost is low; long service life, economic and social benefit is remarkable.
Four, description of drawings
Accompanying drawing is a structural profile front view of the present utility model.
Five, embodiment
Below in conjunction with accompanying drawing embodiment of the present utility model is elaborated.
Shown in accompanying drawing; the utility model carrying substrates 1 has rectangular recess downwards; be placed with integrated circuit (IC) chip 2 in the rectangular recess; the lead frame outer surface of carrying substrates 1 and lead pin 3a; 3b remains on same horizontal plane; the lead pin of lead frame is bent upwards; constitute step structure; bond together through bond 7 between integrated circuit (IC) chip 2 bottoms and the carrying substrates 1; integrated circuit (IC) chip 2 is through plain conductor 4a; 4b meets the lead pin 3a of the lead frame that stretches out plastic packaging plastics colloid 6 outsides respectively; 3b; there is a kind of heat conduction on the integrated circuit (IC) chip surface; the diaphragm of insulation; plastic packaging plastics colloid is filled in around integrated circuit (IC) chip and the lead frame; plastic packaging plastics colloid is exposed in the carrying substrates bottom surface, constitutes semi-enclosed encapsulating structure.
In order to guarantee result of use, said integrated circuit (IC) chip is packaged with heat conductive insulating elastic materials 5 on 2 surfaces; Said bond 7 is elargol or scolding tin etc., considers that some integrated circuits needs and external insulation, also can select for use the good but nonconducting insulation silica gel of heat conductivility to connect; Said plain conductor is gold thread (AuWire) or copper cash (Cu Wire), to reach and extraneous electric connection; Said heat conductive insulating elastic materials 5 is the composite material that macromolecular material and inorganic material are formed, as silica gel etc., after baking, form a kind of resilient at chip surface, the diaphragm of sealing, the chip surface that is immersed in that can effectively stop aqueous vapor, well solved the problem of the packaging air tightness difference that this kind encapsulation causes, therefore also has good elasticity, energy better protect chip, prevent that some integrated circuit is in the process of plastic packaging, because plastic packaging material, elargol, lead frame, the thermal coefficient of expansion difference of unlike materials such as silicon crystal at high temperature produces the cracked problem of the caused chip of different stress, also can improve the yields of encapsulation procedure; Then the plastic packaging material adhesive body is filled in around integrated circuit (IC) chip and the lead frame in pressing mold mode (molding), the clubfoot part all is encapsulated in the plastic-sealed body, the lead pin of lead frame exposes a part outside plastic-sealed body, is beneficial to the welding of circuit board.Usually adopt plastic packaging material with certain thermal conductivity, for example epoxy molding compound (epoxy moldingcompound, EMC).The outer surface of lead frame, the bottom surface that is the rectangle of lead frame carrying substrates exposes outside the plastic-sealed body, integrated circuit (IC) chip is similar to the packing forms of half encapsulation of SOT 89 mounted types after the plastic packaging moulding, so that can directly realize good conduction through the lead frame carrying substrates to the external world; Then the formed product good to plastic packaging removed unnecessary carrier part.
Improve the leadframe leads lead foot by the utility model, better solved and to have carried heat dispersion substrate and expose outer its plastic packaging material epoxy resin that may occur of packaging body and combine bad problem with carrying between the heat dispersion substrate, make the combination that reaches firm between it, thereby reach favorable sealing property behind the encapsulated moulding.Behind encapsulated moulding, can reduce the volume of packaging body, be beneficial to semiconductor to development little, slimming.
The utility model benefit has reduced the volume of packaging body after being to be changed integrated circuit the form of half encapsulation into by full packing forms, has saved the cost of materials; Also effectively improved radiating efficiency under the prerequisite of application requirements and promoted yield of products satisfying. because of the utility model has saved the operation of conventional package pin brake forming, also can save the cost of customization former and save this procedure of pin brake forming.
It is to be noted, the above, it only is preferred embodiment of the present utility model, be not that the utility model is done any pro forma restriction, though the utility model discloses as above with preferred embodiment, yet be not in order to limit the present invention, any those skilled in the art, in not breaking away from the technical solutions of the utility model scope, when the technology contents that can utilize above-mentioned announcement is made a little changes or is modified to the equivalent embodiment of equivalent variations, in every case be the content that does not break away from technical solutions of the utility model, according to technical spirit of the present utility model to any simple modification that above embodiment did, equivalent variations and modification all still belong in the scope of technical solutions of the utility model.
Claims (4)
1. the semiconductor device of a package leadframe posture; it is characterized in that; carrying substrates (1) has rectangular recess downwards; be placed with integrated circuit (IC) chip (2) in the rectangular recess; the lead frame outer surface of carrying substrates (1) and lead pin (3a; 3b) remain on same horizontal plane; the lead pin of lead frame is bent upwards; constitute step structure; bond together through bond (7) between integrated circuit (IC) chip (2) bottom and the carrying substrates (1); integrated circuit (IC) chip (2) is through plain conductor (4a; 4b) meet the lead pin (3a that stretches out the outside lead frame of plastic packaging plastics colloid (6) respectively; 3b); there is a kind of heat conduction on the integrated circuit (IC) chip surface; the diaphragm of insulation; plastic packaging plastics colloid is filled in around integrated circuit (IC) chip and the lead frame; plastic packaging plastics colloid is exposed in the carrying substrates bottom surface, constitutes semi-enclosed encapsulating structure.
2. the semiconductor device of package leadframe posture according to claim 1 is characterized in that, said integrated circuit (IC) chip (2) is packaged with heat conductive insulating elastic materials (5) on the surface.
3. the semiconductor device of package leadframe posture according to claim 1 is characterized in that, said bond (7) is elargol or scolding tin or insulation silica gel.
4. the semiconductor device of package leadframe posture according to claim 1 is characterized in that, said plain conductor is gold thread or copper cash.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009200894028U CN201466021U (en) | 2009-04-03 | 2009-04-03 | Lead frame-packaged type semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009200894028U CN201466021U (en) | 2009-04-03 | 2009-04-03 | Lead frame-packaged type semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201466021U true CN201466021U (en) | 2010-05-12 |
Family
ID=42393369
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2009200894028U Expired - Fee Related CN201466021U (en) | 2009-04-03 | 2009-04-03 | Lead frame-packaged type semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201466021U (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109616462A (en) * | 2018-12-04 | 2019-04-12 | 四川金湾电子有限责任公司 | A kind of totally-enclosed symmetric packages lead frame |
| CN116314051A (en) * | 2023-05-23 | 2023-06-23 | 广东气派科技有限公司 | Packaging structure and method of high-power device |
| US11784072B2 (en) | 2019-10-04 | 2023-10-10 | Hewlett-Packard Development Company, L.P. | Molded substrates |
| CN117637636A (en) * | 2024-01-26 | 2024-03-01 | 华羿微电子股份有限公司 | Power semiconductor packaging structure for protecting chip and preparation method thereof |
-
2009
- 2009-04-03 CN CN2009200894028U patent/CN201466021U/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109616462A (en) * | 2018-12-04 | 2019-04-12 | 四川金湾电子有限责任公司 | A kind of totally-enclosed symmetric packages lead frame |
| US11784072B2 (en) | 2019-10-04 | 2023-10-10 | Hewlett-Packard Development Company, L.P. | Molded substrates |
| CN116314051A (en) * | 2023-05-23 | 2023-06-23 | 广东气派科技有限公司 | Packaging structure and method of high-power device |
| CN116314051B (en) * | 2023-05-23 | 2023-08-11 | 广东气派科技有限公司 | Packaging structure and method of high-power device |
| CN117637636A (en) * | 2024-01-26 | 2024-03-01 | 华羿微电子股份有限公司 | Power semiconductor packaging structure for protecting chip and preparation method thereof |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20100512 Termination date: 20120403 |