CN201204644Y - Low cost low-power consumption credible coaxial-cable tri-network amalgamation system base on SOC - Google Patents

Low cost low-power consumption credible coaxial-cable tri-network amalgamation system base on SOC Download PDF

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CN201204644Y
CN201204644Y CNU2008200882223U CN200820088222U CN201204644Y CN 201204644 Y CN201204644 Y CN 201204644Y CN U2008200882223 U CNU2008200882223 U CN U2008200882223U CN 200820088222 U CN200820088222 U CN 200820088222U CN 201204644 Y CN201204644 Y CN 201204644Y
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data
network
soc
chip
coaxial cable
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顾士平
华晓勤
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Hangzhou CNCR-IT Co., Ltd.
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顾士平
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Abstract

A low-cost low-power consumption credible coaxial-cable tri-network amalgamation system base on SOC relates to a wideband conveying system, especially a tri-network amalgamation system supporting communication network, computer wideband network and cable television network. The utility model is designed for solving the problem that the existing CMTS technology can not be used in a network with large interference, and the problem that the technology such as Moca, WLAN and the like can not be used for a system accessed by a plurality of users. The voice communication and network data transmission are implemented by means of using a speedup engines comprised of dynamic reconstruction circuits, and the coexist of the voice communication, network data and digital television, analog television by means of using frequency division, thereby a tri-network amalgamation system base on CABLE cable is implemented, which is used for EOC system widely.

Description

Based on the credible coaxial cable three-network integration system of the low-cost low-power consumption of SOC
One, technical field
Patent of the present invention relates to a kind of wideband data transmission system, the system of particularly a kind of support voice communication network, computer broadband networks, the cable television network integration of three networks.
Two, background technology
Several below high-speed wideband communication prior art has on coaxial cable:
Cable Modem technology: based on the CMTS system of DOCSIS1.1, DOCSIS2.0, DOCSIS3.0 standard in the North America, Europe is extensive use of, but China " not acclimatized ".Reason is that the electric equipment great majority of China are not proved through electromagnetic compatibility, even the product through the Electro Magnetic Compatibility authentication also exceeds standard greatly for " saving cost " its product electromagnetic radiation when producing, the cable tv coax net is a tree network, meeting influx noise (funneling effect), make noise flood normal signal of communication, effective bandwidth is reduced greatly, perhaps can't communicate by letter at all.
The Moca technology: multimedia over Coax Alliance (Multimedia over Coax Alliance), by Panasonic, Conexant; Entropic Communications provides the Moca chipset now, and domestic have some users to use the MOCA technology, inserts but this technology only is applicable to family multi-media, is not suitable for multi-user's Access Network.But in bench-scale testing, find a large amount of problem of Moca: (1) can not transmit (frequency 900-1500MHz) at a distance, and the loss on cable and splitter of this frequency is big; (2) because the frequency that they use is identical with mobile phone frequency, the proper communication of interference handset; (3) discomfort is fit to do the extensive Access Network of point-to-multipoint.
The WLAN technology: the WLAN wireless network adopts agreements such as 802.11a/b/g/n, adopt the wireless work of carrying out in the former 2.4-2.483GHz of the being used for frequency range, because the signal of 2.4GHz, frequency is too high, be not suitable in transmission over coaxial cable, usually adopt the method for frequency reducing to realize, now domestic Liuhe-Wantong and French Thomson company use the frequency that its tranmitting frequency mixes down to more than the 860MHz on coaxial cable.Because WLAN adopts the CSMA/CA agreement, be suitable for the few family of user side and use, and be not suitable for the Access Network of multi-user concurrent, speed sharply descends when multi-user concurrent is communicated by letter, and can't use in the system that large-scale user inserts.
Three, summary of the invention
The problem that solves:
Disturbing the problem that normally to use on the big network in order to solve existing C MTS technology; Solve technology such as Moca, WLAN and can not be applied to the medium problem of system that large-scale consumer inserts.Solve the problem that prior art can not realize the integration of three networks.
Technical scheme:
" based on the credible coaxial cable three-network integration system of the low-cost low-power consumption of SOC " is made up of local side apparatus, ustomer premises access equipment and network management system, adopt TDMA (timesharing multiple access) mode to realize that the multi-user inserts at MAC, can realize that HFC (coaxial cable fiber mix net) network the whole network under the light station covers, finish last 1000 meters users' broadband access, safety certification, safety management, link to each other with the core broadband networks by EPON, GPON or fiber optical transceiver, cable TV subscriber's broadband access is finished in collaborative work, and two-way television, IPTV etc. realize the integration of three networks.
In the two-way communication that realizes network data on the channel of coaxial cable (CATV) broadband analog signal 2-30MHz or on the frequency of 862MHz-2.5GHz, the program request signaling of leaving language phone (VoIP) and two-way interaction TV for that QoS priority is the highest in the network data is used, and remaining uses for the computer broadband networks.Realize broadband access network, IPTV.Keep to cable television network on the frequency range of 47MHz-862MHz and use, modulation anolog TV signals, digital television signal and IPQAM TV signal.Realize by the high-pass and low-pass filter frequency division, thereby realize that broadband networks, telephone network, the television network integration of three networks are in the coaxial cable net.
By local side apparatus ethernet signal is modulated to the analog signal of OFDM, again the signal of modulation is amplified the back and transmit by coaxial cable.Ustomer premises access equipment is finished demodulation, and the analog signal that local side is sended over is reduced to ethernet signal.
Be specially: upward signal is from the signal of the Ethernet PHY input of user side, be converted to the OFDM digital modulation signals through the SOC chip signal, be converted to the OFDM analog signal through AD9865D/A, after OP2674 amplifies, online by sending to cable TV behind the filter filtering, send on the main end equipment through cable television network, main end equipment is with the signal that receives, being sent to AD9865 behind filter filtering carries out the A/D conversion and is converted to data-signal, be tuned as ethernet signal through separating of local side apparatus, thereby realize data upload.Downstream signal identical with upward signal, only direction is opposite.
The local side modulation:
Ethernet data is input to the MII interface of the MAC of SOC chip through PHY chip (IP101), through the AMBA bus, directly be sent to dynamic reconfigurable accelerating engine → by dma mode through the legitimacy of network intrusions early warning with control accelerating engine and encrypt/decrypt accelerating engine judgment data, if data are illegal data are abandoned, if data are legal → the MAC layer: according to the priority of data, arrange time slot and bandwidth by the TDMA agreement, if the time slot that now is not this user side sends the back then buffer memory wait time slot arrives, if the time slot of this user side transmission → PHY layer immediately then: realize range finding, burst transfer, forward error correction, channel estimating, power control → coding layer: realize OFDM, QAM, the QPSK modulation reaches and the AD9865 interface, the data format of AD9865 and 32 bit data forms of SOC inside are changed in realization, and realize that FEEDBACK CONTROL → data to the AD9865 chip are sent to AD9865 and form analogue data output → process OPA2674 through D/A and amplify, the modulated analog signal that forms 2-30MHz transmits on coaxial cable, delivers to each ustomer premises access equipment.
The local side demodulation:
The analog signal that sends from user side → be sent to AD9865 to be converted to data output → coding layer through A/D: with the Data Format Transform of AD9865 is 32bit data lattice → PHY layer: realize range finding, burst transfer, forward error correction, channel estimating, power control, the control AD9865 reception data of appropriate state, make the error rate minimum → the MAC layer: with the reduction of data that receives is original data → through the legitimacy of network intrusions early warning with control accelerating engine and encrypt/decrypt accelerating engine judgment data, if data are illegal that data are abandoned, if data legal → data send to Ethernet data through PHY chip (IP101) by AMBA bus dma mode.
The ARM926EJ processor, the ARM926EJ processor in the SOC chip is responsible for handling the management data in the native system, is responsible for dynamic-configuration dynamically programmable circuit.
The data that the data medium priority is the highest are used for the signaling-information of voice signal and video on demand.
The modulation of ustomer premises access equipment:
Ethernet data is input to the MII interface of the MAC of SOC chip through PHY chip (IP101), through the AMBA bus, directly be sent to dynamic reconfigurable accelerating engine → by dma mode through the legitimacy of network intrusions early warning with control accelerating engine and encrypt/decrypt accelerating engine judgment data, if data are illegal data are abandoned, if data are legal → and the MAC layer: wait for that local side apparatus arranges time slot and bandwidth, if uploading the time slot that is not this user side now sends the back then buffer memory wait time slot arrives, if the time slot of this user side transmission → PHY layer immediately then: realize range finding, burst transfer, forward error correction, channel estimating, power control, control AD9865 with suitable parameter with data transmissions → coding layer: realization OFDM, QAM, the QPSK modulation reaches and the AD9865 interface, the data format of AD9865 and 32 bit data forms of SOC inside are changed in realization, and realize that FEEDBACK CONTROL → data to the AD9865 chip are sent to AD9865 and form analogue data output → process OPA2674 through D/A and amplify, the modulation signal that forms 2-30MHz send transmission at coaxial cable, delivers to local side apparatus.
The user side demodulation:
The analog signal that sends from local side → be sent to AD9865 to form data output → coding layer: realize that OFDM, QAM, QPSK demodulation reach and the AD9865 interface through A/D, the data format of AD9865 and 32 bit data forms of SOC inside are changed in realization, and realize FEEDBACK CONTROL → PHY layer: realize range finding, burst transfer, forward error correction, channel estimating, power control to the AD9865 chip, thereby the control AD9865 reception data → MAC layer of appropriate state: if the data of this user side then are reduced to original data; Data if not this user side, then it is abandoned → through the legitimacy of network intrusions early warning with control accelerating engine and encrypt/decrypt accelerating engine judgment data, if data are illegal that data are abandoned, if data legal → data send to Ethernet data through PHY chip (IP101) by AMBA bus dma mode.
Beneficial effect:
Should be mainly used in realizing in the HFC cable TV network with the scheme target product: broadband access network, interactive TV program request, IPTV, private network access etc.Dwindle the gap with international technology, by " made in China " to " China creates "; Utilization is modulated, demodulation accelerating engine system power dissipation is low, saves resource, saves the energy, realization " green internet "; Utilization is modulated, demodulation accelerating engine system speed is fast, and the system availability height is realized the higher ratio of performance to price, reduce cost, make the poor also can go up to such an extent that play the Internet, afford to use video on demand, promote the harmonious development of society, dwindle " digital divide ", development promotes social harmony.
Four, description of drawings
Fig. 1 group network system block diagram
Fig. 2 local side apparatus, ustomer premises access equipment theory diagram
Fig. 3 SOC chip internal theory diagram
Fig. 4 modulation, demodulation hierarchy schematic diagram
Fig. 5 need distribute the TDMA processed frame structure of time slot
Fig. 6 CSMA/CA handshake
Five, embodiment
Below in conjunction with accompanying drawing embodiments of the present invention are described in detail:
Constitute coder/decoder based on dynamically programmable circuit accelerating engine; Constitute PHY, MAC layer accelerator based on dynamically programmable circuit accelerating engine; Constitute network intrusions early warning and control based on dynamically programmable circuit accelerating engine.Thereby low-power consumption, low cost, the high efficiency of the system of realization.
Large scale network invasion early warning, control: utilize the dynamically programmable circuit to form credibleization accelerating engine, realize coaxial cable wideband data network invasion early warning, control.
The integration of three networks: the accelerating engine that utilizes the dynamic reconfigurable circuit to constitute, realize voice communication, network data transmission, utilize frequency division to realize voice communication, network data and Digital Television, simulated television coexistence, thereby realize three-network integration system based on the CABLE cable.
Operation principle: in the two-way communication that realizes network data on the channel of coaxial cable (CATV) broadband analog signal 2-30MHz or on the frequency of 862MHz-2.5GHz, the program request signaling of leaving language phone (VoIP) and two-way interaction TV for that QoS priority is the highest in the network data is used, and remaining uses for the computer broadband networks.Realize broadband access network, IPTV.Keep to cable television network on the frequency range of 47MHz-862MHz and use, modulation anolog TV signals, digital television signal and IPQAM TV signal.Realize by the high-pass and low-pass filter frequency division, thereby realize that broadband networks, telephone network, the television network integration of three networks are in the coaxial cable net.
System is made up of local side apparatus and subscriber equipment, in coaxial cable, utilize the OFDM OFDM, utilize QAM and QPSK mode modulating data on the subcarrier of OFDM, thereby realize high efficiency digital speech, network broadband data high-speed transfer on coaxial cable.
Be modulated to QAM1024, the QAM256 on the OFDM subcarrier, the encoding and decoding software of QAM16, QPSK, utilize the accelerating engine of dynamically programmable circuit to realize; Utilize the accelerating engine of dynamically programmable circuit to realize the network data enciphering/deciphering, realize network intrusions early warning and control; Utilize the accelerating engine of dynamically programmable circuit to realize MAC layer, PHY layer protocol etc.
Local side apparatus is installed at light station at cable TV coaxial fiber mix net (HFC), and ustomer premises access equipment is installed in user family, and a local side apparatus can connect 64 ustomer premises access equipments.
This project system is made of local side apparatus, ustomer premises access equipment, bridger, webmastering software realizes that last 1000 meters bilateral network inserts, and realizes cable television network, telephone network, the computer communication network integration of three networks.VoIP mode (do not relate to VoIP in this project, only stayed the highest network channel of priority) is adopted in voice communication.
1, preferred embodiment 1:
This project system is made up of local side apparatus, subscriber equipment and jumper.Local side apparatus (Master), ustomer premises access equipment (Slave) are formed by connecting by wired TV amplifier, distributor, splitter, coaxial cable.
1) local side apparatus:
A local side apparatus can connect 64 subscriber equipmenies.Local side apparatus is modulated to the OFDM analog signal with the Ethernet supplied with digital signal, use TDMA (time division multiple access) agreement, pass through coaxial cable, realize the one-to-many data communication, data are sent to subscriber equipment, and subscriber equipment will be demodulated into digital signal from the ofdm signal that coaxial cable sends, if data are to this user, this subscriber equipment is reduced into original data with demodulated data signal, and the Ethernet that outputs to the user uses for the user.
The Ethernet data of same user's input is modulated to the OFDM analog signal through subscriber equipment when taking turns to the time slot of this user side, will be sent to local side by coaxial cable, and local side is demodulated into legacy data with the OFDM analog signal, by the Ethernet output of main end.Thereby realized two-way communication.
2) ustomer premises access equipment:
The chip of user side and local side apparatus chip are identical, just the different pattern of work.Block diagram as shown in the figure.The modulating/demodulating of ustomer premises access equipment and the modulating/demodulating of local side apparatus are similar, and the local side apparatus mode of operation is an active mode, and the mode of operation of ustomer premises access equipment is from mode.
3) jumper:
Effect: it is straight-through that modulation, the demodulated analog signal of the local side apparatus of 2-30MHz and ustomer premises access equipment are skipped TV signal amplifiers, and the signal of 47-860MHz still amplifies through TV signal amplifiers.
The signal jumper is fairly simple, it is exactly a two high-pass and low-pass filter, first high-pass and low-pass filter is 2-30MHz and 47MHz-862MHz two-way with the Signal Separation of 2-860MHz earlier, the TV signal of 47-862MHz is exported to wired TV amplifier and is amplified, and the signal of 2-30MHz is directly connected to the input port of the 2-30MHz of second high-pass and low-pass filter; 47MHz-860MHz cable TV signal after the amplification is connected to the input port of the 47-862MHz of second high-pass and low-pass filter, exports 2-862MHz by one tunnel full rate signal that is mixed into again of second high-pass and low-pass filter.
Be illustrated in figure 1 as the system architecture schematic diagram, 101 is the local side modulator-demodulator, and 102 is that bridger, 103 is that user side modulator-demodulator, 104 is that another one user side modulator-demodulator, 105 is that TV signal amplifiers, 106 is that catv distributor, 107 is that catv distributor, 108 CATV set-top-box, 109 are that television set, 110 is the PC computer.
2, preferred embodiment 2:
The network management software adopts snmp protocol, supports SNMP V1.0/V2.0/V3.0 agreement.Finish the design of the integration of three networks network management software, realize network intrusions early warning and control.For unification of three nets provides perfect network management function.Its embedded SNMP adopts the NET SNMP source code of open source code to revise and realizes.
Webmastering software has following surface function:
1) traffic statistics function: the flow to the uplink and downlink of each user side is added up;
2) the IGMP agreement realizes that video multicast is used for time-moving television, video request program;
3) the limited subscriber end connects the platform number of computer: be limited in the platform number that connects PC under each user side, the protection benefits of operators;
4) broadcast packet, unknown bag inhibit feature: broadcast packet or other attack packets are suppressed, avoid of the influence of these useless data to normal data communication;
5) preferential, the preferentially setting of time-delay of speed: it is preferential to be set to speed in the demanding place of data rate; It is preferential to be set to time-delay to the little place of data delay requirement;
6) QOS realizes: the professional prioritised transmission that is provided with and guarantees data such as phone, program request order of isolating, thus realize the integration of three networks; IEEE 802.1p is the traffic priority control criterion, is operated in media interviews control (MAC) sublayer.It makes Layer 2 switch that traffic prioritization and dynamic multicast filtering services can be provided.IEEE 802.1p standard also provides the flux of multicast filtering function, does not exceed second layer switching network scope to guarantee this flow.IEEE 802.1p protocol header comprises 3 precedence fields, and this field support is grouped into various flow kinds with packet.
7) VLAN realizes: IEEE 802.1p is the extension protocol of IEEE 802.1q (VLAN label protocol) standard, their collaborative works.IEEE 802.1q standard definition the label that adds for the ethernet mac frame.The VLAN label has two parts: VLAN ID (12 bit) and priority (3 bit).Do not define in the IEEE 802.1q VLAN standard and the use precedence field, then defined this field among the IEEE802.1p.
8) authentication service (802.1x): the 802.1x Verification System provides a kind of means of access authentication of user, and it only pays close attention to opening and closing of port.When inserting for validated user (according to number of the account and password), this port is opened, and inserts or when not having the user to insert, then make port be in closed condition for the disabled user.
9) STP (Spanning-Tree Protocol) prevents broadcast storm, by blocking one or more redundancy ports, safeguards a loop-free network (IEEE802.1d);
10) Webserver: utilize webpage that system is managed, transmission is provided with.
3, preferred embodiment 3 (local side apparatus, ustomer premises access equipment principle constitute block diagram)
Be illustrated in figure 2 as 201 and be ethernet signal; 202 are RJ45 connection ethernet signal; 203 is PHY chip such as chips such as IP101, RTL8201; 204 finish major function for the SOC chip; 205 programs for the operation of SDRAM chip-stored; 206 is FLASH chip-stored condensing routine; 207 is AD9865 or other high-speed AD/DA conversion chip, as AD9868, AD9865 etc.; 208 is the OPA2674 chip, amplifies the analog signal of output; 209 are the communication of high-pass and low-pass filter realization frequency division.
The course of work of modulation: the ethernet signal of 201 inputs is through the conversion of 203PHY chip, ethernet signal on the twisted-pair feeder is transformed to the MII interface signal, the MII interface of the SOC chip by 204 is a network data with the network interface conversion of signals, and network data is directly given the accelerating engine of SOC by the dma mode of SOC; Carry out encryption, the decryption processing of data through accelerating engine, the encoding and decoding of MAC data are handled, the encoding and decoding of PHY layer are handled, the encoding and decoding of modulation system are handled, the data of modulation are delivered to ad/da converter at a high speed such as AD9865 or AD9868, data-signal is converted to analogue data, after OPA2674 amplifies, delivers to 209 high-pass and low-pass filters, modulation signal and TV signal mixing back are exported by coaxial cable.
The course of work of demodulation: the mixed signal of 211 inputs, isolating the 2-30MHz modulation signal through 209 high-pass and low-pass filters carries out A/D and is converted to parallel data through 207 high-speed a/ds, D/A conversion chip AD9865, AD9868, give SOC chip 204, through the SOC decoding circuit formation data flow of decoding, send the data to the 203PHY chip by SOC by DMA, form network data.
4, preferred embodiment 4, high-speed wideband SOC chip (theory diagram such as Fig. 3):
Employing has the IP of ARM926EJ, ARM946EJ, ARM966EJ or the MIPS of DSP instruction set and Java accelerator, expansion MII interface, synchronous communication interface, the crypto engine of dynamic reconfigurable, the modulating/demodulating accelerating engine of dynamic reconfigurable, Asynchronous Serial Interface, USB mouth on the AMBA of ARM926EJ bus.Outside chip, add ad/da converter at a high speed.
External interface adopts the AMBA bus to link to each other with interface module, and this SOC chip mainly comprises with lower interface:
● sdram interface: be used to connect SDRAM (synchronous DRAM), operating system, firmware program, application program are moved in SDRAM.
● the FLASH interface: be used to connect FlashROM (quick electric erasable read only memory), FlashROM is used to deposit bootloader (using Uboot), firmware program, built-in application program.
● the MAC interface: the MAC interface is inner to be connected with ARM926EJ by the AMBA bus, and the interface of the outside MII of employing, RMII compatibility connects PHY chip or exchange chip;
● USB interface: adopt interface (backward compatible USB1.1) standard of USB2.0 standard, comprise one USB Host interface, one USB Device interface.
● UART (Asynchronous Serial Interface): 2,1 is RXD, TXD (3 line) serial ports, is used for the debugging of linux program; 1 is Full Featured serial ports (9 line), is used for communication, and wherein DTR, DSR, RTS, CTS, DCD, RI promptly can be used as the special function control line that general GPIO also can be used as UART.
● GPIO (general I/O control mouth): 8, be used to light LED, the various states of indication chip, GPIO0 is used to indicate modulation encoding and decoding state, GPIO1 is used to indicate the connection status of coaxial cable, and GPIO2-GPIO5 is used to indicate the LINK/ACTIVE state of exchange chip.
● dynamic reconfigurable accelerating engine: be connected employing AMBA interface with ARM926, utilize the dynamic reconfigurable circuit to realize encoding and decoding accelerating algorithm at a high speed, thereby reduce the burden of CPU, thereby significantly reduce, the power consumption of CPU, because the power consumption of special circuit realizes that than universal circuit same function power consumption is much smaller.
● the dynamic reconfigurable crypto engine: inside is connected with the AMBA bus of ARM926, the outside is connected with the AD9865 chip by sync cap, with input, the dateout of AD9865 chip be two-way signaling, the sampled feedback signal of its AD9865 is one way signal 5 parallel-by-bit data, flows to the dynamic reconfigurable crypto engine.
● the PLL module: lock is the dominant frequency (can by program control its frequency be set) of 266MHz for CPU to ring clock control circuit/frequency multiplication control circuit with the frequency frequency multiplication CLK_CPU of 66MHz; The CLK_SDRAM frequency provides synchronised clock for 166MHz for SDRAM; CLK_MAC provides the frequency of 25MHz for the MAC module; CLK_USB provides the frequency of 48MHz for USB; CLK_UART provides the frequency of 33MHz for serial ports; CLK_AD9865 provides the synchronizing frequency of 66MHz for AD9865; CLK_1 is for providing clock to the dynamic reconfigurable accelerating engine; CLK_2 provides clock etc. for the dynamic reconfigurable crypto engine.
● the design of the Firmware firmware of SOC chip: physical layer adopts the modulating/demodulating mode of ofdm signal, and its subcarrier adopts QAM16, QAM64, QAM256, QAM1024, QPSK, according to the adaptive selection modulation/demodulation methods of the result of channel estimating; The descending employing broadcast mode of data link layer (downlink data adopts the dynamic reconfigurable encryption/decryption engine, carries out distributing data according to the MAC Address of each slave unit), up employing dynamic sharing pattern.Operation linux2.6.x operating system cooperates its PHY layer protocol of realization, MAC agreement with the program of processor on ARM926EJ.
● physical layer: the zero intermediate frequency signals that adopts 2-30MHz, can modulate by the frequency conversion chip and to take office on what frequency, can be in low frequency 0-85MHz frequency range operate as normal, can be in the 87MHz-860MHz frequency range operate as normal, also can be in the 860MHz-2500MHz scope operate as normal.Be divided into 7 independently sub-channels in the frequency range of 28MHz, adopt the OFDM modulation system in each sub-band, each subcarrier self adaptation adopts QAM1024, QAM256, QAM64, QAM16, QPSK carrier system.
Be illustrated in figure 3 as SOC chip internal block diagram, 301 is the SDRAM chip interface circuit, is used for the SOC chip and connects the SDRAM chip; 302 is the processor of ARM926EJ, ARM946EJ, ARM966EJ or MIPS, function: be used for procotol and handle; 303 is the Flash interface, is used to connect the Flash chip, the executive program of the main storage chip of flash chip; 304 is the AMBA bus, is used for SDRAM, CPU, Flash interface, MAC interface, UART interface, GPIO interface, dynamic reconfigurable accelerating engine etc. are coupled together; 306 is MAC, is used to handle 802.3 Ethernet protocols; 308 is USB interface, is main USB interface and from USB interface, is used to connect the USB mouth of computer, or connects the product of the band USB interface of miscellaneous equipment, as printer, and game machine etc.; The UART serial line interface is used to connect computer by serial, the equipment of other band serial ports, and as serial printer, 485 serial ports etc.; The GPIO interface is used for connecting control LED lamp, the control miscellaneous equipment, or be used for Simulation with I 2The C bus is used to connect equipment that EEPROM device, simulation spi bus be used to control spi bus, simulation MDC/MDIO Ethernet control interface etc.; 311 dynamic reconfigurable accelerating engines are realized encryption, the deciphering of network data, the processing of procotol, the processing of MAC layer data, the processing of PHY layer data, code decode algorithm etc.;
312 is the pll clock circuit, the clock of input is exported to corresponding circuit through the pll clock translation circuit with the clock that input clock is transformed to various needs, input to processor 302 after the clock frequency conversion of CLK_CPU with input, use for CPU, the CLK_SDRAM clock signal flows to external SDRAM chip use and offers the use of sdram interface circuit simultaneously after frequency conversion, guarantee that external SDRAM device and sdram interface circuit are synchronous; The MAC module that CLK_MAC clock, clock are provided as in the SOC chip is used the clock that offers external PHY chip simultaneously, keeps the synchronous of PHY chip and MAC module; CLK_USB provides clock for outside USB physical chip; CLK_UART provides clock for the UART module, in order to produce the clock signal of UART, is the different baud rate of UART product; CLK_AD9865 provides clock for the accelerating engine of AD9865 and SOC inside, the sampling and the conversion of the AD/DA conversion of control AD9865; The another one clock that CLK_1 provides for the dynamic reconfigurable engine is for the processing of dynamic reconfigurable engine.
5, preferred embodiment 5 (local side apparatus is seen Fig. 4 in conjunction with the modulating/demodulating process of the data-signal of chip) local side modulation:
Ethernet data is input to the MII interface of the MAC of SOC chip through PHY chip (IP101), through the AMBA bus, directly be sent to dynamic reconfigurable accelerating engine → by dma mode through the legitimacy of network intrusions early warning with control accelerating engine and encrypt/decrypt accelerating engine judgment data, if data are illegal data are abandoned, if data are legal → the MAC layer: according to the priority of data, arrange time slot and bandwidth by the TDMA agreement, if the time slot that now is not this user side sends the back then buffer memory wait time slot arrives, if the time slot of this user side transmission → PHY layer immediately then: realize range finding, burst transfer, forward error correction, channel estimating, power control → coding layer: realize OFDM, QAM, the QPSK modulation reaches and the AD9865 interface, the data format of AD9865 and 32 bit data forms of SOC inside are changed in realization, and realize that FEEDBACK CONTROL → data to the AD9865 chip are sent to AD9865 and form analogue data output → process OPA2674 through D/A and amplify, the modulated analog signal that forms 2-30MHz transmits on coaxial cable, delivers to each ustomer premises access equipment.
The local side demodulation:
The analog signal that sends from user side → be sent to AD9865 to be converted to data output → coding layer through A/D: with the Data Format Transform of AD9865 is 32bit data lattice → PHY layer: realize range finding, burst transfer, forward error correction, channel estimating, power control, the control AD9865 reception data of appropriate state, make the error rate minimum → the MAC layer: with the reduction of data that receives is original data → through the legitimacy of network intrusions early warning with control accelerating engine and encrypt/decrypt accelerating engine judgment data, if data are illegal that data are abandoned, if data legal → data send to Ethernet data through PHY chip (IP101) by AMBA bus dma mode.
The ARM926EJ processor, the ARM926EJ processor in the SOC chip is responsible for handling the management data in the native system, is responsible for dynamic-configuration dynamically programmable circuit.
The data that the data medium priority is the highest are used for the signaling-information of voice signal and video on demand.
6, preferred embodiment 6 (the modulating/demodulating process of ustomer premises access equipment, chip internal dynamic reconfigurable accelerating engine theory diagram combines realization with coding, decoding accelerating engine block diagram, sees Fig. 4)
The modulation of ustomer premises access equipment:
Ethernet data is input to the MII interface of the MAC of SOC chip through PHY chip (IP101), through the AMBA bus, directly be sent to dynamic reconfigurable accelerating engine → by dma mode through the legitimacy of network intrusions early warning with control accelerating engine and encrypt/decrypt accelerating engine judgment data, if data are illegal data are abandoned, if data are legal → and the MAC layer: wait for that local side apparatus arranges time slot and bandwidth, if uploading the time slot that is not this user side now sends the back then buffer memory wait time slot arrives, if the time slot of this user side transmission → PHY layer immediately then: realize range finding, burst transfer, forward error correction, channel estimating, power control, control AD9865 with suitable parameter with data transmissions → coding layer: realization OFDM, QAM, the QPSK modulation reaches and the AD9865 interface, the data format of AD9865 and 32 bit data forms of SOC inside are changed in realization, and realize that FEEDBACK CONTROL → data to the AD9865 chip are sent to AD9865 and form analogue data output → process OPA2674 through D/A and amplify, the modulation signal that forms 2-30MHz send transmission at coaxial cable, delivers to local side apparatus.
The user side demodulation:
The analog signal that sends from local side → be sent to AD9865 to form data output → coding layer: realize that OFDM, QAM, QPSK demodulation reach and the AD9865 interface through A/D, the data format of AD9865 and 32 bit data forms of SOC inside are changed in realization, and realize FEEDBACK CONTROL → PHY layer: realize range finding, burst transfer, forward error correction, channel estimating, power control to the AD9865 chip, thereby the control AD9865 reception data → MAC layer of appropriate state: if the data of this user side then are reduced to original data; Data if not this user side, then it is abandoned → through the legitimacy of network intrusions early warning with control accelerating engine and encrypt/decrypt accelerating engine judgment data, if data are illegal that data are abandoned, if data legal → data send to Ethernet data through PHY chip (IP101) by AMBA bus dma mode.
7. the preferred embodiment 7 TDMA processing procedure of time slot (distribution according to need)
The uplink and downlink data can be the full-duplex communication modes, also can be the half-duplex operation modes.
Downlink data comprises: downlink signaling and downlink data two parts.Downlink signaling comprises synchronous head (being used for the synchronous of master-slave equipment), issue data from the end address (MAC Address number and the serial number that distributes), forward error correction, main end will be sought unification to dispatch to arbitrate to issue according to all time slot demand, priority that propose from end equipment and be allowed this to upload the length of time slot from end; Send data according to the time slot that main end issues to main end from end equipment.
Upstream data comprises: up signaling, upstream data.Up signaling comprises: (serial number to originally distributing from end with MAC Address and main end), next frame need be uploaded the length of payload user data, the priority of next frame data (annotate: the demand of this frame, the main next frame of holding issue the Shi Caihui response) from the end address, there are the length of the numeric data code that this frame brings according to main sort command, payload user data etc. in the back again.
Be illustrated in figure 5 as the left side and be that main end sends to is a certain from the end data form, right-hand member is a certainly to upload data format from end.
501 is that main end sends to a certain n frame from end data from end number, MAC Address, and the master holds according to land the number that the master holds from end during wherein from end, after for example first is held from end login master, from end number is that the number of the main end in 0, the 10 login is 9, by that analogy.Frame number represents that the data that transmit are the n frame, represents exactly to send to this from end from beginning to send to present the n time; MAC Address represents that this is that MAC Address from end.
502 is main end produces through arbitration according to the priority of this request of uploading from the end previous frame and the length of request msg, keeps for this size from the time slot of end, for uploading data according to this standard when the end next frame is uploaded data.
503 is the length code that is handed down to the n frame data, gives MAC Address equipment in 501, the data length of following after the expression length code.Length code has two kinds of method for expressing: (1) is directly represented with the byte number of following data.The advantage of this representation is that the data of being followed all are valid data, do not have unwanted filler.Shortcoming is: the figure place that the expression word length needs is many, and the transmission time is more scrappy; (2) represent with a timeslice.A timeslice can be transmitted a plurality of bytes, as representing with 1 that with 1024 bytes 2048 bytes are represented etc. with 2.The advantage of this mode: the data of expression word length are short, and the time is convenient to handle by the expression of a slice, a slice.Shortcoming: the end of last frame always is 1024 complete bytes usually, and discontented the needs fills, so efficient is relatively low.
504 is the data that the n frame issues, and just payload user data is the data that really will transmit.
509-513 is a certain from holding the n frame to upload data format.
509 for the address from end comprise this bag from end number and this MAC Address, and this frame number from end.From end number is that main end is distributed to this serial number from end, for example: 1 main end, 64 systems from end are from the serial number 0-63 of end; MAC Address is the MAC Address from end equipment; This frame is the n frame, so this frame number is n.
510 for originally uploading the priority of next frame tendency to develop data from end, a promptly following frame need be uploaded the priority of data, and we reserve 8, and the standard of existing IPv4 is 3.
511 for originally uploading the length of next frame tendency to develop data from end.
510,511 all is the priority of data of the transmission that needs of request next frame and the length of tendency to develop transmission of data, be after this data cached size of uploading data according to priority and this equipment needs of the setting of this equipment needs transmission data from end sends main end to, the main end according to all unify scheduling from the request of end in the native system.
If other are few from the resource that end needs, can satisfy this demand from end.Then main end is arbitrated, and transmits this data from end from holding sufficiently long time slot for this at next frame by these needs from end.
If other also need resource from end, then main end, is distributed to this and is uploaded data from holding suitable time slot to be used for this from end from the unified scheduling of size that end priority and needs transmit data according to each.
512 is the length that the n frame is uploaded data, and promptly this desires to upload data length from end, just the back length of data and then.
513 is that the n frame is uploaded the data data, i.e. payload user data.
Downlink data: it is main end basis respectively transmits the priority and the data of data from end equipment needs length scheduling that main end data sends to from end, is broadcast to each from end.Send to different MAC Address from the end basis, if these data from end then receive and decode from end; Then this frame is given up if not these data from end.
Upstream data: the timeslot scheduling of the upstream data length that to be main end upload data according to the priority of uploading from the end previous frame and needs is unified to arrange to give this from holding this frame to upload time slots.This arranges suitable data to upload for the size of the time slot of local terminal from end according to main end.
For the data of no initializtion, first frame data that for example main end sends, main end does not receive as yet from the request msg of bringing in.Then main end according to login from each time slot of end number mean allocation from end.
8. preferred embodiment 8 (from the negotiation of end data)
From the login of end equipment, utilize the CSMA/CA agreement to realize.In each time slot of uploading and descending to pass, there is one section very little time slot to adopt the CSMA/CA mode.The manner only is used for main end equipment and consults from end equipment, on main end equipment, finishes the registration of new equipment from the end facility registration.
Be illustrated in figure 6 as the theory diagram that utilizes the CSMA/CA registration, 601 is the MAC Address that the master holds, and 602 is the broadcasting commands that send, and 603 is a certain MAC Address of basis from holding according to the answer of 602 broadcasting commands from end, and 604 is the flag bit of replying.
Login has dual mode.Mode one, the roll-call mode.When main end sends one when calling the roll order, the MAC Address+0x01 (supposing that here 0x01 is the roll-call log on command) of main end, listed each from end according to the order of its login recall signal successively.Mode two, addition manner.When main end sends an addition manner, the MAC Address+0x02 of main end (supposing that here 0x02 adds order), that had logined does not reply from end equipment.Do not login after end equipment time-delay time with the captain, answer this from end MAC and reply and add command keyword 0x02, main end will add to from end equipment the login formation of main end according to the answer from end, generate one new for end equipment.If reply data bumps, then resend the interpolation command mode.Up to all login from end equipment till.
So just with all signing in to the main end equipment from end equipment.
Though in conjunction with the accompanying drawings embodiments of the present invention are described, those of ordinary skills can make various distortion or modification within the scope of the appended claims.

Claims (6)

1. based on the credible coaxial cable three-network integration system of the low-cost low-power consumption of SOC, comprise local side apparatus, ustomer premises access equipment, bridger;
Local side apparatus, ustomer premises access equipment are by formations such as SOC chip, high-speed AD/DA conversion chip, PHY chip, SDRAM chip, FlashROM chips;
SOC chip sdram interface, FLASH interface, MAC interface, USB interface, UART, GPIO, PLL module, dynamic reconfigurable accelerating engine; Wherein,
The dynamic reconfigurable accelerating engine is characterized in that: comprise encryption, deciphering, network intrusions control accelerating engine circuit layer; MAC layer channel arranged, and comprises priority and bandwidth, and time slot is arranged TDMA etc.; PHY layer: range finding, burst transfer, forward error correction, channel estimating, power control; Coding layer OFDM, QAM, QPSK modulation reach and the AD9865 interface;
In the two-way communication that realizes network data on the channel of coaxial cable (CATV) broadband analog signal 2-30MHz or on the frequency of 862MHz-2.5GHz, the program request signaling of leaving language phone VoIP and two-way interaction TV for that QoS priority is the highest in the network data is used, and remaining uses for the computer broadband networks; Realize broadband access network, IPTV; Keep to cable television network on the frequency range of 47MHz-862MHz and use, modulation anolog TV signals, digital television signal and IPQAM TV signal; Realize by the high-pass and low-pass filter frequency division, thereby realize that broadband networks, telephone network, the television network integration of three networks are in the coaxial cable net.
2. according to claim 1 based on the credible coaxial cable three-network integration system of the low-cost low-power consumption of SOC, its feature comprises: the local side coding, Ethernet data is input to the MII interface of the MAC of SOC chip through the PHY chip, through the AMBA bus, directly be sent to the dynamic reconfigurable accelerating engine by dma mode Through the legitimacy of network intrusions early warning, if data are illegal to abandon data, if data are legal with control accelerating engine and encrypt/decrypt accelerating engine judgment data MAC layer: according to the priority of data, by TDMA agreement arrangement time slot and bandwidth, if now be not time slot back transmission of this user side, if the time slot of this user side then sends immediately then buffer memory wait time slot arrives PHY layer: realize range finding, burst transfer, forward error correction, channel estimating, power control The coding layer: realization OFDM, QAM, QPSK modulation reach and the AD9865 interface, realize the data format of AD9865 and 32 bit data forms of SOC inside are changed, and realization are to the FEEDBACK CONTROL of AD9865 chip Data are sent to AD9865 and form analogue data output through D/A Amplify through OPA2674, the modulated analog signal that forms 2-30MHz transmits on coaxial cable, delivers to each ustomer premises access equipment.
3. according to claim 1 based on the credible coaxial cable three-network integration system of the low-cost low-power consumption of SOC, its feature comprises: local side decoding, the analog signal that sends from user side Be sent to AD9865 and be converted to data output through A/D The coding layer: with the Data Format Transform of AD9865 is 32bit data lattice The PHY layer: realize range finding, burst transfer, forward error correction, channel estimating, power control, control AD9865 makes the error rate minimum with the reception data of appropriate state The MAC layer: with the reduction of data that receives is original data Through the legitimacy of network intrusions early warning, if data are illegal to abandon data, if data are legal with control accelerating engine and encrypt/decrypt accelerating engine judgment data Data send to Ethernet data through the PHY chip by AMBA bus dma mode.
4. according to claim 1 based on the credible coaxial cable three-network integration system of the low-cost low-power consumption of SOC, its feature comprises: the user side coding, Ethernet data is input to the MII interface of the MAC of SOC chip through the PHY chip, through the AMBA bus, directly be sent to the dynamic reconfigurable accelerating engine by dma mode Through the legitimacy of network intrusions early warning, if data are illegal to abandon data, if data are legal with control accelerating engine and encrypt/decrypt accelerating engine judgment data MAC layer: wait for local side apparatus arrangement time slot and bandwidth, send the back then buffer memory wait time slot arrives if upload the time slot that is not this user side now, if the then transmission immediately of the time slot of this user side The PHY layer: realize range finding, burst transfer, forward error correction, channel estimating, power control, control AD9865 sends data with suitable parameter The coding layer: realization OFDM, QAM, QPSK modulation reach and the AD9865 interface, realize the data format of AD9865 and 32 bit data forms of SOC inside are changed, and realization are to the FEEDBACK CONTROL of AD9865 chip Data are sent to AD9865 and form analogue data output through D/A Amplify through OPA2674, the modulation signal that forms 2-30MHz send transmission at coaxial cable, delivers to local side apparatus.
5. according to claim 1 based on the credible coaxial cable three-network integration system of the low-cost low-power consumption of SOC, its feature comprises: user side decoding, the analog signal that sends from local side Be sent to AD9865 and form data output through A/D Coding layer: realize OFDM, QAM, QPSK demodulation and with the AD9865 interface, realize the data format of AD9865 and 32 bit data forms of SOC inside are changed, and realize FEEDBACK CONTROL the AD9865 chip The PHY layer: realize range finding, burst transfer, forward error correction, channel estimating, power control, thus the control AD9865 reception data of appropriate state MAC layer: if the data of this user side then are reduced to original data; Data if not this user side then abandon it Through the legitimacy of network intrusions early warning, if data are illegal to abandon data, if data are legal with control accelerating engine and encrypt/decrypt accelerating engine judgment data Data send to Ethernet data through the PHY chip by AMBA bus dma mode.
6. according to claim 1 based on the credible coaxial cable three-network integration system of the low-cost low-power consumption of SOC, its feature comprises: in the two-way communication that realizes network data on the channel of coaxial cable broadband analog signal 2-30MHz or on the frequency of 862MHz-2.5GHz, the program request signaling of leaving language phone VoIP and two-way interaction TV for that QoS priority is the highest in the network data is used, and remaining uses for the computer broadband networks; Realize broadband access network, IPTV; Keep to cable television network on the frequency range of 47MHz-862MHz and use, modulation anolog TV signals, digital television signal and IPQAM TV signal; Realize by the high-pass and low-pass filter frequency division, thereby realize that broadband networks, telephone network, the television network integration of three networks are in the coaxial cable net.
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CN101894433A (en) * 2010-07-09 2010-11-24 上海享云信息系统有限公司 POS card swiping system using cable television network
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CN102223574A (en) * 2010-04-13 2011-10-19 杭州初灵信息技术股份有限公司 Digital home intelligent terminal realization device for tri-network integration based on AVS (audio video standard)
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CN102223574A (en) * 2010-04-13 2011-10-19 杭州初灵信息技术股份有限公司 Digital home intelligent terminal realization device for tri-network integration based on AVS (audio video standard)
CN101894433A (en) * 2010-07-09 2010-11-24 上海享云信息系统有限公司 POS card swiping system using cable television network
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CN102307380A (en) * 2011-03-25 2012-01-04 杭州再灵电子科技有限公司 Automatic power control device for high-frequency radio frequency module
CN102170411A (en) * 2011-05-25 2011-08-31 杭州蓝联科技有限公司 Gateway applied to radio and television network
CN103379012A (en) * 2013-07-02 2013-10-30 广东星海数字家庭产业技术研究院有限公司 Network converging system facing convergence of three networks and achieving method
CN104639997A (en) * 2013-11-06 2015-05-20 马维尔国际贸易有限公司 Switching module and first network module of terminal user device
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CN105681721A (en) * 2014-11-21 2016-06-15 中兴通讯股份有限公司 Signal hybrid output method and device and control equipment
CN107425985A (en) * 2017-05-10 2017-12-01 北京光桥科技股份有限公司 Ethernet transceiver with encryption function
CN107425985B (en) * 2017-05-10 2020-09-15 北京光桥科技股份有限公司 Ethernet transceiver with encryption function

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