CN1996590B - Silicon-class electromigration testing heater structure - Google Patents
Silicon-class electromigration testing heater structure Download PDFInfo
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- CN1996590B CN1996590B CN 200510003371 CN200510003371A CN1996590B CN 1996590 B CN1996590 B CN 1996590B CN 200510003371 CN200510003371 CN 200510003371 CN 200510003371 A CN200510003371 A CN 200510003371A CN 1996590 B CN1996590 B CN 1996590B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
This invention relates to one silicon electric transfer test and heating structure, which imbeds metal Wu wires between first layer of metal dielectric layer or each metal dielectric layers to lead out electrode to form Wu heater structure; the Wu heater can heat metal connection wire or holes for evaluation directly on silicon slice to reduce test time.
Description
Technical field
The present invention relates to field of IC technique, the heater structure that relates to a kind of integrated circuit metal interconnecting wires reliability of technology test, particularly a kind of tungsten heater structure that is used for the reliability testing of silicon chip level integrated circuit metal interconnecting charge transfer.
Background technology
Along with the continuous development of ic manufacturing technology, transistorized minimum feature is constantly dwindled, and the size that connects these transistorized metal interconnecting wires is also constantly being dwindled.Main flow technology has been deep into 90 nanoscales at present.Though the integrated circuit manufacturing equipment is accurate day by day, the chip of producing still can not very meet the demands.Even this is because can guarantee without any mistake in design level, the deficiency of introducing ground defective or manufacturing process itself in the manufacturing process still can make the chip functions forfeiture.Wherein, the ELECTROMIGRATION PHENOMENON of metal interconnecting wires more and more becomes the chip reliability failure cause that industry is paid close attention to.
So-called ELECTROMIGRATION PHENOMENON is meant that chip electric current when work can produce heat accumulation and cause the chip self-temperature to rise, this just makes the metallic atom thermal vibration aggravate, and the electronics of directed movement and a large amount of collisions of the generation of the metallic atom on the lattice on the other hand, energy exchange takes place, and promotes metallic atom and advances along the electron motion direction.Must cause in this case along heap-shaped Chengqiu shape projection on the metallic atom direction of motion, and on opposite direction, form the cavity.If the hillock of projection constantly increases, the plain conductor that may touch the next-door neighbour the most at last causes short circuit and causes chip failure; If the continuous increase in reciprocal on the other hand cavity will cause metal wire to disconnect fully.For improving this phenomenon, people have attempted thousand and one way, as add a little copper atom or silicon atom in the aluminium line, can improve the electromigration lifetime of aluminum interconnecting so greatly; And enter into 0.13 micron technology node when following, aluminum interconnecting is then replaced by copper interconnecting line fully, one of them main cause with regard to the electromigration effect of copper metallic atom a little less than than aluminium many.
Yet more experiment shows, no matter is aluminium or copper interconnecting line, and its electromigration effect can only improve and can't eradicate.Electromigration effect not only depends on material itself, also depends on the structure of interconnection line, also has external process condition etc. as crystallite dimension size, grain orientation, barrier layer structure.So its electromigration ability of metal interconnecting wires that different company makes all is not quite similar.Therefore the electromigration lifetime of accurately testing and estimate metal interconnecting wires and through hole/contact hole thereof under unified standard seems particularly crucial.
From testing standard, industry is generally accepted at present is the JEDEC standard of the U.S., careful electromigration mechanism of production and the physical model described of this standard provided specific test structure and method of testing, and wherein accepting extensively a physics of failure model is the Black equation.Use the Black equation can carry out the estimation of metal connecting line electromigration lifetime.
T wherein
50Be the median life of specimen, A is the constant relevant with the test structure geometric properties, and N is the exponential factor that applies electric current, E
ABe and the activation energy of temperature correlation, k is a Boltzmann constant, and T is temperature (kelvin degree).E
ACan measure by experiment with N. therefore, can make electrotransport process quicken by strengthening electric current and raising method of temperature, specimen lost efficacy within a short period of time, be extrapolated to life-span under operating current and the state with this life-span again, just can obtain the deelectric transferred ability of tested structure. the general work condition is decided to be 110 ℃ approximately, operating current is the electric current under the electrical design rule, and the electromigration lifetime standard that industry is generally acknowledged is 10 years.
Electro-migration testing method (the Electromigration of present more employing, be called for short EM) be with behind the wafer dicing, again single test cell (DUT) encapsulation is got up to carry out the EM test, the general the simplest dual inline type (DIP) that adopts encapsulates, because this encapsulation format is very quick and cost is lower.The EM test is that a batch sample is carried out simultaneously, can be tens even up to a hundred.DUT after the encapsulation is inserted in respectively on the beta version, puts into baking oven, and elevated temperature also applies electric current and begins EM test.Generally between 150-250 ℃, current density is between 0.5-2MA/cm2 for this package level EM probe temperature.Can on DUT, introduce considerable joule heating effect (Joule Heating) if electric current is excessive, influence test result.The remarkable benefit of package level EM test is once can test large quantities of DUT, can analyze the result with the method for statistical analysis, obtains the life-span of EM at last.Shortcoming is the process more complicated, needs scribing, encapsulation, and requires by special beta version; Temperature uniformity is difficult to guarantee that temperature fluctuation influences highly significant to the EM test result in the baking oven; In addition test period also long, general minimumly want 500 hours (i.e. the time in three weeks), if the DUT that lost efficacy fewer than half also to continue test, so consuming time longer.This point seems comparatively harsh concerning exploitation coming of new technology and the anxious foundry service enterprise (foundry service) that must come into the market.
So the method for EM test occurred directly carrying out on silicon chip, this method is omitted steps such as scribing and encapsulation, i.e. silicon chip level EM method of testing.Its principle is to apply a big electric current on DUT, utilizes joule heating effect to make it rapid intensification, and general temperature can be raised to 300-350 ℃, and current density is between 9-20MA/cm2.Each DUT testing time approximately needs about tens seconds to a few minutes, and the time shortens greatly.Even need test dozens of DUT like this, the total time of cost is still very of short duration.A very big dispute part of this method is to be difficult to the EM life-span is extrapolated under the condition of work, because the mechanism of degradation failure may differ widely with the inefficacy that powerful joule heating effect causes under the condition of work.Thereby this method in actual evaluation, use fewer.
Afterwards, the way of a kind of employing polycrystalline silicon conducting wire heating (Poly Heater) has been carried, and sees also Fig. 1 (vertical view) and Fig. 2 (cross section).This method is placed on metal connecting line EM test on the silicon chip carries out, and avoids DUT to go up simultaneously and produces the problem that a large amount of Joule heats bring.What still utilize here is joule heating effect, and only Fa Re task is finished by a polycrystalline silicon conducting wire.Its remarkable advantage is that polycrystalline silicon conducting wire can be finished when depositing metal-silica-silicon field-effect transistor (MOSFET) polysilicon electrode simultaneously, additionally lay photoetching mask plate and other unnecessary steps.As depicted in figs. 1 and 2, polysilicon heater 1 is between the dielectric layer 6 between silicon substrate 2 and device layer and the ground floor metal connecting line, be the Kelvin's structure 3 as the metal wire electro-migration testing above the dielectric layer 6 between device layer and the ground floor metal connecting line, polysilicon heater 1 links to each other with metal external electrode 5 by contact hole 4.The polycrystalline silicon conducting wire of bottom can be used as the temperature of heating source when providing the EM test for the plain conductor/contact hole/through hole on upper strata.Delivered out with the EM data of polysilicon heater method test in a large number, but as if it does not become the industry universal standard so far yet.Wherein most important reason is: polysilicon heater is in the bottom, because the heat insulation effect of inter-level dielectric, temperature will decay significantly when passing to top wire.Have data to show, if the polysilicon heater temperature at 700 ℃, then the ground floor metal temperature is 540 ℃, visible inter-level dielectric will absorb 160 ℃ at least.Dropped to 60 ℃ according to linear relationship when then temperature arrives the 4th layer of metal wire, and in fact may be even worse.Therefore, polysilicon heater is used the test that is confined near underlying metal line EM, again toward the upper strata then polysilicon heater can't bear high temperature himself can take place the migration (silicide is arranged at the polysilicon top until burning, logical big electric current heating back silicide can undergo phase transition, it is big that resistance also can the phase strain, last even may electromigration take place prior to DUT); Then owing to bigger temperature gradient, the bottom and the head temperature of contact hole/through hole/through hole string differ greatly, and can't obtain correct test result for contact hole/through hole/through hole string.These factors are bigger to have limited the application of polysilicon heater in electro-migration testing.
Summary of the invention
The object of the present invention is to provide a kind of silicon-class electromigration testing heater structure, adopt tungsten as heater, mode by direct accelerated test EM on silicon chip is estimated metallization process, obtain EM test result fast and accurately, and extrapolation obtains the deelectric transferred life-span of metal wire/through hole/contact hole.
The present invention is achieved by the following technical solutions: a kind of silicon-class electromigration testing heater structure, in the dielectric layer between device substrate layer and ground floor metal or in the dielectric layer between each layer metal, bury the tungsten line underground, tungsten line extraction electrode, tungsten line extraction electrode, this tungsten line are paliform and are arranged at the both sides of the contact hole of this silicon chip or through hole and connect whole dielectric layer with the contact hole that forms this silicon chip or the tungsten heater structure of through hole.
Wherein, described tungsten line is the sinuous structure of crawling, and also can be the irregular curve structure.
Tungsten heater of the present invention can heat metal interconnecting wires or through hole/contact hole, and the deelectric transferred merit rating of metal interconnecting wires or through hole/contact hole just can directly carry out on silicon chip like this, in the testing time shortens to hour.The tungsten heater can add each layer metal connecting line or contact hole/through hole/through hole string below or next door to, heats up for it conveniently and exactly; And that tungsten heater structure of the present invention is made is simple, fully can with present integrated circuit fabrication process compatibility, also need not do big change to flow process, but aspect test, can shorten the testing time greatly, save cost and also accelerate the new process development progress.
Description of drawings
Fig. 1 is the schematic top plan view of polysilicon heater.
Fig. 2 is the cross sectional representation of polysilicon heater.
Fig. 3 is that tungsten line heater and metal wire to be measured are made the schematic top plan view when finishing.
Fig. 4 is that tungsten line heater and metal wire to be measured are made the cross sectional representation when finishing.
Fig. 5 is that tungsten line heater and metal wire to be measured/through hole string are made the schematic top plan view when finishing.
Fig. 6 is that tungsten line heater and metal wire to be measured/through hole string are made the cross sectional representation when finishing.
Number in the figure:
The 1st, polysilicon heater 2 is silicon substrates
The 3rd, as Kelvin's structure of metal wire electro-migration testing
The 4th, the contact hole of connection metal external electrode and underlying polysilicon heater
The 5th, metal external electrode 6 is the dielectric layers between device layer and the ground floor metal connecting line
The 7th, the tungsten line that the metal wire electro-migration testing is used
The 8th, as Kelvin's structure of metal wire/through hole crosstalk migration test
The 9th, the tungsten line of metal wire/through hole crosstalk migration test usefulness
The 10th, the medium between ground floor metal wire and the second layer metal line
The 11st, contact hole to be tested or through hole
Embodiment
At described three kinds of metal wire/through holes/contact hole EM method of testing limitation separately before, a kind of new heater structure of the present invention, promptly utilize the heater structure of tungsten, directly the EM. tungsten of test metal wire/through hole/contact hole is a kind of good electric heating material on silicon chip: fusing point is 3387 ℃, and the fusing point of aluminium and copper is respectively 660 ℃ and 1085 ℃, and the thermal stability of tungsten is far better by contrast; The tungsten stable chemical performance, resistance to corrosion is more intense; The thermal coefficient of expansion of tungsten is very little and very near silicon, and the thermal stress between it and the silicon is just very little like this.
Now in conjunction with the accompanying drawings, the specific embodiment of the present invention is described in further detail:
As shown in Figure 3 and Figure 4, can be with tungsten line 7 as electric heater, in the dielectric layer 6 of tungsten line 7 between device substrate layer 2 and ground floor metal, it above the dielectric layer 6 between device layer and the ground floor metal connecting line Kelvin's structure 3 as the metal wire electro-migration testing, tungsten line 7 is positioned at the below of Kelvin's structure (tested metal wire) 3, the tungsten line is drawn through metal external electrode 5 by tungsten contact hole 4, on electrode, apply voltage or current flow heats tungsten line 7, form the electromigration reliability test tungsten heater structure of test metal wire.
Wherein, tungsten line 7 can be in the dielectric layer that is embedded between device substrate layer and the ground floor metal, also can be embedded in the dielectric layer between each layer metal.The tungsten line is positioned at the below of test structure, is the sinuous structure or be the irregular curve structure of crawling.Tungsten heater 7 of the present invention can provide the thermal source of intensification for the last layer metal wire, and therefore, the tungsten line on the ground floor medium can be as the heater of second layer metal; Tungsten line on the second layer medium can be as the heater of three-layer metal, and and the like to top wire.
As shown in Figure 5 and Figure 6, also can be with tungsten line 9 as electric heater, in the medium 10 of tungsten line 9 between ground floor metal wire and second layer metal line, tungsten line 9 is positioned at the both sides of tested contact hole or through hole 11, be the paliform structure, it above the medium 10 between ground floor metal wire and the second layer metal line Kelvin's structure 8 as metal wire/through hole crosstalk migration test, tungsten line 9 is drawn through metal external electrode 5 by tungsten contact hole 4, on electrode, apply voltage or current flow heats tungsten line, form the electromigration reliability test tungsten heater structure of test contact hole or through hole.
Wherein, tungsten line 9 can be in the dielectric layer that is embedded between device substrate layer and the ground floor metal, also can be that the tungsten line is positioned at the both sides of test structure in the dielectric layer that is embedded between each layer metal, is the paliform structure.Adopt to connect bilevel tungsten wiregrating hurdle, this heater can obtain an equally distributed warm area of three-dimensional.
Heater material of the present invention is the contact hole packing material-tungsten that generally uses in the present cmos process flow, and it is through checking, the electric conducting material with high-melting-point, high stability and good resistance electromigration ability.The deelectric transferred ability of tungsten is very high, temperature can be raised to very high and needn't worry whether heater itself electromigration takes place, and its resistance amplitude of variation in time also can be ignored.Metal wire or through hole to different layers can provide thermal source nearby in addition, makes it can test the EM of nearly all different layers metal wire and through hole easily.And, both can adopt the method for laying the tungsten heater at bottom for the test of bottom contact hole EM, and can continue to use the method that the combination of polysilicon heater and tungsten heater is used again, be easy to realization in technological process.
Though disclose the preferred embodiments of the present invention, those skilled in the art will appreciate that under the situation that does not deviate from disclosed scope of the present invention in claims any various modifications, interpolation and replacement all belong to protection scope of the present invention.
Claims (3)
1. silicon-class electromigration testing heater structure, it is characterized in that: in the dielectric layer between device substrate layer and ground floor metal or in the dielectric layer between each layer metal, bury the tungsten line underground, tungsten line extraction electrode, this tungsten line are paliform and are arranged at the both sides of the contact hole of this silicon chip or through hole and connect whole dielectric layer with the contact hole that forms this silicon chip or the tungsten heater structure of through hole.
2. a kind of silicon-class electromigration testing heater structure as claimed in claim 1 is characterized in that: described tungsten line is the sinuous structure of crawling.
3. a kind of silicon-class electromigration testing heater structure as claimed in claim 1 is characterized in that: described tungsten line is the irregular curve structure.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200510003371 CN1996590B (en) | 2005-12-31 | 2005-12-31 | Silicon-class electromigration testing heater structure |
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| Application Number | Priority Date | Filing Date | Title |
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| CN 200510003371 CN1996590B (en) | 2005-12-31 | 2005-12-31 | Silicon-class electromigration testing heater structure |
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| CN1996590A CN1996590A (en) | 2007-07-11 |
| CN1996590B true CN1996590B (en) | 2010-05-12 |
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Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102760727B (en) * | 2011-04-27 | 2015-06-03 | 中芯国际集成电路制造(上海)有限公司 | Testing device and method of electromigration of interconnection line |
| US9347985B2 (en) * | 2011-08-04 | 2016-05-24 | Nanya Technology Corp. | Via chain testing structure and method |
| CN103137610B (en) * | 2011-11-25 | 2015-07-08 | 中芯国际集成电路制造(上海)有限公司 | Micro-heating device and forming method |
| CN103137607B (en) * | 2011-12-02 | 2015-11-25 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor failure detection architecture and formation method, the method for detection out-of-service time |
| CN103187397B (en) * | 2011-12-27 | 2015-09-02 | 中芯国际集成电路制造(上海)有限公司 | Micro-heater |
| CN108152699B (en) * | 2017-12-27 | 2020-07-10 | 中国电子产品可靠性与环境试验研究所 | Electromigration service life testing device and testing method of contact hole |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1568430A (en) * | 2001-10-26 | 2005-01-19 | 国际商业机器公司 | Method and apparatus for accelerated determination of electromigration characteristics of semiconductor wiring |
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Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1568430A (en) * | 2001-10-26 | 2005-01-19 | 国际商业机器公司 | Method and apparatus for accelerated determination of electromigration characteristics of semiconductor wiring |
Non-Patent Citations (5)
| Title |
|---|
| JP特开平11-204607A 1999.07.30 |
| JP特开平5-326662A 1993.12.10 |
| JP特开平6-151537A 1994.05.31 |
| JP特开平7-201944A 1995.08.04 |
| JP特开平9-55416A 1997.02.25 |
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