CN1937182A - 用于形成用于应变硅mos晶体管的第二隔片的方法和结构 - Google Patents
用于形成用于应变硅mos晶体管的第二隔片的方法和结构 Download PDFInfo
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- CN1937182A CN1937182A CNA2005100299921A CN200510029992A CN1937182A CN 1937182 A CN1937182 A CN 1937182A CN A2005100299921 A CNA2005100299921 A CN A2005100299921A CN 200510029992 A CN200510029992 A CN 200510029992A CN 1937182 A CN1937182 A CN 1937182A
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- 238000000034 method Methods 0.000 title claims abstract description 96
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 13
- 239000010703 silicon Substances 0.000 title claims abstract description 13
- 238000005192 partition Methods 0.000 title description 2
- 239000010410 layer Substances 0.000 claims abstract description 80
- 239000000463 material Substances 0.000 claims abstract description 36
- 239000011241 protective layer Substances 0.000 claims abstract description 27
- 239000004065 semiconductor Substances 0.000 claims abstract description 24
- 239000000758 substrate Substances 0.000 claims abstract description 19
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 15
- 238000005530 etching Methods 0.000 claims abstract description 14
- 230000008569 process Effects 0.000 claims abstract description 11
- 229910052732 germanium Inorganic materials 0.000 claims abstract 3
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims abstract 3
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims description 27
- 230000015572 biosynthetic process Effects 0.000 claims description 22
- 125000006850 spacer group Chemical group 0.000 claims description 21
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 claims description 18
- 239000012535 impurity Substances 0.000 claims description 11
- 238000000059 patterning Methods 0.000 claims description 8
- 150000004767 nitrides Chemical class 0.000 claims description 7
- 238000000151 deposition Methods 0.000 claims description 6
- 230000008021 deposition Effects 0.000 claims description 6
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 4
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 4
- 229910052698 phosphorus Inorganic materials 0.000 claims description 4
- 239000011574 phosphorus Substances 0.000 claims description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 4
- 239000002210 silicon-based material Substances 0.000 claims description 3
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 claims description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 7
- 239000000377 silicon dioxide Substances 0.000 abstract description 3
- 238000005457 optimization Methods 0.000 abstract 1
- 238000004519 manufacturing process Methods 0.000 description 8
- 230000004048 modification Effects 0.000 description 6
- 238000012986 modification Methods 0.000 description 6
- 238000012856 packing Methods 0.000 description 6
- 229910021332 silicide Inorganic materials 0.000 description 6
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 6
- 230000008901 benefit Effects 0.000 description 5
- 238000013461 design Methods 0.000 description 5
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 4
- 229910052796 boron Inorganic materials 0.000 description 4
- 238000002955 isolation Methods 0.000 description 4
- 229910052785 arsenic Inorganic materials 0.000 description 3
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 3
- 238000011065 in-situ storage Methods 0.000 description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
- 229920005591 polysilicon Polymers 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 2
- 230000000717 retained effect Effects 0.000 description 2
- 229910010271 silicon carbide Inorganic materials 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- 238000011066 ex-situ storage Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- -1 silicon-oxygen nitride Chemical class 0.000 description 1
- 229910021341 titanium silicide Inorganic materials 0.000 description 1
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 description 1
- 229910021342 tungsten silicide Inorganic materials 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66545—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823814—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823864—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate sidewall spacers, e.g. double spacers, particular spacer material or shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66636—Lateral single gate silicon transistors with source or drain recessed by etching or first recessed by etching and then refilled
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
- H01L29/7848—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being located in the source/drain region, e.g. SiGe source and drain
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
Description
Claims (20)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNB2005100299921A CN100536090C (zh) | 2005-09-19 | 2005-09-19 | 形成cmos半导体器件的方法 |
US11/243,707 US7591659B2 (en) | 2005-09-19 | 2005-10-04 | Method and structure for second spacer formation for strained silicon MOS transistors |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNB2005100299921A CN100536090C (zh) | 2005-09-19 | 2005-09-19 | 形成cmos半导体器件的方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1937182A true CN1937182A (zh) | 2007-03-28 |
CN100536090C CN100536090C (zh) | 2009-09-02 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2005100299921A Active CN100536090C (zh) | 2005-09-19 | 2005-09-19 | 形成cmos半导体器件的方法 |
Country Status (2)
Country | Link |
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US (1) | US7591659B2 (zh) |
CN (1) | CN100536090C (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104733530A (zh) * | 2013-12-20 | 2015-06-24 | 国际商业机器公司 | 应变半导体纳米线 |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1937183A (zh) * | 2005-09-19 | 2007-03-28 | 中芯国际集成电路制造(上海)有限公司 | 使用应变硅晶体管栅极图案化用硬掩模的方法和结构 |
CN100442476C (zh) * | 2005-09-29 | 2008-12-10 | 中芯国际集成电路制造(上海)有限公司 | 用于cmos技术的应变感应迁移率增强纳米器件及工艺 |
US7880241B2 (en) * | 2007-02-23 | 2011-02-01 | International Business Machines Corporation | Low-temperature electrically activated gate electrode and method of fabricating same |
US20080286932A1 (en) * | 2007-05-17 | 2008-11-20 | Dongbu Hitek Co., Ltd. | Method of manufacturing semiconductor device |
US8143131B2 (en) * | 2009-03-31 | 2012-03-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of fabricating spacers in a strained semiconductor device |
CN103545183B (zh) * | 2012-07-12 | 2016-06-29 | 中芯国际集成电路制造(上海)有限公司 | Cmos器件及其制作方法 |
KR101986538B1 (ko) | 2012-09-21 | 2019-06-07 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
US9953876B1 (en) * | 2016-09-30 | 2018-04-24 | Globalfoundries Inc. | Method of forming a semiconductor device structure and semiconductor device structure |
CN110620084B (zh) * | 2019-08-29 | 2022-04-08 | 上海华力微电子有限公司 | 半导体器件的形成方法 |
CN116453941B (zh) * | 2023-06-16 | 2023-08-22 | 粤芯半导体技术股份有限公司 | 一种栅极结构及制作方法 |
Family Cites Families (16)
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WO1998059365A1 (en) | 1997-06-24 | 1998-12-30 | Massachusetts Institute Of Technology | CONTROLLING THREADING DISLOCATION DENSITIES IN Ge ON Si USING GRADED GeSi LAYERS AND PLANARIZATION |
US6071783A (en) * | 1998-08-13 | 2000-06-06 | Taiwan Semiconductor Manufacturing Company | Pseudo silicon on insulator MOSFET device |
US6179973B1 (en) | 1999-01-05 | 2001-01-30 | Novellus Systems, Inc. | Apparatus and method for controlling plasma uniformity across a substrate |
US6214679B1 (en) * | 1999-12-30 | 2001-04-10 | Intel Corporation | Cobalt salicidation method on a silicon germanium film |
JP2003520444A (ja) | 2000-01-20 | 2003-07-02 | アンバーウェーブ システムズ コーポレイション | 高温成長を不要とする低貫通転位密度格子不整合エピ層 |
US6251242B1 (en) | 2000-01-21 | 2001-06-26 | Applied Materials, Inc. | Magnetron and target producing an extended plasma region in a sputter reactor |
US6277249B1 (en) | 2000-01-21 | 2001-08-21 | Applied Materials Inc. | Integrated process for copper via filling using a magnetron and target producing highly energetic ions |
US6352629B1 (en) | 2000-07-10 | 2002-03-05 | Applied Materials, Inc. | Coaxial electromagnet in a magnetron sputtering reactor |
US6406599B1 (en) | 2000-11-01 | 2002-06-18 | Applied Materials, Inc. | Magnetron with a rotating center magnet for a vault shaped sputtering target |
US6563152B2 (en) | 2000-12-29 | 2003-05-13 | Intel Corporation | Technique to obtain high mobility channels in MOS transistors by forming a strain layer on an underside of a channel |
US6514836B2 (en) | 2001-06-04 | 2003-02-04 | Rona Elizabeth Belford | Methods of producing strained microelectronic and/or optical integrated and discrete devices |
TW487976B (en) * | 2001-06-05 | 2002-05-21 | United Microelectronics Corp | Method of fabricating a transistor |
US6730196B2 (en) | 2002-08-01 | 2004-05-04 | Applied Materials, Inc. | Auxiliary electromagnets in a magnetron sputter reactor |
US6812073B2 (en) * | 2002-12-10 | 2004-11-02 | Texas Instrument Incorporated | Source drain and extension dopant concentration |
US7112495B2 (en) * | 2003-08-15 | 2006-09-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Structure and method of a strained channel transistor and a second semiconductor component in an integrated circuit |
US7135724B2 (en) * | 2004-09-29 | 2006-11-14 | International Business Machines Corporation | Structure and method for making strained channel field effect transistor using sacrificial spacer |
-
2005
- 2005-09-19 CN CNB2005100299921A patent/CN100536090C/zh active Active
- 2005-10-04 US US11/243,707 patent/US7591659B2/en active Active
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104733530A (zh) * | 2013-12-20 | 2015-06-24 | 国际商业机器公司 | 应变半导体纳米线 |
US10056487B2 (en) | 2013-12-20 | 2018-08-21 | International Business Machines Corporation | Strained semiconductor nanowire |
CN104733530B (zh) * | 2013-12-20 | 2019-01-15 | 国际商业机器公司 | 应变半导体纳米线 |
US10580894B2 (en) | 2013-12-20 | 2020-03-03 | International Business Machines Corporation | Strained semiconductor nanowire |
Also Published As
Publication number | Publication date |
---|---|
US7591659B2 (en) | 2009-09-22 |
US20070077716A1 (en) | 2007-04-05 |
CN100536090C (zh) | 2009-09-02 |
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Effective date of registration: 20111129 Address after: 201203 Shanghai City, Pudong New Area Zhangjiang Road No. 18 Co-patentee after: Semiconductor Manufacturing International (Beijing) Corporation Patentee after: Semiconductor Manufacturing International (Shanghai) Corporation Address before: 201203 Shanghai City, Pudong New Area Zhangjiang Road No. 18 Patentee before: Semiconductor Manufacturing International (Shanghai) Corporation |