CN1853274A - 半导体装置及其制造方法 - Google Patents

半导体装置及其制造方法 Download PDF

Info

Publication number
CN1853274A
CN1853274A CNA2004800266616A CN200480026661A CN1853274A CN 1853274 A CN1853274 A CN 1853274A CN A2004800266616 A CNA2004800266616 A CN A2004800266616A CN 200480026661 A CN200480026661 A CN 200480026661A CN 1853274 A CN1853274 A CN 1853274A
Authority
CN
China
Prior art keywords
electrode
semiconductor substrate
wiring substrate
semiconductor device
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CNA2004800266616A
Other languages
English (en)
Other versions
CN100440520C (zh
Inventor
小林宏也
村松雅治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hamamatsu Photonics KK
Original Assignee
Hamamatsu Photonics KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hamamatsu Photonics KK filed Critical Hamamatsu Photonics KK
Publication of CN1853274A publication Critical patent/CN1853274A/zh
Application granted granted Critical
Publication of CN100440520C publication Critical patent/CN100440520C/zh
Anticipated expiration legal-status Critical
Active legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/90Methods for connecting semiconductor or solid state bodies using means for bonding not being attached to, or not being formed on, the body surface to be connected, e.g. pressure contacts using springs or clips
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14636Interconnect structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/1464Back illuminated imager structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/148Charge coupled imagers
    • H01L27/14806Structural or functional details thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/812Applying energy for connecting
    • H01L2224/81201Compression bonding
    • H01L2224/81203Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/81801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83191Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83194Lateral distribution of the layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01004Beryllium [Be]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01015Phosphorus [P]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01058Cerium [Ce]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/15786Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787Ceramics, e.g. crystalline carbides, nitrides or oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19043Component type being a resistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30105Capacitance

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Manufacturing & Machinery (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Wire Bonding (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

根据本发明,在该半导体装置中,能够防止半导体基板的薄型化部分的弯曲和破裂,维持对光检测单元的高精度聚焦和在光检测单元中的高灵敏度的均匀性和稳定性。半导体装置(1)备有半导体基板(10)、配线基板(20)、导电性突起(30)和树脂(32)。在半导体基板(10)中形成CCD(12)和薄型化部分(14)。半导体基板(10)的电极(16)经过导电性突起(30)与配线基板(20)的电极(22)连接。在薄型化部分(14)的外缘部分(15)与配线基板(20)之间的空隙中,为了增强导电性突起(30)的接合强度,充填绝缘性树脂(32)。该树脂(32)是以残留薄型化部分(14)与配线基板(20)之间的空隙的周围的一部分地包围该空隙的周围的方式预先形成的树脂片。

Description

半导体装置及其制造方法
技术领域
本发明涉及半导体装置,特别是涉及背面入射型的半导体装置。
背景技术
至今作为某种半导体装置,所谓的背面入射型的半导体光检测装置是众所周知的。这种半导体装置具有半导体基板,在该半导体基板的一个面上具有光检测单元。而且,在半导体基板中,光检测单元和在相反一侧削去半导体基板的一部分而形成有凹部。因此,在半导体基板中,设置光检测单元所在的薄型化部分。该薄型化部分是与在厚的半导体基板中被吸收不能够高灵敏度地检测出来的紫外线、软X射线、电子射线等能量射线对应地设置的,在该薄型化部分中,用光检测单元检测入射到半导体基板的凹部侧的面上的光。
作为背面入射型的半导体装置的一种,是具有BT-CCD(背面入射薄板型CCD)的半导体装置。将BT-CCD用作半导体检查装置的检测单元。作为具有BT-CCD的已有半导体装置,例如是专利文献1中记载的那种装置。
图7是表示专利文献1中记载的半导体装置的构成的剖面图。如图7所示,经过金属突起105,在固定在包装组件101内的底部上的配线基板102上,设置作为在与该配线基板102相对向的面上具有CCD103的半导体基板的P型硅层104。在一端与金属突起105连接的配线基板102上的配线106的另一端上,设置用于从外部取出检测信号的结合片(图中未画出),该结合片通过接合线107与包装组件101的引线端子(图中未画出)电连接。进一步,在配线基板102与P型硅层104之间的空隙中,充填为了增强金属突起105的接合强度的下部充填树脂108。
专利文献1:日本特开平6-196680号专利公报
但是,如图7图所示,当将下部充填树脂充填在半导体基板的薄型化部分与配线基板之间时,存在着在下部充填树脂固化时进行的加热或冷却时,由于在下部充填树脂与半导体基板之间由于两者的热膨胀系数不同产生的应力,使薄型化部分发生破裂的情形。又,即便不破裂,也存在着由收缩的下部充填树脂产生的拉伸使薄型化部分弯曲的情形。也存在着当半导体基板的薄型化部分这样地发生弯曲而使用半导体装置时,对光检测单元的聚焦和光检测单元中的灵敏度的均匀性和稳定性产生恶劣影响的情形。
发明内容
本发明就是鉴于上述课题提出的,本发明的目的是提供能够防止半导体基板的薄型化部分的弯曲和破裂,维持对光检测单元的高精度聚焦和在光检测单元中的高灵敏度的均匀性和稳定性的半导体装置及其制造方法。
为了解决上述课题,该半导体装置的特征是它包括:具有在一个面上形成的光检测单元、通过蚀刻另一个面的与光检测单元相对向的区域形成的薄型化部分、和设置在该薄型化部分的外缘部分的一个面上的、与光检测单元电连接的第一电极的半导体基板;具有与半导体基板的一个面侧相对向配置,经过导电性突起与第一电极连接的第二电极的配线基板;和为了增强第一电极和第二电极中的各个电极与导电性突起的接合强度,充填在薄型化部分的外缘部分与配线基板之间的空隙中的树脂,树脂是以残留薄型化部分与配线基板之间的空隙的周围的一部分地包围该空隙周围的方式预先形成的树脂片。
在该半导体装置中,将树脂充填在薄型化部分的外缘部分与配线基板之间的空隙中。因此,增强了设置在薄型化部分的外缘部分的第一电极与导电性突起的接合强度、和该导电性突起与配线基板的第二电极的接合强度。另一方面,因为在半导体基板的薄型化部分与配线基板之间的空隙中不充填树脂,所以当树脂固化时等进行的加热或冷却时,即便在树脂与半导体基板之间由于两者的热膨胀系数不同产生应力,因为该应力对薄型化部分的影响很小,所以能够防止薄型化部分的弯曲和破裂。所以,该半导体装置,在使用时,可以实现对光检测单元的高精度聚焦和能够呈现光检测单元中的高灵敏度的均匀性和稳定性。
进一步,作为上述树脂,用预先形成所要的形状,即残留薄型化部分与配线基板之间的空隙的周围的一部分地包围该空隙周围的形状的树脂片。因此,能够容易并且确实地实现残留薄型化部分与配线基板之间的空隙,在存在导电性突起的空隙即薄型化部分的外缘部分与配线基板之间的空隙中充填树脂的构成。
又,存在着由上述树脂完全包围薄型化部分与配线基板之间的空隙,形成密闭空间的情形。这时,当树脂固化时等进行的加热或冷却时,由于密闭空间内的空气膨胀或收缩,薄型化部分发生弯曲。对于这种问题,在该半导体装置中,通过树脂,残留上述空隙的周围的一部分地包围该空隙周围的构成,能够防止使上述空隙密闭。而且,通过用预先形成的树脂片,也能够容易并且确实地实现这种构成。
光检测单元也可以将具有一维或二维地配列的多个像素作为特征。这时,因为要求在多个像素之间具有高灵敏度的均匀性和稳定性,所以根据本发明的半导体装置变得特别有用。
又,与本发明有关的半导体装置的制造方法的特征是该方法备有:准备好具有在一个面上形成的光检测单元、通过蚀刻另一个面的与上述光检测单元相对向的区域形成的薄型化部分、和设置在该薄型化部分的外缘部分的上述一个面上的、与上述光检测单元电连接的第一电极的半导体基板的工序;准备好具有与半导体基板的上述一个面侧相对向配置,经过导电性突起与上述第一电极连接的第二电极的配线基板的工序;将固体的树脂片贴附在上述半导体基板的上述另一个面上的预定区域上的工序;和将具有上述树脂片的上述半导体基板热压接在上述配线基板上的工序,以残留薄型化部分与上述配线基板之间的空隙的周围的一部分地包围该空隙周围的方式设定预定区域。
这时,通过贴附树脂片能够容易地制造具有上述功能的半导体装置。
如果根据本发明,则可以实现能够防止半导体基板的薄型化部分的弯曲和破裂,维持对光检测单元的高精度聚焦和在光检测单元中的高灵敏度的均匀性和稳定性的半导体装置。
附图说明
图1是表示根据本发明的半导体装置的一个实施方式的剖面图。
图2是用于说明图1的树脂32的构成的平面图。
图3是用于说明制造图1的半导体装置1的方法的一个例子的剖面图。
图4是表示图1的配线基板20的一个构成例的平面图。
图5是表示与图4的构成例有关的配线基板20的内部配线的构成的剖面图。
图6是用于说明图5的内部配线60的构成的剖面图。
图7是表示已有的半导体装置的构成的剖面图。
标号说明:1........半导体装置;10........半导体基板;14........薄型化部分;15........外缘部分;16........电极;18........累积层;20........配线基板;22........电极;24........引线端子;28........芯片电阻;30........导电性突起;32........树脂;34........连通单元。
具体实施方式
下面,我们详细说明附图和根据本发明的半导体装置的优先实施方式。此外,在附图的说明中在相同的要素上附加相同的标号,并省略重复说明。又,附图的尺寸比率不一定与说明的一致。
图1是表示根据本发明的半导体装置的一个实施方式的剖面图。半导体装置1备有半导体基板10、配线基板20、导电性突起30和树脂32。半导体基板10是BT-CCD(背面入射薄板型CCD),在其表面S1侧的表层的一部分上形成作为光检测单元的CCD12。半导体基板10,例如,由硅P+层及在其上形成的P型外延层、和在该外延层上形成的给予驱动信号的图中未画出的传送电极组构成。CCD12具有二维地配列的多个像素。又,通过蚀刻背面S2的与CCD12相对的区域形成经过薄型化的薄型化部分14。经过蚀刻的部分的轮廓为四边锥台状。薄型化部分14是,经过蚀刻侧的面成为矩形状的平坦的光入射面S3,该光入射面S3具有与CCD12大致相同的大小地形成。又,半导体基板10作为整体也具有平面看矩形的形状。半导体基板10的厚度,例如,薄型化部分14约为15~40μm,薄型化部分14的外缘部分15约为300~600μm。此外,薄型化部分14的外缘部分15指的是在半导体基板10中薄型化部分14周围的、比薄型化部分14厚的部分。
在外缘部分15的表面S1上形成电极16(第一电极)。该电极16经过省略了图示的配线与CCD12的传送电极组电连接。又,半导体基板10的背面S2,包含光入射面S3而整个被累积层18所覆盖。累积层18具有与半导体基板10相同的导电型,但是它的杂质浓度比半导体基板10高。
用倒装片接合法将半导体基板10安装在配线基板20上。即,与半导体基板10的表面S1侧相对向地配置配线基板20。在配线基板20上在与半导体基板10的电极16相对向的位置上形成电极22(第二电极),该电极22经过导电性突起30与电极16连接。即,引线端子24、电极22、导电性突起30、电极16与CCD传送电极连接,将CCD的驱动信号输入到引线端子24。输出CCD的读出信号的放大器的输出经过任一个电极16、导电性突起30、电极22从引线端子24取出。配线基板20例如由多层陶瓷基板构成。又,配线基板20的上面S4(与半导体基板10相对向的面)具有比半导体基板10大的面积,在上面S4的边缘部分存在着不与半导体基板10相对向的区域。
在配线基板20的底面S5(与上面S4相反侧的面)中设置引线端子24。引线端子24与配线基板20的内部配线(图中未画出)连接。
在半导体基板10和配线基板20之间存在着用于插入导电性突起30的空隙。在该空隙中由外缘部分15和配线基板20夹着的部分中,为了增强导电性突起30的接合强度(具体地说各个电极16和电极22与导电性突起30的接合强度),充填着绝缘性树脂32(下部充填树脂)。树脂32是树脂片,例如,能够用将环氧系树脂、氨基甲酸乙酯系树脂、硅系树脂、或丙烯系树脂、或者它们的复合物作成片状的树脂片。
我们用图2更详细地说明树脂32的构成。图2是从其上面S4侧看配线基板20的平面图。在图2中,虚线L1、L2分别表示半导体基板10和薄型化部分14的轮廓。沿该图的I-I线的剖面图与图1对应。如该图所示,树脂32包围半导体基板10的薄型化部分14与配线基板20之间的空隙的周围,但是并不包围该周围的全部,而是残留该周围的一部分地进行包围。具体地说,在配线基板20中,残留从与薄型化部分相对向的区域(由虚线L2包围的长方形的区域)的四个角中的各个角延伸到与半导体基板10相对向的区域的外侧的区域地设置树脂32。因此,在半导体基板10与配线基板20之间的空隙中,形成使薄型化部分14与配线基板20之间的空隙和半导体装置1的外部连通的连通单元34。
进一步,在配线基板20的上面S4中,设置多个芯片电阻28。将芯片电阻28,在配线基板20的与薄型化部分14相对向的区域内的图中上部和下部的各个中,一维地配列在图中的左右方向上。
现在回到图1,说明半导体装置1的动作。由CCD12检测从光入射面S3入射到半导体基板10的薄型化部分14的光。顺次地通过电极16、导电性突起30和电极22,将该检测信号传送到配线基板20。在配线基板20上,通过内部配线将该检测信号传送到引线端子24,从引线端子24输出到半导体装置1的外部。
接着,我们说明半导体装置1的效果。将树脂32充填在薄型化部分14的外缘部分15与配线基板20之间的空隙中。因此,增强了设置在薄型化部分14的外缘部分15上的电极16与导电性突起30的接合强度、和导电性突起30与配线基板20的电极22的接合强度。另一方面,因为在半导体基板10的薄型化部分14与配线基板20之间的空隙中不充填树脂32,所以当树脂32固化时进行的加热或冷却时,即便在树脂32与半导体基板10之间由于两者的热膨胀系数不同产生应力,因为该应力对薄型化部分14的影响很小,所以也能够防止薄型化部分14的弯曲和破裂。所以,半导体装置1,在使用时,可以实现对CCD12的高精度聚焦和能够呈现CCD12中的高灵敏度的均匀性和稳定性。又,因为防止了薄型化部分14的破裂,所以也提高了半导体装置1的成品率。
进一步,作为上述树脂32,用预先形成所要的形状,即残留薄型化部分14与配线基板20之间的空隙的周围的一部分地包围该空隙周围的形状的树脂片。因此,能够容易并且确实地实现残留薄型化部分14与配线基板20之间的空隙,在存在导电性突起30的空隙即薄型化部分14的外缘部分与配线基板20之间的空隙中充填树脂32的构成。
又,存在着由上述树脂32完全包围薄型化部分14与配线基板20之间的空隙,形成密闭空间的情形。这时,当树脂固化时等进行的加热或冷却时,由于密闭空间内的空气膨胀或收缩,薄型化部分14发生弯曲。对于这种问题,在该半导体装置1中,通过树脂32,残留上述空隙的周围的一部分地包围该空隙周围的构成,能够防止使上述空隙密闭。而且,通过用预先形成的树脂片,也能够容易并且确实地实现这种构成。
又,在半导体基板10上设置累积层18。从而,能够维持半导体基板10的累积状态。因此,能够进一步提高CCD12中的对短波长光的灵敏度的均匀性和稳定性。
可是,近年来,在背面入射型的半导体装置中,对大面积化和高速应答特性的要求正在增高。但是如图7所示的半导体装置那样,一旦将半导体基板模片接合在配线基板上,形成将该配线基板和包装组件的引线端子引线接合的构成,要同时实现大面积化和高速应答化是困难的。即,在上述构成的半导体装置中,当实现大面积化时,存在着与其相伴,由于导线加长使电阻增大那样的问题。而且,伴随着大面积化,存在着由于导线间接近变得高密度化发生串扰,并且在导线间产生电容等问题,使高速应答化更困难了。
对此,在半导体装置1中,因为经过导电性突起30将半导体基板10安装在配线基板20上,所以不需要引线接合半导体基板10和配线基板20。进一步,因为将引线端子24设置在配线基板20上,所以在半导体装置1中,除了配线基板20以外不需要设置包装组件,所以也不需要引线接合配线基板20和包装组件的引线端子。这样在半导体装置1中因为能够不用引线接合地实施全部配线,所以即便实现大面积化,也不会发生上述问题,即电阻增大,发生串扰和产生电容那样的问题。因此,半导体装置1可以同时满足大面积化和高速应答化的要求。例如当CCD12的像素数为2054像素×1024像素(芯片大小(半导体基板10的面积)为40.0mm×20mm强)时,与在已有半导体装置中难以实现1.6G像素/sec以上的高速化相对,如果根据半导体装置1,则可以实现3.2G像素/sec的高速动作。
图3是用于说明制造图1的半导体装置1的方法的一个例子的剖面图。在本例中,作为树脂32用固体复印片(树脂片)。将该固体复印片贴附在半导体基板10的表面S1上的预定区域上。所谓该预定区域是残留薄型化部分14的周围的一部分地包围该周围的区域。此后,通过将半导体基板10热压接在配线基板20上,能够得到图1所示的半导体装置1。此外,因为当热压接时突起30贯通固体复印片,所以不需要预先在固体复印片中与突起30对应的部分中形成开口等。
图4是表示图1的配线基板20的一个构成例的平面图。本构成例的配线基板20是多层陶瓷基板。该配线基板20具有58.420mm四方的平面看大致正方形状,在配线基板20的与薄型化部分14相对向的长方形状的区域(由虚线L2所示)中,设置有多个芯片电阻28。将芯片电阻28,在该区域内的图中上部和下部的各个中每2列地,一维地配列在图中的左右方向(上述长方形的长边方向)上。又,在上述区域的外侧的区域中,形成有多个电极22。沿上述长方形的四条边中的各条边配列电极22,在长边方向上每3列地,在短边方向上每2列地配列电极22。电极22的直径为0.080mm。
图5是表示与图4的构成例有关的配线基板20的内部配线的构成的剖面图。内部配线60由信号输出用配线60a、60b、时钟供给用配线60c、60d和DC偏压(接地)供给用配线60e构成。各内部配线60与电极22、引线端子24和芯片电阻28的相互之间电连接。我们用图6更详细地说明内部配线60的构成。在图6中,为了说明方便起见,表示在配线基板20的平面图上重叠引线端子24。如该图所示,在与薄型化部分14相对向的区域内,只形成信号输出用配线60a、60b,另一方面在上述区域的外侧形成有时钟供给用配线60c、60d和DC偏压(时钟)供给用配线60e。这样,通过分离地配置时钟供给用配线60c、60d和DC偏压供给用配线60e等的驱动系统配线和信号输出用配线60a、60b,能够防止在驱动系统信号与输出系统信号之间发生串扰。
本发明能够用于半导体装置及其制造方法,特别是背面入射型的半导体装置及其制造方法。

Claims (3)

1.一种半导体装置,其特征在于,包括:
具有在一个面上形成的光检测单元、通过蚀刻另一个面的与所述光检测单元相对向的区域形成的薄型化部分、和设置在该薄型化部分的外缘部分的所述一个面上的、与所述光检测单元电连接的第一电极的半导体基板;
具有对向配置在所述半导体基板的所述一个面侧,经过导电性突起与所述第一电极连接的第二电极的配线基板;和
为了增强所述第一电极和所述第二电极中的各个电极与所述导电性突起的接合强度,充填在所述薄型化部分的外缘部分与所述配线基板之间的空隙中的树脂,
所述树脂是以残留所述薄型化部分与所述配线基板之间的空隙的周围的一部分地包围该空隙的周围的方式预先形成的树脂片。
2.根据权利要求1所述的半导体装置,其特征在于:
所述光检测单元具有一维或二维地配列的多个像素。
3.一种半导体装置的制造方法,其特征在于,该方法包括:
准备好具有在一个面上形成的光检测单元、通过蚀刻另一个面的与所述光检测单元相对向的区域形成的薄型化部分、和设置在该薄型化部分的外缘部分的所述一个面上的、与所述光检测单元电连接的第一电极的半导体基板的工序;
准备好具有与所述半导体基板的所述一个面侧相对向配置的、经过导电性突起与所述第一电极连接的第二电极的配线基板的工序;
将固体的树脂片贴附在所述半导体基板的所述另一个面上的预定区域上的工序;和
将具有所述树脂片的所述半导体基板热压接在所述配线基板上的工序,
以残留所述薄型化部分与所述配线基板之间的空隙的周围的一部分地包围该空隙的周围的方式设定所述预定区域。
CNB2004800266616A 2003-09-25 2004-09-24 半导体装置及其制造方法 Active CN100440520C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP333690/2003 2003-09-25
JP2003333690A JP4494745B2 (ja) 2003-09-25 2003-09-25 半導体装置

Publications (2)

Publication Number Publication Date
CN1853274A true CN1853274A (zh) 2006-10-25
CN100440520C CN100440520C (zh) 2008-12-03

Family

ID=34385998

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2004800266616A Active CN100440520C (zh) 2003-09-25 2004-09-24 半导体装置及其制造方法

Country Status (5)

Country Link
US (1) US7696595B2 (zh)
EP (1) EP1672695B1 (zh)
JP (1) JP4494745B2 (zh)
CN (1) CN100440520C (zh)
WO (1) WO2005031872A1 (zh)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4494746B2 (ja) * 2003-09-25 2010-06-30 浜松ホトニクス株式会社 半導体装置
JP4351012B2 (ja) * 2003-09-25 2009-10-28 浜松ホトニクス株式会社 半導体装置
JP4641820B2 (ja) 2005-02-17 2011-03-02 三洋電機株式会社 半導体装置の製造方法
JP4829877B2 (ja) * 2005-02-23 2011-12-07 株式会社アライドマテリアル 半導体素子搭載部材とそれを用いた半導体装置
EP1879230A1 (en) * 2006-07-10 2008-01-16 Sanyo Electric Co., Ltd. Semiconductor device and manufacturing method of the same
JP4451864B2 (ja) * 2006-07-11 2010-04-14 浜松ホトニクス株式会社 配線基板及び固体撮像装置
US8907473B2 (en) * 2009-02-02 2014-12-09 Estivation Properties Llc Semiconductor device having a diamond substrate heat spreader
JP5940887B2 (ja) * 2012-05-18 2016-06-29 浜松ホトニクス株式会社 固体撮像装置

Family Cites Families (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5318651A (en) * 1991-11-27 1994-06-07 Nec Corporation Method of bonding circuit boards
JP2821062B2 (ja) * 1992-07-09 1998-11-05 浜松ホトニクス株式会社 半導体エネルギー検出器の製造方法
JPH06196680A (ja) * 1992-12-22 1994-07-15 Hamamatsu Photonics Kk 半導体エネルギー検出器とその製造方法
JP3263288B2 (ja) 1995-09-13 2002-03-04 株式会社東芝 半導体装置
JPH1084014A (ja) * 1996-07-19 1998-03-31 Shinko Electric Ind Co Ltd 半導体装置の製造方法
JPH1041694A (ja) * 1996-07-25 1998-02-13 Sharp Corp 半導体素子の基板実装構造及びその実装方法
JP3687280B2 (ja) * 1997-07-02 2005-08-24 松下電器産業株式会社 チップ実装方法
JP3663938B2 (ja) * 1997-10-24 2005-06-22 セイコーエプソン株式会社 フリップチップ実装方法
US6040630A (en) 1998-04-13 2000-03-21 Harris Corporation Integrated circuit package for flip chip with alignment preform feature and method of forming same
JP3430040B2 (ja) * 1998-11-19 2003-07-28 シャープ株式会社 二次元画像検出器およびその製造方法
DE19854733A1 (de) 1998-11-27 2000-05-31 Heidenhain Gmbh Dr Johannes Abtasteinheit einer Positionsmeßeinrichtung
US6586877B1 (en) 1999-01-21 2003-07-01 Hamamatsu Photonics K.K. Electron tube
JP2000228573A (ja) 1999-02-05 2000-08-15 Canon Inc モジュールの基板構造
US6410415B1 (en) 1999-03-23 2002-06-25 Polymer Flip Chip Corporation Flip chip mounting technique
JP4786035B2 (ja) * 1999-04-13 2011-10-05 浜松ホトニクス株式会社 半導体装置
JP3451373B2 (ja) 1999-11-24 2003-09-29 オムロン株式会社 電磁波読み取り可能なデータキャリアの製造方法
JP3880278B2 (ja) * 2000-03-10 2007-02-14 オリンパス株式会社 固体撮像装置及びその製造方法
US6571466B1 (en) 2000-03-27 2003-06-03 Amkor Technology, Inc. Flip chip image sensor package fabrication method
US6909180B2 (en) * 2000-05-12 2005-06-21 Matsushita Electric Industrial Co., Ltd. Semiconductor device, mounting circuit board, method of producing the same, and method of producing mounting structure using the same
US6201305B1 (en) 2000-06-09 2001-03-13 Amkor Technology, Inc. Making solder ball mounting pads on substrates
JP2002009265A (ja) 2000-06-21 2002-01-11 Sony Corp 固体撮像装置
KR100343432B1 (ko) 2000-07-24 2002-07-11 한신혁 반도체 패키지 및 그 패키지 방법
US7242088B2 (en) 2000-12-29 2007-07-10 Intel Corporation IC package pressure release apparatus and method
JP3696132B2 (ja) 2001-07-10 2005-09-14 株式会社東芝 アクティブマトリクス基板及びその製造方法
JP2003078120A (ja) 2001-08-31 2003-03-14 Seiko Precision Inc 固体撮像装置
US6580174B2 (en) 2001-09-28 2003-06-17 Intel Corporation Vented vias for via in pad technology yield improvements
JP2003124259A (ja) * 2001-10-15 2003-04-25 Seiko Epson Corp 電子部品の実装構造、電子部品モジュール、および電子部品の実装方法
JP3773177B2 (ja) * 2001-11-30 2006-05-10 松下電器産業株式会社 固体撮像装置およびその製造方法
JP3787765B2 (ja) 2001-11-30 2006-06-21 松下電器産業株式会社 固体撮像装置およびその製造方法
JP3891133B2 (ja) * 2003-03-26 2007-03-14 セイコーエプソン株式会社 電子部品の製造方法および電子部品の実装方法
JP4271625B2 (ja) 2004-06-30 2009-06-03 株式会社フジクラ 半導体パッケージ及びその製造方法

Also Published As

Publication number Publication date
CN100440520C (zh) 2008-12-03
EP1672695B1 (en) 2014-07-23
US20070272997A1 (en) 2007-11-29
JP2005101315A (ja) 2005-04-14
JP4494745B2 (ja) 2010-06-30
EP1672695A1 (en) 2006-06-21
WO2005031872A1 (ja) 2005-04-07
US7696595B2 (en) 2010-04-13
EP1672695A4 (en) 2008-10-01

Similar Documents

Publication Publication Date Title
US11031420B2 (en) Image pickup device and electronic apparatus
US7321455B2 (en) Microelectronic devices and methods for packaging microelectronic devices
TWI337500B (en) Image sensor module package structure with supporting element
US20090096075A1 (en) Stacked semiconductor package that prevents damage to semiconductor chip when wire-bonding and method for manufacturing the same
GB2307101A (en) Semiconductor device
CN1254952A (zh) 电子器件
CN101567378A (zh) 固体拍摄装置及其制造方法
CN1396657A (zh) 减小尺寸的堆叠式芯片大小的组件型半导体器件
CN1905175A (zh) 半导体装置及其制造方法
CN100440520C (zh) 半导体装置及其制造方法
JPH10511817A (ja) 有機及び無機パシベーション層からなる画像センサ
US20080272473A1 (en) Optical device and method of manufacturing the same
US10986292B2 (en) Solid-state image pickup device and electronic apparatus to increase yield
JPH06350068A (ja) 半導体エネルギー線検出器の製造方法
CN1853273A (zh) 半导体装置
CN100440521C (zh) 半导体装置
US7242538B2 (en) Optical device
US20070170470A1 (en) Solid-state imaging device, signal charge detection device, and camera
CN101038210A (zh) 红外探测装置和使用其的红外成像装置
CN1219326C (zh) 半导体集成装置及其制造方法
US20040124486A1 (en) Image sensor adapted for reduced component chip scale packaging
EP0523984A1 (en) Solid state image pick-up element
WO2022259684A1 (ja) 固体撮像装置および電子機器
TW200849571A (en) Compact camera module package and packaging method for the same
US20020074642A1 (en) Semiconductor device and package for containing semiconductor element

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant