CN1725090A - Low temperature polycrystalline silicon film transistor full integrated active location substrate and its preparation method - Google Patents

Low temperature polycrystalline silicon film transistor full integrated active location substrate and its preparation method Download PDF

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CN1725090A
CN1725090A CN 200510014464 CN200510014464A CN1725090A CN 1725090 A CN1725090 A CN 1725090A CN 200510014464 CN200510014464 CN 200510014464 CN 200510014464 A CN200510014464 A CN 200510014464A CN 1725090 A CN1725090 A CN 1725090A
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active
circuit
polysilicon
substrate
metal
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CN100561321C (en
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孟志国
吴春亚
熊绍珍
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南开大学
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Abstract

The invention relates to a technique for preparing a large area all integrated polycrystalline silicon TFT active basal plate on a large area glass substrate, using a method of vertically arranging drive circuit on two sides, adopting a designing method of alignment base point that the epitaxial+ intersection of the circuit is formed by active island, and a continuous induction mouth with a length equal to that of the long side of the drive circuit as well as an ITO covering layer to realize the organic integration of an MILC polycrystalline silicon TFT circuit with an MIC polycrystalline silicon TFT matrix, thus avoiding the problem of misplacement of mask plate in the after procedure. An all-integrated system of high quality polycrystalline silicon TFT circuit can be prepared by this technique and this technique is an industrial production technique used for large area substrate drift plate.

Description

低温多晶硅薄膜晶体管全集成有源选址基板及制备方法 A low temperature polysilicon thin film transistor substrate and a fully-integrated active site preparation

技术领域 FIELD

本发明涉及显示技术,特别是一种低温多晶硅薄膜晶体管全集成有源选址基板及制备方法。 The present invention relates to display technologies, in particular a low-temperature polysilicon thin film transistor substrate and a fully-integrated active site preparation. 本发明是采用金属诱导横向晶化(MIC)和金属诱导横向晶化(MILC)混合技术在大面积衬底上制备大面积显示器全集成寻址基板或制备多个小面积显示器全集寻址基板。 The present invention is the use of a metal induced lateral crystallization (MIC) and the preparation of large area displays on a large area substrate or a substrate fully integrated addressing a plurality of small area displays Collection addressing prepared substrate lateral crystallization (the MILC) technique mixed metal induced.

背景技术 Background technique

高性能的平板显示器件,包括液晶显示器(LCD)、有机发光二极管(OLED/PLED)都需要薄膜晶体管(TFT)有源选址和有源驱动技术。 High performance flat panel display device comprising a liquid crystal display (LCD), organic light emitting diode (OLED / PLED) require a thin film transistor (TFT) active site and the active drive technology. (如:Development of High Quality LCDTV,M.Shigeta,H Fukuoka,SID 04 Digest,Page 754;A 4.3-in.VGA(188ppi)AMOLED Display with a New Driving Method,Y.Tanada,M.Osame,R.Fukumoto,K.Saito,J.Sakata,S.Yamazaki,S.Murakami,K.Inose,N.Miyoshi K.Sato,SID04 Digest,Page 1398)有源选址和有源驱动技术的进一步的发展,可将驱动电路(扫描电路、数字电路、直流电平变换、时钟信号发生器等)与有源矩阵集成在同一个基板上,实现系统集成(SOP)从而使显示器具有显示密度高,外接管脚少,成本低的特点。 (Eg: Development of High Quality LCDTV, M.Shigeta, H Fukuoka, SID 04 Digest, Page 754; A 4.3-in.VGA (188ppi) AMOLED Display with a New Driving Method, Y.Tanada, M.Osame, R. Fukumoto, K.Saito, J.Sakata, S.Yamazaki, S.Murakami, K.Inose, N.Miyoshi K.Sato, further development SID04 Digest, Page 1398) active site and active driving technology can the driving circuit (scan circuitry, digital circuitry, the DC level shift, the clock signal generator, etc.) the active matrix integrated on the same substrate, system integration (SOP) having a display such that display a high density, less external pin, low cost. 如Y.Nakajima,Y.Kida等人所报道的Latest Development of″System-on-Glass″Displaywith Low Temperature Poly-Si TFT(SID 2004 Digest,p864-867)制备全集成显示器的最佳器件的选择为低温多晶硅薄膜晶体管(LTPS)。 As Y.Nakajima, Y.Kida et al reported Latest Development of devices select the best "System-on-Glass" Displaywith Low Temperature Poly-Si TFT (SID 2004 Digest, p864-867) Preparation of the display is fully integrated a low temperature polysilicon thin film transistor (LTPS). 现在较为成熟的LTPS技术包括准分子激光退火(ELA)晶化的方法(如:美国专利6071796,Voutsastolis,“Method of ControllingOxygen Incorporation During Crystallization of Silicon Film by Excimer Laser Annealing in AirAmbient)和金属诱导晶化(MIC)、金属诱导横向晶化技术(MILC)。ELA的方法有如下缺点:准分子激光器的设备价钱昂贵,所使用的多为有毒气体(如:中国专利,申请号:200410086941.8,笠原健司;河崎律子;大谷久;田中幸一郎,激光装置和激光退火方法,)并有光束与光束的搭接引起的器件性能分布不均匀的问题(如:CW Kim,KC Moon,HJ Kim,Development of SLS-Based System on Glass Display,SID Digest 2004,p868-871)。因此,在制备大面积选址基板时,该技术有局限性。MIC和MILC多晶硅TFT制备设备较ELA的设备便宜,常规的加热炉就可以完成测量的晶化过程,而且,制备大面积的多晶硅衬底,不存在如ELA Now mature LTPS technology including excimer laser annealing (ELA) crystallization method (such as: U.S. Patent No. 6071796, Voutsastolis, "Method of ControllingOxygen Incorporation During Crystallization of Silicon Film by Excimer Laser Annealing in AirAmbient) and metal-induced crystallization ( the method of the MIC), metal induced lateral crystallization techniques (MILC) .ELA has the following disadvantages: the device price excimer lasers is expensive, it is used mostly toxic gas (eg: Chinese patent application number: 200410086941.8, Kenji Kasahara; Kawasaki Ritsuko; Otani long; Ichiro Tanaka, a laser apparatus and a laser annealing method) and there is a problem with the light beam overlapping device performance due to uneven distribution (eg: CW Kim, KC Moon, HJ Kim, Development of SLS-Based System on Glass Display, SID Digest 2004, p868-871). Thus, in the preparation of large area substrates site, this technique has limitations .MIC cheaper and more MILC preparation device ELA polysilicon TFT device, a conventional furnace can be to complete the crystallization process of the measurement, and a large area for preparing a polycrystalline silicon substrate, there is no such ELA 的搭接问题,因此,在制备大面积多晶硅有源基板上,具有较大的潜力。但是MIC和MILC多晶硅TFT技术要在制备大面积有源基板上达到实用化程度,则必须要解决或避开MIC与MILC形成的500-600℃的温度过程,玻璃衬底产生收缩,而在后道器件制备过程中造成的掩膜板对准错位的问题。就MIC和MILC多晶硅TFT而言,MILC多晶硅TFT的迁移率和开启电压特性优于MIC多晶硅TFT,可制备出较高性能的多晶硅电路,但MILC的形成需要诱导口来确定晶化的位置,存在衬底收缩造成的掩膜板对准错位的问题。MIC多晶硅的形成,是一个不需要掩膜板定位的整个面积的晶化的过程,因此,不存在玻璃衬底收缩造成的掩膜板对准错位的问题。充分的运用MILC多晶硅TFT的优良器件性能和MIC多晶硅TFT对大面积有源基板的优势,形成在大面积玻璃基板上制备大面积全集成有源基板或多个小面积 Overlapping problem, therefore, in the preparation of large-area polycrystalline silicon active substrate, has great potential but the MIC and MILC polysilicon TFT technology to achieve practical extent in the preparation of a large area active substrate, it must be solved or avoided a temperature of 500-600 deg.] C during opening formed MIC and MILC, a glass substrate shrinkage, caused by the preparation process, after the device is misplaced mask alignment problems. polysilicon TFT on MIC and MILC concerned, MILC poly mobility and the open voltage of the TFT characteristics superior MIC polysilicon TFT, may be prepared by high performance polysilicon circuits, but requires induction port is formed MILC to determine the location of crystallization, shrinkage of the substrate caused by the presence of mask misalignment problems .MIC polysilicon is formed, the crystallization is a process that does not require the entire area of ​​the mask is positioned, therefore, the problem caused by the shrinkage of the glass substrate mask misalignment does not exist. MILC polysilicon TFT full use of MIC and excellent device performance advantages for large-area polysilicon TFT active substrate is formed on a large area prepared glass substrates of large area integrated active substrate or a small area 的全集成基板,是具有重要产业应用价值技术。 Fully integrated board, is an important industrial application of technology.

发明内容 SUMMARY

本发明的目的是提供一种低温多晶硅薄膜晶体管全集成有源选址基板及制备方法,可以克服现有技术的缺点。 Object of the present invention is to provide a drawback of a low temperature polysilicon thin film transistor substrate and a fully-integrated active site preparation, we can overcome the prior art. 它是运用了MIC和MILC多晶硅TFT器件技术,建立一种适合在大面积玻璃衬底上制备大面积显示器用的全集成型有源基板以及多个小面积显示器用的全集成型有源基板的设计与制备技术。 It is the use of a polysilicon TFT devices MIC and MILC technique, to establish a suitable preparation of large area displays on a large area glass substrate with the active substrate and forming corpus corpus with a plurality of small area displays the design of the active substrate and forming preparation techniques. 与ELA制备技术相比,具有设备投入较低的和大面积衬底基板上器件较高的优势,与单纯MILC多晶硅TFT技术制备的有源选址基板相比,避开了晶化过程造成的玻璃衬底收缩造成的器件后道加工掩膜板对准错位的问题,与单纯MIC多晶硅TFT技术制备的有源选址基板相比,驱动电路具有更好的性能。 Compared with ELA preparation techniques, having low equipment investment on a large area and higher device base substrate advantage, compared with the simple active site substrate prepared MILC polysilicon TFT technology to avoid the crystallization process caused by after the contraction of the glass substrate device processing channel mask misalignment problems, as compared to the active site MIC polysilicon TFT substrate prepared by the simple technique, a driving circuit having a better performance.

本发明低温多晶硅薄膜晶体管全集成型有源基板包括:以多晶硅为有源层制备的驱动电路和有源选址驱动矩阵,其特征在于:驱动电路中的扫描电路和数据电路垂直设置在有源矩阵的周边,扫描电路在有源选址矩阵的左边或右边,数据电路在有源选址矩阵的上边或下边,中间为有源选址矩阵;驱动电路用金属诱导横向晶化(MILC)多晶硅薄膜晶体管(TFT)构成,形成金属诱导横向晶化(MILC)多晶硅材料的诱导口与所述的电路分布的长边平行;扫描电路长边方向为上下走向,则诱导口的方向为上下方向,并且为整体联通的诱导口;数字电路的长边走向为左右方向,则诱导口的方向为左右方向,并且为整体联通的诱导口;有源选址和驱动矩阵采用金属诱导晶化(MIC)多晶硅薄膜晶体管(TFT)构成。 Collection low temperature polysilicon thin film transistor of the present invention forming the active substrate comprising: a drive circuit for the production of polycrystalline silicon active layer and the active site of the driving matrix, characterized in that: the scanning circuit and the data driving circuit of the active matrix circuit disposed vertically peripheral, left or right of the scanning circuit of the active matrix location, in the data circuit above or below the location of the active matrix, an active site intermediate matrix; driving circuit metal induced lateral crystallization (the MILC) polycrystalline silicon thin film transistor (TFT) configured to form a parallel circuit was induced to a long side port and the metal induced lateral crystallization (the MILC) of polysilicon material; the longitudinal direction scanning circuit and down direction, the direction of the induced opening vertical direction, and to induce the whole mouth Unicom; digital circuits to the longitudinal horizontal direction, the direction of the induced opening left-right direction, and to induce the entire port Unicom; active site and driving matrix metal induced crystallization (MIC) polysilicon a thin film transistor (TFT) configuration.

所述的扫描电路和数据电路中的薄膜晶体管(TFT)有源岛分布在条形的金属诱导横向晶化(MILC)的多晶硅区域中,形成位置的基本标记的点,驱动矩阵中的薄膜晶体管(TFT)有源岛分布在金属诱导晶化(MIC)多晶硅区间。 Said scanning circuit and the data circuit, a thin film transistor (TFT) active islands distributed in the strip-induced lateral crystallization (the MILC) polysilicon region of the metal formed substantially point marked location, driving thin film transistor matrix (TFT) active islands distributed in the metal-induced crystallization (MIC) polysilicon interval.

所述的全集成型有源基板是5-10英寸大面积有源基板或5英寸以下的显示尺寸的小有源基板,所述的小有源基板上的扫描电路与数字电路的外延交汇处设置光刻对版标记。 Collection of the small active substrate forming active substrate active 5-10 inch large area substrates or 5 inches below the display size, epitaxial junction scanning and digital circuits on the substrate is provided a small active lithography mark on the version.

所述的基本光刻对版标记为包围在MILC多晶硅中的非晶硅图标,或预置的非晶硅图标。 The basic version of lithography to surround the amorphous mark icon MILC polycrystalline silicon, amorphous silicon or a preset icons.

所述的扫描电路和数据电路中的TFT为MILC多晶硅TFT,其结构特征为:衬底上的沉积氮化硅、氧化硅或它们的复合层构成的阻挡层和过渡层,在该阻挡层上面制备MILC多晶硅的有源岛和沟道,然后依序制备低温氧化硅(LTO)栅绝缘层、多晶硅或高温金属栅、LTO电极绝缘层、金属电极。 Said scanning circuit and the data circuit MILC polysilicon TFT as TFT, the structure is characterized by: depositing on a substrate of silicon nitride, silicon oxide or a composite layer composed of the barrier and buffer layers, the barrier layer described above in preparation MILC polysilicon active islands and the channel, and then sequentially preparing low-temperature Si oxide (LTO) a gate insulating layer, high-temperature polysilicon or metal gate, the LTO electrode insulating layer, a metal electrode.

所述的有源矩阵中的TFT为MIC多晶硅TFT,其结构特征为:衬底上的沉积氮化硅、氧化硅或它们的复合层构成的阻挡层和过渡层,在该阻挡层上面制备MIC多晶硅的有源岛和沟道,然后依序制备低温氧化硅(LTO)栅绝缘层、多晶硅或高温金属栅、LTO绝缘层、金属内联引线、LTO绝缘层和透明电极(ITO)。 The active matrix TFT polysilicon TFT as MIC, which is a structure wherein: the barrier and buffer layers deposited on a substrate of silicon nitride, silicon oxide or a composite layer composed of the barrier layer prepared in the above MIC polysilicon active islands and the channel, the gate insulating layer of silicon oxide is then sequentially preparing low (the LTO), high-temperature polysilicon or metal gate, the LTO insulating layer, with metal wires, the LTO insulating layer and the transparent electrode (ITO).

制备所述的全集成型有源基板的方法是经过下述步骤:1)在透明玻璃或石英衬底上,采用等离子化学汽相沉积的方法制备出LTO过渡层,用来阻止衬底中的金属杂质向有源层扩散;2)在上述过渡层的衬底上,采用化学汽相沉积、低压化学气相淀积或溅射法,沉积非晶硅薄膜层;3)在非晶硅薄膜上沉积LTO薄膜,并光刻出诱导孔图形,在扫描电路与数据电路区间,形成诱导口和LTO覆盖层;在有源矩阵区间,去掉LTO层,采用溶液方法或电子束蒸发法沉积诱导金属镍;在氮气下,450-600℃退火,同步完成MILC和MIC的晶化过程。 The method of preparing the corpus of the active substrate is formed through the following steps: 1) on a transparent glass or quartz substrate, using a method such as plasma chemical vapor deposition to prepare a transition layer LTO, for preventing the metal substrate impurity diffusion into the active layer; 2) the above-described transition layer on the substrate by chemical vapor deposition, low pressure chemical vapor deposition or sputtering, depositing an amorphous silicon thin film layer; 3) is deposited on the amorphous silicon film LTO film, photolithography and the induction hole pattern, the scanning circuit and the data circuit section, forming a cover layer and LTO induction port; active matrix section, the LTO layer is removed using a solution method or an electron beam evaporation deposition of metallic nickel induction; under nitrogen, 450-600 deg.] C annealing, the synchronization is complete crystallization process of MIC and MILC.

4)光刻出电路和矩阵中TFT有源岛图形,在MILC多晶硅区间形成MILC-TFT有源岛,在MIC多晶硅区间形成MIC-TFT有源岛。 4) lithography circuit and a TFT active matrix island pattern, MILC-section is formed in the TFT active island polysilicon MILC, MIC-section is formed in the MIC polysilicon TFT active island. 在425℃下沉积的LTO作为栅绝缘层,并在其上面沉积多晶硅或高温金属钛钨、镍或钼,光刻加工成为栅电极;5)自对准离子注入TFT源漏电极搀杂剂,活化形成TFT的源漏电极。 Deposited at 425 ℃ LTO as a gate insulating layer, and depositing a high-temperature polysilicon or titanium tungsten, nickel or molybdenum, photolithography becomes a gate electrode thereon; 5) self-aligned TFT source and drain ion implantation dopant activation forming a drain electrode of the TFT source. N型TFT以相应的能量注入磷、砷,P型TFT以相应的能量注入硼;经过550℃30分钟的搀杂活化过程,形成多晶硅TFT的源漏电极。 N-type TFT implanting phosphorus, arsenic, P-type TFT corresponding to an energy corresponding to the energy implantation of boron; 30 minutes activation 550 of doping deg.] C, forming a polycrystalline silicon TFT source and drain electrodes.

6)溅射ITO,光刻加工形成象素电极。 6) a sputtering ITO, a pixel electrode photolithography. 在425℃下,采用LPCVD方法,沉积LTO电极间绝缘层;并光刻出接触孔,溅射硅铝合金层,光刻电极图形,并完成合金化过程。 At 425 deg.] C, the LPCVD method, is deposited LTO inter-electrode insulating layer; photolithography and contact holes, sputtered silicon aluminum alloy layer, photolithography electrode pattern, and complete the alloying process.

所述的全集成型有源基板制备方法中的驱动电路和数据电路的诱导口分别为平行各自分布长边的长方孔,矩阵上的诱导孔为包括整个矩阵面积的长方孔;基准对位标于扫描电路与数字电路的外延交差点上。 Said induction port corpus forming data driving circuit and an active circuit substrate prepared were each parallel to the long side of rectangular hole distribution, induced matrix comprises holes on the entire matrix area of ​​the rectangular hole; reference para marked on the epitaxial intersection of scanning and digital circuits.

所述的全集成型有源基板制备方法中的MILC和MIC材料的厚度是30nm-300nm。 Collection of the thickness of the active preparation of molded MILC and MIC substrate material is 30nm-300nm.

所述的全集成型有源基板制备方法,在沉积在非晶硅上面的100nm-300nm的LTO上,光刻腐蚀出诱导口和掩盖层。 The method of preparing the active substrate forming corpus, 100nm-300nm on the LTO deposition of amorphous silicon above the induction port and photolithographic etching masking layer.

本发明所述的全集成有源基板可用于有源矩阵液晶显示器和有源矩阵有机发光二极管显示器。 Fully integrated active substrate according to the present invention can be used for active matrix liquid crystal display and an active matrix organic light emitting diode display.

本发明使用MILC和MIC混合技术,通过系统设计成功地避开了玻璃衬底在晶化过程中的尺寸收缩对器件加工中的掩膜板对准错位的问题。 The present invention uses MILC and MIC mixing techniques successfully avoided by system design issues a glass substrate dimensional shrinkage during crystallization of the device in the processing of mask misalignment. 该技术与ELA技术相比,设备成本低,更适合大面积有源基板的制备。 This compared with ELA art technology, low equipment cost, large scale fabrication of the active substrate is more suitable. 本发明适应于大面积玻璃衬底上制备有源基板的工业线要求。 The present invention accommodates the requirements of industrial preparation of the active lines on a large area substrate to the glass substrate. 可制备电视、工作站终端、医学用检视器用的大面积显示器的有源基板。 Active substrate may be prepared in large area displays of television, a terminal station, with a view medical device written.

本发明也可用于制备中小尺寸的有源矩阵显示,用于图象手机、PDA等。 The active matrix preparation of the present invention may also be used to display small and medium size, an image for mobile phone, PDA and the like. 本发明“大面积基板上制备低温多晶硅薄膜晶体管全集成有源选址基板”适用于有源矩阵液晶显示器(AMLCD)和有源矩阵有机发光二极管显示器(AMOLED)。 The present invention, "low-temperature polysilicon thin film transistor prepared on a large area substrate fully integrated active substrate site" for active-matrix liquid crystal Displays (AMLCD) and an active matrix organic light emitting diode display (AMOLED).

以下是有关本发明的具体说明,凡未脱离本发明精神的所有等效实施或变更,均属于本发明的内容范围。 The following is a specific description of the present invention, all equivalent changes or who have not departing from the spirit of embodiments of the present invention belong to the scope of this invention.

附图说明 BRIEF DESCRIPTION

图1:大面积玻璃衬底上沉积LTO过渡层和非晶硅层的截面示意图。 Figure 1: a schematic cross-sectional LTO layer and the amorphous silicon buffer layer is deposited on a large area glass substrate.

图2:制备大面积有源矩阵为形成MILC和MIC初始诱导口设定位置和晶化后已经收缩的衬底上可用的MILC与MIC的相对位置示意图。 Figure 2: Preparation of an active matrix to form a large area of ​​MIC and MILC initial induction port settings and relative positions of the MIC and MILC schematic available after crystallization has been contracted on a substrate.

图3:在大面积衬底上制备多个有源基板的MILC和MIC分布示意图。 Figure 3: a plurality of active substrate is prepared on a large area substrate MILC and MIC Distribution FIG.

图4:分布在MILC和MIC区间上的驱动电路和有源矩阵的有源硅岛示意图。 Figure 4: Distribution of MIC and MILC section on active silicon island schematic diagram of driving circuits and active matrix.

图5:有源基板上形成MILC和MIC的最初催化金属的放置过程示意图。 Figure 5: Schematic representation of the process of forming the first catalytic metal disposed MILC and MIC on the active substrate.

图6:多晶硅MILC-TFT和多晶硅MIC-TFT栅电极的形成过程示意图。 Figure 6: poly MILC-TFT and a polysilicon MIC-TFT forming process of the gate electrode of FIG.

图7:多晶硅MILC-TFT和多晶硅MIC-TFT自动准注入源漏电极的形成过程示意图。 Figure 7: poly MILC-TFT and a polysilicon MIC-TFT autocollimator implanted source and drain electrode forming process schematic.

图8:多晶硅MILC-TFT和多晶硅MIC-TFT以及象素电极形成示意图。 Figure 8: poly MILC-TFT and a polysilicon MIC-TFT and the pixel electrodes are formed. FIG.

具体实施方式 Detailed ways

实施例本发明参照附图详述如下:如图所示,本发明是在透明玻璃衬底上,采用MILC-TFT和MIC-TFT的混合技术,避开玻璃衬底收缩造成的影响,来完成大面积全集成型多晶硅TFT有源基板制备的技术。 Embodiments of the present invention is described below in detail with reference to the accompanying drawings: As shown, the present invention is a transparent glass substrate, using the MILC-TFT and mixing techniques MIC-TFT, and to avoid the influence caused by the shrinkage of the glass substrate, to complete Collection techniques for preparing large molded polysilicon TFT active substrate.

如图1所示,MILC和MIC都源于玻璃衬底上沉积的非晶硅有源层。 As shown in FIG. 1, MILC and MIC are derived from an active layer of amorphous silicon deposited on a glass substrate. 其中,为阻挡玻璃衬底中的杂质向有源层中扩散,在玻璃衬底上通常沉积氮化硅和LTO混合层。 Wherein a glass substrate to block diffusion of impurities into the active layer, typically deposited over a glass substrate and a silicon nitride layer LTO mixed.

对于形成的全集成型有源基板,驱动电路为双边垂直设置电路。 For forming the active substrate formed corpus, bilateral vertical driving circuit setting circuit. 例如,扫描电路在左边(或右边),数据电路在上边(或下边)。 For example, the scanning circuit on the left (or right), a data circuit in the upper (or lower). 中间大面积为选址和驱动矩阵。 Large area of ​​the intermediate site and driving matrix. 驱动电路采用MILC多晶硅TFT构成,形成MIIC多晶硅材料的诱导口与电路分布的长边平行。 MILC driving circuit using a polysilicon TFT, is formed parallel to the longitudinal induction port distribution circuit MIIC polysilicon material. 例如,扫描电路在左边,扫描电路长边方向为上下走向,则诱导口的方向为上下方向,并且为整体联通的诱导口。 For example, the left side scanning circuit, a scanning circuit is a longitudinal direction vertical to the direction of the mouth is induced to the vertical direction, and the overall Unicom induction port. 数字电路在上边,数字电路的长边走向为左右方向,则诱导口的方向为左右方向,并且为整体联通的诱导口。 Long upper digital circuit, the digital circuit side to left-right direction, the direction of the mouth induced lateral direction, and to induce the entire opening of China Unicom. 选址和驱动矩阵采用MIC多晶硅TFT构成。 And driving matrix location using MIC polysilicon TFT.

在图1所示的大面积透明玻璃衬底上101上,沉积的是LTO过渡层102。 Over a large area of ​​the transparent glass substrate 101 shown in FIG. 1, LTO transition layer 102 is deposited. 非晶硅膜103沉积在LTO过渡层102上。 The amorphous silicon film 103 is deposited on the buffer layer 102 LTO.

图2所示的是为在一个大面积衬底上制备一个大面积有源基板时,非晶硅103上的LTO覆盖层。 Is active when a large area substrate is prepared on a large area substrate, LTO cover layer on the amorphous silicon 103 as shown in FIG. 图中所示的201在扫描电路区间,202为数据电路区间。 201 shown in FIG interval in the scanning circuit, 202 is a data circuit section. 在驱动电路形成的位置上,被制备成平行于电路长边方向的长条图形205,与其互补的部分为诱导口204。 Driving circuit is formed at a position on the strip is prepared longitudinal direction parallel to the circuit pattern 205, as part of its complementary induction port 204. 以扫描电路与数据电路交叉点上所见的对准标206为参考,在晶化过程中,对应的LTO205覆盖的部分,会变成MILC多晶硅材料。 Seen at the intersection of the scanning circuit and the data circuit 206 as a reference alignment marks, during crystallization, the corresponding covering part LTO205, becomes MILC polysilicon material. 大面积的矩阵部分,将形成MIC多晶硅。 A large area portion of the matrix, forming a polysilicon MIC. 在晶化的过程中,玻璃衬底会产生尺寸的收缩,以一个21英寸的显示器所需有源选址基板为例,其扫描电路的长边长度为32cm,数据线的长边长度为42cm,电路的宽度约为2mm,如果经过晶化退火后的玻璃收缩为5ppm,32cm将收缩ΔL1为160微米,42cm将收缩ΔL2将收缩210微米,2mm宽度收缩量为ΔW为0.01微米。 In the crystallization process, the glass substrate undergoes shrinkage in size, 21-inch monitor to a desired location of the active substrate as an example, the longitudinal length of the scanning circuit is 32cm, the longitudinal length of the data line is 42cm , the circuit width of about 2mm, if after crystallization of the glass after annealing shrinkage of 5ppm, 32cm 160 microns will shrink ΔL1, ΔL2 42cm shrink the shrink 210 micron, 2mm width shrinkage amount ΔW of 0.01 microns. 采用与长边平行的诱导口,形成320mm×0.1mm×20和420mm×0.1mm×20平行的MILC多晶硅条,并以扫描电路与数字电路的交点为对准参考点,在MILC多晶硅条上定义有源岛图形,则可避开诱导口随温度变化而对有源岛图形形成的影响。 Using the long sides parallel induction port is formed and 320mm × 0.1mm × 20 MILC poly strip 420mm × 0.1mm × 20 parallel, and the intersection of scanning and digital circuits to align the reference point defined on the MILC poly strip active island pattern, induction port can avoid the influence of temperature change and the active island pattern formation. 在大面积的矩阵区间,采用MIC多晶硅TFT,MIC形成的是整片的多晶硅材料,没有诱导孔的版图来影响有源岛的形成。 In large areas of the matrix section, the TFT using a polysilicon MIC, MIC polysilicon material is formed in the entire sheet, not to influence the layout induction holes form the active island.

图3所示的是在一个大面积衬底上,制备出多个小面积的有源寻址基板302,每个小的有源基板结构与上面所述的大面积有源基板相同。 Is shown in FIG. 3 on a large area substrate, preparing a plurality of addressing a small area active substrate 302, the same active substrate, each of said smaller active above the substrate structure and a large area. 每个小的有源基板的扫描电路和数据电路的外延交点为一个对准标301。 Epitaxial intersection scanning circuit and the data for each smaller active circuit is a substrate alignment mark 301. 采用分步曝光的方法,对小的有源基板进行逐一的对准和曝光,即可消除玻璃衬底收缩所造成的掩膜板对准错位的问题。 Stepwise exposure method, the active substrate one by one to a small alignment and exposure, can eliminate the problem of shrinkage of the glass substrate caused by misalignment of the mask.

电路中的TFT有源岛分布在条形的MILC的多晶硅区域中,矩阵中的TFT有源岛分布在大面积的MIC多晶硅区间。 Circuit TFT active island strip distributed in MILC polysilicon region, a TFT active matrix islands distributed in a large area of ​​MIC poly interval.

图4所示的为MILC和MIC多晶硅TFT的有源岛形成的布局图。 Layout view of an active island is formed MIC and MILC polysilicon TFT shown in FIG. 驱动电路中扫描电路的有源岛401a和数据电路401b分布在MILC多晶硅区间,有源矩阵的有源岛402分布在MIC多晶硅区间。 The active driving circuit island scanning circuit 401a and the data distribution circuit 401b interval MILC polysilicon active matrix active polysilicon islands 402 distributed in the MIC section.

如图5所示,诱导金属镍501沉积在有诱导口204非晶103和ITO掩盖层205覆盖层表面上,在之后的晶化过程中,诱导口部分,形成MIC多晶硅材料,LTO掩盖层下的非晶硅转变为MILC多晶硅材料。 5, the induction of nickel 501 is deposited 204 on the amorphous layer 103 and the cover 205 covers the surface of ITO layer induction port, after the crystallization process, the induction port portion, MIC polysilicon material is formed, the masking layer LTO MILC amorphous silicon into polysilicon material. 诱导金属501沉积在有源矩阵的非晶硅103上,形成大面积的MIC多晶硅薄膜材料。 Inducing metal 501 is deposited on the amorphous silicon active matrix 103, a polysilicon thin film material is formed MIC large area.

之后,去掉ITO掩盖层205和残余的金属镍,形成MILC和MIC TFT的多晶硅有源岛601和602。 Thereafter, the masking layer 205 is removed and the residue ITO metallic nickel, MILC and MIC TFT formed of a polysilicon active islands 601 and 602. 图六中所示的金属或多晶硅栅604形成在栅绝缘层603上。 A metal or polysilicon gate 604 shown in Figure VI is formed on the gate insulating layer 603. 之后,如图7所示,通过栅自动准掺杂离子703的离子注入,形成多晶硅MILC-TFT的源漏电极701和MIC-TFT的源漏电极702。 Thereafter, as shown in FIG 7, the gate through ion implantation ion autocollimator 703 to form a source drain electrode polysilicon MILC-TFT 701 of the MIC-TFT and the source and drain electrodes 702. 随后,形成象素电极802,沉积电极绝缘层801,开接触孔,并形成金属电极803,既形成了如图8所示的多晶硅TFT。 Subsequently, a pixel electrode 802, electrode insulating layer 801 is deposited, contact holes, and forming a metal electrode 803, both formed of a polysilicon TFT as shown in Figure 8.

具体制备方法描述如下:1)在透明玻璃衬底(美国Corning公司生产的1737玻璃)101上,采用等离子化学汽相沉积(PECVD)的方法,350℃下沉积300nm低温氮化硅和100nm低温氧化硅的混合层作为玻璃衬底杂质阻挡层和衬底材料与硅膜材料的过渡层102。 Specific preparation processes are described below: 1) on a transparent glass substrate (produced by U.S. Corning 1737 glass) 101, the method using a plasma chemical vapor deposition (PECVD) of silicon nitride is deposited 300nm and 100nm low-temperature low-temperature oxidation at 350 ℃ mixed layer of silicon as an impurity glass substrate 102 and buffer layer of the substrate material and the silicon film barrier material.

2)在上述沉积了过渡层的衬底上,采用PECVD或低压化学气相淀积(LPCVD)法,分别在350-400℃或550℃下,沉积30nm-600nm的非晶硅层103。 2) In the transition layer is deposited on a substrate by PECVD, or low pressure chemical vapor deposition (LPCVD) method, respectively, at 350-400 deg.] C or 550 deg.] C, 30nm-600nm deposited amorphous silicon layer 103.

3之后,在非晶硅上沉积100nm-300nm的LTO层,并在电路(扫描电路、数据电路)区间,形成诱导口204和LTO覆盖层205。 3, after the deposition of the LTO layer 100nm-300nm on the amorphous silicon, and a circuit (a scanning circuit, circuit data) section, induction port 204 formed in the cover layer 205 and LTO. 在大面积有源矩阵区间,去掉ITO层。 In the large area active matrix section, the ITO layer is removed. 之后,采用溶液方法或电子束蒸发法沉积诱导金属镍501。 Thereafter, a nickel-inducing metal is deposited using a solution process 501 or electron beam evaporation method. 经过590℃氮气气氛下4小时退火,ITO覆盖的区间形成MILC多晶硅材料,没有ITO覆盖的地方,将形成MIC多晶硅材料。 After a nitrogen atmosphere at 590 ℃ annealed for 4 hours, ITO is formed to cover the section MILC polysilicon material not covered by ITO place, polysilicon material forming the MIC.

4)光刻TFT有源岛图形,在MILC多晶硅区间形成MILC-TFT有源岛401a、401b,在MIC多晶硅区间形成MIC-TFT有源岛402。425℃下,沉积50-150nm的ITO作为栅绝缘层603。 4) a TFT active island pattern lithography, MILC-section is formed in the MILC polysilicon TFT active island 401a, 401b, formed at 402.425 deg.] C range, 50-150nm deposition of ITO MIC-TFT active island as the gate polysilicon in the MIC insulating layer 603. 并在其上面沉积300nm的多晶硅或高温金属如:钛钨、镍、钼等,光刻加工成为栅电极604。 And depositing thereon a metal or a high temperature polysilicon 300nm such as: titanium, tungsten, nickel, and molybdenum, the gate electrode 604 become photolithography.

5)接下来,自动准注入TFT源漏电极搀杂剂,对于N型TFT以相应的能量注入磷、砷,P型TFT以相应的能量注入硼。 5) Next, autocollimator TFT source and drain electrodes implanted dopant for N-type TFT corresponding to the energy injection of phosphorus, arsenic, P-type TFT, boron is implanted at the corresponding energy. 之后经过550℃30分钟的搀杂活化过程,形成多晶硅TFT的源漏电极701、702。 After 30 minutes of activation doping 550 ℃, formed of a polysilicon TFT source and drain electrodes 701 and 702.

6)溅射ITO光刻加工形成象素电极802,425℃下,采用LPCVD方法,沉积500nm的ITO电极绝缘层801。 Under 6) forming photolithography sputtering ITO pixel electrodes 802,425 ℃, the LPCVD method, the insulating layer is deposited ITO electrode is 801 500nm. 光刻并加工接触孔图形,溅射500nm的硅铝合金层,并加工成金属电极803。 Lithographic processing and contact hole patterns, 500nm sputtered silicon alloy layer, a metal electrode 803 and processed.

Claims (10)

1.一种低温多晶硅薄膜晶体管全集成型有源基板,它包括以多晶硅为有源层制备的驱动电路和有源选址驱动矩阵,其特征在于:驱动电路中的扫描电路和数据电路垂直设置在有源矩阵的周边,扫描电路在有源选址矩阵的左边或右边,数据电路在有源选址矩阵的上边或下边,中间为有源选址矩阵;驱动电路用金属诱导横向晶化多晶硅薄膜晶体管构成,形成金属诱导横向晶化多晶硅材料的诱导口与所述的电路分布的长边平行;扫描电路长边方向为上下走向,则诱导口的方向为上下方向,并且为整体联通的诱导口;数字电路的长边走向为左右方向,则诱导口的方向为左右方向,并且为整体联通的诱导口;有源选址和驱动矩阵采用金属诱导晶化多晶硅薄膜晶体管构成;所述的扫描电路和数据电路中的薄膜晶体管有源岛分布在条形的金属诱导横向晶化的多晶 A low-temperature polysilicon thin film transistor active substrate forming corpus, which comprises a polysilicon active layer is prepared driving circuits and active matrix driving site, characterized in that: the vertical scanning circuit and the data driving circuit provided in the circuit peripheral, scanning circuit in an active matrix of the left or right of the active matrix location, the location data of the active matrix circuit in the upper or lower side, the active site of the intermediate matrix; driving circuit metal induced lateral crystallization polysilicon thin film transistors, are formed parallel to the long side of the circuit induction port and the metal induced lateral crystallization polysilicon material distribution; scanning circuit direction vertical to the longitudinal direction of the induced opening of the vertical direction, and to induce the entire port Unicom ; toward the long side direction is about the digital circuit, the induction port is left-right direction, and to induce integral Unicom port; said scanning circuit; active site and driving matrix metal induced crystallization polysilicon thin film transistor and a data circuit TFT active island distribution strip metal induced lateral crystallization polymorphs 区域中,形成位置的基本标记的点,驱动矩阵中的薄膜晶体管有源岛分布在金属诱导晶化多晶硅区间。 Region, substantially mark formed dot position, the driving thin film transistor active matrix islands distributed in the polycrystalline metal induced crystallization section.
2.根据权利要求1所述全集成型有源基板,其特征在于所述的基本标记为包围在金属诱导横向晶化多晶硅中的非晶硅图标,或预置的非晶硅图标。 2. The method of claim 1 molded corpus active substrate, wherein said substantially amorphous mark icon to surround the metal induced lateral crystallization polysilicon, amorphous silicon or a preset icons.
3.根据权利要求1所述的全集成型有源基板,其特征在于它是5-10英寸大面积有源基板或5英寸以下的显示尺寸的小有源基板,所述的小有源基板上的扫描电路与数字电路的外延交汇处设置一个对版标记。 The corpus according to claim 1 forming the active substrate, characterized in that it is a small active substrate active 5-10 inch large area substrates or 5 inches below the display size, the small active substrate epitaxial junction is provided a scanning circuit and a digital circuit numerals Edition.
4.根据权利要求1所述的全集成型有源基板,其特征在于所述的扫描电路和数据电路中的薄膜晶体管为金属诱导横向晶化多晶硅薄膜晶体管,其结构为:衬底上的沉积氮化硅、氧化硅或它们的复合层构成阻挡层和过渡层,在该阻挡层上面制备金属诱导横向晶化多晶硅的有源岛和沟道,然后依序制备低温氧化硅栅绝缘层、多晶硅或高温金属栅、低温氧化硅电极绝缘层、金属电极。 Collection according to claim 1, wherein said forming active substrate, wherein said scanning circuit and the data circuit, a thin film transistor is a metal induced lateral crystallization polysilicon thin film transistor having the structure: depositing on a substrate a nitrogen silicon, silicon oxide or a composite layer constituting the barrier and buffer layers, metal induced lateral crystallization preparing polysilicon active islands and the channel above the barrier layer, and the low-temperature silicon oxide gate insulating layer are sequentially prepared, polysilicon, or metal gate high temperature, low temperature silicon oxide electrode insulating layer, a metal electrode.
5.根据权利要求1所述的全集成型有源基板,其特征在于所述的有源矩阵中的薄膜晶体管为金属诱导晶化多晶硅薄膜晶体管,其结构为:衬底上的沉积氮化硅、氧化硅或它们的复合层构成的阻挡层和过渡层,在该阻挡层上面制备金属诱导晶化多晶硅的有源岛和沟道,然后依序制备低温氧化硅栅绝缘层、多晶硅或高温金属栅、低温氧化硅绝缘层、金属内联引线、低温氧化硅绝缘层和透明电极。 5. Collection of the molding according to claim 1, the active substrate, wherein said active matrix thin film transistor is a metal-induced crystallized polycrystalline silicon thin film transistor having the structure: depositing silicon nitride on a substrate, barrier and buffer layers of silicon oxide or a composite layer composed of the barrier metal layer prepared above and induced crystallization channel polysilicon active islands, and low temperature silicon oxide gate insulating layer are sequentially prepared, high-temperature polysilicon or metal gate , the low temperature insulating layer of silicon oxide, metal leads with low-temperature silicon oxide insulating layer and the transparent electrode.
6.一种制备权利要求1所述的全集成型有源基板的方法,其特征在于经过下述步骤:1)在透明玻璃或石英衬底上,采用等离子化学汽相沉积的方法制备出透明电极过渡层,用来阻止衬底中的金属杂质向有源层扩散;2)在上述过渡层的衬底上,采用化学汽相沉积、低压化学气相淀积或溅射法,沉积非晶硅薄膜层;3)在非晶硅薄膜上沉积透明电极薄膜,并光刻出诱导孔图形,在扫描电路与数据电路区间,形成诱导口和透明电极覆盖层;在有源矩阵区间,去掉透明电极层,采用溶液方法或电子束蒸发法沉积诱导金属镍;在氮气下,450-600℃退火,完成金属诱导横向晶化和金属诱导晶化的晶化过程;4)光刻出电路和矩阵中薄膜晶体管有源岛图形,在金属诱导横向晶化多晶硅区间形成金属诱导横向晶化-薄膜晶体管有源岛,在金属诱导晶化多晶硅区间形成金属诱导晶 Collection of claim 1 to claim 6. A method of preparing an active substrate forming, characterized in that after the following steps: 1) on a transparent glass or quartz substrate, using the method of plasma chemical vapor deposition to prepare a transparent electrode transition layer, for preventing diffusion of metal impurities in the substrate to the active layer; 2) the above-described transition layer on the substrate by chemical vapor deposition, low pressure chemical vapor deposition or sputtering, an amorphous silicon film is deposited layer; 3) depositing a transparent electrode film on the amorphous silicon film, and the induction hole pattern lithography, the scanning circuit and the data circuit section, induction port is formed and a transparent electrode covering layer; in the active matrix section, a transparent electrode layer is removed using metallic nickel deposited inducing solution process or an electron beam evaporation method; under nitrogen, 450-600 deg.] C annealing, metal induced lateral crystallization completed metal-induced crystallization and crystallization process; 4) and the matrix circuit lithography film transistor active island pattern, a metal induced lateral crystallization section is formed of polysilicon metal induced lateral crystallization - TFT active island is formed in a metal induced crystallization zone polysilicon metal induced crystallization 化-薄膜晶体管有源岛,425℃下,沉积的透明电极作为栅绝缘层,并在其上面沉积多晶硅或高温金属钛钨、镍或钼,光刻加工成为栅电极;5)离子注入,活化形成薄膜晶体管的源漏电极,自动准注入薄膜晶体管源漏电极搀杂剂,N型薄膜晶体管以相应的能量注入磷、砷,P型薄膜晶体管以相应的能量注入硼;经过550℃30分钟的搀杂活化过程,形成多晶硅薄膜晶体管的源漏电极;6)溅射透明电极,光刻加工形成象素电极,425℃下,采用低压化学气相淀积方法,沉积透明电极电极间绝缘层;并光刻出诱导孔,溅射硅铝合金层,光刻电极图形,并完成合金化过程。 Of - a thin film transistor active island, at 425 deg.] C, the transparent electrode is deposited as a gate insulating layer, and depositing a high-temperature polysilicon or titanium tungsten, nickel or molybdenum, photolithography becomes a gate electrode thereon; 5) ion implantation, activation source-drain forming a thin film transistor, autocollimator injection TFT source and drain dopant, N-type thin film transistors in the respective energy implantation of phosphorus, arsenic, P type thin film transistors in the respective energy implantation of boron; 30 minutes doping 550 ℃ activation process, a polysilicon thin film transistor source and drain electrodes; 6) sputtering a transparent electrode, a pixel electrode photolithography, at 425 deg.] C, using a low pressure chemical vapor deposition method, a transparent electrode is deposited between the insulating layer; and lithographically the induction hole, sputtered silicon aluminum alloy layer, photolithography electrode pattern, and complete the alloying process.
7.根据权利要求6所述的全集成型有源基板的制备的方法,其特征在于所述的电路中的诱导口为平行电路分布长边的长方孔,矩阵上的诱导孔为包括整个矩阵面积的长方孔;基准对位标于扫描电路于数字电路的外延交差点上。 7. Collection The method according to claim 6, prepared by forming the active substrate, wherein said induction port in a circuit parallel to the long rectangular hole distribution circuit side, holes on the matrix is ​​induced by whole matrix comprising rectangular hole area; the reference position of the superscript in the epitaxial intersections of the scanning circuit in a digital circuit.
8.根据权利要求6所述的全集成型有源基板的制备的方法,其特征在于所述的金属诱导横向晶化和金属诱导晶化材料的厚度是30nm-300nm。 8. The method of claim 6 corpus preparing an active substrate forming, characterized in that the metal induced lateral crystallization, and metal induced crystallization material thickness is 30nm-300nm.
9.根据权利要求6所述的全集成型有源基板的制备的方法,其特征在于是在所述的沉积非晶硅上面的100nm-300nm的低温氧化硅上,光刻腐蚀出诱导口和掩盖层。 9. The method of claim 6 corpus preparing an active substrate forming, characterized by being in the low-temperature Si oxide 100nm-300nm of depositing amorphous silicon above said lithographic masking and etching the induction port Floor.
10.权利要求1所述的全集成有源基板用于有源矩阵液晶显示器和有源矩阵有机发光二极管显示器。 The fully integrated active substrate 1, an active matrix liquid crystal display and an active matrix organic light emitting diode display as claimed in claim 10.
CNB2005100144649A 2005-07-12 2005-07-12 Low temperature polycrystalline silicon film transistor full integrated active location substrate and preparation method CN100561321C (en)

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Publication number Priority date Publication date Assignee Title
CN102751307A (en) * 2012-06-29 2012-10-24 昆山工研院新型平板显示技术中心有限公司 Display capable of carrying out transparent and nontransparent conversion

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102751307A (en) * 2012-06-29 2012-10-24 昆山工研院新型平板显示技术中心有限公司 Display capable of carrying out transparent and nontransparent conversion

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