CN1286262C - Comprehensive measuring method and circuit for electric motor rotating speed and rotor location - Google Patents

Abstract

The present invention relates to a measuring method and a measuring circuit for the rotary speed of an AC motor and the position of a rotor. The method can obtain a periodic signal and a combined signal of an encoder at the time of measurement by comprehensively processing a pulse signal and a reset signal from the encoder and a measuring periodic signal given by a measurer. The rotary speed of a motor and the position of a rotor can be obtained by that a microprocessor can make a calculation through a formula provided by the present invention. With the adoption of the method of the present invention, the error of the measurement of the rotary speed of the motor due to the radial vibration and the axial vibration of the motor can be eliminated, and the measuring accuracy of the rotary speed of the motor can be improved. The rotary speed of the motor and the position of the rotor can be simultaneously measured by the same measuring device; thus, the hardware configuration is decreased, and the accuracy and the stability of a speed regulation control system of the motor can be ensured.

Description

The comprehensive measuring method of motor speed and rotor-position and measuring circuit

Technical field

The present invention relates to the method for measurement and the measuring circuit thereof of alternating current machine rotating speed and rotor-position.

Background technology

Development along with microelectric technique, the operational capability and the reliability of digital control and treatment chip are greatly improved, therefore in high-precision speed regualtion of AC motor control system, extensively having adopted with single-chip microcomputer or DSP is the full-digital control system of control core.In motor close-loop feedback control system, rotating speed and rotor-position are two important physical quantitys, and their certainty of measurement will directly have influence on the performance of control system.

Usually adopt the optical-electricity encoder that is installed on the motor shaft measuring component as motor speed and rotor-position.When motor rotated, the pulse signal that encoder output is digital was incorporated into two counters with this signal, and one of them counter is counted code device signal within a certain period of time, obtains encoder pulse number m ₁(frequency is f to the another one high-frequency counter simultaneously _c) code device signal in the whole Measuring Time is counted, obtain pulse number m ₂, measure numerical value with these two and send into microprocessor, pass through formula

$n=\frac{60f_c{m}_1}{N{m}_2}(r/\min )$

Can obtain measuring motor speed constantly (the pulse signal number that N produces for the encoder revolution in the formula).This promptly is conventional M/T method (M: refer to measure the encoder pulse frequency; T: refer to measure the encoder pulse cycle) measuring principle.

Conventional M/T method of measurement only is used to measure rotating speed of motor, can not measure the position of rotor when measuring rotating speed.In addition, large-scale unit can produce axially and radial vibration when operation, this vibration can cause the variation of rotor speed, and makes that the pulse train of encoder is no longer at interval even, and this moment is if adopt conventional M/T method measurement rotating speed of motor can produce bigger measure error.

Summary of the invention

The objective of the invention is to propose the comprehensive measuring method and the measuring circuit thereof of a kind of motor speed and rotor-position, the rotor-position of energy measurement motor when measuring motor speed to be implemented in, and overcome the error that the motor radial and axial vibration brings to measurement, improve the certainty of measurement of motor speed and rotor-position.

The motor speed that the present invention proposes and the comprehensive measuring method of rotor-position, its step is as follows:

1) on the arbor optical-electricity encoder is installed, the pulse signal GB and given pulse signal TB measuring period of gauger of encoder output are introduced encoder signal processing circuit, obtain behind the encoded device signal processing circuit digital logical operation encoder pulse signal and measuring period signal synthetic square-wave pulse signal TBGB_N be defeated by second counter, the pulse width T of the encoder composite signal of second counter output ₂Introduce microprocessor;

2) the pulse signal GB of encoder output is introduced first signal frequency-dividing circuit and carry out two divided-frequency, obtain two opposite encoder fractional frequency signal GB_P and GB_N of phase place and be defeated by first counter, the period T of the encoder pulse signal of first counter output _nIntroduce microprocessor;

3) given pulse signal TB measuring period is introduced the secondary signal frequency dividing circuit and carry out two divided-frequency, obtain two phase places opposite measuring period fractional frequency signal TB_P and TB_N be defeated by the 3rd counter, and the pulse signal GB of encoder output introduced the clock pin of the 3rd counter, the pulse number n input microprocessor of the encoder pulse signal of the 3rd counter output;

4) with given measuring period of pulse signal TB and introduce the reseting pulse signal treatment circuit from the reseting pulse signal IB of encoder, the synthetic square-wave pulse signal IBTB_N that obtains pulse measuring period and encoder reseting pulse signal behind reseting pulse signal treatment circuit digital logical operation introduces the 3rd counter, and the encoder of the 3rd counter output sends the pulse number n of the encoder pulse signal behind the reset pulse " input microprocessor;

5) microprocessor is calculated as follows the above-mentioned data that obtain, and asks for the rotor-position of motor speed and motor,

If the encoder reseting pulse signal do not occur in measuring period, the encoder pulse number that contains decimal measuring period is:

$N=n+\frac{T_1}{T_{n-1}}-\frac{T_2}{T_n}\·\·\·\left(1\right)$

In the formula, T _N-1Be last the measurement cycle of encoder pulse signal GB constantly, its initial value is that motor speed is measured value constantly for the first time,

Can be used as next the measurement constantly In microprocessor, kept;

Being changed to of internal rotor position measuring period:

$\mathrm{\&Delta;\&theta;}=\mathrm{<figure-callout\; id="2"\; label="N"\; filenames="C20041008235100121.png"\; state="\{\{state\}\}">N</figure-callout>}\frac{2\mathrm{\&pi;P}}{m}\left(\mathrm{rad}\right)\&CenterDot;\&CenterDot;\&CenterDot;\left(2\right)$

In the formula, the number of pole-pairs of P-motor, the pulse signal number that m-encoder revolution produces;

Measuring constantly, rotating speed of motor is:

${\mathrm{\&omega;}}_r=\frac{\mathrm{\&Delta;\&theta;}}{T}(\mathrm{rad}/s)\&CenterDot;\&CenterDot;\&CenterDot;\left(3\right)$

In the formula, T-measuring period;

The rotor-position of motor is:

θ _n＝θ _n-1+Δθ(rad) (4)

In the formula, θ _N-1-last the rotor position angle constantly of measuring, its initial value is that motor speed is measured value constantly for the first time;

If the encoder reseting pulse signal occurs in measuring period, then the computing formula of motor rotor position is:

θ _n＝θ _ini+Δθ(rad) (5)

In the formula, θ _Ini-rotor initial alignment angle when the encoder reseting pulse signal occurring,

The variation of Δ θ-motor rotor position, $\mathrm{\&Delta;\&theta;}=N^{\&prime;}\frac{2\mathrm{\&pi;P}}{m}\left(\mathrm{rad}\right),$ Wherein, N ' is the pulse number that contains the encoder pulse signal of decimal,

$N^{\&prime;}=n^{\&prime;\&prime;}-\frac{T_2}{T_n}\&CenterDot;\&CenterDot;\&CenterDot;\left(6\right)$

Be exclusively used in the measuring circuit of method of measurement of the present invention, it is characterized in that comprising encoder signal processing circuit, first signal frequency-dividing circuit, the secondary signal frequency dividing circuit, the reseting pulse signal treatment circuit, first counter, second counter, the 3rd counter and microprocessor, an input and input of first signal frequency-dividing circuit and the clock end of the 3rd counter of encoder signal processing circuit is connected the pulse signal GB that encoder is exported respectively, an input of another input of encoder signal processing circuit and the input of secondary signal frequency dividing circuit and reseting pulse signal treatment circuit is connected given pulse signal TB measuring period respectively, another input of reseting pulse signal treatment circuit connects the reseting pulse signal IB of encoder output, the output of encoder signal processing circuit links to each other with the input of second counter, the output of second counter links to each other with microprocessor, the fractional frequency signal GB_P output of first signal frequency-dividing circuit links to each other with two inputs of first counter respectively with fractional frequency signal GB_N output, the output of first counter links to each other with microprocessor, the fractional frequency signal TB_P output of secondary signal frequency dividing circuit links to each other with two inputs of the 3rd counter respectively with fractional frequency signal TB_N output, the output of the 3rd counter links to each other with microprocessor, and the output of reseting pulse signal treatment circuit links to each other with the 3rd input of the 3rd counter.

The invention has the beneficial effects as follows, can eliminate the error that the motor radial and axial vibration brings to motor speed measurement, improve the certainty of measurement of motor speed; Utilize same set of measurement mechanism, can measure rotating speed of motor and rotor-position simultaneously, reduced hardware configuration, guaranteed the accuracy and the stability of electric machine speed regulation control system.

Description of drawings

Fig. 1 is the measuring circuit of motor speed and rotor-position comprehensive measuring method;

Fig. 2 (a) is a kind of practical circuit of encoder signal processing circuit;

Fig. 2 (b) is the sequential chart of encoder signal processing circuit;

Fig. 3 (a) is a kind of practical circuit of first signal frequency-dividing circuit;

Fig. 3 (b) is the sequential chart of first signal frequency-dividing circuit;

Fig. 4 (a) is a kind of practical circuit of secondary signal frequency dividing circuit;

Fig. 4 (b) is the sequential chart of secondary signal frequency dividing circuit;

Fig. 5 (a) is a kind of practical circuit of reseting pulse signal treatment circuit;

Fig. 5 (b) is the sequential chart of reseting pulse signal treatment circuit.

Embodiment

With reference to Fig. 1, the measuring circuit that is used for motor speed of the present invention and rotor-position comprehensive measuring method comprises encoder signal processing circuit 1, first signal frequency-dividing circuit 2, secondary signal frequency dividing circuit 3, reseting pulse signal treatment circuit 4, first counter 5, second counter 6, the 3rd counter 7 and microprocessor 8, an input and input of first the signal frequency-dividing circuit 2 and clock end of the 3rd counter 7 of encoder signal processing circuit 1 is connected the pulse signal GB that encoder is exported respectively, an input of another input of encoder signal processing circuit 1 and the input of secondary signal frequency dividing circuit 3 and reseting pulse signal treatment circuit 4 is connected given pulse signal TB measuring period respectively, another input of reseting pulse signal treatment circuit 4 connects the reseting pulse signal IB of encoder output, the output of encoder signal processing circuit 1 links to each other with the input of second counter 6, the output of second counter 6 links to each other with microprocessor 8, the fractional frequency signal GB_P output of first signal frequency-dividing circuit 2 links to each other with two inputs of first counter 5 respectively with fractional frequency signal GB_N output, the output of first counter 5 links to each other with microprocessor 8, the fractional frequency signal TB_P output of secondary signal frequency dividing circuit 3 links to each other with two inputs of the 3rd counter 7 respectively with fractional frequency signal TB_N output, the output of the 3rd counter 7 links to each other with microprocessor 8, and the output of reseting pulse signal treatment circuit 4 links to each other with the 3rd input of the 3rd counter 7.

The first above-mentioned counter, second counter and the 3rd counter all can adopt chip 8253.

Fig. 2 (a) is a kind of physical circuit example of encoder signal processing circuit 1, form by the first NAND gate 1A, the second NAND gate 2A, the 3rd NAND gate 3A and d type flip flop 4A, first NAND gate, second NAND gate and the 3rd NAND gate all adopt 74LS00, and d type flip flop is a chip 7474.Measuring period, pulse signal TB was connected to 2 ends of the first NAND gate 1A, and 1 end of the first NAND gate 1A connects the Q end of d type flip flop 4A, and 3 ends of the first NAND gate 1A connect 1 end of the 3rd NAND gate 3A; Encoder pulse signal GB is connected to 1 end of the second NAND gate 2A, and 3 ends of the second NAND gate 2A connect 2 ends of the 3rd NAND gate 3A, and 3 ends of the 3rd NAND gate 3A connect the CLK end of d type flip flop 4A; 2 ends of the second NAND gate 2A and the D of d type flip flop 4A end and Q end connect altogether.At the Q of d type flip flop 4A end output coder composite signal TBGB_N.

The timing waveform of encoder signal processing circuit shown in Fig. 2 (b), among the figure, T _N-1And T ₁Be respectively the last cycle of moment encoder pulse signal GB and the pulse duration of encoder composite signal TBGB_N, the T of measuring _nAnd T ₂Be respectively to measure the cycle of moment encoder pulse signal GB and the pulse duration of encoder composite signal TBGB_N, n is the measured value (integer) of encoder pulse signal GB pulse number in measuring period, and N is the calculated value (containing decimal) of encoder pulse signal GB pulse number in measuring period.

The Q of d type flip flop 4A end is connected to the GATE end (see figure 1) that model is 8253 second counter 6, the working method of second counter 6 is set to 0, the clock frequency that the CLK termination is gone into is 1MHz, can record the pulse width T of encoder composite signal TBGB_N ₂Numerical value.Data/address bus by second counter 6 is sent into microprocessor 8 to measured value.

First signal frequency-dividing circuit, 2 employing models are 7474 d type flip flop, see shown in Fig. 3 (a), encoder pulse signal GB is connected to the CLK end of d type flip flop, the D end of d type flip flop links to each other with the Q end, Q end output coder fractional frequency signal GB_N, the Q end output coder fractional frequency signal GB_P of d type flip flop.The Q end of d type flip flop is connected to the GATEO end of first counter 5, and the Q end of d type flip flop is connected to the GATE1 end of first counter 5.

The timing waveform of first signal frequency-dividing circuit shown in Fig. 3 (b), among the figure, T _N1Be to measure the big value of first counter 5 constantly, T _N2Be to measure the little value of first counter 5 constantly.The working method of first counter 5 is set to 1, and the clock frequency that CLK0 and CLK1 termination are gone into is 1MHz.Can record T _N1And T _N2Numerical value, T then _n=T _N1-T _N2Data/address bus by first counter 5 is sent into microprocessor 8 to measured value.

Secondary signal frequency dividing circuit 3 employing models are 7474 d type flip flop, see shown in Fig. 4 (a), measuring period, pulse signal TB was connected to the CLK end of d type flip flop, the D end of d type flip flop links to each other with the Q end, Q end output fractional frequency signal TB_N measuring period is at the Q of d type flip flop end output fractional frequency signal TB_P measuring period.The Q end of d type flip flop is connected to the GATE1 end of the 3rd counter 7, and the Q end of d type flip flop is connected to the GATE2 end of the 3rd counter 7, and encoder pulse signal GB is connected to the CLK1 and the CLK2 end of the 3rd counter 7 simultaneously.

The timing waveform of secondary signal frequency dividing circuit is shown in Fig. 4 (b), and among the figure, n is the measured value (integer) of encoder pulse signal GB pulse number in measuring period.The working method of the 3rd counter 7 is set to 0, and when measuring period, fractional frequency signal TB_P or TB_N were high level, 7 pairs of encoder pulse signals of the 3rd counter GB counted, and can measure the pulse number n of encoder pulse signal GB.Data/address bus by the 3rd counter 7 is sent into microprocessor 8 to measured value.

Fig. 5 (a) is a kind of physical circuit example of reseting pulse signal treatment circuit 4, form by the first NAND gate 1B, the second NAND gate 2B, the 3rd NAND gate 3B and d type flip flop 4B, first NAND gate, second NAND gate and the 3rd NAND gate all adopt 74LS00, and d type flip flop is a chip 7474.

The reseting pulse signal IB of encoder output is connected to 2 ends of the first NAND gate 1B, and 1 end of the first NAND gate 1B is connected to the Q end of d type flip flop 4B, and 3 ends of the first NAND gate 1B connect 1 end of the 3rd NAND gate 3B; Measuring period, pulse signal TB was connected to 1 end of the second NAND gate 2B, and 3 ends of the second NAND gate 2B connect 2 ends of the 3rd NAND gate 3B, and 3 ends of the 3rd NAND gate 3B connect the CLK end of d type flip flop 4B; 2 ends of the second NAND gate 2B and the D of d type flip flop 4B end and Q end connect altogether.At the Q of d type flip flop 4B end output reset pulse composite signal IBTB_N.

The timing waveform of reseting pulse signal treatment circuit shown in Fig. 5 (b), among the figure, θ _N-1Be the last rotor-position (known) of motor constantly, the θ of measuring _nBe to measure motor rotor position (to be measured) constantly, θ _IniIt is the rotor initial alignment angle (known) when the encoder reseting pulse signal occurring, n " is the measured value that encoder pulse signal GB pulse number behind the encoder reseting pulse signal IB occurs; N ' is the calculated value that encoder pulse signal GB pulse number behind the encoder reseting pulse signal IB occurs, T ₂Be the pulse duration of encoder composite signal TBGB_N, T _nIt is the cycle of encoder pulse signal.

The Q of d type flip flop 4B end is connected to the GATEO end that model is 8253 second counter 7.The working method of the 3rd counter 7 is set to 0, the CLKO termination is gone into encoder pulse signal GB, 7 pairs of encoder pulse signals of the 3rd counter GB counts when reset pulse composite signal IBTB_N is high level, can record the pulse number n that encoder pulse signal GB behind the reseting pulse signal IB occurs ".Data/address bus by the 3rd counter 7 is sent into microprocessor 8 to measured value.

During work, introduce the encoder pulse signal GB of encoder signal processing circuit 1 and given pulse signal TB process circuit logic computing measuring period, obtain composite pulse signal TBGB_N, composite pulse signal TBGB_N introduces second counter 6, the clock of given second counter 6 can be measured the pulse width T of encoder composite signal TBGB_N ₂, measured value T ₂Send into microprocessor 8 by the data/address bus of second counter 6.

Encoder pulse signal GB through first signal frequency-dividing circuit, 2 two divided-frequencies after, obtain two encoder fractional frequency signal GB_P and GB_N that phase place is opposite, these two signals are introduced first counter 5, and the clock of given first counter 5 can be measured the period T of encoder pulse signal GB _n, the data/address bus by first counter 5 is measured value T _nSend into microprocessor 8.

After measuring period, pulse signal TB passed through secondary signal frequency dividing circuit 3 two divided-frequencies, obtain the opposite fractional frequency signal TB_P and TB_N measuring period of two phase places, these two signals and encoder pulse signal GB introduce the 3rd counter 7, can measure the pulse number n of encoder pulse signal GB through the 3rd counter 7, measured value be sent into microprocessor 8 by the data/address bus of the 3rd counter 7.

Introduce reseting pulse signal treatment circuit 4 measuring period pulse signal TB and from the reseting pulse signal IB of encoder through the circuit logic computing, obtain reset pulse composite signal IBTB_N, reset pulse composite signal IBTB_N can measure the pulse number n of encoder pulse signal GB through the 3rd counter 7 ", by the data/address bus of the 3rd counter 7 measured value is sent into microprocessor 8.

By above measuring process, can obtain T ₂, T _n, n and n " numerical value, utilize formula (1)～(6), in microprocessor 8, calculate and can obtain measuring rotating speed of motor and rotor-position constantly.

Claims (4)

1. the comprehensive measuring method of motor speed and rotor-position is characterized in that may further comprise the steps:

1) optical-electricity encoder is installed on motor shaft, the pulse signal GB and given pulse signal TB measuring period of gauger of encoder output are introduced encoder signal processing circuit (1), obtain behind encoded device signal processing circuit (1) digital logical operation encoder pulse signal and measuring period signal synthetic square-wave pulse signal TBGB_N be defeated by second counter (6), the pulse width T of the encoder composite signal of second counter (6) output ₂Introduce microprocessor (8);

2) the pulse signal GB of encoder output is introduced first signal frequency-dividing circuit (2) and carry out two divided-frequency, obtain two opposite encoder fractional frequency signal GB_P and GB_N of phase place and be defeated by first counter (5), the period T of the encoder pulse signal of first counter (5) output _nDraw microprocessor (8);

3) given pulse signal TB measuring period is introduced secondary signal frequency dividing circuit (3) and carry out two divided-frequency, obtain two phase places opposite measuring period fractional frequency signal TB_P and TB_N be defeated by the 3rd counter (7), and the pulse signal GB of encoder output introduced the clock pin of the 3rd counter (7), the pulse number n input microprocessor (8) of the encoder pulse signal of the 3rd counter (7) output;

4) with given measuring period of pulse signal TB and introduce reseting pulse signal treatment circuit (4) from the reseting pulse signal IB of encoder, the synthetic square-wave pulse signal IBTB_N that obtains pulse measuring period and encoder reseting pulse signal behind reseting pulse signal treatment circuit (4) digital logical operation introduces the 3rd counter (7), and the encoder of the 3rd counter (7) output sends the pulse number n of the encoder pulse signal behind the reset pulse " input microprocessor (8);

5) microprocessor is calculated as follows the above-mentioned data that obtain, and asks for the rotor-position of motor speed and motor,

If the encoder reseting pulse signal do not occur in measuring period, the encoder pulse number that contains decimal measuring period is:

$N=n+\frac{T_1}{T_{n-1}}-\frac{T_2}{T_n}---\left(1\right)$

In the formula, T _N-1Be last the measurement cycle of encoder pulse signal GB constantly, its initial value is that motor speed is measured value constantly for the first time, Can be used as next the measurement constantly In microprocessor, kept;

Being changed to of internal rotor position measuring period:

$\mathrm{\&Delta;\&theta;}=N\frac{2\mathrm{\&pi;P}}{m}\left(\mathrm{rad}\right)---\left(2\right)$

In the formula, the number of pole-pairs of P-motor, the pulse signal number that m-encoder revolution produces;

Measuring constantly, rotating speed of motor is:

${\mathrm{\&omega;}}_r=\frac{\mathrm{\&Delta;\&theta;}}{T}(\mathrm{rad}/s)---\left(3\right)$

In the formula, T-measuring period;

The rotor-position of motor is:

θ _n＝θ _n-1+Δθ(rad) (4)

In the formula, θ _N-1-last the rotor position angle constantly of measuring, its initial value is that motor speed is measured value constantly for the first time;

If the encoder reseting pulse signal occurs in measuring period, then the computing formula of motor rotor position is:

θ _n＝θ _ini+Δθ(rad) (5)

In the formula, θ _Ini-rotor initial alignment angle when the encoder reseting pulse signal occurring,

The variation of Δ θ-motor rotor position, $\mathrm{\&Delta;\&theta;}=N^{\&prime;}\frac{2\mathrm{\&pi;P}}{m}\left(\mathrm{rad}\right),$ Wherein, N ' is the pulse number that contains the encoder pulse signal of decimal,

$N^{\&prime;}=n^{\&prime;\&prime;}-\frac{T_2}{T_n}---\left(6\right).$

2. the measuring circuit that is used for the described method of measurement of claim 1, it is characterized in that comprising encoder signal processing circuit (1), first signal frequency-dividing circuit (2), secondary signal frequency dividing circuit (3), reseting pulse signal treatment circuit (4), first counter (5), second counter (6), the 3rd counter (7) and microprocessor (8), an input and input of first signal frequency-dividing circuit (2) and the clock end of the 3rd counter (7) of encoder signal processing circuit (1) is connected the pulse signal GB that encoder is exported respectively, the input of another input of encoder signal processing circuit (1) and secondary signal frequency dividing circuit (3) and an input of reseting pulse signal treatment circuit (4) are connected given pulse signal TB measuring period respectively, another input of reseting pulse signal treatment circuit (4) connects the reseting pulse signal IB of encoder output, the output of encoder signal processing circuit (1) links to each other with the input of second counter (6), the output of second counter (6) links to each other with microprocessor (8), the fractional frequency signal GB_P output of first signal frequency-dividing circuit (2) links to each other with two inputs of first counter (5) respectively with fractional frequency signal GB_N output, the output of first counter (5) links to each other with microprocessor (8), the fractional frequency signal TB_P output of secondary signal frequency dividing circuit (3) links to each other with two inputs of the 3rd counter (7) respectively with fractional frequency signal TB_N output, the output of the 3rd counter (7) links to each other with microprocessor (8), and the output of reseting pulse signal treatment circuit (4) links to each other with the 3rd input of the 3rd counter (7).

3. measuring circuit according to claim 2, it is characterized in that said encoder signal processing circuit (1) is made up of first NAND gate (1A), second NAND gate (2A), the 3rd NAND gate (3A) and d type flip flop (4A), first NAND gate, second NAND gate and the 3rd NAND gate all adopt 74LS00, d type flip flop is a chip 7474, measuring period, pulse signal TB was connected to 2 ends of first NAND gate (1A), 1 end of first NAND gate (1A) connects the Q end of d type flip flop (4A), and 3 ends of first NAND gate (1A) connect 1 end of the 3rd NAND gate (3A); Encoder pulse signal GB is connected to 1 end of second NAND gate (2A), and 3 ends of second NAND gate (2A) connect 2 ends of the 3rd NAND gate (3A), and 3 ends of the 3rd NAND gate (3A) connect the CLK end of d type flip flop (4A); The D end and the Q end of 2 ends of second NAND gate (2A) and d type flip flop (4A) connect altogether.

4. measuring circuit according to claim 2, it is characterized in that said reseting pulse signal treatment circuit (4) is by first NAND gate (1B), second NAND gate (2B), the 3rd NAND gate (3B) and d type flip flop (4B) are formed, first NAND gate, second NAND gate and the 3rd NAND gate all adopt 74LS00, d type flip flop is a chip 7474, the reseting pulse signal IB of encoder output is connected to 2 ends of first NAND gate (1B), 1 end of first NAND gate (1B) is connected to the Q end of d type flip flop (4B), and 3 ends of first NAND gate (1B) connect 1 end of the 3rd NAND gate (3B); Measuring period, pulse signal TB was connected to 1 end of second NAND gate (2B), and 3 ends of second NAND gate (2B) connect 2 ends of the 3rd NAND gate (3B), and 3 ends of the 3rd NAND gate (3B) connect the CLK end of d type flip flop (4B); The D end and the Q end of 2 ends of second NAND gate (2B) and d type flip flop (4B) connect altogether.

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