CN1240327A - Installed circuit board structure and multi-layer circuit board for same - Google Patents

Installed circuit board structure and multi-layer circuit board for same Download PDF

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Publication number
CN1240327A
CN1240327A CN 99108580 CN99108580A CN1240327A CN 1240327 A CN1240327 A CN 1240327A CN 99108580 CN99108580 CN 99108580 CN 99108580 A CN99108580 A CN 99108580A CN 1240327 A CN1240327 A CN 1240327A
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CN
China
Prior art keywords
circuit board
core
layer
board
circuit
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Application number
CN 99108580
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Chinese (zh)
Inventor
长泽德
杉本正和
中村圭
井上泰史
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日东电工株式会社
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Priority to JP176421/1998 priority Critical
Application filed by 日东电工株式会社 filed Critical 日东电工株式会社
Priority to CN 99108580 priority patent/CN1240327A/en
Publication of CN1240327A publication Critical patent/CN1240327A/en

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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]

Abstract

The present invention provides a mounted structure of circuit board which can be prepared by a simple method and exhibits a good heat dissipation from chip and undergoes relaxed heat stress and a multi-layer circuit board to be incorporated in the mounted structure. A core material embedded in an insulating layer, has a metal layer with a heat conductivity of not less than 100W/m.K provided on at least side of an Ni-Fe alloy foil, said insulating layer comprising a wire conductor provided and a semiconductor element mounted on at least one side thereof, characterized in that a solder metal member for heat conduction is provided interposed between said semiconductor element and said core material so that said semiconductor element and said core material are connected to each other.

Description

The mounted board structure of circuit and the multilayer circuit board of structure for this reason

The present invention relates to the mounted board structure of circuit and the multilayer circuit board of structure for this reason.

Along with the trend of present minimizing electronic equipment size and its performance of enhancing, require the multilayer printed circuit board of semiconductor equipment and installation semiconductor equipment to have the size that reduces, the thickness that reduces, high-performance and high reliability.In order to satisfy these requirements, installation method turns to surface mounting method from the cushion method.In recent years, a kind ofly be called the installation method that exposed die installs and obtain research, this method relates to chip directly is installed on the printed circuit board (PCB).

According to exposed die method is installed, silicon chip is directly installed on the printed circuit board (PCB).Yet, because the thermal coefficient of expansion that silicon chip shows is from 3 to 4ppm/ ℃, the thermal coefficient of expansion that printed circuit board (PCB) shows is for from 15 to 20ppm/ ℃, so difference of thermal expansion coefficients causes the generation of stress between two parts that cause thus, reduced the reliability during mounting structure connects.In flip-chip was installed, this stress caused the destruction of connection, causes as conducting electricity bad defective.

In order to discharge this stress, common way is to inject the adhesive that is called underfilling in chip of installing and the slit between circuit board.Utilize thermosetting resin as this underfilling.The purpose of this underfilling is the stress that dispersion is caused by thermal expansion difference between chip and circuit board.

In order to discharge the stress of printed circuit board (PCB) itself, advised a kind of multilayer board, it comprises an absorbed layer and has the stepwise vertical change that in every layer horizontal thermal coefficient of expansion this absorbed layer is used for absorbing the interlayer shearing strain (as JP-A-7-297560 disclosed (meaning of term as used herein " JP-A " is " a unexamined disclosed Japanese patent application ")) of each interlayer of multilayer board.

On the other hand, along with the enhancing of present electronic equipment performance, the semiconductor chip of use trends towards producing more heat.The heat that gathers in the chip descends chip reliability.Thereby, provide usually to have with the chip of air-cooled fin of fan or radiator or pack.

Along with the increase of I/O stitch quantity on the chip, plate that chip more and more require to be installed is a multilayer shape.As this multilayer circuit board, advise a kind of combination multilayer circuit board that obtains by alternately laminated insulating barrier and conductive layer, this insulating barrier is by the photosensitive resin manufacturing, and this conductive layer is by forming in plating of the one or both sides of plate or vacuum evaporation.As another kind of multilayer circuit board, advised a kind ofly by repeating the multilayer circuit board that an operation obtains, this operation relates to be utilized distributor and bonding sheet and Copper Foil is pressed in the side (applying the copper surface) at coating foil glass epoxy resin thin slice goes up the conducting resinl of formation as protrusion on the thin slice.As another multilayer circuit board, advised a kind of multilayer circuit board, this multilayer circuit board is by replacing stacked insulating barrier and line conductor on the nickel-ferro alloy as substrate or by utilizing the photomechanical process art to form pad on the multilayer circuit board surface, under heating and pressure effect thin slice being combined into (as disclosed in JP-A-61-212096) that integral body obtains then.

Yet,, also have some weak point aspect mounted structure or the circuit board reliability in connection even discharged stress by preceding method.In order to guarantee higher reliability, require the heat of dispersed chip generation or the thermal coefficient of expansion of reduction circuit board.

And, thereby because modern electronic equipment must satisfy the more and more higher requirement that portability is reduced size, thickness and weight, aforesaid radiator structure uses fewer and fewerily.

The multilayer circuit board of I/O stitch quantitative requirement runs into all difficulties aborning on the above-mentioned satisfied increase chip.In other words, aforementioned multilayer circuit board runs into all difficulties.For example, this multilayer circuit board must be prepared in relating to the complicated procedures of forming of a large amount of steps.And this combination multilayer circuit board only can be prepared under low yield.Like this, this multilayer circuit board can not be paid fast.Aforementioned other multilayer circuit board comprises the protrusion that is formed by distributor or analog by conducting resinl, and it runs into a lot of difficulties at aspects such as connection reliability, connection resistance.And this multilayer circuit board is difficult to be suitable for precision circuit.And the number of times that this multilayer circuit board repeats to suppress must be corresponding to the number of plies that requires to realize multilayer form, and this needs the plenty of time to produce.And, aforementionedly comprise that other multilayer circuit board as the nickel-ferro alloy of substrate requires to use vacuum evaporation method or metallikon to form thin metal layer.Like this, thus can only productivity ratio reduce and cost increase situation under could obtain these multilayer circuit boards.

Summary of the invention

Therefore, an object of the present invention is to provide a kind of mounted board structure of circuit and the multilayer circuit board that will be bonded in this mounted structure, this board structure of circuit can be prepared and disperses heat from chip well by simple method, and the thermal stress that alleviates of experience.

Thereby above-mentioned purpose of the present invention will become more obvious in the following detailed description and the example.

The first embodiment of the present invention is a mounted board structure of circuit, it comprises the core material that is implanted in the insulating barrier, at least the metal level that provides on a side on the nickel-ferro alloy paper tinsel is provided described core material, the thermal conductivity of metal level is not less than 100W/mK, the line conductor that provides on its at least one side and the semiconductor element of installation are provided described insulating barrier, it is characterized in that, between described semiconductor element and described core material, be provided for the solder metal spare of heat conduction, make described semiconductor element and described core material link together.

The second embodiment of the present invention is the multilayer circuit board that is used at this mounted board structure of circuit, and wherein the core material of vertical adjacent circuit plate interconnects by the solder metal spare that is used for heat conduction.

In a mounted board structure of circuit, the heat that needs to produce in the semiconductor element disperses fast along the circuit board surface level, to promote the heat of dispersion from semiconductor element.Also require to reduce thermal expansion difference between semiconductor element and circuit board to alleviate thermal stress.For this reason, require to suppress the thermal expansion of line conductor, the thermal expansion of circuit board is mainly owing to the thermal expansion of this line conductor.Notice the kind of core material in the circuit board and install the structure of structure that the inventor is to the thermal stress that stands to alleviate and disperse well to have carried out a large amount of research from the mounted board structure of circuit of the heat of chip.Found that, the solder metal spare that semiconductor element directly is connected on the core material and is provided for betwixt heat conduction makes it may alleviate thermal stress and promotes to disperse heat from semiconductor element, and the metal level that the thermal conductivity that provides at least one side of nickel-ferro alloy paper tinsel is not less than 100W/mK is provided core material.Work out the present invention like this.In other words, according to the present invention, when electric current current through line lead, line conductor and semiconductor element produce heat, and this heat is delivered to core material by solder metal spare, disperses from the core material level along the surface then.Heat disperses to make it possible to suppress to follow the reliability decrease of semiconductor element heat production generation.Because the effect of nickel-ferro alloy paper tinsel makes its thermal expansion that can suppress circuit board in the core material,, make it possible to strengthen the reliability that connects in the mounted semiconductor element so can reduce the thermal expansion difference between semiconductor element and circuit board.And, because the structure that installs of core material and circuit board has simple structure, so it can utilize actual legacy equipment to prepare by simple method.

If mounted board structure of circuit of the present invention comprises multilayer circuit board, because the core material on these circuit boards interconnects by solder metal, the heat that semiconductor element produces can be delivered on a plurality of core materials, disperses along surface level from core material then.

And, if mounted board structure of circuit of the present invention be arranged so that circuit board be multilayer circuit board and in circuit board solder metal spare be vertical and almost coaxial formation, the heat that semiconductor element produces is delivered on a plurality of core materials by these minimal paths, can disperse effectively like this.

And, if semiconductor element is mounted thereto, the multilayer circuit board that then will be attached in the mounted structure of the present invention can be prepared by simple method, but and as good heat radiating and alleviate the circuit board of thermal stress, its reason is identical with aforementioned mounted board structure of circuit.

Fig. 1 is a profile, and it has represented the example according to mounted board structure of circuit of the present invention;

Fig. 2 is a profile, and it has represented to be used for preparing the operation of the various bilateral circuit boards of 6-layer circuit board, and this 6-layer circuit board will be attached in the aforementioned mounted structure;

Fig. 3 is a profile, and it has represented to be used for preparing another operation of the various bilateral circuit boards of 6-layer circuit board, and this 6-layer circuit board will be attached in the aforementioned mounted structure;

Fig. 4 is a profile, and it has represented to be used for preparing another operation of the various bilateral circuit boards of 6-layer circuit board, and this 6-layer circuit board will be attached in the aforementioned mounted structure;

Fig. 5 is a profile, and it has represented to be used for preparing another operation of the various bilateral circuit boards of 6-layer circuit board, and this 6-layer circuit board will be attached in the aforementioned mounted structure;

Fig. 6 is a profile, and it has represented to be used for preparing another operation of the various bilateral circuit boards of 6-layer circuit board, and this 6-layer circuit board will be attached in the aforementioned mounted structure;

Fig. 7 is a profile, and it has represented to be used for preparing another operation of the various bilateral circuit boards of 6-layer circuit board, and this 6-layer circuit board will be attached in the aforementioned mounted structure;

Fig. 8 is a profile, and it has represented to be used for preparing another operation of the various bilateral circuit boards of 6-layer circuit board, and this 6-layer circuit board will be attached in the aforementioned mounted structure;

Fig. 9 is a profile, and it has represented to be used for preparing another operation of the various bilateral circuit boards of 6-layer circuit board, and this 6-layer circuit board will be attached in the aforementioned mounted structure;

Figure 10 is a profile, it has represented to be used for to prepare to be attached to the operation of the 6-layer circuit board of aforementioned mounted structure, wherein reference marker 1 is represented the bilateral circuit board, reference marker 2 expression 6-layer circuit boards, reference marker 3 expression core materials, reference marker 3a represents the copper layer, insulating barrier between reference marker 4 display plates, reference marker 5 indication circuits, reference marker 10 expression solder metal spares, reference marker 13 expression chips, reference marker 25 expression nickel-ferro alloy paper tinsels.

Describe embodiments of the invention now in conjunction with the accompanying drawings in detail.

Fig. 1 has represented mounted board structure of circuit of the present invention and the embodiment that will be combined in multilayer circuit board wherein respectively to Figure 10.Aforementioned multilayer circuit board embodiment is a 6-layer circuit board 2, and it obtains by stacked 3 bilateral circuit boards 1.

This bilateral circuit board 1 comprises insulating barrier 4 between a plate, and core material 3 is implanted in the core of insulating barrier 4, has the circuit 5 (line conductor) that Copper Foil is done on the both sides of insulating barrier 4.The circuit 5 of insulating barrier 4 both sides is electrically connected mutually by electroplating ventilating hole 6.

In aforementioned 6-layer circuit board 2, provide insulating barrier 7 between plate 1 of two bilateral circuit board.Circuit 5 on the vertical adjacent bilateral circuit board 1 is electrically connected mutually by a scolder lead 8.For this reason, on insulating barrier between plate 7, form a through hole 9 to receive scolder lead 8 corresponding to the part that connects.And the core material 3 on the vertical adjacent bilateral circuit board 1 interconnects by a solder metal spare 10.For this reason, between insulating barrier between plate 4 and plate, form a through hole 11 to receive solder metal spare 10 corresponding to the position that is connected on the insulating barrier 7.And, also provide soldering-resistance layer 12 in the both sides of 6-layer circuit board 2.

In aforementioned mounted structure, the chip (semiconductor element) that has a welding block 14 is connected electrically on the circuit 5 on aforementioned 6-layer circuit board 2 the superiors and the orlop (shown in 13 of chips be connected in the superiors).For this reason, on soldering-resistance layer 12, form a through hole 12a to receive welding block 14 corresponding to the position that connects.And aforementioned chip 13 and following core material 3 interconnect by solder metal spare 10.For this reason, between soldering-resistance layer 12 and plate, formed through hole 11 to receive solder metal spare 10 corresponding to the position that is connected on the insulating barrier 4.

Aforementioned 6-layer circuit board 2 can be prepared as follows.Slightly in detail, be ready to core material 3.As shown in Figure 3, the copper layer 3a that the thermal conductivity that provides at least one side of nickel-ferro alloy paper tinsel 25 is 393W/mK (shown in copper 3a be provided at the both sides of nickel-ferro alloy paper tinsel 25) is provided core material 3.The preparation of core material 3 is done in such a way that promptly provides a Copper Foil by at least one side at nickel-ferro alloy paper tinsel 25, and the rolling thin slice is up to the thickness that reaches hope or by electro-coppering on nickel-ferro alloy paper tinsel 25 then.

Subsequently, on core material 3, form through hole 3b.The formation of through hole 3b is finished by brill or punching press or warm etching work procedure or similar approach.

Subsequently, as shown in Figure 3, under pressure, two-layer copper polyimide substrate 15 thermo-contacts are bonded on the both sides of core material 3, and adhesive plate 16 is provided therebetween.In this arrangement, two-layer copper polyimide substrate 15 and adhesive plate 16 form insulating barrier 4 (see figure 1)s between aforementioned panels together.Subsequently, the conductor layer 17 done of Copper Foil is formed on the both sides of insulating barrier 4 between plate.Lead substrate like this, all set 18.

Subsequently, as shown in Figure 4, through hole 18a is formed in the aforementioned wire substrate 18, and the diameter of this through hole 18a is less than the aforementioned through-hole 3b (see figure 2) that forms on core material 3 and pass aforementioned through-hole 3b.

Then, as shown in Figure 5, the inboard of using copper 6 electroplating ventilating hole 18a is with the conductor layer 17 on insulation 4 both sides in the electric connection board.

Then, as shown in Figure 6, the conductor layer between etched plate on insulating barrier 4 both sides is to form circuit 5 thereon.

Then, as shown in Figure 7, with the two-layer copper polyimide substrate 15 of laser beam irradiation and adhesive plate 16 to form through hole 4a on the position that receives aforementioned solder metal spare 10 (see figure 1)s at it.Like this, all set the bilateral circuit board main body 19.

Then, as shown in Figure 8, adhesive plate 20 under pressure heat bonding on the upper surface of aforementioned bilateral circuit board main body 19.Punching press adhesive plate 20 forms through hole 20a and 20b respectively with the position that receives aforementioned scolder lead 8 and 10 (see figure 1)s thereon.

Then, as shown in Figure 9, solder paste is printed on the adhesive plate 20 to fill through hole 4a that is formed by laser beam and through hole 20a and the 20b that is formed by punching press by metal mask.Weld main body 19 then.Flush away solder flux then.Like this, on core material 3 and circuit 5, welding block 21 and 22 have been formed.Like this, the bilateral circuit board 23 that has a welding block has just formed.Two this bilateral circuit boards 23 that have welding block have just formed.

Individually, as shown in Figure 7, formed a slice bilateral circuit board 24, it is formed with welding block 22 (see figure 10)s of not being with adhesive plate, and core material 3 parts expose.

And, soldering-resistance layer 12 (see figure 1)s that will provide on the both sides of 6-layer circuit board 2 have been provided.As shown in Figure 10, punching press soldering-resistance layer 12 forms through hole 12a with the position at the welding block 14 that is used to connect aforementioned chip 13 corresponding to reception, forms through hole 12b (shown in through hole 12a the soldering-resistance layer 12 that will provide on the surface of 6-layer circuit board 2 only is provided with 12b) in the position of solder metal spare 10 (see figure 1)s that are used to connect chip 13 corresponding to reception.

Subsequently, as shown in Figure 10,23,24 and two mutual as requested stacked location of cover layer 12 of aforementioned three bilateral circuit boards, hot sticky mutually under pressure then to obtain 6-layer circuit board 2 as shown in fig. 1.In this operation, welding block 21 (see figure 10)s on the circuit 5 form scolder lead 8 (see figure 1)s.Welding block 22 (see figure 10)s of core material 3 form solder metal spare 10 (see figure 1)s.Adhesive plate 20 (see figure 10)s form insulating barrier 7 (see figure 1)s between plate.And through hole 20a (see figure 8) forms through hole 9 (see figure 1)s.Each self-forming through hole 11 (see figure 1) of through hole 4a and 20b (see figure 8) and through hole 4a (see figure 7) and through hole 12b (see figure 10).And, then chip 13 is installed in the position that needs on the circuit board to obtain mounted structure as shown in fig. 1.

In said structure, when electric current was flowed through circuit 5, circuit 5 and chip 13 produced heat.Thereby the heat that produces is delivered to core material 3 by solder metal spare 10, disperses along its surface level from core material 3 then.

As mentioned above, according to the embodiment of aforementioned mounted structure of the present invention, chip 13 and following core material 3 interconnect by solder metal spare 10.And the core material 3 on the vertical adjacent bilateral circuit board 1 interconnects by solder metal spare 10 equally.In this arrangement, when electric current flow through circuit 5, the synthetic heat that circuit 5 and chip 13 produce was delivered on three-layer core material 3 by solder metal spare 10, scatter from core material 3 then.And, because core material 3 is by 25 manufacturings of nickel-ferro alloy paper tinsel, so can suppress the thermal expansion of various bilateral circuit boards 1 and 6-layer circuit board 2.And, owing to can prepare core material 3, form various through holes and stacked and bonding various elements, by any known straightforward procedure so also can prepare aforementioned mounted structure simply.

Present invention will be further described in example below and the comparative example, but should not be interpreted as the present invention and be limited to this.Example 1

By (nickel content: weight accounts for 36% in 36 Alloy Foil; Iron content: weight accounts for 64%; Thermal conductivity: 10W/mK; Thermal coefficient of expansion: 1.5ppm/ ℃) both sides on Copper Foil (thermal conductivity: 393W/mK is provided; Thermal coefficient of expansion: 17ppm/ ℃), the rolling thin layer reaches the 50 μ m (thickness of 36 Alloy Foil: 30 μ m up to integral thickness then; The thickness of each Copper Foil: 10 μ m) and the Ni-Fe volume content reach 60% and prepare core material 3.Utilize the blade of 0.3 mm dia in core material 3, to make through hole 3b by brill then.By at thickness be on the Copper Foil of 18 μ m the pre-varnish of coating polyimide (by in the n-methyl pyrrolidone, making p-phenylenediamine and 3,3 ', 4, the polyamide acid varnish that 4 '-phenylbenzene tetracarboxylic dihydrate reaction obtains), oven dry coating material, the imidization that then coating material stood 1 hour in 400 ℃ of nitrogen are that the polyimide layer of 20 μ m is prepared two-layer copper polyimide substrate 15 so that thickness to be provided thereon.As the adhesive plate 16 that is used for two-layer-copper polyimide substrate 15 is bonded to core material 3 both sides, used the SPB-035A type polyimides adhesive plate of producing by Nippon Steel Chemical Co., Ltd here.After having pasted thin layer, at 40kg/cm 2Under the pressure thin slice is heated to 200 ℃-hour.Utilize the blade of 0.2 mm dia in adhesive plate 16, to make through hole 18a by brill then.Use 6 couples of through hole 18a of copper internal electroplated then, thickness is 5 μ m.As the adhesive plate that is used to bond to bilateral circuit board main body 19 both sides, used the SPB-035A type polyimides adhesive plate of producing by NipponSteel Chemical Co., Ltd here.Behind the bonding intact thin layer, at 20kg/cm 2Under the pressure thin slice be heated to 180 ℃ 30 minutes.As the solder paste that in forming welding block 14,21 and 22, uses, used the Sn8RA-3AMQ (fusing point: 260 ℃) that produces by Nippon Superior Co., Ltd here.Remove thin layer at 30kg/cm 2Be heated under the pressure outside 200 ℃-hour, three bilateral circuit boards 23,24 and two soldering-resistance layers 12 stacked and bonding be to finish in identical as mentioned above mode.Like this, all set the 6-layer circuit board 2.And chip 13 is installed in requiring on the position to prepare mounted structure of 6-layer circuit board 2.Example 2

Remove by (nickel content: weight accounts for 36% in 36 Alloy Foil; Iron content: weight point 64%; Thermal conductivity: 10W/mK; Thermal coefficient of expansion: 1.5ppm/ ℃) both sides aluminium foil (thermal conductivity: 200W/mK is provided; Thermal coefficient of expansion: 21ppm/ ℃), the rolling thin layer reaches the 50 μ m (thickness of 36 Alloy Foil: 30 μ m up to integral thickness then; The thickness of each Copper Foil: 10 μ m) and the Ni-Fe volume content reach 60% and prepare outside the core material 3, mounted structure be with example 1 in identical mode prepare.Example 3

Remove by (nickel content: weight accounts for 36% in 36 Alloy Foil; Iron content: weight point 64%; Thermal conductivity: 10W/mK; Thermal coefficient of expansion: 1.5ppm/ ℃) both sides Copper Foil (thermal conductivity: 393W/mK is provided; Thermal coefficient of expansion: 17ppm/ ℃), the rolling thin layer reaches the 50 μ m (thickness of 36 Alloy Foil: 40 μ m up to integral thickness then; The thickness of each Copper Foil: 5 μ m) and the Ni-Fe volume content reach 80% and prepare outside the core material 3, mounted structure be with example 1 in identical mode prepare.Comparative example 1

(nickel content: weight accounts for 36% to remove independent use 36 Alloy Foil; Iron content: weight point 64%; Thermal conductivity: 10W/mK; Thermal coefficient of expansion: 1.5ppm/ ℃) be 50 μ m outer (Ni-Fe content: volume accounts for 100%) as the thickness of core material 3 and 36 Alloy Foil, mounted structure be with example 1 in identical mode prepare.Comparative example 2

Remove and use Copper Foil (thermal conductivity: 393W/mK separately; Thermal coefficient of expansion: 17ppm/ ℃) be 50 μ m outer (Ni-Fe content: volume accounts for 0%) as the thickness of core material 3 and Copper Foil, mounted structure be with example 1 in identical mode prepare.Comparative example 3

Except that the solder metal spare 10 that is not provided for interconnecting chip 13 and following core material 3, the through hole 4a and 20a that are used to interconnect the solder metal spare 10 of following core material 3 and these solder metal spares 10 wherein are provided, mounted structure be with example 1 in identical mode prepare.Comparative example 4

Except that the solder metal spare 10 that is not provided for interconnecting core material 3, chip 13 and following core material 3, the through hole 4a and 20a that are used to interconnect the solder metal spare 10 of following core material 3 and these solder metal spares 10 wherein are provided, mounted structure be with example 1 in identical mode prepare.

Aspect the thermal expansivity of the thermal diffusivity of mounted structure and 6-layer circuit board 2 product of the example of the present invention of such acquisition and the product of comparative example are being estimated then.For estimating thermal diffusivity, chip 13 is installed on the 6-layer circuit board 2.Make electric current pass through circuit then, make under calm condition the heat that produces 2W.The temperature of diode and potential difference are calculated consequent chip 13 surface temperatures from chip 13 then.For estimating thermal expansivity, 6-layer circuit board 2 is heated to 200 ℃ from room temperature (25 ℃).Calculate thermal coefficient of expansion from the length variations of 6-layer circuit board 2.The result is illustrated in the following table 1.

Table 1 Instance number The chip surface temperature (℃) Thermal coefficient of expansion (ppm/ ℃) Example 1 ????60 ????6.0 Example 2 ????64 ????6.5 Example 3 ????70 ????5.0 Comparative example 1 ????120 ????4.0 Comparative example 2 ????60 ????17.0 Comparative example 3 ????100 ????6.0 Comparative example 4 ????140 ????17.0

Result in the table 1 shows that all over products of example of the present invention is being outstanding, and 6-layer circuit board 2 shows minimum thermal expansion aspect mounted structure heat radiation.

On the contrary, 6-layer circuit board 2 thermal expansions that the product of comparative example 1 shows are little, but from mounted structure weak heat-dissipating.This is because core material 3 does not have the metal level that thermal conductivity is not less than 100W/mK.In addition, the product of comparative example 2 shows the good thermal diffusivity from mounted structure, but the thermal expansion of 6-layer circuit board 2 is very big.This is because core material 3 does not have nickel-ferro alloy paper tinsel 25.And the product of comparative example 3 shows the thermal expansivity of little 6-layer circuit board 2, but similar to the product of comparative example 1, from the weak heat-dissipating of mounted structure.This is because chip 13 and core material 3 do not interconnect with solder metal spare 10, and core material 3 does not interconnect with solder metal spare 10 yet.And the product of comparative example 4 shows from installing the poor radiation of structure, and the thermal expansion of 6-layer circuit board 2 is big.This is because core material 3 is not provided.

In the invention described above embodiment, circuit board is not limited to aforementioned 6-layer circuit board 2.Can use other single or multiple lift circuit board.Under the single layer board situation, circuit 5 can only be formed on the surface of insulating barrier 4 between plate.

Be used to prepare core material 3, the various through holes of formation and stacked and bonding various operation and be not limited to aforesaid embodiment or example.Can use other simple procedures.

The kind of the metal level that will be in core material 3 provides at least one side of nickel-ferro alloy paper tinsel 25 is not limited to copper.Can use any other metal, as long as its thermal conductivity that shows is not less than 100W/mK.For example, can use aluminium (example 2), molybdenum, titanium, gold, silver or its alloy.Yet from the viewpoint of thermal conductivity or cost, copper is more satisfactory.

Referring to the formation of nickel-ferro alloy paper tinsel in the core material 3, the content of nickel (percentage by weight) preferably is predefined for from 31% to 50% in the Ni-Fe binary system.This is because if nickel content has departed from above-mentioned limited range, and then the thermal expansion that shows of alloy itself is risen, and has reduced installing the reliability that connects in the structure.By the composition with low-thermal-expansion that obtains in conjunction with cobalt in nickel-ferro alloy is known.This composition can use according to necessity.

Advantageously, no matter the number of plies (single layer board or multilayer circuit board) of circuit board, the gross thickness that the gross thickness of nickel-ferro alloy paper tinsel 25 accounts for circuit board in the circuit board is not less than 10%, and greater than the metal level that at least one side of nickel-ferro alloy paper tinsel 25, provides (copper layer 3a) gross thickness, no matter the circuit board number of plies (single or multiple lift circuit board).This is because if the gross thickness of nickel-ferro alloy paper tinsel 25 is lower than above-mentioned limited range, and the thermal expansion meeting of circuit board surface is risen, thereby reduces the reliability in connecting.(see figure 7) in various circuit board main body 19, thickness had better not be less than 10 μ m for the metal level on the core material 3 (copper layer 3a etc.).If metal layer thickness is less than 10 μ m, then final radiating effect reduces.

From the machinability viewpoint, advantageously available organic polymer is made insulating barrier 4 between plate.Here the example of spendable material comprises phenol resin, epoxy resin, mylar, polysulfone resin, polyetherimide resin, polyether ketone resin and polyimide resin.If necessary, can use separately or appropriate combination paper, glass cloth, glass mat, non-weaving glass cloth, Kepler fiber etc.Adhesive plate 16 can with thermosetting material or thermoplastic material be independent or the assembly manufacturing, as epoxy resin, phenolic resins, polyimide resin and polyamide.From viewpoint of reliability, preferably use the polyimide resin sill.

Scolder lead 8 and solder metal spare 10 can be suitably by such solder material manufacturings, and the composition of this solder material can form welding block or with the paste supply by electro-plating method.In the solder material, the solder paste of tin-lead and tin-money base is arranged preferably.The size of solder grain does not surpass 100 μ m, had better not surpass 50 μ m, does not more advantageously surpass 20 μ m.

To be preferably from 0.01 to 1.0 millimeter at the thickness of 1 adhesive plate that provides of two bilateral circuit boards.If 20 thickness of adhesive plate is lower than 0.01 millimeter, the plasticity that then final adhesive plate shows deterioration maybe can not be filled injustice place or the through hole on the circuit 5.On the contrary, if the thickness of adhesive plate 20 surpasses 1.0 millimeters, then be difficult to cause reliability decrease with solder paste filling vias 4a, 20a and 20b.

As mentioned above, mounted board structure of circuit of the present invention comprises that a core material and is used for the solder metal spare of heat conduction, the metal level that the thermal conductivity that provides at least one side of nickel-ferro alloy paper tinsel is not less than 100W/mK is provided this core material, this solder metal spare is provided between semiconductor element and the core material, and semiconductor element directly is connected mutually with core material whereby.In this arrangement, during line conductor on electric current is flowed through circuit board, line conductor and semiconductor produce heat, and heat is delivered to core material by solder metal spare, disperses along its surface level from core material then.This heat radiation makes it possible to suppress to follow the reliability decrease of semiconductor element heating generation.Because the effect of nickel-ferro alloy paper tinsel makes it possible to suppress the thermal expansion of circuit board in the core material, so can reduce the thermal expansion difference between semiconductor element and circuit board, makes it possible to strengthen the reliability that connects in the mounted semiconductor element.And because the structure of this mounted core material and circuit board has simple structure, described its can utilize actual legacy equipment to prepare by simple method.

If mounted board structure of circuit of the present invention comprises multilayer circuit board, because the core material on these circuit boards interconnects by solder metal spare, so the heat transferred that semiconductor element produces to a plurality of core materials, is easily disperseed along its surface level from core material then.

And, if mounted board structure of circuit of the present invention be arranged so that circuit board be multilayer circuit board and in circuit board solder material be vertical and almost coaxial formation, then the heat of semiconductor element generation is delivered on a plurality of core materials by the shortest route, can effectively disperse like this.

And if semiconductor element is wanted mounted thereto, the multilayer circuit board that then will be combined in the mounted board structure of circuit of the present invention can be prepared by simple method, and its reason is identical with aforementioned mounted board structure of circuit.Like this, can be multilayer circuit board as the circuit board that can easily dispel the heat and alleviate thermal stress.

Although describe the present invention in detail, for those skilled in the art clearly, under situation without departing from the spirit and scope of the present invention, can carry out various changes and modification to it by the reference specific embodiment.

Claims (4)

1. a mounted board structure of circuit, it comprises the core material that is implanted in the insulating barrier, the metal level that the thermal conductivity that provides at least one side of nickel-ferro alloy paper tinsel is not less than 100W/mK is provided described core material, the line conductor that provides on its at least one side and the semiconductor element of installation are provided described insulating barrier, it is characterized in that, between described semiconductor element and described core material, be provided for the solder metal spare of heat conduction, make described semiconductor element and described core material interconnect.
2. according to the mounted board structure of circuit described in the claim 1, it is characterized in that described circuit board is a multilayer circuit board, and vertical adjacent core material with circuit board interconnects with heat conduction with solder metal spare.
3. according to the mounted board structure of circuit described in the claim 2, it is characterized in that, be used for solder metal spare vertical and almost coaxial formation of heat conduction at described multilayer circuit board.
4. the multilayer circuit board that in mounted structure, uses according to the circuit board described in claim 2 and 3, a plurality of bilateral circuit boards that combine with the adhesive linkage that provides therebetween are provided, described adhesive linkage between two bilateral circuit boards that it inserted, its want with these two bilateral circuit boards on the line conductor position contacting have through hole, provide the scolder lead in the described through hole, the line conductor on the described bilateral circuit board is electrically connected mutually.
CN 99108580 1998-06-23 1999-06-23 Installed circuit board structure and multi-layer circuit board for same CN1240327A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP176421/1998 1998-06-23
CN 99108580 CN1240327A (en) 1998-06-23 1999-06-23 Installed circuit board structure and multi-layer circuit board for same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 99108580 CN1240327A (en) 1998-06-23 1999-06-23 Installed circuit board structure and multi-layer circuit board for same

Publications (1)

Publication Number Publication Date
CN1240327A true CN1240327A (en) 2000-01-05

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN 99108580 CN1240327A (en) 1998-06-23 1999-06-23 Installed circuit board structure and multi-layer circuit board for same

Country Status (1)

Country Link
CN (1) CN1240327A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102625563A (en) * 2011-01-31 2012-08-01 华通电脑股份有限公司 Multilayer circuit board with embedded heat-conducting metal blocks and manufacturing method thereof
CN104979305A (en) * 2014-04-09 2015-10-14 中芯国际集成电路制造(上海)有限公司 Semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102625563A (en) * 2011-01-31 2012-08-01 华通电脑股份有限公司 Multilayer circuit board with embedded heat-conducting metal blocks and manufacturing method thereof
CN102625563B (en) * 2011-01-31 2014-11-12 华通电脑股份有限公司 Multilayer circuit board with embedded heat-conducting metal blocks and manufacturing method thereof
CN104979305A (en) * 2014-04-09 2015-10-14 中芯国际集成电路制造(上海)有限公司 Semiconductor device

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