CN1234116C - CD control chip having common storage access assembly and storage access method thereof - Google Patents
CD control chip having common storage access assembly and storage access method thereof Download PDFInfo
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- CN1234116C CN1234116C CN 200310114231 CN200310114231A CN1234116C CN 1234116 C CN1234116 C CN 1234116C CN 200310114231 CN200310114231 CN 200310114231 CN 200310114231 A CN200310114231 A CN 200310114231A CN 1234116 C CN1234116 C CN 1234116C
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- 238000000034 method Methods 0.000 title claims abstract description 28
- 230000015654 memory Effects 0.000 claims abstract description 87
- 230000001360 synchronised effect Effects 0.000 claims abstract description 51
- 238000012545 processing Methods 0.000 claims abstract description 12
- 230000003287 optical effect Effects 0.000 claims description 21
- 230000004913 activation Effects 0.000 claims description 20
- 230000003139 buffering effect Effects 0.000 claims description 4
- 230000006835 compression Effects 0.000 claims description 4
- 238000007906 compression Methods 0.000 claims description 4
- 230000000712 assembly Effects 0.000 claims 5
- 238000000429 assembly Methods 0.000 claims 5
- 238000001994 activation Methods 0.000 description 13
- 238000010586 diagram Methods 0.000 description 6
- 230000006837 decompression Effects 0.000 description 5
- 238000013461 design Methods 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 239000002699 waste material Substances 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
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- 230000008859 change Effects 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 238000012797 qualification Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 230000005236 sound signal Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
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Abstract
The present invention relates to a CD control chip of an access unit of a shared memory and a memory access method. The CD control chip comprises at least one synchronous dynamic RAM for temporarily storing great amounts of data desired by a processor to work and for buffer in high-speed processing, at least one flash memory for storing programs the processor executes, firmware and user's preset values, and a memory interface, wherein the addresses and the data pin positions of the synchronous dynamic RAM and the flash memory respectively share the same bus. The synchronous dynamic RAM and the flash memory can not be simultaneously accessed. The memory interface is used for linking the address and the data bus respectively shared by the synchronous dynamic RAM and the flash memory. The memory interface also comprises an arbitrator determining which access request needs to be executed firstly according to the priority order of access command requests. Meanwhile, the selected pin position of only one memory to be accessed can be induced with energy every time.
Description
(1) technical field
The relevant a kind of CD control chip with shared storage access device of the present invention is particularly about a kind of technology that is used for shared Synchronous Dynamic Random Access Memory of CD control chip and flash memory.
(2) background technology
Along with the increase of consumer electronic multimedia commodity demand volume, in order to promote product competitiveness, (Integrated Circuit, IC) (System-on-Chip, SoC) change has developed and has become a kind of trend system single chip integrated circuit.Because the relation that element is integrated is no matter make that the IC of tool SoCization is that power consumption, heat radiation or side signal transmission face can obtain preferable usefulness.In addition, because the notion of SoC is how more element is put into same IC, so its component size will be integrated or dwindle to each element among the IC certainly will to reach the purpose of SoCization, and along with the integration of element, incident is that element and substrate use minimizing, simultaneously because the relation that each component size is dwindled, make the IC volume-diminished, therefore feasible encapsulation also reduces, and has the SoC notion and the IC that designs, and its cost can reduce.The most extensive multimedia player (multi-media player) in consumer electronic multimedia commodity for using in the family.
Known multimedia player framework 100 as shown in Figure 1, one control module, 110, one audio-visual decompression unit (Moving Picture Experts Group, MPEG) 120, one light memory medium 101, an image output interface 102 and a voice output interface 103 are arranged.Control module 110 includes: a control servomechanism (servocontroller) 112, a microprocessor (microprocessor unit, MPU) 114; Audio-visual compression unit 120 includes: a central processing unit (Central Processor Unit, CPU) 121, one audio-visual decompressor (MPEGdecoder) 122, a video information coder (video encoder) 125 and one sound figure simulation/analog-digital converter (digital-to-analog/analog-to-digital converter, DAC/ADC) 126.And control module 110 connects first Synchronous Dynamic Random Access Memory 116 and first flash memory 118, and audio-visual decompression unit 120 connects second Synchronous Dynamic Random Access Memory 123 and second flash memory 124.
Known multimedia workflow step is: when light memory medium 101 is placed in the multimedia player 100, servo controller 112 is controlled rotation motors with the data in the reading optical storage medium 101, and in the data storing to the first that the is read Synchronous Dynamic Random Access Memory 116; Read the data that are stored in first Synchronous Dynamic Random Access Memory 116, deposit to first Synchronous Dynamic Random Access Memory 116 through returning again after the decoding; The data that decoding is deposited for back time are read and are sent to audio-visual decompressor 122, second Synchronous Dynamic Random Access Memory 123 of restoring; Read and decompress being stored in data in second Synchronous Dynamic Random Access Memory 123; Data after the decompression are returned and are deposited to second Synchronous Dynamic Random Access Memory 123; Data after decompressing are at last shunted, and its image data is transferred into and changes into NTSC or PAL form in the video information coder 125, deliver at last in the image output interface 102 and play; And its voice data is via sound figure simulation/analog-digital converter 126 after by voice output interface output 103.During this time, microprocessor 114 and central processing unit 121 data in also can the access flash storer.
Known multimedia player is in order to handle lot of data, so servo controller 112 of multimedia player 100, central processing unit 121, microprocessor 114 and audio-visual decompressor 122 all need a lot of storage space respectively, therefore the Synchronous Dynamic Random Access Memory unit 116 and 123 of multimedia player 100 may comprise several Synchronous Dynamic Random Access Memories (Synchronous Dynamic Random AccessMemory, SDRAM) keep in processor required mass data of when work, and the required buffering (buffer) of data transmission when dealing with high speed processing, the fluency when keeping audio-visual the broadcast.Identical pin position (pin) the possibility bus shared (bus) of these several Synchronous Dynamic Random Access Memories is to reach the purpose of dwindling shared space.In addition, the flash memory cells 118 and 124 of multimedia player 100 also may include several flash memories (flash memory), in order to store program and the firmware that will carry out in the multi-media player in the multimedia player 100.Same, the identical pin position of these flash memories also may bus shared.
The running of each processor of multimedia player 100 and storage access relation are as shown in Figure 2., for central processing unit 121, can directly assign access instruction respectively and give pairing first flash memory 118 and second flash memory 124 separately for microprocessor 114.But for servo controller 112 or audio-visual decompressor 122, its inside includes several controllers or processor respectively, therefore may have several access instructions to assign respectively simultaneously, so servo controller 112 and audio-visual decompressor 122 all need decide to carry out which access instruction via a moderator 210,220 respectively to each self-corresponding first Synchronous Dynamic Random Access Memory 116 and second Synchronous Dynamic Random Access Memory 123.
For a known multimedia player, have at least one synchronous RAM and at least one flash memory simultaneously, can increase the overall efficiency of system.Utilize flash memory not need often charging but still can preserve the advantage of data, with start back multimedia player all program that will carry out or firmwares, or the data preset of user, be stored in the flash memory, make data can not lose because of shutdown; Utilize synchronous dynamic random access memory access speed advantage faster simultaneously, before the data in a start or desire access flash storer, program stored in the flash memory and data are written in the Synchronous Dynamic Random Access Memory.When system will carry out, owing to be the data that read in the Synchronous Dynamic Random Access Memory, so the increase of the access speed of system, therefore usefulness also promoted simultaneously.
Its process is shown in the calcspar of Fig. 3:
310: read the data in the flash memory;
320: data are write in the Synchronous Dynamic Random Access Memory; And
330: wait for that processor reads data and the execution in the storer.
Can be found that by above-mentioned known techniques though use a large amount of storeies can store more data, the storer number is many more, the space that will occupy in chip is also just big more.
Can also find by above-mentioned known techniques, because the reading speed of flash memory is slower, and the access speed of Synchronous Dynamic Random Access Memory is very fast, if processor is by executive routine in the flash memory, to cause entire system usefulness to reduce, so the most of the time all carries out in Synchronous Dynamic Random Access Memory, could improve usefulness, therefore flash memory is only when a start multimedia player will start, or the user is when wanting the access preset data, just can be by access, all the other most of the times all are the accesses of Synchronous Dynamic Random Access Memory being made data, therefore when flash memory was not read, waste can be caused in its vacant bus pin untapped with it position for total system.Generally speaking, no matter whether flash memory is read, the service efficiency of system bus is all very low.
Because the shortcoming of above-mentioned known techniques, the few time of flash memory that is found to known techniques simultaneously is by the characteristic of access, therefore the invention provides a kind of apparatus and method of each units shared storer of CD control chip, make Synchronous Dynamic Random Access Memory and flash memory to use for a plurality of controls and processing unit, but simultaneously shared Synchronous Dynamic Random Access Memory and flash memory be the shared storage bus also, can reach like this and reduce the purpose that use storer pin position, and then reach another purpose that promotes the memory bus service efficiency.
(3) summary of the invention
Because the shortcoming of above-mentioned known techniques, the few time of flash memory that is found to known techniques simultaneously is by the characteristic of access, therefore the invention provides a kind of apparatus and method of each units shared storer of CD control chip, make Synchronous Dynamic Random Access Memory and flash memory to use for a plurality of controls and processing unit, but simultaneously shared Synchronous Dynamic Random Access Memory and flash memory be the shared storage bus also, can reach like this to reduce the use of storer pin position and then reach to promote the memory bus service efficiency.
The invention provides a kind of memory access device and method that can reduce the use of storer pin position, the problem of resolution system single chip.
The present invention provides the memory access device and the method for a kind of more efficient use storage address and data bus in addition, with the service efficiency of elevator system memory bus.
Memory access device of the present invention system includes: a synchronous dynamic RAM, in order to store mass data and buffering; One flash memory is in order to stored routine, firmware and user's preset value; And a storer interface, in order to link the running between microcontroller or microprocessor and storer.Wherein the storer interface also includes a moderator, can be according to the priority of each access instruction, and which instruction decision will carry out.
In the preferred embodiment of the present invention, shared address and the data bus of memory usage that selected access is used, the storer of selected access then can not take shared address and data bus, and the same time, has only the storer can be by access.
In the preferred embodiment of the present invention, when this memory access device is used in the CD control chip, also include: a servo controller, a high-order microprocessor, a digital signal processor, a video decoded device and a video signal processor.And those controllers and processor all can send access instruction to moderator.
The memory access mode step of preferred embodiment of the present invention is as follows: at first, assign several access instructions, then to carry out which access instruction according to the priority decision of access instruction, then which storer of access is wanted in the access instruction content decision of carrying out according to desire, selected pin position activation to desiring by the storer of access, do not desire to be selected pin not activation of position by the storer of access, last, this is desired by the memory usage of access shared address and data bus.
The invention provides a kind of storer shared access device and method of operating thereof of CD control chip.Utilize the memory access device of this invention design, can be so that storer occupied space in chip reduces, utilize shared address and data bus simultaneously, under the prerequisite of few increase storer pin bit stealing area, can promote the speed of storage access and the efficient that system memory bus uses, reach the final purpose of system single chipization simultaneously.
For further specifying above-mentioned purpose of the present invention, design feature and effect, the present invention is described in detail below with reference to accompanying drawing.
(4) description of drawings
Fig. 1 is the device synoptic diagram of multimedia player system;
Fig. 2 is in the multimedia player system, the configuration diagram of processor and memory cell;
Fig. 3 is for promoting the process flow diagram of multimedia player system storage access usefulness;
Fig. 4 is storage address and the data highway system device architecture synoptic diagram in the shared multimedia play system;
Fig. 5 is storage address and the data highway system method flow diagram in the shared multimedia play system.
(5) embodiment
Below will enumerate a preferred embodiment in order to explanation the present invention, yet person skilled in the art person knows that all this only is an explanation for example, and is not that the preferred embodiment enumeration of relevant this invention is as follows in order to qualification invention itself.
Fig. 4 includes for the storage address and the data bus composite device 400 of preferred embodiment of the present invention: a synchronous dynamic RAM 410 is to keep the buffering of playing fluency under mass data that produces when being used for the stocking system running and the high speed processing; One flash memory 420, the data that stored routine, firmware and user preset; One servo controller 440 is in order to the data in the control motor reading optical storage medium; One high-order microprocessor 450 is in order to executive routine; One audio-visual decompression unit 460 is in order to handle image and voice signal; And a storer interface 430, in order to link the running between each storer and processor.
The central processing unit 121 and microprocessor 114 that are different from known techniques Fig. 1, the present invention utilizes the higher high-order microprocessor of a clock pulse 450 to integrate microprocessors most in the known techniques, reaches the integration purpose of system single chipization.
In the present invention, with the pin position, address 412 of Synchronous Dynamic Random Access Memory 410 and data pin position 414 respectively with the pin position, address 422 and data pin position 424 shared same buses 402 and 404 of flash memory 420. Bus 402 and 404 is attached to the pin position, address 432 and data pin position 434 in the storer interface 430 respectively.In addition, storer interface 430 also comprises two selection pin positions respectively: the selection pin position 436 of Synchronous Dynamic Random Access Memory 410 and the selection pin position 438 of flash memory 420 and a control signal 435.By whether selecting pin position 436 and 438 activation, determine to want access Synchronous Dynamic Random Access Memory 410 or flash memory 420, and send corresponding control signal by control signal 435.It should be noted that and select not activation simultaneously of pin position 436 and 438 that, Synchronous Dynamic Random Access Memory 410 can so just can not reach the address of shared storage and the purpose of data bus simultaneously by access with flash memory 420 yet.
Audio-visual decompression unit 460 of the present invention also includes: a digital signal processor 462, in order to processing audio signal; One video decoded device 464 is in order to the decoding signal of video signal; And a video signal processor 466, in order to handle signal of video signal, with proper preferable playing video.
Storer of the present invention interface 430 also includes: a moderator 470, this moderator connect servo controller 440, high-order microprocessor 450, digital signal processor 462, video decoded device 464 respectively, and video signal processor 466.
For moderator 470, servo controller 440, high-order microprocessor 450, digital signal processor 462, video decoded 464 and video signal processor 466, the request of the data of several access Synchronous Dynamic Random Access Memories 410 or flash memory 420 is assigned in the capital to moderator 470, and moderator 470 must judge which access instruction need be performed according to the priority of each request.Then, according to the requirement of the access instruction of selected execution, access Synchronous Dynamic Random Access Memory 410 or flash memory 420 are desired in decision again.
After which storer of access is wanted in decision, the control signal 435 at storer interface 430, this desires the meeting activation by the selection pin position of the storer of access, and at the same time, other then can be enabled by the selection pin position of the storer of access; In addition, the storer interface also has another controlling mechanism (not shown), can control the storer that shared address and data bus only offer this selected access and use, avoid simultaneously this not the storer of selected access use shared address and data bus.Also promptly, at the same time, have only a storer so just can be reached the shared purpose of storage address and data bus by access.
When according to the access instruction requirement, when desiring access Synchronous Dynamic Random Access Memory 410, selection pin position 436 activations of Synchronous Dynamic Random Access Memory, the selection pin position 438 not activations of flash memory simultaneously, Synchronous Dynamic Random Access Memory 410 use shared address and data bus to wait for the access of the processor that the activation access instruction requires.Otherwise, when requirement according to access instruction, when desiring access flash storer 420, selection pin position 438 activations of flash memory, the selection pin position 436 not activations of Synchronous Dynamic Random Access Memory, flash memory 420 use shared address and data bus to wait for the access of the processor of activation access instruction.
Fig. 5 is the storage address and the shared process flow diagram 500 of data bus of preferred embodiment of the present invention.Its method comprises the following step:
501: servo controller, microprocessor, digital signal processor, video decoded device and video signal processor are assigned several access instructions and are given moderator;
502: moderator judges that according to the priority of command request which access instruction must be performed;
503: according to the access instruction content that moderator selects desire to carry out, decision should which storer of access;
If according to access instruction content decision access Synchronous Dynamic Random Access Memory, then
504: the selection pin position of Synchronous Dynamic Random Access Memory is enabled, the selection pin not activation of position of flash memory;
505: Synchronous Dynamic Random Access Memory is by access;
Otherwise, if according to access instruction content decision access flash storer, then
506: the selection pin position of flash memory is enabled, the selection pin not activation of position of Synchronous Dynamic Random Access Memory; And
507: flash memory is by access.
Can find compared to known techniques by above narration, the invention provides a kind of more efficient solving device and method, further more reduce chip size, reach the purpose of SoCization in order to reduction storer shared space in system.
And the present invention is compared to known techniques, because storage address and the shared relation of data bus, therefore in the same time, have only single storer can use shared address and data bus, exempted at Synchronous Dynamic Random Access Memory and having waited in the time of flash memory, the waste that the Synchronous Dynamic Random Access Memory bus is vacant, when simultaneously also having exempted flash memory not by access, its bus vacant waste.Therefore under the prerequisite that does not increase the memory usage space, further provide a kind of more efficient device and mode, therefore when increasing memory access rate, also promoted the efficient that system bus uses.
This optical disc controller can be digital image and sound optical disk player (DVD player) or read-only optical disc (CD-ROM), or repeatable read writing optical disk (CD-RW), or read-only optical digital disk (DVD-ROM), or rewritable optical digital disk (DVD-RW).
Though the present invention describes with reference to current specific embodiment, but those of ordinary skill in the art will be appreciated that, above embodiment is used for illustrating the present invention, under the situation that does not break away from spirit of the present invention, also can make the variation and the modification of various equivalences, therefore, as long as variation, the modification to the foregoing description all will drop in the scope of claims of the present invention in connotation scope of the present invention.
Claims (9)
1. the CD control chip of a shared storage access device comprises at least:
One servo controller is in order to the data of control rotation motor reading optical storage medium;
One microprocessor is in order to executive routine;
One dynamic image compression unit is in order to handle video signal and voice signal;
A plurality of memory assemblies, wherein a shared separately data bus in the data pin position of these a plurality of memory assemblies and pin position, address and an address bus; And
One storer interface, it is connected with this dynamic image compression unit with this servo controller, this microprocessor, and this storer interface comprises a plurality of selection pin position, a plurality of data pin position, pin position, a plurality of address and a moderator;
Wherein this a plurality of selection pin position links respectively these a plurality of memory assemblies respectively, these a plurality of data pin positions and pin position, a plurality of address are connected to this data bus and this address bus respectively, this moderator receives a plurality of memory access instructions that this servo controller, this microprocessor and this dynamic image compression unit sent with a plurality of selection pin of activation one this selection pin not activation of position other this position, makes this memory assembly that this selection pin position of this storer interface access activation is linked.
2. the CD control chip of shared storage access device as claimed in claim 1, it is characterized in that these a plurality of memory assemblies one of them for Synchronous Dynamic Random Access Memory, needed buffering when required mass data or high speed processing when carrying out in order to temporary program.
3. the CD control chip of shared storage access device as claimed in claim 1, one of them can be flash memory to it is characterized in that these a plurality of memory assemblies, in order to stored routine, or user's preset value, or firmware.
4. the CD control chip of shared storage access device as claimed in claim 1 is characterized in that the priority of this moderator according to the access instruction requirement, and which access instruction decision will carry out.
5. memory access device as claimed in claim 1, it is characterized in that this a plurality of selection pin position each only can activation one of them.
6. the CD control chip of shared storage access device as claimed in claim 1, it is characterized in that this memory access device is used in the optical disc controller, and this optical disc controller can be digital image and sound optical disk player or read-only optical disc player, or rewritable Disc player, or read-only optical digital disk player, or rewritable optical digital disk player.
7. the access method of storage of a CD control chip, wherein this CD control chip comprises a plurality of storeies, the data pin position of these a plurality of storeies and pin position, address be a shared data bus and an address bus respectively, and the access method of storage of this CD control chip comprises the following step at least:
Receive at least one memory access instruction to select a target memory;
According to this memory access instruction, the selection pin position of a plurality of storeies of selection pin not activation of position other this of this target memory correspondence of activation; And
This of access activation selected pairing this target memory in pin position.
8. the access method of storage of CD control chip as claimed in claim 7 is characterized in that these a plurality of storeies are selected from one of following or its combination: flash memory and Synchronous Dynamic Random Access Memory.
9. the access method of storage of CD control chip as claimed in claim 7, it is characterized in that this CD control chip can be used in the optical disc controller, and this optical disc controller can be digital image and sound optical disk player or read-only optical disc player, or rewritable Disc player, or read-only optical digital disk player, or rewritable optical digital disk player.
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| CN 200310114231 CN1234116C (en) | 2003-11-06 | 2003-11-06 | CD control chip having common storage access assembly and storage access method thereof |
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| CN 200310114231 CN1234116C (en) | 2003-11-06 | 2003-11-06 | CD control chip having common storage access assembly and storage access method thereof |
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| CN1542766A CN1542766A (en) | 2004-11-03 |
| CN1234116C true CN1234116C (en) | 2005-12-28 |
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Cited By (1)
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| CN104102387A (en) * | 2014-08-01 | 2014-10-15 | 金龙机电（东莞）有限公司 | Touch screen and touch screen device |
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| US7546402B2 (en) * | 2005-03-24 | 2009-06-09 | Sunplus Technology Co., Ltd. | Optical storage system comprising interface for transferring data |
| CN100346285C (en) * | 2006-01-06 | 2007-10-31 | 华为技术有限公司 | Processor chip, storage control system and method |
| CN101593549B (en) * | 2008-05-27 | 2011-06-22 | 群联电子股份有限公司 | Nonvolatile memory packaging and storing system as well as controller and access method thereof |
| CN101609712B (en) * | 2008-06-18 | 2012-01-11 | 群联电子股份有限公司 | Storage system with a plurality of nonvolatile memories as well as controller and access method thereof |
| CN101840382B (en) * | 2009-03-19 | 2013-03-27 | 北京普源精电科技有限公司 | Data storage system and data access method |
| CN101839928B (en) * | 2009-03-19 | 2013-04-24 | 北京普源精电科技有限公司 | Digital oscilloscope and data access method |
| JP2013196321A (en) * | 2012-03-19 | 2013-09-30 | Pfu Ltd | Electronic circuit and arbitration method |
| CN106559630B (en) * | 2015-09-30 | 2019-10-01 | 中强光电股份有限公司 | Projection arrangement and data access control module |
| CN108986015B (en) * | 2015-11-17 | 2022-12-06 | 格兰菲智能科技有限公司 | Method for checking relevance of data unit and device using the method |
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2003
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104102387A (en) * | 2014-08-01 | 2014-10-15 | 金龙机电（东莞）有限公司 | Touch screen and touch screen device |
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