CN1211849C - 识别装置、接合装置及电路装置的制造方法 - Google Patents

识别装置、接合装置及电路装置的制造方法 Download PDF

Info

Publication number
CN1211849C
CN1211849C CNB021231753A CN02123175A CN1211849C CN 1211849 C CN1211849 C CN 1211849C CN B021231753 A CNB021231753 A CN B021231753A CN 02123175 A CN02123175 A CN 02123175A CN 1211849 C CN1211849 C CN 1211849C
Authority
CN
China
Prior art keywords
cover
recognition
illumination
handle hole
inactive gas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNB021231753A
Other languages
English (en)
Other versions
CN1393919A (zh
Inventor
关幸治
酒井纪泰
东野俊彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Publication of CN1393919A publication Critical patent/CN1393919A/zh
Application granted granted Critical
Publication of CN1211849C publication Critical patent/CN1211849C/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K20/00Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
    • B23K20/002Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating specially adapted for particular articles or work
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/544Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/78Apparatus for connecting with wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68377Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support with parts of the auxiliary support remaining in the finished device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48464Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78Apparatus for connecting with wire connectors
    • H01L2224/7825Means for applying energy, e.g. heating means
    • H01L2224/783Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/78301Capillary
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78Apparatus for connecting with wire connectors
    • H01L2224/787Means for aligning
    • H01L2224/78743Suction holding means
    • H01L2224/78744Suction holding means in the lower part of the bonding apparatus, e.g. in the apparatus chuck
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85001Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector involving a temporary auxiliary member not forming part of the bonding apparatus, e.g. removable or sacrificial coating, film or substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85053Bonding environment
    • H01L2224/85054Composition of the atmosphere
    • H01L2224/85075Composition of the atmosphere being inert
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852Applying energy for connecting
    • H01L2224/85201Compression bonding
    • H01L2224/85203Thermocompression bonding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852Applying energy for connecting
    • H01L2224/85201Compression bonding
    • H01L2224/85205Ultrasonic bonding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852Applying energy for connecting
    • H01L2224/8521Applying energy for connecting with energy being in the form of electromagnetic radiation
    • H01L2224/85214Applying energy for connecting with energy being in the form of electromagnetic radiation using a laser
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/922Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222Sequential connecting processes
    • H01L2224/92242Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01007Nitrogen [N]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01028Nickel [Ni]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01039Yttrium [Y]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01059Praseodymium [Pr]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19043Component type being a resistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)

Abstract

一种识别装置,接合装置及电路装置的制造方法,导线接合工序时,为防止基板氧化而采用的不活泼气体因接合时的温差会产生闪晃,使图形识别精度恶化。在具有本发明识别装置的接合装置21中,在环状照明25和操作孔24之间,将闪晃防止送风机构31设置在操作孔24附近。由此,从操作孔24喷出的氮气虽然会因温差形成闪晃,但是能从闪晃防止送风机构31利用氮气的气流将其吹走。其结果是,可以提高识别照相机的识别精度,而且可以提高μm级的导线接合精度。

Description

识别装置、接合装置及电路装置的制造方法
技术领域
本发明涉及一种识别装置、接合装置及电路装置的制造方法,特别是涉及一种能提高识别装置的识别精度、能提高接合装置的接合精度并采用这些的电路装置的制造方法。
背景技术
在目前的半导体装置中,在形成于导线架上的搭载部进行导线接合时,按每个搭载部进行,作为其一实施例,例如特开昭63-29535号公报所公开的识别装置、接合装置。
如图14所示,在热部件1上,载置着装有芯片10的晶体管导线架2。而且在热部件1上的导线架2上部设置着接合臂3,在接合臂3前端设置着毛细管4。在该毛细管4设置着导线5,在毛细管4旁边设置着用于形成导线5的焊球的火焰喷嘴6。
而且在该热压接型的接合装置,设置着导线接合位置识别部7、焊接头8,还设有局部加热装置9,该局部加热装置9局部加热与焊接头8向X、Y方向的移动联动的接合部。作为该局部加热装置9例如可以采用激光光线装置。
下面说明动作。在利用热部件1加热的导线架2,按照利用导线接合位置识别部7的信息预先编程的那样使焊接头8移动,同时使局部加热装置9只在接合中工作,补充芯片10上的热不足,同时进行球形接合,之后使毛细管4向导线架2侧移动,再次使局部加热装置9只在接合中工作,补充导线架2侧的热不足,同时进行针脚形接合,之后利用火焰喷嘴6在切断的导线5的前端形成焊球部。
然后在芯片10上的另一侧的电极上,使局部加热装置9只在接合中工作,补充芯片10上的热不足,同时进行球形接合,之后使毛细管4向导线架侧移动,再次使局部加热装置9只在接合中工作,补充导线架侧的热不足,同时进行针脚形接合,之后利用火焰喷嘴6在切断的导线5的前端形成焊球部。如以上这样补充接合部的热不足,同时进行接合,因此可以得到高品质的导线接合。而且如果与超声波并用,还能得到更高品质的导线接合。
另外在上述实施例中,叙述了晶体管芯片的情况,但是,芯片不限于此,二极管、IC等也可以,本发明适用于任意半导体装置的导线接合。
发明内容
如上所述,在完全穿透的导线架2上形成搭载部时,导线接合时只是该搭载部例如加热到大致250℃就可以。也就是说,通常不是导线架2的整体处于高温状态,而是可局部加热,所以特别是在上述的接合装置、识别装置中,不会有误识别、识别状况恶化等问题。
但是如本发明的实施例将详述的,将小面积上具有多个搭载部的集成块,形成在导电箔、导线架等之上时,在一个集成块的全部导线接合工序结束之前,导电箔、导线架等一直维持高温状态。因此,存在具有集成块的导电箔、导线架等由于长时间放置在所述高温状态而氧化的问题。
为了防止所述的导线架等氧化的问题,通过在处于高温状态的导线架上设置充填不活泼气体例如氮气的空间就可以防止。但是为了形成该空间,要在载置导线架的操作台上形成不活泼气体填充空间,而且此空间上部必须形成识别用及导线接合用的操作孔。这时不活泼气体在空间内被加热至高温,从操作孔出到外部时,会因与室温的温度差产生波动(闪晃)。而且该波动会侵入到识别区域,使识别照相机产生误识别,因此存在欠缺高集成的微小导电图形的识别精度的问题。
本发明是鉴于上述目前的课题而开发的,本发明第一方面的识别装置包括:具有加热功能的基板载置台;覆盖所述基板载置台的操作区域的罩;所述罩上设置的操作孔;所述操作孔上方设置的照明;在所述照明上方设置的图形识别用照相机;在所述照明附近设置的送风机构。已吹入所述罩内的不活泼气体利用所述加热功能加热,从所述操作孔排出的所述加热的不活泼气体通过所述送风机构从所述图形识别用照相机的识别区域排除。
本发明的识别装置理想的是,在所述罩和所述基板载置台形成的空间,有所述不活泼气体流动。
本发明的识别装置理想的是,所述波动大致是加热的所述不活泼气体。
本发明的识别装置理想的是,所述不活泼气体由氮气组成。
本发明的识别装置理想的是,所述照明是设置在所述镜筒部下方的环状照明。
另外,为了解决上述课题,本发明另一方面的接合装置包括:具有加热功能的基板载置台;覆盖所述基板载置台的操作区域的罩;所述罩上设置的操作孔;所述操作孔上方设置的照明;所述照明的附近设置的毛细管;在所述照明上方设置的图形识别用照相机;在所述照明附近设置的送风机构。已吹入所述罩内的不活泼气体通过所述加热功能加热,从所述操作孔排出的所述加热的不活泼气体通过所述送风机构从所述图形识别用照相机的识别区域排除,同时将所述毛细管从所述操作孔侵入所述图像内并进行导线接合。
本发明的接合装置理想的是,在以所述罩和所述基板载置台形成的空间,有所述不活泼气体流动。
本发明的接合装置理想的是,所述罩的一部分由箝位器构成。
本发明的接合装置理想的是,所述箝位器具有不活泼气体吹入孔。
本发明的接合装置理想的是,所述波动大致是加热的不活泼气体。
本发明的接合装置理想的是,所述不活泼气体由氮气组成。
本发明的接合装置理想的是,所述照明是设置在所述镜筒部下方的环状照明。
为了解决上述课题,本发明再一方面的电路装置的制造方法,识别装置具有:具有加热功能的基板载置台;覆盖所述基板载置台的操作区域的罩;设于所述罩上的操作孔;在所述操作孔上方设置的照明;所述照明上方设置的图形识别用照相机;设于所述照明附近的送风机构,在所述识别装置的所述基板载置台上配置电路元件安装机构,该电路元件安装机构至少具有配置电路元件的预定的搭载部和所述搭载部的周围上设置的电极,在所述搭载部安装所述电路元件,该制造方法的特征在于,将上述成块基板载置在具有加热功能的基板载置台上,在吹入所述罩内的不活泼气体由上述加热功能加热并从上述操作孔排出时,通过所述送风机构排除上述不活泼气体,同时将所述电路元件安装在所述搭载部。本发明的电路装置的制造方法理想的是,所述罩的一部分由箝位器构成。
本发明的电路装置的制造方法理想的是,利用箝位器向所述罩内吹入不活泼气体
本发明的电路装置的制造方法理想的是,所述波动大致是加热的不活泼气体。
本发明的电路装置的制造方法理想的是,所述不活泼气体由氮气组成。
本发明的电路装置的制造方法理想的是,所述电路元件是固定半导体裸片、芯片电路部件中的任一种或两种。
附图说明
图1是说明具有本发明识别装置的接合装置的图。
图2是说明具有本发明识别装置的接合装置的图。
图3是简略说明具有本发明识别装置的接合装置的图。
图4是说明本发明的电路装置的制造方法的图。
图5是说明本发明的电路装置的制造方法的图。
图6是说明本发明的电路装置的制造方法的图。
图7是说明本发明的电路装置的制造方法的图。
图8是说明本发明的电路装置的制造方法的图。
图9是说明本发明的电路装置的制造方法的图。
图10是说明本发明的电路装置的制造方法的图。
图11是说明本发明的电路装置的制造方法的图。
图12是说明本发明的电路装置的制造方法的图。
图13是说明本发明的电路装置的制造方法的图。
图14是说明具有现有识别装置的接合装置的图。
具体实施方式
下面就本发明的识别装置、接合装置及电路装置的制造方法进行详细说明
首先参照图1-图3说明本发明的识别装置及接合装置。
在本发明的实施例中,识别装置与接合装置联动,形成一台具有识别装置的接合装置21。
如图1所示,接合装置21的主要结构包括:载置台22;在载置台22上覆盖操作空间的罩23;罩23上面设置的操作孔24;操作孔24上方设置的环状照明25;在环状照明25侧面设置的接合臂26,在接合臂26前端设置的毛细管27;在该毛细管27近旁设置的火焰喷嘴28;在环状照明25上方设置的镜筒29;没有图示但设置在镜筒29内的识别照相机及作为本发明特征的闪晃防止送风机构31。
下面说明其各自的结构特征,同时叙述其动作。
首先,载置台22载置着具有多个搭载部的导线架34,通过将导线架34加热,提高导线接合性,因此,具有加热器30的功能。由载置台22及罩23构成的操作空间内,利用加热器30在导线接合工序中,例如能够维持230℃程度的高温状态。
其次,在图1中没有显示,但罩23的一部分由箝位器60(参照图9)组成,该箝位器60上面例如以不锈钢板67(参照图9)制作盖,构成该罩23。而且由箝位器60作为不活泼气体将例如4升/分的氮气吹入罩23内。其吹入量根据操作用途可变。而且在罩23的上面设置有操作孔24。操作孔24的大小例如以5mm×32mm形成,在通过该操作孔24进行导线接合工序时,进行图形识别、导线接合。
其次,说明环状照明25及镜筒29。在环状照明25上方设置镜筒29。通过操作孔24由环状照明25照射的导线架34及半导体元件35可根据反射率不同进行识别。利用设置在镜筒29内的识别照相机识别该反射光,能够在导线架34上进行图形识别。这时,作为照明通过采用环状照明25,对于导线架34、半导体元件35能不偏不倚地照射,能够更精密地进行无影图形识别。另外并未图示,但是镜筒29在途中相对于载置台22表面弯曲90度,在该弯曲部的前端设置识别照相机。在该弯曲部设置相对于载置台22表面具有45度角的镜,利用该结构能够进行图形识别。
这里,在导线架34上形成多个集成块,这种集成块例如以10行5列的搭载部为一个。操作孔24的大小相对于1个这种集成块,具有能从上部识别例如2行即20个搭载部的大小。如后所述,该操作孔24可以活用于图形识别等。另外,该操作孔24的大小没有特别的规定,利用接合装置21的识别图形方法等,根据其每次操作目的决定。
下面说明接合臂26、毛细管27及火焰喷嘴28。如图2所示,图形识别之后,使环状照明25及接合臂26、毛细管27移动,使毛细管27位于操作孔24上。然后根据利用识别照相机得到的数据进行导线接合,毛细管27从操作孔24进入到罩23内,导线接合半导体元件的电极接点及所需的电极图形。这时火焰喷嘴28进行针脚形接合,在切断的金属线的前端形成焊球。
最后,用图3说明作为本发明特征的送风装置。如图1及图2所示,图3是具有识别装置的接合装置21的简图。
如图1~图3所示,在环状照明25及罩23之间,闪晃防止送风机构31设置在操作孔24附近。而且从闪晃防止送风机构31相对于罩23为横向,且从操作孔24上部吹过例如3公升/分的氮气向气流33。另一方面,如上所述,氮气以例如4公升/分吹入罩23内。而罩23内利用组装在载置台22的加热器30维持例如230℃。之后注入的氮气例如为70℃,但利用加热器30的加热被加热到230℃。
之后被加热的氮气从操作孔24向外流出,但是由于这时的室温例如为20℃,故因氮气与室温的温度差产生大致由氮气构成的闪晃32。其结果是,环状照明25下部及照明25内笼罩闪晃32,使识别装置的识别精度恶化,导线接合精度下降。
但是,如图3所示,本发明的闪晃防止送风机构31设置在环状照明25下端的紧旁边,与环状照明25一起移动。而且闪晃防止送风机构31将从操作孔24产生的闪晃32,例如用3公升/分的氮气气流33从操作孔24上及环状照明25周围驱散闪晃32。这时由于如上所述闪晃防止送风机构31设置在环状照明25下端的紧旁边,所以不会将操作房间的空气特别是氧气混入氮气33内。因此,即使由闪晃防止送风机构31来的氮气33从操作孔24进入罩23内,也不促使导线架34氧化。
然后,利用闪晃防止送风机构31,可事先将要笼罩在环状照明25下方、环状照明25内及镜筒29内的闪晃32除去。因此,具有本发明的识别装置的接合装置21,可以在导线接合工序之中填充氮气使导线架即使长时间载置在载置台上也不会氧化。其结果是,导线架34表面不会氧化,故识别图形时的反射性变好,能够提高识别精度。
而且,导线架34表面一旦氧化,例如到150℃可对应的抗氧化剂膜脱落,与树脂的结合性恶化,本发明对此也能处理,能形成耐湿性、耐剥离性提高的接合装置。
而且在罩内被加热的氮气通过操作孔24向外流出时,因其与室温的温度差产生的闪晃可利用设置在上述位置的闪晃防止送风机构31除去。由此闪晃不会进入环状照明25内,利用识别照相机能以μm级高精确地进行图形识别,而且也能进行高精度的导线接合。
另外,在本实施例中,就导线接合进行了详述,但对具有光学识别装置的装片等也能取得同样的效果。另外,载置于载置台的不限于导线架,只要是需要防止后述的导电箔等的氧化的就可取得同样的效果。而且在对金属基板、印刷基板、陶瓷基板等进行装片、导线接合时,另外,即使是局部涂敷焊料的装置中只要具有光学识别装置,就可以应用。
另外,说明了闪晃防止送风机构31吹出例如3升/分的氮气气流33的情况,但是该气流33的量考虑成本最好是能够驱散闪晃32所需的最小的限量。因此,气流33的量应根据工作条件适当调整。
其次参照图4-图13说明本发明电路装置的制造方法。
首先,本发明的第一工序在于,如图4到图6所示,准备导电箔50,在导电箔50,至少在形成多个电路元件42的搭载部的导电图形41之外的区域,利用蚀刻形成比导电箔50的厚度浅的分离槽51,形成导电图形41。
在本工序中,首先如图4(A)所示,准备薄片状的导电箔50。该导电箔50要考虑焊料的附着性、接合性、电镀性来选择其材料,作为其材料采用由以铜为主要材料的导电箔、以Al为主要材料的导电箔或Fe-Ni等的合金组成的导电箔等。
导电箔的厚度,如果考虑后面的蚀刻最好为10μm-300μm的程度,在此采用70μm(2盎司)的铜箔。但是300μm以上或10μm以下基本上也可以。如后述那样,只要可以形成比导电箔50的厚度浅的分离槽51即可。
另外,薄片状的导电箔50以规定的宽度例如45mm卷成滚筒状来准备,将它搬送到后述各工序也可以,准备剪成规定大小的长方形的导电箔50,搬送到后述各工序也可以。
具体地说,如图4(B)所示,在长方形的导电箔50形成多个搭载部的块52多个间隔(在此为4-5个)排列。在各块52之间设置着狭缝53,吸收造膜工序等的加热处理产生的导电箔50的应力。另外,在导电箔50的两侧以一定间隔设置引导孔54,用于决定在各工序的位置。
然后形成导电图形。
首先,如图5所示,在铜箔50之上形成光致抗蚀剂(耐蚀刻掩膜)PR,为了露出除去形成导电图形41的区域的导电箔50,将光致抗蚀剂PR形成图形。而且如图6(A)所示,通过光致抗蚀剂PR将导电箔50进行选择性地蚀刻。
在本工序中,为了使以蚀刻形成的分离槽51的深度均一且精度高,如图6(A)所示,使分离槽51的开口向下,将蚀刻液从设置在导电箔50的下方的蚀刻液供给管70向上方环状簇射。其结果是,蚀刻液接触的分离槽51部分被蚀刻,蚀刻液在分离槽51内不积存立即排出,所以分离槽51的深度能以蚀刻处理时间控制,形成均匀的、高精度的分离槽51。另外蚀刻液主要采用氯化铁或氯化铜。
图6(B)表示具体的导电图形41。本图对应于图4(B)表示的一个块52的放大图。以虚线表示的部分是一个搭载部55,构成导电图形41,在一个块52配置有配列为5行10列矩阵状的多个搭载部55,各搭载部55每一个都设置有相同的导电图形。各块的周边设置着框状图形56,与其稍微有间隔,在其内侧设置着切断时的对位标记57。框状图形56用于与造模模具的嵌合,导电箔50的背面蚀刻后具有补强绝缘树脂40的功能。
其次,本发明的第二工序在于,如图7所示,在所需的导电图形51的各搭载部55固定电路元件42。
作为电路元件42有晶体管、二极管、IC芯片等半导体元件、片状电容、片状电阻等无源元件。虽然厚度会厚,但还能安装CPS、BGA等面向下的半导体元件。
在此,裸的半导体芯片42A被装在导电图形41A上,片状电容或无源元件42B以焊锡等的焊料或导电粘合剂45B固定。
作为本发明电路装置特征的第三工序在于,如图8及图9所示,将各搭载部55的电路元件42的电极和所需的导电图形41进行导线接合。
在本工序中,采用具有图1表示的识别装置的接合装置21进行导线接合。而且在接合装置21的载置台22上如图9(A)所示,设置着箝位器60,由箝位器60压住导电箔50的块52的周端,使导电箔50与载置台22表面的热部件64紧密接触。
将固定于热部件64上的导电箔50,通过操作孔24利用镜筒29内的识别照相机进行图形识别。图形识别后,如图8所示,将块52内的各搭载部55的发射极和导电图形41B、基极和导电图形41B进行热压球形接合和超声波楔形接合。
这里,箝位器60如图9(A)所示,具有与块52大致相等大小的开口部61,在与导电箔50接触的部分设置着凹凸部63。用凹凸部63压住块52的周端,将块52的背面与热部件64紧密接触。而且为了在箝位器60的内部流过氮气,设置有路径65、66。
如图9(B)所示,罩23由箝位器60和不锈钢板67构成。该板67嵌入箝位器上部的凹部68,与箝位器60在水平方向,向与导电箔50的移动方向成直角的方向的移动是自由的。而且在板67形成有操作孔24,该操作孔24与铜箔50上的运行方向的搭载部对应而移动,从而对块52进行图形识别、导线接合。
而且在本工序中,块52内具有多个搭载部55,该每一个块52汇总进行导线接合,所以与目前的电路装置的制造方法相比,要考虑块52加热的时间变长,块52氧化的情况。为解决这一问题,作为接合装置21的罩23的一部分具有箝位器60,从箝位器60到基板52的表面吹过氮气,同时将罩23内填充氮气来解决这一问题。
另一方面,罩内利用在载置台内藏的加热器30的功能,维持例如230℃,注入的氮气例如以70℃注入。氮气在罩23内由加热器30加热到230℃。氮气例如以4升/分注入罩23内且被加热,从操作孔24流出。这时氮气为230℃,室温例如为20℃,因此由于该温度差从操作孔24形成流出闪晃32。如图3所示,流出的闪晃32笼罩在环状照明25内外,使图形识别精度恶化。
但是,在本发明的接合装置21中,可在环状照明25与罩23之间,在操作孔24,具体地说,在环状照明25下端的紧旁边设置闪晃防止送风机构31附近,以3升/分的氮气气流33从操作孔上及环状照明25周围驱散闪晃。因此,闪晃不进入环状照明25内,利用识别照相机能以μm级高精确地进行图形识别,故导线接合也能高精度地进行。其结果是,可实现一种电路装置的制造方法,如集成块52那样,例如对于搭载部形成为5列10行的小面积集成型的导电图形,也能进行高精度的导线接合。
而且,如上所述,用于防止导电箔50表面氧化的氮气的问题解决了,因此,导线接合中能够采用氮气。因此导电箔50表面不会氧化,所以能防止导电箔50表面氧化时例如在150℃以下起作用的抗氧化剂膜剥落引起的与树脂的结合性的恶化。其结果是,可实现一种电路装置的制造方法,其能提高导电箔50与绝缘性树脂40结合面的耐湿性、耐脱落性。
其次,本发明的第四工序在于,如图10所示,以绝缘性树脂40共同造膜,汇总覆盖各搭载部55的电路元件42并填充分离槽51。
在本工序中,如图10(A)所示,绝缘性树脂40将电路元件42A、42B及多个导电图形41A、41B、41C完全覆盖,与导电图形41之间的分离槽51填充了绝缘性树脂40的导电图形41A、41B、41C侧面的弯曲结构嵌合而牢固地结合。利用绝缘性树脂40支承导电图形41。
本工序可以利用传递模、注入模或罐封实现。作为树脂材料,环氧树脂等的热硬性树脂能以传递模实现,聚酰亚胺树脂、聚亚苯基硫醚等热塑性树脂能以注入模实现。
覆盖在导电箔50表面的绝缘性树脂40的厚度,调节为从电路元件42的接合导线45A的最顶部,覆盖大约100μm程度。该厚度考虑强度,厚一些薄一些都可以。
本工序的特征是:在覆盖绝缘性树脂40之前,构成导电图形41的导电箔50形成支承基板,构成支承基板的导电箔50,作为电极材料是必需的材料。因此,具有可极节省结构材料而操作的优点,还能实现低成本化。
分离槽51形成比导电箔的厚度浅,因此导电箔50未作为导电图形41一个个分离。因此作为薄片状的导电箔50可一体处理,在将绝缘性树脂40造模时,传送到模具、向膜具安装的操作很简单。
本发明的第五工序在于,如图11所示,除去没有设置分离槽51的较厚部分的导电箔50。
本工序化学性地及/或物理性地除去导电箔50的背面,分离为导电图形41。该工序利用研磨、研削、蚀刻、激光金属蒸发等实施。
在实验中,利用研磨装置或研削装置将整个面削去30μm左右,使绝缘树脂40从分离槽51露出。在图10(A)中该露出的面以虚线表示。其结果是,形成约40μm厚的导电图形41被分离。另外在将要露出绝缘树脂40之前,将导电箔50整个面蚀刻,之后利用研磨或研削削去整个面,使绝缘树脂40露出也可以。而且直到以虚线表示的位置,将导电箔50整个面湿蚀刻,使绝缘树脂40露出也可以。
其结果是,形成在绝缘树脂40露出导电图形41背面的结构。即,形成填充到分离槽51的绝缘树脂40表面和导电图形41表面实质性一致的结构。因此本发明的电路装置42在安装时可用焊料等的表面张力直接水平移动进行自动调整。
然后进行导电图形41的背面处理,得到图11所示的最终结构,即,根据需要在露出的导电图形41,覆盖焊料等导电材料,完成电路装置。
本发明的第六工序在于,如图12所示,测定以绝缘树脂40汇总造膜的各搭载部55的电路元件42的特性。
在前工序,对导电箔50的背面蚀刻之后,从导电箔50切开分离各块52。该块52以绝缘树脂40与导电箔50的剩余部分连接,所以不用切断模具,通过机械性地从导电箔50的剩余部分剥落即可完成。
在各块52的背面,如图12所示,露出导电图形41的背面,各搭载部55与导电图形41形成时完全一样,排列成矩阵状。使探针48与从该导电图形41的绝缘树脂40露出的背面电极46接触,个别测定各搭载部55的电路元件42的特性参数等,判断好坏,不良品以磁墨水其进行标记。
在本工序中,各搭载部55的电路装置43用绝缘树脂40按每个块52以一体支承,所以不个别地零散地分离。因此置于检测台的块52只是以搭载部55的尺寸,如箭头所示,在横向及纵向进行间距进给,就可极快地、大量地测定块52的各搭载部55的电路装置43。即,由于不需要目前必要的电路装置的表背判断、电极位置的识别等,所以能实现测定时间的大幅缩短。
本发明的第七工序在于,如图13所示,利用切断,将绝缘树脂40按各搭载部55逐一分离。
在本工序中,以真空将块52吸附在切断装置的载置台上,以切割刀59沿各搭载部55间的切断线58,将分离槽51的绝缘树脂40切断,分离为个别的电路装置43。
在本工序中,切割刀59大致以切断绝缘树脂40的切削深度进行切割,从切断装置取出块52后,用滚筒分片即可。切断时预先识别在所述第一工序设置的各块周边的框状图形56内侧相对的对位标记57,以此为基准进行切断。众所周知,切断是在纵向沿全部的切断线58切断后,将载置台旋转90度,按横向的切断线58进行切断。
利用上述制造工序完成电路装置43。
另外在本发明电路装置的制造方法中,说明了在导电箔上形成集成块的情况,但并非特别限定于这种情况,对于由象导线架之类的导电材料构成的基板,也能得到同样的效果。另外,在不脱离本发明宗旨的范围内,可以有种种变形。
根据本发明的识别装置包括:具有加热功能的基板载置台;在所述基板载置台上,覆盖操作区域的罩;所述罩上面设置的操作孔;所述操作孔上方设置的照明;在配置于所述照明上方的镜筒内设置的图形识别用照相机。注入所述罩内的不活泼气体由所述基板载置台加热,利用从所述操作孔向外部喷出时与室温的温差产生波动,所述波动笼罩在所述照明内及其周边。但是在本发明的识别装置中,在所述照明下部及所述操作孔之间,在所述操作孔附近设有闪晃防止装置,用从所述闪晃防止送风机构来的送风气流将所述波动相对于罩表面向横向排放,可以提高所述图形识别用照相机的识别精度。
另外,根据本发明的接合装置包括:具有加热功能的基板载置台;在所述基板载置台上,覆盖操作区域的罩;所述罩上面设置的操作孔;所述操作孔上方设置的照明;配置于所述照明侧面的毛细管;在配置于所述照明上方的镜筒内设置的图形识别用照相机。注入所述罩内的不活泼气体由所述基板载置台加热,由于从所述操作孔向外部流出时的温差产生波动。用设置在所述照明下部的送风气流,将所述波动相对于所述罩表面向横向排放,由所述图形识别用照相机进行识别。之后使所述毛细管向所述操作孔上移动,通过所述操作孔进行接合。这时以所述送风气流防止所述波动侵入所述照明内,从而由上述识别装置高精度地进行图形识别,因此可以实现能以μm级标准高精度接合的接合装置。
本发明的电路装置的制造方法,采用上述识别装置及接合装置,在导线接合工序中,由形成在小面积上集成多个搭载部的集成块的导电材料构成的基板,即使长时间置于高温下也不会氧化,所以可实现能提高基板与绝缘树脂的结合面的耐湿性、耐剥离性的电路装置的制造方法。

Claims (17)

1.一种识别装置,其特征在于,包括:
具有加热功能的基板载置台;
覆盖所述基板载置台的操作区域的罩;
所述罩上设置的操作孔;
所述操作孔上方设置的照明;
在所述照明上方设置的图形识别用照相机;
在所述照明附近设置的送风机构;
已吹入所述罩内的不活泼气体利用所述加热功能加热,从所述操作孔排出的所述加热的不活泼气体通过所述送风机构从所述图形识别用照相机的识别区域排除。
2.如权利要求1所述的识别装置,其特征在于,所述罩的部分由箝位器形成。
3.如权利要求3所述的识别装置,其特征在于,所述箝位器具有不活泼气体的吹入孔。
4.如权利要求1所述的识别装置,其特征在于,所述不活泼气体由氮气组成。
5.如权利要求1所述的识别装置,其特征在于,所述照明是环状照明。
6.一种接合装置,其特征在于,包括:
具有加热功能的基板载置台;
覆盖所述基板载置台的操作区域的罩;
所述罩上设置的操作孔;
设置在所述操作孔上方的照明;
配置于所述照明的附近的毛细管;
在所述照明上方设置的图形识别用照相机;
在所述照明附近设置的送风机构;已吹入所述罩内的不活泼气体通过所述加热功能加热,从所述操作孔排出的所述加热的不活泼气体通过所述送风机构从所述图形识别用照相机的识别区域排除,同时将所述毛细管从所述操作孔侵入所述图形内并进行导线接合。
7.如权利要求6所述的接合装置,其特征在于,所述罩的一部分由箝位器形成。
8.如权利要求7所述的接合装置,其特征在于,所述箝位器具有所述不活泼气体的吹入孔。
9.如权利要求6所述的接合装置,其特征在于,所述不活泼气体由氮气组成。
10.如权利要求6所述的接合装置,其特征在于,所述照明是环状照明。
11.一种电路装置的制造方法,识别装置具有:具有加热功能的基板载置台;覆盖所述基板载置台的操作区域的罩;设于所述罩上的操作孔;在所述操作孔上方设置的照明;所述照明上方设置的图形识别用照相机;设于所述照明附近的送风机构,在所述识别装置的所述基板载置台上配置电路元件安装机构,该电路元件安装机构至少具有配置电路元件的预定的搭载部和所述搭载部的周围上设置的电极,在所述搭载部安装所述电路元件,该制造方法的特征在于,将所述成块基板载置在具有加热功能的基板载置台上,在吹入所述罩内的不活泼气体由所述加热功能加热并从所述操作孔排出时,通过所述送风机构排除所述不活泼气体,同时将所述电路元件安装在所述搭载部。
12.如权利要求11所述的电路装置的制造方法,其特征在于,所述电路元件安装在所述搭载部后,通过所述图形识别用照相机而识别,并导线接合所述电路元件和所述电极。
13.如权利要求11所述的电路装置的制造方法,其特征在于,所述罩的一部分由箝位器形成。
14.如权利要求13所述的电路装置的制造方法,其特征在于,通过设于所述箝位器的吹入孔将所述不活泼气体吹入所述罩内。
15.如权利要求11所述的电路装置的制造方法,其特征在于,所述电路元件至少是半导体元件。
16.如权利要求15所述的电路装置的制造方法,其特征在于,所述半导体元件至少是晶体管、二极管、IC芯片、CSP或BGA。
17.如权利要求15所述的电路装置的制造方法,其特征在于,所述电路元件,除所述半导体元件,还具有片状电容或片状电阻。
CNB021231753A 2001-06-27 2002-06-26 识别装置、接合装置及电路装置的制造方法 Expired - Fee Related CN1211849C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP195396/2001 2001-06-27
JP2001195396A JP2003007759A (ja) 2001-06-27 2001-06-27 認識装置、ボンディング装置および回路装置の製造方法

Publications (2)

Publication Number Publication Date
CN1393919A CN1393919A (zh) 2003-01-29
CN1211849C true CN1211849C (zh) 2005-07-20

Family

ID=19033374

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB021231753A Expired - Fee Related CN1211849C (zh) 2001-06-27 2002-06-26 识别装置、接合装置及电路装置的制造方法

Country Status (4)

Country Link
US (2) US6715660B2 (zh)
JP (1) JP2003007759A (zh)
CN (1) CN1211849C (zh)
TW (1) TW538657B (zh)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6955284B2 (en) * 2000-10-06 2005-10-18 Pac Tec-Packaging Technologies Gmbh Device for positioning a tool in relation to a workpiece
JP2003007759A (ja) * 2001-06-27 2003-01-10 Sanyo Electric Co Ltd 認識装置、ボンディング装置および回路装置の製造方法
JP4711549B2 (ja) * 2001-06-27 2011-06-29 三洋電機株式会社 半導体装置の製造方法
US6892927B2 (en) * 2003-04-24 2005-05-17 Intel Corporation Method and apparatus for bonding a wire to a bond pad on a device
JP5016816B2 (ja) * 2005-12-27 2012-09-05 株式会社東芝 ボンディング装置及び半導体装置の製造方法
TWI405278B (zh) * 2010-05-20 2013-08-11 Advanced Semiconductor Eng 固定治具及打線機台
JP6118967B2 (ja) * 2014-03-14 2017-04-26 株式会社新川 ボンディング装置およびボンディング方法
WO2015137029A1 (ja) * 2014-03-14 2015-09-17 株式会社新川 ボンディング装置およびボンディング方法
JP5950994B2 (ja) * 2014-12-26 2016-07-13 株式会社新川 実装装置
EP3506340B1 (en) * 2017-12-28 2020-10-21 Nexperia B.V. Bonding and indexing apparatus
CN210429751U (zh) 2018-09-11 2020-04-28 Pyxis Cf私人有限公司 半导体器件贴片装置及用于对准多个半导体器件的机构

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62276840A (ja) * 1986-05-26 1987-12-01 Hitachi Ltd ボンデイング装置
JPS6329535A (ja) * 1986-07-22 1988-02-08 Mitsubishi Electric Corp ワイヤボンダ−
JPS63266846A (ja) * 1987-04-24 1988-11-02 Hitachi Ltd 電子装置の製造方法および装置
JP2981973B2 (ja) * 1995-05-30 1999-11-22 株式会社新川 ワイヤボンディング装置
JPH09139399A (ja) * 1995-11-16 1997-05-27 Toshiba Electron Eng Corp 画像認識方法、その装置、ワイヤボンダ画像認識方法およびその装置
US6234376B1 (en) * 1999-07-13 2001-05-22 Kulicke & Soffa Investments, Inc. Supplying a cover gas for wire ball bonding
JP2003007759A (ja) 2001-06-27 2003-01-10 Sanyo Electric Co Ltd 認識装置、ボンディング装置および回路装置の製造方法
JP4711549B2 (ja) * 2001-06-27 2011-06-29 三洋電機株式会社 半導体装置の製造方法
JP2003037131A (ja) * 2001-07-25 2003-02-07 Sanyo Electric Co Ltd ボンディング装置
US20040154792A1 (en) * 2003-02-12 2004-08-12 Bofto Shane A. Desorption of hydrocarbons for recovery from water bearing coal using electromagnetic energy

Also Published As

Publication number Publication date
US20040154742A1 (en) 2004-08-12
CN1393919A (zh) 2003-01-29
TW538657B (en) 2003-06-21
JP2003007759A (ja) 2003-01-10
US20030000995A1 (en) 2003-01-02
US7066372B2 (en) 2006-06-27
US6715660B2 (en) 2004-04-06

Similar Documents

Publication Publication Date Title
CN1211850C (zh) 识别装置、接合装置及电路装置的制造方法
US11450577B2 (en) Methods and systems for imaging and cutting semiconductor wafers and other semiconductor workpieces
CN1211849C (zh) 识别装置、接合装置及电路装置的制造方法
CN1066574C (zh) 制造芯片封装型半导体器件的方法
CN1258954C (zh) 电路器件的制造方法
CN1211848C (zh) 电路装置的制造方法
CN1438833A (zh) 有内构电子元件的电路板及其制造方法
CN1187806C (zh) 电路装置的制造方法
CN101047146A (zh) 半导体器件的制造方法
CN1638071A (zh) 半导体器件的制造方法
CN1233205C (zh) 电路装置的制造方法
WO2007005639A2 (en) Lead frame isolation using laser technology
CN1577798A (zh) 制造半导体器件的方法和使用该方法的半导体器件制造装置
CN1457094A (zh) 半导体器件及其制造方法
CN100352066C (zh) 光电元件部件
CN1225502A (zh) 从半导体晶片中分离芯片的方法
CN1173391C (zh) 接合装置
CN1186808C (zh) 电路装置的制造方法
CN1892979A (zh) 带反射镜安装衬底的制造方法
CN1127127C (zh) 半导体晶片装置及其封装方法
CN1549669A (zh) 板状体的制造方法及采用该板状体的电路装置制造方法
JP2009177215A (ja) 半導体装置の製造方法

Legal Events

Date Code Title Description
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20050720

Termination date: 20140626

EXPY Termination of patent right or utility model