CN118535315A - Memory allocation method, electronic equipment and storage medium - Google Patents

Abstract

The application provides a memory allocation method, electronic equipment and a storage medium, wherein the method comprises the following steps: receiving a memory request; judging the type of the memory request, wherein the type of the memory request comprises a first type and a second type, and the first type and the second type are related to the size of a memory block requested by the memory request; and for the memory required by the memory request of the first type, starting to allocate from one end of a higher address in the memory space, and for the memory required by the memory request of the second type, starting to allocate from one end of a lower address in the memory space. The method provided by the application is beneficial to improving the memory allocation efficiency.

Description

Memory allocation method, electronic device and storage medium

Technical Field

The present application relates to the field of computers, and in particular to a memory allocation method, an electronic device, and a storage medium.

Background Art

Currently, memory allocation is performed from one end of the memory, for example, memory allocation starts from the end with a high address. Memory allocation may include large-sized memory requests and small-sized memory requests. Large-sized memory requests are used to request large blocks of memory space, and small-sized memory requests are used to request small blocks of memory space. If large-sized memory requests and small-sized memory requests are both allocated from one end of the memory, when large-sized and small-sized memory requests arrive alternately, large-sized and small-sized memory blocks will inevitably be occupied in an interlaced manner, which will quickly cause memory fragmentation and seriously affect the efficiency of subsequent memory allocation.

For example, in some scenarios, such as augmented reality (AR) games, mobile phone continuous shooting, streaming media files, and running mobile neural network models, intensive large-size memory requests will be generated. If a large amount of memory fragmentation is generated, the above-mentioned intensive large-size memory requests will cause a very long delay in the large-size memory requests, seriously affecting the memory allocation efficiency.

Summary of the invention

The present application provides a memory allocation method, an electronic device and a storage medium, which are helpful to improve the memory allocation efficiency.

In a first aspect, the present application provides a memory allocation method, comprising:

Receive memory request;

Determining a type of the memory request, wherein the type of the memory request includes a first type and a second type, and the first type and the second type are associated with a size of a memory block requested by the memory request;

The memory required for the first type of memory request is allocated starting from the end with a higher address in the memory space, and the memory required for the second type of memory request is allocated starting from the end with a lower address in the memory space.

In the present application, memory allocation is performed according to the type of memory request, which can effectively avoid memory fragmentation, so that large-sized blocks in the memory can meet the memory requirements of large-sized memory requests, thereby improving memory allocation efficiency.

In one possible implementation, the first type of memory request is used to request a large-sized memory block, and the second type of memory request is used to request a small-sized memory block.

In one possible implementation, the method further includes:

If the memory space at a higher address does not satisfy the memory space required by the first type of memory request, then occupy the memory space at a lower address; or

If the memory space at a lower address does not satisfy the memory space required by the second type of memory request, the memory space at a higher address is occupied.

In the present application, by occupying the memory space with higher addresses and the memory space with lower addresses mutually, memory can be allocated in time when the memory space is insufficient, avoiding affecting the use of the current application due to insufficient memory allocation, thereby improving the efficiency of memory allocation.

In one possible implementation, the method further includes:

Defragment a large-size space, wherein the large-size space is a portion of the memory space occupying a higher address in the memory space.

In the present application, by defragmenting a large-size space, the large-size space can be made to maintain a large block of memory for a long time, which can be more conducive to processing large-size memory requests to improve memory allocation efficiency.

In one possible implementation manner, the large-size space is obtained by dividing the memory space according to a first preset ratio.

In one possible implementation, the method further includes:

The defragmentation is performed when the system is idle.

In the present application, by performing defragmentation when the system is idle, defragmentation can be performed without affecting memory allocation to applications.

In one possible implementation, the method further includes:

The defragmentation is performed when a memory request is received.

In the present application, by performing defragmentation on demand, excessive resource consumption due to excessive defragmentation can be avoided.

In one possible implementation, the defragmenting of the large-size space includes:

The large-size space is divided into a first part and a second part, the first part is used for performing a defragmentation task, and the second part is used for performing a memory allocation task.

In this application, by dividing the large-size space, it is possible to ensure defragmentation while not affecting memory allocation.

In one possible implementation manner, the tasks of the first part and the tasks of the second part are performed alternately.

In one possible implementation, the method further includes:

In the process of searching for a free memory block based on the memory request, if the previous free memory block is successfully found using the first size, then the first size is used to try to find the next free memory block.

In the present application, the next free memory block is searched for according to the historical successful size, so as to avoid searching according to the maximum size every time, thereby improving the search efficiency of the free memory block.

In one possible implementation, the method further includes:

In the process of searching for a free memory block based on the memory request, after successfully searching for the previous free memory block using the first size, the maximum size is used to try to search for the next free memory block, wherein the ratio of the first size to the maximum size is a second preset ratio.

In the present application, the next free memory block is searched for according to the historical successful size, so as to avoid searching according to the maximum size every time, thereby improving the search efficiency of the free memory block.

In one possible implementation, the kernel memory is allocated at a lower address end of the memory space.

In the present application, by allocating kernel memory at a lower address end in the memory space, the problem of more fragmentation caused by allocating kernel memory at a higher address end can be avoided, thereby improving memory allocation efficiency.

In a second aspect, the present application provides a memory allocation device, comprising one or more functional modules, wherein the one or more functional modules are used to implement the memory allocation method as described in the first aspect.

In a third aspect, the present application provides an electronic device, comprising: a processor and a memory, wherein the memory is used to store a computer program; the processor is used to run the computer program to implement the memory allocation method as described in the first aspect.

In a fourth aspect, the present application provides a computer-readable storage medium, which stores a computer program. When the computer-readable storage medium is executed on a computer, the computer implements the memory allocation method as described in the first aspect.

In a fifth aspect, the present application provides a computer program, which, when executed on an electronic device, enables the electronic device to execute the memory allocation method described in the first aspect.

In one possible design, the program in the fifth aspect may be stored in whole or in part on a storage medium packaged together with the processor, or may be stored in whole or in part on a memory not packaged together with the processor.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG1 is a flow chart of an embodiment of a memory allocation method provided by the present application;

FIG2 is a schematic diagram of memory space occupancy provided by the present application;

FIG3 is a schematic diagram of an embodiment of memory space allocation provided by the present application;

FIG4 is a schematic diagram of another embodiment of memory space allocation provided by the present application;

FIG5 is a schematic diagram of another embodiment of memory space allocation provided by the present application;

FIG6 is a schematic diagram of memory space division provided by the present application;

FIG7 is a schematic diagram of the structure of a memory allocation device provided in an embodiment of the present application;

FIG8 is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application.

DETAILED DESCRIPTION

In the embodiments of the present application, unless otherwise specified, the character "/" indicates that the objects before and after the association are in an or relationship. For example, A/B can represent A or B. "And/or" describes the association relationship of the associated objects, indicating that three relationships can exist. For example, A and/or B can represent: A exists alone, A and B exist at the same time, and B exists alone.

It should be pointed out that the words "first", "second", etc. involved in the embodiments of the present application are only used to distinguish the description purpose, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated, nor can they be understood as indicating or implying order.

In the embodiments of the present application, "at least one" refers to one or more, and "plurality" refers to two or more. In addition, "at least one of the following" or similar expressions refers to any combination of these items, which may include any combination of single items or plural items. For example, at least one of A, B, or C may represent: A, B, C, A and B, A and C, B and C, or A, B and C. Among them, each of A, B, and C may be an element itself, or a set containing one or more elements.

In the embodiments of the present application, "exemplary", "in some embodiments", "in another embodiment", etc. are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" in the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of the word "exemplary" is intended to present concepts in a concrete way.

In the embodiments of the present application, "of", "corresponding", and "corresponding" can sometimes be used interchangeably. It should be noted that when the distinction between them is not emphasized, the meanings to be expressed are consistent. In the embodiments of the present application, communication and transmission can sometimes be used interchangeably. It should be noted that when the distinction between them is not emphasized, the meanings to be expressed are consistent. For example, transmission can include sending and/or receiving, which can be a noun or a verb.

The equal to involved in the embodiments of the present application can be used in conjunction with greater than, and is applicable to the technical solution adopted when greater than, and can also be used in conjunction with less than, and is applicable to the technical solution adopted when less than. It should be noted that when equal to is used in conjunction with greater than, it cannot be used in conjunction with less than; when equal to is used in conjunction with less than, it cannot be used in conjunction with greater than.

Currently, memory allocation is performed from one end of the memory, for example, memory allocation starts from the end with a high address. Memory allocation may include large-sized memory requests and small-sized memory requests. Large-sized memory requests are used to request large blocks of memory space, and small-sized memory requests are used to request small blocks of memory space. If large-sized memory requests and small-sized memory requests are both allocated from one end of the memory, when large-sized and small-sized memory requests arrive alternately, large-sized and small-sized memory blocks will inevitably be occupied in an interlaced manner, which will quickly cause memory fragmentation and seriously affect the efficiency of subsequent memory allocation.

For example, in some scenarios, such as augmented reality (AR) games, mobile phone continuous shooting, streaming media files, and running mobile neural network models, intensive large-size memory requests will be generated. If a large amount of memory fragmentation is generated, the above-mentioned intensive large-size memory requests will cause a very long delay in the large-size memory requests, seriously affecting the memory allocation efficiency.

Based on the above problems, an embodiment of the present application proposes a memory allocation method.

The memory allocation method provided in the embodiment of the present application is now described in conjunction with Figures 1 to 6.

FIG1 is a flow chart of an embodiment of a memory allocation method provided by the present application, which specifically includes the following steps:

Step 101, receiving a memory request.

Specifically, the memory request may be one request or multiple consecutive requests, which is not specifically limited in the embodiments of the present application. The memory request may be used to request the system to allocate memory. A memory request may include a requested memory size, which is used to characterize the memory capacity to be allocated.

Step 102, determine the type of memory request.

Specifically, the system may pre-classify memory requests into two types: for example, large-size memory requests and small-size memory requests, wherein the large-size memory requests may be memory requests greater than or equal to a preset size threshold, and the small-size memory requests may be memory requests less than the preset size threshold.

When any memory request is received, the type of the memory request can be determined. For example, the type of the memory request can be determined based on a preset size threshold. The specific determination method can refer to the relevant description in the above specification and will not be repeated here.

Step 103: Allocate memory according to the type of memory request.

Specifically, after determining the type of memory request, memory allocation can be performed according to the type of memory request. Exemplarily, if the memory request is a large-size memory request, it can be allocated from one end of the memory (for example, the high address end); if the memory request is a small-size memory request, it can be allocated from the other end of the memory (for example, the low address end). It can be understood that the above-mentioned high address end and low address end are relative, that is, the address of one end of the memory is higher than the address of the other end of the memory. Exemplarily, the address of one end of the memory and the address of the other end of the memory can belong to the same low address area, or the address of one end of the memory and the address of the other end of the memory can belong to the same high address area, or the address of one end of the memory belongs to the high address area, and the address of the other end of the memory belongs to the low address area. The embodiments of the present application do not make special limitations on this.

FIG. 2 is a schematic diagram of memory space occupation. Referring to FIG. 2 , the address occupied by the left memory space is higher than the address occupied by the right memory space, wherein the kernel memory is the memory allocated by the operating system for the kernel object, and is usually not released after allocation. In other words, the memory address occupied by the kernel memory is usually not moved. It is understandable that the high address end is usually a continuous large block of memory, which is conducive to processing large-size memory requests, while the low address end usually includes multiple small blocks of memory, which is conducive to processing small-size memory requests. If the kernel memory is allocated at the high address end, it is bound to produce more fragments, which is not conducive to future memory allocation. Therefore, the embodiment of the present application also distributes the kernel memory at the low address end. Since the kernel memory is not movable, and the low address end processes small-size memory requests, there are a lot of fragments in itself. Therefore, the kernel memory is allocated at the low address end, and the efficiency of memory allocation will not be affected by fragmentation.

Next, the allocation of memory is exemplified in conjunction with FIG3. FIG3 is a schematic diagram of the effect of memory allocation according to memory requests. Referring to FIG3, the first line is a memory request sequence, and the memory request sequence may include one or more continuous memory requests. It can be understood that the memory requests in the memory request sequence may appear in sequence, for example, may appear according to the needs of the application. Among them, the order of the above memory requests may be from left to right. When memory allocation is performed according to memory requests, it can be allocated according to the type of memory request. Taking memory request 1 and memory request 2 as examples, assuming that memory request 1 is a small-size memory request, it can be allocated from the right side of the memory space (i.e., the low address end). Assuming that memory request 2 is a large-size memory request, it can be allocated from the left side of the memory space (i.e., the high address end). The memory allocation required for subsequent memory requests (e.g., memory request 3, memory request 4, etc.) can be allocated in the above manner, which will not be repeated here. The third line is a schematic diagram of the memory space effect after memory allocation. It can be seen that the memory space required by large-size memory requests occupies the left end, that is, the high address end, and the memory space required by small-size memory requests occupies the right end, that is, the low address end. By allocating the memory required by different types of memory requests at both ends of the memory space, physical isolation is formed, which can better reduce fragmentation, reduce the latency of memory allocation, and improve the efficiency of memory allocation.

In some optional embodiments, as the memory space is continuously occupied, the memory space may be occupied by large-size memory requests and small-size memory requests, because large-size memory requests occupy large-size memory blocks and small-size memory requests occupy small-size memory blocks.

Therefore, if the memory space near the low address end cannot provide the memory space required by the small-size memory request, the free memory near the high address end can be occupied; similarly, if the memory space near the high address end cannot provide the memory space required by the large-size memory request, the memory space near the low address end can also be occupied. Among them, the memory space near the high address end can be used to represent the memory space occupied by the large-size memory request and has been released, and the memory space near the low address end can be used to represent the memory space occupied by the small-size memory request and has been released.

The above-mentioned occupation mode is now exemplarily described with reference to FIG. 4 and FIG. 5 .

FIG4 is a schematic diagram of the effect of a small-size memory request occupying a memory space near the high address end. Referring to FIG4 , in the memory space before allocation, the memory space near the high address end includes the free space at the high address end, and the free space at the high address end is the free space occupied by the large-size memory request and released, and the remaining space near the high address end is occupied, and the memory space near the low address end is occupied by the small-size memory request. At this time, if a small-size memory request is received, such as a memory request n, since there is no free space to allocate in the memory space near the low address end, the free memory in the memory space near the high address end can be occupied, for example, a part of the free space in the memory space near the low address end can be occupied, and the effect after occupation is shown in the allocated memory space in FIG4 , The memory space required by the memory request n occupies a part of the free space in the memory space near the low address end, so that efficient use of memory can be achieved and the efficiency of memory use can be improved.

FIG5 is a schematic diagram of the effect of a large-size memory request occupying a memory space near the low address end. Referring to FIG5, in the memory space before allocation, the memory space near the low address end includes multiple free spaces at the low address end (for example, free space 1, free space 2, and free space 3), and the free space at the low address end is the free space occupied by the small-size memory request and released, and the remaining space in the memory space near the low address end is occupied, and the memory space near the high address end is occupied. At this time, if a large-size memory request is received, such as a memory request n, since there is no free space to allocate in the memory space near the high address end, the free memory in the memory space near the low address end can be occupied, for example, the free space in the memory space near the low address end (for example, free space 1, free space 2, and free space 3) can be occupied, and the effect after occupation is shown in the allocated memory space in FIG5, and the memory space required by the memory request n occupies the entire memory space of free space 1 and free space 2, and part of the memory space of free space 3, so that efficient use of memory can be achieved and the efficiency of memory use can be improved. It can be understood that in the process of memory space required by memory request n occupying the memory space near the low address end, when multiple free spaces can be allocated, they can be allocated arbitrarily according to the size of the memory request. Taking the above-mentioned memory request n as an example, the entire memory space of free space 1 and free space 3, and part of the memory space of free space 2 can also be allocated to memory request n, or the entire memory space of free space 2 and free space 3, and part of the memory space of free space 1 can be allocated to memory request n. The embodiments of the present application do not make any special limitations on this.

That is to say, the memory allocation solution provided by the embodiment of the present application may not strictly divide the boundary between the large-size space and the small-size space, and the boundary between the two may be flexibly changed, or the boundary between the two is not strictly existing or hard-coded and cannot be changed.

When there are many small-size memory requests, there may be a situation where there is no memory available for allocation in the small-size space segment. At this time, for the next small-size memory request, the free memory closer to the high address end can be allocated to the small-size memory request in the order from the low address end to the high address end. Similarly, when there are many large-size memory requests, there may be a situation where there is no memory available for allocation in the large-size space segment. At this time, for the next large-size memory request, the free memory closer to the low address end can be allocated to the large-size memory request in the order from the high address end to the low address end.

In some optional embodiments, as described in the above specification, when the memory space required by the memory request corresponding to one end occupies the memory space of the other end, fragmentation may be generated, which will lead to a decrease in the efficiency of memory allocation. Therefore, after the memory space required by the small-sized memory request occupies the memory space near the high-address end, fragmentation will be generated in the memory space near the high-address end. In order to reduce the impact of fragmentation, the fragments in the large-sized space can be sorted so that multiple fragments can be integrated into a large-sized free space, so that the integrated free space can meet the needs of the large-sized memory request, thereby improving the memory allocation efficiency. As for the small-sized space, since it itself contains a large number of fragments, the benefits of defragmenting it are small, so there is no need to defragment the small-sized space.

It is understandable that in order to effectively define the memory area for defragmentation, a dividing line can be pre-defined, and the memory space can be divided into two parts by the dividing line, one part is a large-size space, and the other part is a small-size space, wherein the large-size space can be defragmented, and the small-size space does not need to be defragmented. Exemplarily, the memory space can be divided into two parts at a ratio of 1:1, that is, the large-size space is equal to the small-size space. Alternatively, the memory space can be divided into two parts at a ratio of 1:4, that is, the ratio of the large-size space to the small-size space is 1:4.

Taking the 1:1 ratio division as an example, Figure 6 exemplarily shows a schematic diagram of memory space division. Referring to Figure 6, the dividing line divides the memory space into a large-size space and a small-size space at a ratio of 1:1, wherein the large-size space is the memory space at the high address end, which is used to meet the needs of large-size memory requests, so the large-size space can be defragmented; and the small-size space is the memory space at the low address end, which is used to meet the needs of small-size memory requests, so there is no need to defragment the small-size space.

In some optional embodiments, if a large-size space is defragmented when the system is working, it will increase the system burden. In order to reduce the workload, the above-mentioned defragmentation of the large-size space can be performed when the system is idle, thereby not competing with normal memory management for central processing unit (CPU) time.

In some optional embodiments, the large-size space can also be defragmented on demand. For example, the large-size space can be defragmented according to the user's request, or the large-size space can be defragmented when a memory request is received. The embodiments of the present application do not specifically limit this.

In some optional embodiments, in order to avoid blocking memory allocation when defragmenting a large-size space, the large-size space can be divided into two parts, for example, a first part and a second part, wherein the first part can be used for memory allocation and the second part can be used for defragmentation. It can be understood that the first part and the second part can be interchangeable, that is, memory allocation and defragmentation can be performed alternately. For example, after the second part is defragmented, memory allocation can be performed. At this time, the first part can be defragmented, thereby, the original second part becomes a new first part, and the original first part can become a new second part.

In some optional embodiments, if the large-size space has not been defragmented, there may be a large number of fragments in the large-size space. Therefore, according to the traditional memory request method, a large delay may be caused. It is understandable that the traditional memory request method is: when a memory request is received, if a free memory block is not enough to meet the memory space required by the memory request, multiple free memory blocks can be combined to meet the needs of the memory request. In the process of searching for free memory blocks, you can start from a preset maximum size (for example, 2^10) and try to find it. After the attempt fails, you can reduce the size (for example, reduce the size to 2^9) and try to find it further, and then reduce it in sequence until the corresponding free memory block is found; however, in the process of searching for the next free memory block, it will still be searched in the above manner, for example, from the maximum size (for example, 2^10), resulting in low efficiency of the search.

In an embodiment of the present application, in the process of searching for the first free memory block, the search may be attempted from the maximum size, and in the process of searching for the next free memory block, the search may be attempted according to the size of the previous free memory block. For example, if the previous free memory block is successfully found by size S in the process of searching for the previous free memory block, the search may be attempted according to size S in the process of searching for the next free memory block, without starting from the maximum size, thereby saving search time and improving efficiency.

In some optional embodiments, in the process of searching for free memory blocks, when the previous free memory block is successfully found at a certain ratio of the maximum size, the next free memory block can be tried to be found according to the maximum size. Taking the 50% ratio as an example, after trying to find it at half of the maximum size, if the previous free memory block is successfully found, the next free memory block can be tried to be found according to the maximum size. Since in the process of searching for free memory blocks, large-sized spaces may also be defragmented, and when searching at half of the maximum size, the defragmentation may have been completed, therefore, if the search is performed at the maximum size at this time, the largest free memory block may be found, thereby improving the efficiency of memory allocation, so that the allocated memory is more in line with the needs of large-sized memory requests.

In the embodiment of the present application, memory allocation is performed according to the type of memory request, which can effectively avoid memory fragmentation, so that large-sized blocks in the memory can meet the memory requirements of large-sized memory requests, thereby improving memory allocation efficiency.

FIG7 is a schematic diagram of the structure of an embodiment of the memory allocation device of the present application. As shown in FIG7 , the memory allocation device 70 may include: a receiving module 71, a judging module 72 and an allocation module 73; wherein,

A receiving module 71, configured to receive a memory request;

A determination module 72, configured to determine a type of the memory request, wherein the type of the memory request includes a first type and a second type, and the first type and the second type are associated with a size of a memory block requested by the memory request;

The allocation module 73 is used to allocate the memory required for the first type of memory request starting from the end of the memory space with a higher address, and to allocate the memory required for the second type of memory request starting from the end of the memory space with a lower address.

In one possible implementation, the first type of memory request is used to request a large-sized memory block, and the second type of memory request is used to request a small-sized memory block.

In one possible implementation, the allocation module 73 is further configured to occupy the memory space at a lower address if the memory space at a higher address does not satisfy the memory space required by the first type of memory request; or

If the memory space at a lower address does not satisfy the memory space required by the second type of memory request, the memory space at a higher address is occupied.

In one possible implementation, the memory allocation device 70 further includes:

The defragmentation module is used to defragment a large-size space, wherein the large-size space is a portion of the memory space occupying a higher address in the memory space.

In one possible implementation manner, the large-size space is obtained by dividing the memory space according to a first preset ratio.

In one possible implementation, the defragmentation module is also used to defragment when the system is idle.

In one possible implementation, the defragmentation module is further configured to perform defragmentation upon receiving a memory request.

In one possible implementation, the above-mentioned defragmentation module is specifically used to divide the large-size space into a first part and a second part, the first part is used to perform a defragmentation task, and the second part is used to perform a memory allocation task.

In one possible implementation manner, the above-mentioned sorting module is also used to perform the tasks of the first part and the tasks of the second part alternately.

In one possible implementation, the allocation module 73 is further configured to, during a search for a free memory block based on the memory request, attempt to find a next free memory block using the first size if the previous free memory block is successfully found using the first size.

In one possible implementation, the allocation module 73 is also used to, during the search for a free memory block based on the memory request, use a maximum size to try to find the next free memory block after successfully finding the previous free memory block using a first size, wherein the ratio of the first size to the maximum size is a second preset ratio.

In one possible implementation, the allocation module 73 is further configured to allocate the kernel memory to an end of a lower address in the memory space.

The memory allocation device 70 provided in the embodiment shown in FIG. 7 can be used to execute the technical solution of the method embodiment shown in the present application. Its implementation principle and technical effects can be further referred to the relevant description in the method embodiment.

It should be understood that the division of the various modules of the memory allocation device 70 shown in Figure 7 above is only a division of logical functions. In actual implementation, they can be fully or partially integrated into one physical entity, or they can be physically separated. And these modules can all be implemented in the form of software calling through processing elements; they can also be all implemented in the form of hardware; some modules can also be implemented in the form of software calling through processing elements, and some modules can be implemented in the form of hardware. For example, the detection module can be a separately established processing element, or it can be integrated in a chip of an electronic device. The implementation of other modules is similar. In addition, these modules can be fully or partially integrated together, or they can be implemented independently. In the implementation process, each step of the above method or each of the above modules can be completed by an integrated logic circuit of hardware in the processor element or instructions in the form of software.

For example, the above modules may be one or more integrated circuits configured to implement the above methods, such as one or more application specific integrated circuits (ASIC), or one or more microprocessors (DSP), or one or more field programmable gate arrays (FPGA). For another example, these modules may be integrated together and implemented in the form of a system-on-a-chip (SOC).

The exemplary electronic device provided in the embodiment of the present application is further described below in conjunction with Fig. 8. Fig. 8 shows a schematic diagram of the structure of an electronic device 800.

The above-mentioned electronic device 800 may include: at least one processor; and at least one memory communicatively connected to the above-mentioned processor, wherein: the above-mentioned memory stores program instructions that can be executed by the above-mentioned processor, and the processor calls the above-mentioned program instructions to execute the memory allocation method provided in the embodiment shown in Figure 1 of the present application.

Fig. 8 shows a block diagram of an exemplary electronic device 800 suitable for implementing the embodiments of the present application. The electronic device 800 shown in Fig. 8 is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present application.

As shown in Fig. 8, electronic device 800 is in the form of a general computing device. Components of electronic device 800 may include but are not limited to: one or more processors 810, memory 820, communication bus 840 connecting different system components (including memory 820 and processor 810) and communication interface 830.

The communication bus 840 represents one or more of several types of bus structures, including a memory bus or memory controller, a peripheral bus, a graphics acceleration port, a processor or a local bus using any of a variety of bus structures. For example, these architectures include but are not limited to Industry Standard Architecture (ISA) bus, Micro Channel Architecture (MAC) bus, Enhanced ISA bus, Video Electronics Standards Association (VESA) local bus and Peripheral Component Interconnection (PCI) bus.

The electronic device 800 typically includes a variety of computer system readable media. These media can be any available media that can be accessed by the electronic device, including volatile and non-volatile media, removable and non-removable media.

The memory 820 may include a computer system readable medium in the form of a volatile memory, such as a random access memory (Random Access Memory; hereinafter referred to as: RAM) and/or a cache memory. The electronic device may further include other removable/non-removable, volatile/non-volatile computer system storage media. Although not shown in FIG. 8, a disk drive for reading and writing a removable non-volatile disk (such as a "floppy disk"), and an optical disk drive for reading and writing a removable non-volatile optical disk (such as: a compact disc read only memory (Compact Disc Read Only Memory; hereinafter referred to as: CD-ROM), a digital versatile read-only optical disk (Digital Video Disc Read Only Memory; hereinafter referred to as: DVD-ROM) or other optical media) may be provided. In these cases, each drive can be connected to the communication bus 840 via one or more data medium interfaces. The memory 820 may include at least one program product having a set (e.g., at least one) of program modules that are configured to perform the functions of each embodiment of the present application.

A program/utility having a set (at least one) of program modules may be stored in memory 820, such program modules including, but not limited to, an operating system, one or more application programs, other program modules, and program data, each of which or some combination may include an implementation of a network environment. The program modules typically perform the functions and/or methods of the embodiments described herein.

The electronic device 800 may also communicate with one or more external devices (e.g., keyboards, pointing devices, displays, etc.), may also communicate with one or more devices that enable a user to interact with the electronic device, and/or communicate with any device that enables the electronic device to communicate with one or more other computing devices (e.g., network cards, modems, etc.). Such communication may be performed through a communication interface 830. Furthermore, the electronic device 800 may also communicate with one or more networks (e.g., a local area network (LAN), a wide area network (WAN), and/or a public network, such as the Internet) through a network adapter (not shown in FIG. 8 ), and the network adapter may communicate with other modules of the electronic device through a communication bus 840. It should be understood that, although not shown in FIG. 8 , other hardware and/or software modules may be used in conjunction with the electronic device 800, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, disk arrays (Redundant Arrays of Independent Drives; RAID) systems, tape drives, and data backup storage systems.

The processor 810 executes various functional applications and data processing by running the programs stored in the memory 820, such as implementing the method provided in the embodiment of the present application.

It is understandable that the interface connection relationship between the modules illustrated in the embodiment of the present application is only a schematic illustration and does not constitute a structural limitation on the electronic device 800. In other embodiments of the present application, the electronic device 800 may also adopt different interface connection methods in the above embodiments, or a combination of multiple interface connection methods.

In the above embodiments, the processor involved may include, for example, a CPU, a DSP, a microcontroller or a digital signal processor, and may also include a GPU, an embedded neural network processor (Neural-network Process Units; hereinafter referred to as: NPU) and an image signal processor (Image Signal Processing; hereinafter referred to as: ISP). The processor may also include necessary hardware accelerators or logic processing hardware circuits, such as ASIC, or one or more integrated circuits for controlling the execution of the program of the technical solution of the present application. In addition, the processor may have the function of operating one or more software programs, and the software programs may be stored in a storage medium.

The embodiment of the present application also provides a computer-readable storage medium, in which a computer program is stored. When the computer-readable storage medium is run on a computer, the computer executes the method provided by the embodiment shown in the present application.

An embodiment of the present application also provides a computer program product, which includes a computer program. When the computer program is run on a computer, it enables the computer to execute the method provided by the embodiment shown in the present application.

In the embodiments of the present application, "at least one" refers to one or more, and "more than one" refers to two or more. "And/or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and/or B can represent the existence of A alone, the existence of A and B at the same time, and the existence of B alone. Among them, A and B can be singular or plural. The character "/" generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following" and similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b and c can be represented by: a, b, c, a and b, a and c, b and c, or a and b and c, where a, b, c can be single or multiple.

Those of ordinary skill in the art will appreciate that the various units and algorithm steps described in the embodiments disclosed herein can be implemented in a combination of electronic hardware, computer software, and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

In several embodiments provided in the present application, if any function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory; hereinafter referred to as: ROM), random access memory (Random Access Memory; hereinafter referred to as: RAM), disk or optical disk, and other media that can store program codes.

The above is only a specific implementation of the present application. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. The protection scope of the present application should be based on the protection scope of the claims.

Claims (14)

1. A memory allocation method, characterized in that the method comprises: Receive memory request; Determining a type of the memory request, wherein the type of the memory request includes a first type and a second type, and the first type and the second type are associated with a size of a memory block requested by the memory request; The memory required for the first type of memory request is allocated starting from the end with a higher address in the memory space, and the memory required for the second type of memory request is allocated starting from the end with a lower address in the memory space. 2. The method according to claim 1 is characterized in that the first type of memory request is used to request a large-sized memory block, and the second type of memory request is used to request a small-sized memory block. 3. The method according to claim 2, characterized in that the method further comprises: If the memory space at a higher address does not satisfy the memory space required by the first type of memory request, then occupy the memory space at a lower address; or If the memory space at a lower address does not satisfy the memory space required by the second type of memory request, the memory space at a higher address is occupied. 4. The method according to claim 3, characterized in that the method further comprises: Defragment a large-size space, wherein the large-size space is a portion of the memory space occupying a higher address in the memory space. 5 . The method according to claim 4 , wherein the large-size space is obtained by dividing the memory space according to a first preset ratio. 6. The method according to claim 4, characterized in that the method further comprises: The defragmentation is performed when the system is idle. 7. The method according to claim 4, characterized in that the method further comprises: The defragmentation is performed when a memory request is received. 8. The method according to claim 4, wherein the defragmenting of the large-size space comprises: The large-size space is divided into a first part and a second part, the first part is used for performing a defragmentation task, and the second part is used for performing a memory allocation task. 9. The method according to claim 8, characterized in that the method further comprises: The tasks of the first part and the tasks of the second part are performed alternately. 10. The method according to any one of claims 1 to 9, characterized in that the method further comprises: In the process of searching for a free memory block based on the memory request, if the previous free memory block is successfully found using the first size, then the first size is used to try to find the next free memory block. 11. The method according to any one of claims 1 to 9, characterized in that the method further comprises: In the process of searching for a free memory block based on the memory request, after successfully searching for the previous free memory block using the first size, the maximum size is used to try to search for the next free memory block, wherein the ratio of the first size to the maximum size is a second preset ratio. 12. The method according to any one of claims 1-11, characterized in that the kernel memory is allocated at a lower address end in the memory space. 13. An electronic device, characterized in that it comprises: a processor and a memory, wherein the memory is used to store a computer program; and the processor is used to run the computer program to implement the memory allocation method according to any one of claims 1 to 12. 14. A computer-readable storage medium, characterized in that the computer-readable storage medium stores a computer program, and when the computer program is run on a computer, the memory allocation method according to any one of claims 1 to 12 is implemented.