CN118113496A - Inter-process communication method, system and chip based on multi-core heterogeneous SOC - Google Patents

Inter-process communication method, system and chip based on multi-core heterogeneous SOC Download PDF

Info

Publication number
CN118113496A
CN118113496A CN202410525489.8A CN202410525489A CN118113496A CN 118113496 A CN118113496 A CN 118113496A CN 202410525489 A CN202410525489 A CN 202410525489A CN 118113496 A CN118113496 A CN 118113496A
Authority
CN
China
Prior art keywords
inter
client
data
communication
information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202410525489.8A
Other languages
Chinese (zh)
Other versions
CN118113496B (en
Inventor
徐小峰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Beijing Xinchi Semiconductor Technology Co ltd
Original Assignee
Beijing Xinchi Semiconductor Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Beijing Xinchi Semiconductor Technology Co ltd filed Critical Beijing Xinchi Semiconductor Technology Co ltd
Priority to CN202410525489.8A priority Critical patent/CN118113496B/en
Publication of CN118113496A publication Critical patent/CN118113496A/en
Application granted granted Critical
Publication of CN118113496B publication Critical patent/CN118113496B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/54Interprogram communication
    • G06F9/544Buffers; Shared memory; Pipes
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7839Architectures of general purpose stored program computers comprising a single central processing unit with memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Computer And Data Communications (AREA)

Abstract

Inter-process communication method, system and chip based on multi-core heterogeneous SOC, wherein the method comprises the following steps: determining the data quantity of the inter-process data by a first client of a first client system for sending the inter-process data; in response to the data amount being greater than or equal to the data amount threshold, the inter-process data is stored in a shared memory of the multi-core heterogeneous SOC; in response to determining that the client system to receive the inter-process data is a second client system, the first client sends first inter-process information and data address information to a server side of the server system through inter-core communication; the server terminal sends the first inter-process information and the data address information to the second client terminal through inter-core communication based on the received first inter-process information; and the second client reads the inter-process data according to the received data address information. Aiming at the multi-core heterogeneous SOC, zero copy of inter-process data of a server-client architecture can be realized, and load and delay of inter-process communication are effectively reduced.

Description

Inter-process communication method, system and chip based on multi-core heterogeneous SOC
Technical Field
The application relates to the technical field of vehicle-mounted intelligent cabins, in particular to an inter-process communication method, system and chip based on multi-core heterogeneous SOC.
Background
In a conventional vehicle-mounted scheme, a plurality of SOCs (System On chips) run a plurality of operating systems, and inter-process communication requires that inter-process data be copied from a user space of a transmitting end to a kernel space and then the inter-process data be secondarily copied from the kernel space to a user space of a receiving end. The problems of high load and high delay caused by multiple data copies are particularly remarkable for inter-process communication with large data volume.
With the development of vehicle-mounted intelligent cabin technology, the multi-core heterogeneous SOC gradually replaces the traditional scheme that a plurality of SOCs run a plurality of operating systems due to the advantages of high efficiency, high flexibility and the like. In a multi-core heterogeneous SOC, multiple hardware domains are isolated from each other, where multiple systems run. However, for inter-process communication, there are still problems of high load and delay, especially for application scenarios where the inter-process communication data volume is large. Therefore, how to provide an inter-process communication method specially used for multi-core heterogeneous SOC, so as to reduce load and delay, becomes a problem to be solved.
Disclosure of Invention
In order to solve at least one problem in the prior art, the application aims to provide an inter-process communication method, system and chip based on multi-core heterogeneous SOC, which are used for realizing zero copy of inter-process data of a server-client architecture aiming at the multi-core heterogeneous SOC while ensuring flexible and efficient communication, effectively reducing load and delay of inter-process communication and having particularly remarkable effect on application scenes with large inter-process communication data volume.
In order to achieve the above object, the present application provides an inter-process communication method based on a multi-core heterogeneous SOC configured with at least two hardware domains, a server system and a client system being configured on different hardware domains; the client systems include at least two client systems; the method may include the steps of,
A first client of a first client system for inter-process communication of inter-process data to be transmitted determines a data amount of the inter-process data;
in response to the data amount being greater than or equal to a data amount threshold, the inter-process data is stored in a shared memory of the multi-core heterogeneous SOC;
In response to determining that the client system to receive the inter-process data is a second client system, the first client sends first inter-process information and data address information of the inter-process data to a server side of the server system for inter-process communication through inter-core communication;
the server side sends the first inter-process information and the data address information to a second client side of the second client system for inter-process communication through the inter-core communication based on the received first inter-process information;
and the second client reads the stored inter-process data according to the received data address information.
Further, the method includes, in response to the amount of data being less than a data amount threshold, storing the inter-process data in a Mailbox memory.
Further, the method also comprises the steps of,
The first client determines the security level of the inter-process data;
In response to the data amount being less than the data amount threshold and the inter-process data being a high security level, the inter-process data is stored in a Mailbox memory.
Further, the first inter-process information includes a system number of the second client system, and a process name and communication mode information corresponding to the inter-process data; the communication mode information is shared memory communication or Mailbox memory communication.
Further, the first inter-process information includes a system registration number and a domain registration number; after the step of storing the inter-process data in the shared memory, the method further comprises,
Based on the corresponding process identification number and process name, the first client and the second client register the inter-process data respectively to generate the corresponding system registration number;
The first client and the second client respectively submit the respective system registration number and domain name information to the server through the inter-core communication and register to generate the domain registration number.
Further, the method also comprises the steps of,
In response to determining that the client system to receive the inter-process data is a first client system, the first client reading the stored inter-process data via the inter-core communication based on second inter-process information and the data address information;
The second inter-process information comprises a process name and communication mode information corresponding to the inter-process data; and the communication mode information is shared memory communication or Mailbox memory communication.
Further, the method also comprises the steps of,
Starting an operating system of the multi-core heterogeneous SOC;
The client side of the client system performs handshake with the server side through the inter-core communication respectively;
the client sends inter-process client information to the server through the inter-core communication respectively; the inter-process client information comprises corresponding inter-process client name information and identification number information of a client system.
Further, the method also comprises the steps of,
After the step that the inter-process data is stored in the shared memory, the first client writes a Mailbox register to inform the second client to read the inter-process data;
And after the second client reads the stored inter-process data according to the received data address information, the Mailbox register is cleared to inform the first client that the reading is completed.
In order to achieve the above object, the present application further provides an inter-process communication system based on a multi-core heterogeneous SOC configured with at least two hardware domains, a server system and a client system being configured on different hardware domains; the client systems include at least two client systems; the system may be comprised of a plurality of devices,
A first client for inter-process communication of a first client system for transmitting inter-process data, configured to determine a data amount of the inter-process data, and in response to the data amount being equal to or greater than a data amount threshold, store the inter-process data in a shared memory of the multi-core heterogeneous SOC, and in response to determining that the client system for receiving the inter-process data is a second client system, transmit first inter-process information and data address information of the inter-process data to a server side for inter-process communication of the server system through inter-core communication;
A server side of a server system sends the first inter-process information and the data address information to a second client side of the second client system for inter-process communication through the inter-core communication based on the first inter-process information;
and the second client of the second client system is used for reading the stored inter-process data according to the received data address information.
In order to achieve the above object, the present application further provides a multi-core heterogeneous system chip configured with at least two hardware domains, the server system and the client system being configured on different hardware domains; the client systems include at least two client systems; the system chip comprises the inter-process communication system based on the multi-core heterogeneous SOC.
According to the inter-process communication method based on the multi-core heterogeneous SOC, the data volume of inter-process data is determined through a first client of a first client system for sending the inter-process data; and the inter-process data is stored in the shared memory of the multi-core heterogeneous SOC in response to the data amount being greater than or equal to the data amount threshold; and transmitting, by the first client, first inter-process information and data address information of the inter-process data to a server side of the server system for inter-process communication through inter-core communication in response to determining that the client system to receive the inter-process data is the second client system; the server end sends the first inter-process information and the data address information to a second client end of the second client system through inter-core communication based on the received first inter-process information; and reading the stored inter-process data according to the received data address information through the second client. Therefore, the communication is flexible and efficient, zero copy of inter-process data of a server-client architecture is realized for the multi-core heterogeneous SOC, load and delay of inter-process communication are effectively reduced, and the effect is particularly remarkable for an application scene with large inter-process communication data volume.
Additional features and advantages of the application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the application.
Drawings
The accompanying drawings are included to provide a further understanding of the application and are incorporated in and constitute a part of this specification, illustrate the application and together with the embodiments of the application, and do not limit the application. In the drawings:
FIG. 1 is a block diagram of inter-process communication in the related art;
FIG. 2 is a flow chart of a method of inter-process communication based on multi-core heterogeneous SOCs according to an embodiment of the application;
FIG. 3 is a flow chart of a method of inter-process communication based on multi-core heterogeneous SOCs according to another embodiment of the application;
FIG. 4 is a block diagram of inter-process communication based on multi-core heterogeneous SOCs in accordance with an embodiment of the present application;
FIG. 5 is a block diagram of interprocess communication services registration according to an embodiment of the application;
FIG. 6 is a block diagram of an inter-process communication system based on a multi-core heterogeneous SOC according to an embodiment of the present application;
fig. 7 is a block diagram of a multi-core heterogeneous system chip according to an embodiment of the present application.
Detailed Description
Embodiments of the present application will be described in more detail below with reference to the accompanying drawings. While the application is susceptible of embodiment in the drawings, it is to be understood that the application may be embodied in various forms and should not be construed as limited to the embodiments set forth herein, but rather are provided to provide a more thorough and complete understanding of the application. It should be understood that the drawings and embodiments of the application are for illustration purposes only and are not intended to limit the scope of the present application.
The term "including" and variations thereof as used herein are intended to be open-ended, i.e., including, but not limited to. The term "based on" is "based at least in part on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments. Related definitions of other terms will be given in the description below.
It should be noted that the terms "first," "second," and the like herein are merely used for distinguishing between different devices, systems, or data and not for limiting the order or interdependence of the functions performed by such devices, systems, or data.
It should be noted that references to "one", "a plurality" and "a plurality" in this disclosure are intended to be illustrative rather than limiting, and those skilled in the art will appreciate that "one or more" is intended to be construed as "one or more" unless the context clearly indicates otherwise. "plurality" is understood to mean two or more.
Firstly, it should be noted that, in the conventional vehicle-mounted technology, a plurality of SOCs run a plurality of operating systems, which has poor communication efficiency and flexibility. Also, as shown in fig. 1, in the conventional in-vehicle scheme, the inter-process communication generally needs to copy the inter-process data from the user space 110 of the transmitting end to the kernel buffer 121 in the kernel space 120, and then copy the inter-process data from the kernel buffer 121 to the user space 130 of the receiving end twice. The defects of high load and high delay caused by multiple data copies are particularly remarkable in the inter-process communication with large data volume.
Based on the method, the system and the chip for interprocess communication based on the multi-core heterogeneous SOC, the communication flexibility and the high efficiency are ensured, zero copy of interprocess data of a server-client architecture is realized for the multi-core heterogeneous SOC, the load and the time delay of interprocess communication are effectively reduced, and the effect is particularly remarkable for an application scene with large interprocess communication data volume.
It should be noted that, the method of the present application is configured to run on a multi-core heterogeneous system chip, where the system chip includes a plurality of hardware resources, where the hardware resources include computing type hardware resources, for example, CPU cores, GPU cores, etc., storage type hardware resources, for example, memories, etc., control type hardware resources, for example, power controllers, clock controllers, interrupt controllers, etc., and communication type hardware resources, for example, buses, etc. The plurality of hardware resources are configured as a plurality of hardware sets, each hardware set configured to run a different operating system, each hardware set not responsive to data access requests of other hardware sets, nor to scheduling of other operating systems other than the operating system configured on the present hardware set. The system chip is also provided with hardware resources supporting communication between different hardware sets, namely an inter-core communication channel, wherein the hardware resources are configured to support data transmission or reading requests of hardware in the different hardware sets so as to support establishment of data communication links between different operating systems, realize data transmission across the hardware resources and information communication across the operating systems. The inter-process communication method is realized based on an inter-core communication channel.
In the present application, a multi-core heterogeneous SOC is configured with at least two hardware domains and multiple operating systems. Wherein the plurality of operating systems includes a server system and at least two client systems. The server system is configured with a server end for interprocess communication, which is used as a server end of the client system and used as an interprocess communication message hub for communication management; the client system is provided with a client for inter-process communication and is used for managing intra-system and inter-system communication.
Also, the server system and the client system are configured on different hardware domains. It is to be understood that at least two client systems may be configured on the same hardware domain or may be configured on different hardware domains, and the present application is not limited in this regard.
Hereinafter, embodiments of the present application will be described in detail with reference to the accompanying drawings.
Fig. 2 is a flowchart of an inter-process communication method based on a multi-core heterogeneous SOC according to an embodiment of the present application, and the inter-process communication method based on a multi-core heterogeneous SOC of the present application will be described in detail with reference to fig. 2.
In step 201, a first client for inter-process communication of a first client system to which inter-process data is to be sent determines a data amount of the inter-process data.
The first client system is one client system on the multi-core heterogeneous SOC to send the data. The first client is a client arranged on the first client system. Inter-process data is data to be transmitted in the inter-process communication.
In step 202, in response to the amount of data being greater than or equal to the amount of data threshold, inter-process data is stored in a shared memory of the multi-core heterogeneous SOC.
That is, when the first client determines that the data amount of the inter-process data is large, the inter-process data is stored in the mapped memory address of the shared memory of the multi-core heterogeneous SOC. In a specific example, the data amount threshold may be configured to be 1KB. The shared memory may be a DDR (Double Data Rate Synchronous Dynamic Random Access Memory, double rate synchronous dynamic random access memory).
In step 203, in response to determining that the client system to receive the inter-process data is the second client system, the first client sends, through inter-core communication, first inter-process information and data address information of the inter-process data to a server side of the server system for inter-process communication.
Wherein the second client system is another client system different from the first client system in the multi-core heterogeneous SOC.
That is, when the first client determines that the current inter-process communication is a cross-system communication, the first inter-process information and the data address information of the current inter-process communication are sent to the server side of the server system through inter-core communication.
The first inter-process information includes a system number of the second client system, a process name and communication mode information corresponding to the inter-process data, and may further specifically include a process identification number (Process Identification, PID) corresponding to the inter-process data; the communication mode information is shared memory communication or Mailbox memory communication; data address information, which is a mapped memory address where the inter-process data is stored.
In step 204, the server side sends the first inter-process information and the data address information to a second client for inter-process communication of the second client system through inter-core communication based on the received first inter-process information.
That is, the server side determines the second client system to receive the data based on the received first inter-process information, and then transmits the data address information to the second client through inter-core communication.
In step 205, the second client reads the stored inter-process data according to the received data address information.
According to the inter-process communication method based on the multi-core heterogeneous SOC, the data volume of inter-process data is determined through a first client of a first client system for sending the inter-process data; and the inter-process data is stored in the shared memory of the multi-core heterogeneous SOC in response to the data amount being greater than or equal to the data amount threshold; and transmitting, by the first client, first inter-process information and data address information of the inter-process data to a server side of the server system for inter-process communication through inter-core communication in response to determining that the client system to receive the inter-process data is the second client system; the server end sends the first inter-process information and the data address information to a second client end of the second client system through inter-core communication based on the received first inter-process information; and reading the stored inter-process data according to the received data address information through the second client. Therefore, the communication is flexible and efficient, zero copy of inter-process data of a server-client architecture is realized for the multi-core heterogeneous SOC, load and delay of inter-process communication are effectively reduced, and the effect is particularly remarkable for an application scene with large inter-process communication data volume.
In one embodiment, the method further comprises, in response to the amount of data being less than the amount of data threshold, storing inter-process data in the Mailbox memory.
Specifically, the Mailbox memory is an on-chip memory of a Mailbox hardware device. In this embodiment, the load and delay of inter-process communication are further reduced by storing inter-process data with a small data amount in the Mailbox memory and storing inter-process data with a large data amount in the shared memory.
If the inter-process data is stored in the Mailbox memory, the data address information of the inter-process data is the mapping memory address of the corresponding Mailbox memory. And after the second client receives the data address information, reading the inter-process data stored in the Mailbox memory according to the data address information.
In another embodiment, as shown in fig. 3, the method further comprises,
In step 301, a first client determines a security level of inter-process data.
In response to the data amount being less than the data amount threshold and the inter-process data being a high security level, the inter-process data is stored in the Mailbox memory, step 302.
That is, before storing the inter-process data, the first client determines the data size and the security level of the inter-process data, and if the data size of the inter-process data is smaller and the security level is higher, the inter-process communication is performed through the Mailbox memory. Because the Mailbox memory has higher safety performance and faster transmission, the load and delay of the inter-process communication are further reduced, and the safety of the inter-process communication data can be ensured.
Specifically, the method may further include pre-configuring a security level of the inter-process data. In a specific example, the inter-process data corresponding to the vehicle body control information and the vehicle body safety information, which are communicated through the CAN bus, may be preconfigured to a high safety level.
In the embodiment of the application, the first inter-process information comprises a system registration number and a domain registration number. After the step of storing the inter-process data in the shared memory, the method further comprises: based on the corresponding process identification number and process name, the first client side and the second client side register inter-process data respectively to generate corresponding system registration numbers; the first client and the second client respectively submit the respective system registration number and domain name information to the server through inter-core communication and register to generate a domain registration number.
It should be noted that, for specific inter-process data, the system registration numbers generated by the first client/the second client respectively are unique; the domain registration number generated by the server side is also unique. Therefore, for inter-process communication across systems, the server side can manage inter-process communication and maintain a list based on the domain registration numbers corresponding to one by one; the client is also capable of list maintenance of inter-process communications based on a one-to-one system registration number. Thus, convenience and reliability of inter-process communication based on multi-core heterogeneous SOC can be improved.
In an embodiment of the present application, the method further includes, in response to determining that the client system to receive the inter-process data is the first client system, the first client reading the stored inter-process data via inter-core communication based on the second inter-process information and the data address information.
The second inter-process information comprises a process name and communication mode information corresponding to inter-process data; and the communication mode information is shared memory communication or Mailbox memory communication.
That is, for inter-process communication within the same client system, instead of the server system, based on the aforementioned communication type selection policy (such as considering the data amount in the above embodiment, or considering the data amount and security), inter-core communication may be directly performed through shared memory communication or Mailbox memory communication, so as to further reduce the load and delay of inter-process communication of the multi-core heterogeneous SOC.
In a particular example, intra-system or inter-process communication may send data to a remote end by invoking an interface.
In the embodiment of the application, the method further comprises the following steps: starting an operating system of the multi-core heterogeneous SOC; the client side of the client system performs handshake with the server side through inter-core communication respectively; and the client side sends the inter-process client side information to the server side through inter-core communication respectively.
The inter-process client information comprises corresponding inter-process client name information and identification number information of a client system.
In the embodiment of the application, the method further comprises the following steps: after the step that the inter-process data is stored in the shared memory, the first client writes the Mailbox register to inform the second client to read the inter-process data; and after the second client reads the stored inter-process data according to the received data address information, the Mailbox register is cleared to inform the first client that the reading is completed.
In a specific example, as shown in fig. 4, i.e., the client system performs memory mapping on the inter-process data through the transmit buffer (TXBUFFER) or the receive buffer (RXBUFFER) on the shared memory or the Mailbox memory based on a certain communication policy. And the delay of inter-process communication of the multi-core heterogeneous SOC can be further reduced through a Mailbox interrupt mode between client systems.
The application will be further illustrated and described by means of a specific example.
FIG. 5 is a block diagram of inter-process communication service registration based on a multi-core heterogeneous SOC according to this particular embodiment. Referring to fig. 5, when the operating system of the multi-core heterogeneous SOC is started, clients (client IPCCLIENT ) of the plurality of client systems (client system OS1, client system OS 2) handshake with a server side IPCSERVICE of the server system OS by inter-core communication, respectively. The server system OS, the client system OS1 and the client system OS2 are respectively preconfigured with corresponding memory addresses Addr0, addr1 and Addr2 in the Mailbox. The plurality of clients (client IPCCLIENT, client IPCCLIENT 2) respectively transmit corresponding inter-process client name information (client IPCCLIENT, client IPCCLIENT 2) and identification number information (client system OS1, client system OS 2) of their client systems to the server IPCSERVICE through inter-core communication, so that the respective operating systems respectively establish inter-process communication services.
In practice, when the client system 1 needs to perform inter-process communication, a registration request is first performed to the local client IPCCLIENT and the process information is submitted, which specifically includes the process information such as the operating system number (client system 1) where the process 1 is located, the process name (process 1), the communication mode (shared memory or Mailbox memory), and the like, and the client IPCCLIENT generates a unique system registration number 1 based on the process information. If the process 2 needing to read the data of the client system 2 submits corresponding process information to the client IPCCLIENT2 in the client system 2, the client IPCCLIENT generates a system registration number 2 unique to the inter-process communication. So that clients IPCCLIENT, IPCCLIENT maintain information through the list.
The client IPCCLIENT, the client IPCCLIENT2 submit the respective system registration number and domain name information to the server side IPCSERVICE in the server system OS, and the server side IPCSERVICE generates a domain registration number unique to the inter-process communication based on the system registration number and domain name information so that the server side IPCSERVICE maintains the communication information through the list.
When the client system 1 needs inter-process communication, the client IPCCLIENT1 determines a communication mode, that is, adopts shared memory communication or Mailbox memory communication, based on the data amount and the security level of the inter-process data. Data address information and inter-process information (e.g., process name, process identification number, and client system number) are then obtained.
If the client IPCCLIENT determines that the cross-system communication is performed, the data address information and the inter-process information are sent to the server IPCSERVICE in the server system OS. The server IPCSERVICE determines that the client system of the data to be received is OS2 based on the received inter-process information, and transmits the data address information and the inter-process information to the client IPCCLIENT2, so that the client IPCCLIENT2 reads the inter-process data through inter-core communication. And if the client IPCCLIENT determines that the inter-process data is in intra-system communication, the inter-process data is read through inter-core communication according to the data address information and the inter-process information.
In summary, according to the inter-process communication method based on the multi-core heterogeneous SOC of the embodiment of the present application, the data amount of the inter-process data is determined by the first client of the first client system to be sent of the inter-process data; and the inter-process data is stored in the shared memory of the multi-core heterogeneous SOC in response to the data amount being greater than or equal to the data amount threshold; and transmitting, by the first client, first inter-process information and data address information of the inter-process data to a server side of the server system for inter-process communication through inter-core communication in response to determining that the client system to receive the inter-process data is the second client system; the server end sends the first inter-process information and the data address information to a second client end of the second client system through inter-core communication based on the received first inter-process information; and reading the stored inter-process data according to the received data address information through the second client. Therefore, the communication is flexible and efficient, zero copy of inter-process data of a server-client architecture is realized for the multi-core heterogeneous SOC, load and delay of inter-process communication are effectively reduced, and the effect is particularly remarkable for an application scene with large inter-process communication data volume.
FIG. 6 is a block diagram of an inter-process communication system based on a multi-core heterogeneous SOC according to an embodiment of the present application. Referring to fig. 6, an inter-process communication system 400 based on a multi-core heterogeneous SOC includes: a first client 401 of a first client system, a server 402 of a server system and a second client 403 of a second client system.
The first client 401 for inter-process communication of the first client system to be sent is configured to determine a data amount of the inter-process data, store the inter-process data in a shared memory of the multi-core heterogeneous SOC in response to the data amount being greater than or equal to a data amount threshold, and send, by inter-core communication, first inter-process information and data address information of the inter-process data to a server 402 for inter-process communication of the server system in response to determining that the client system to be received is the second client system.
The server side 402 of the server system transmits the first inter-process information and the data address information to the second client side 403 for inter-process communication of the second client system through inter-core communication based on the first inter-process information.
The second client 403 of the second client system is configured to read the stored inter-process data according to the received data address information.
In the embodiment of the present application, the first client 401 is further configured to: in response to the amount of data being less than the amount of data threshold, inter-process data is stored in the Mailbox memory.
In the embodiment of the present application, the first client 401 is further configured to: determining the security level of the inter-process data; in response to the amount of data being less than the amount of data threshold and the inter-process data being a high security level, the inter-process data is stored in the Mailbox memory.
In the embodiment of the application, the first inter-process information comprises a system registration number and a domain registration number. The first client 401 and the second client 403 are respectively for: after the step that the inter-process data is stored in the shared memory, respectively registering the inter-process data based on the corresponding process identification number and the corresponding process name to generate a corresponding system registration number; the respective system registration number and domain name information are submitted to the server side 402 through inter-core communication, and registered, to generate a domain registration number.
In the embodiment of the present application, the first client 401 is further configured to: in response to determining that the client system to receive the inter-process data is the first client system, the stored inter-process data is read via inter-core communication based on the second inter-process information and the data address information. The second inter-process information comprises a process name and communication mode information corresponding to inter-process data; and the communication mode information is shared memory communication or Mailbox memory communication.
In the embodiment of the present application, the first client 401 and the second client 403 are respectively used for: after the operating systems of the multi-core heterogeneous SOC are started, handshaking is carried out with the server side 402 through inter-core communication respectively; inter-process client information is sent to the server side 402 via inter-core communications, respectively. The inter-process client information comprises corresponding inter-process client name information and identification number information of a client system.
In the embodiment of the present application, the first client 401 is further configured to: after the inter-process data is stored in the shared memory, the Mailbox register is written to inform the second client 403 to read the inter-process data. The second client 403 is further configured to: after reading the stored inter-process data according to the received data address information, the Mailbox register is cleared to notify the first client 401 that the reading is completed.
It should be noted that, the explanation of the inter-process communication method based on the multi-core heterogeneous SOC in the above embodiment is also applicable to the inter-process communication system based on the multi-core heterogeneous SOC in the above embodiment, and will not be repeated here.
Fig. 7 is a block diagram of a multi-core heterogeneous system chip according to an embodiment of the present application. Referring to fig. 7, a multi-core heterogeneous system chip 500 is configured with at least two hardware domains 510, and a server system 520 and a client system 530 are configured on different hardware domains 510; the number of client systems 530 is at least two; the system chip 500 includes the inter-process communication system based on the multi-core heterogeneous SOC in the above-described embodiment.
It should be understood that, although the steps in the flowcharts of the specification are shown in order as indicated by the arrows, these steps are not necessarily performed in order as indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly stated herein, and the steps may be executed in other orders. Moreover, at least a portion of the steps in the flowcharts may include a plurality of sub-steps or stages that are not necessarily performed at the same time, but may be performed at different times, the order in which the sub-steps or stages are performed is not necessarily sequential, and may be performed in turn or alternately with at least a portion of the sub-steps or stages of other steps or other steps.
It is noted that the specific values mentioned above are only for the purpose of illustrating the implementation of the present application in detail and should not be construed as limiting the present application. In other examples or embodiments or examples, other values may be selected according to the present application, without specific limitation.
Those of ordinary skill in the art will appreciate that: the above is only a preferred embodiment of the present application, and the present application is not limited thereto, but it is to be understood that the present application is described in detail with reference to the foregoing embodiments, and modifications and equivalents of some of the technical features described in the foregoing embodiments may be made by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the protection scope of the present application.

Claims (10)

1. An inter-process communication method based on a multi-core heterogeneous SOC is characterized in that the multi-core heterogeneous SOC is configured with at least two hardware domains, and a server system and a client system are configured on different hardware domains; the client systems include at least two client systems; the method may include the steps of,
A first client of a first client system for inter-process communication of inter-process data to be transmitted determines a data amount of the inter-process data;
in response to the data amount being greater than or equal to a data amount threshold, the inter-process data is stored in a shared memory of the multi-core heterogeneous SOC;
In response to determining that the client system to receive the inter-process data is a second client system, the first client sends first inter-process information and data address information of the inter-process data to a server side of the server system for inter-process communication through inter-core communication;
the server side sends the first inter-process information and the data address information to a second client side of the second client system for inter-process communication through the inter-core communication based on the received first inter-process information;
and the second client reads the stored inter-process data according to the received data address information.
2. The method of claim 1, further comprising,
In response to the amount of data being less than the data amount threshold, the inter-process data is stored in a Mailbox memory.
3. The method of claim 1, further comprising,
The first client determines the security level of the inter-process data;
In response to the data amount being less than the data amount threshold and the inter-process data being a high security level, the inter-process data is stored in a Mailbox memory.
4. The method of claim 1, wherein the first inter-process information includes a system number of the second client system, and a process name and communication mode information corresponding to the inter-process data; the communication mode information is shared memory communication or Mailbox memory communication.
5. The method of claim 1, wherein the first inter-process information comprises a system registration number and a domain registration number; after the step of storing the inter-process data in the shared memory, the method further comprises,
Based on the corresponding process identification number and process name, the first client and the second client register the inter-process data respectively to generate the corresponding system registration number;
The first client and the second client respectively submit the respective system registration number and domain name information to the server through the inter-core communication and register to generate the domain registration number.
6. The method of claim 1, further comprising,
In response to determining that the client system to receive the inter-process data is a first client system, the first client reading the stored inter-process data via the inter-core communication based on second inter-process information and the data address information;
The second inter-process information comprises a process name and communication mode information corresponding to the inter-process data; and the communication mode information is shared memory communication or Mailbox memory communication.
7. The method of claim 1, further comprising,
Starting an operating system of the multi-core heterogeneous SOC;
The client side of the client system performs handshake with the server side through the inter-core communication respectively;
the client sends inter-process client information to the server through the inter-core communication respectively; the inter-process client information comprises corresponding inter-process client name information and identification number information of a client system.
8. The method of any one of claims 1-7, further comprising,
After the step that the inter-process data is stored in the shared memory, the first client writes a Mailbox register to inform the second client to read the inter-process data;
And after the second client reads the stored inter-process data according to the received data address information, the Mailbox register is cleared to inform the first client that the reading is completed.
9. An inter-process communication system based on a multi-core heterogeneous SOC, wherein the multi-core heterogeneous SOC is configured with at least two hardware domains, and a server system and a client system are configured on different hardware domains; the client systems include at least two client systems; the system may be comprised of a plurality of devices,
A first client for inter-process communication of a first client system for transmitting inter-process data, configured to determine a data amount of the inter-process data, and in response to the data amount being equal to or greater than a data amount threshold, store the inter-process data in a shared memory of the multi-core heterogeneous SOC, and in response to determining that the client system for receiving the inter-process data is a second client system, transmit first inter-process information and data address information of the inter-process data to a server side for inter-process communication of the server system through inter-core communication;
The server side of the server system sends the first inter-process information and the data address information to a second client side of the second client system for inter-process communication through the inter-core communication based on the received first inter-process information;
and the second client of the second client system is used for reading the stored inter-process data according to the received data address information.
10. A multi-core heterogeneous system chip, wherein the system chip is configured with at least two hardware domains, and a server system and a client system are configured on different hardware domains; the client systems include at least two client systems; the system-on-chip includes the inter-process communication system based on multi-core heterogeneous SOC of claim 9.
CN202410525489.8A 2024-04-29 2024-04-29 Inter-process communication method, system and chip based on multi-core heterogeneous SOC Active CN118113496B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202410525489.8A CN118113496B (en) 2024-04-29 2024-04-29 Inter-process communication method, system and chip based on multi-core heterogeneous SOC

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202410525489.8A CN118113496B (en) 2024-04-29 2024-04-29 Inter-process communication method, system and chip based on multi-core heterogeneous SOC

Publications (2)

Publication Number Publication Date
CN118113496A true CN118113496A (en) 2024-05-31
CN118113496B CN118113496B (en) 2024-08-02

Family

ID=91219600

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202410525489.8A Active CN118113496B (en) 2024-04-29 2024-04-29 Inter-process communication method, system and chip based on multi-core heterogeneous SOC

Country Status (1)

Country Link
CN (1) CN118113496B (en)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114595186A (en) * 2022-05-09 2022-06-07 深圳比特微电子科技有限公司 Inter-core communication method and communication device of multi-core processor
CN115098436A (en) * 2022-08-24 2022-09-23 北京智芯微电子科技有限公司 Multi-core SoC and relay protection method and system
CN115580644A (en) * 2022-12-07 2023-01-06 北京小米移动软件有限公司 Method, apparatus, device and storage medium for communication between client systems in host
CN115811536A (en) * 2023-02-07 2023-03-17 南京芯驰半导体科技有限公司 Automobile central gateway system based on multi-core isomerism and implementation method
WO2023216077A1 (en) * 2022-05-09 2023-11-16 华为技术有限公司 Attestation method, apparatus and system
CN117931478A (en) * 2024-01-25 2024-04-26 武汉中观自动化科技有限公司 Inter-process communication method, inter-process communication device and storage medium

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114595186A (en) * 2022-05-09 2022-06-07 深圳比特微电子科技有限公司 Inter-core communication method and communication device of multi-core processor
WO2023216077A1 (en) * 2022-05-09 2023-11-16 华为技术有限公司 Attestation method, apparatus and system
CN115098436A (en) * 2022-08-24 2022-09-23 北京智芯微电子科技有限公司 Multi-core SoC and relay protection method and system
CN115580644A (en) * 2022-12-07 2023-01-06 北京小米移动软件有限公司 Method, apparatus, device and storage medium for communication between client systems in host
CN115811536A (en) * 2023-02-07 2023-03-17 南京芯驰半导体科技有限公司 Automobile central gateway system based on multi-core isomerism and implementation method
CN117931478A (en) * 2024-01-25 2024-04-26 武汉中观自动化科技有限公司 Inter-process communication method, inter-process communication device and storage medium

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
周强;: "多核异构系统核间通信概要设计", 中国集成电路, no. 1, 5 February 2020 (2020-02-05) *

Also Published As

Publication number Publication date
CN118113496B (en) 2024-08-02

Similar Documents

Publication Publication Date Title
CN110647480B (en) Data processing method, remote direct access network card and equipment
EP3748510A1 (en) Network interface for data transport in heterogeneous computing environments
CN112099941B (en) Method, equipment and system for realizing hardware acceleration processing
US8478926B1 (en) Co-processing acceleration method, apparatus, and system
US7502826B2 (en) Atomic operations
JP4768386B2 (en) System and apparatus having interface device capable of data communication with external device
CN113485823A (en) Data transmission method, device, network equipment and storage medium
CN106648896B (en) Method for dual-core sharing of output peripheral by Zynq chip under heterogeneous-name multiprocessing mode
US20080168443A1 (en) Virtual Devices Using a Plurality of Processors
CN109960671B (en) Data transmission system, method and computer equipment
CA2241994A1 (en) System and method for efficient remote disk i/o
CN112948149A (en) Remote memory sharing method and device, electronic equipment and storage medium
CN111404931B (en) Remote data transmission method based on persistent memory
CN102291298A (en) Efficient computer network communication method oriented to long message
GB2396450A (en) Data bus system and method for performing cross-access between buses
CN118113496B (en) Inter-process communication method, system and chip based on multi-core heterogeneous SOC
CN110445580B (en) Data transmission method and device, storage medium, and electronic device
CN114610660A (en) Method, device and system for controlling interface data
CN116418848A (en) Method and device for processing configuration and access requests of network nodes
JPH09269934A (en) Data matching method and transmitting system for common memory
CN115033405A (en) Inter-process data transmission method, process, electronic device and storage medium
EP4429213A2 (en) Network interface for data transport in heterogeneous computing environments
WO2024179298A1 (en) Cross-cabinet server memory pooling method, apparatus and device, server, and medium
JP2664827B2 (en) Real-time information transfer control method
CN111953774A (en) Temporary storage access method, network device and network system

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant