CN118068947A - Multi-path server power derating method based on processor - Google Patents

Multi-path server power derating method based on processor Download PDF

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Publication number
CN118068947A
CN118068947A CN202410212166.3A CN202410212166A CN118068947A CN 118068947 A CN118068947 A CN 118068947A CN 202410212166 A CN202410212166 A CN 202410212166A CN 118068947 A CN118068947 A CN 118068947A
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power supply
target
cpu
derating
working mode
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迟晓博
何彦
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Lenovo Changfeng Technology Beijing Co Ltd
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Lenovo Changfeng Technology Beijing Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Power Sources (AREA)

Abstract

The application provides a multi-path server power derating method based on a processor, which relates to the technical field of servers and comprises the following steps: acquiring external power supply environment information of a target multipath CPLD; acquiring multimode working modes of a target multipath CPLD; comparing the external power supply environment information with the calibration power supply information, and carrying out multi-path CPU working mode matching based on the comparison result to obtain a target CPU working mode; and starting a target CPU working mode, and running the target multipath CPLD in the target CPU working mode. The application can solve the technical problem that the system of the multipath server can not be started up because insufficient power supply equipment is provided under the extremely special conditions of earthquake, main power supply out of control and the like in the prior art. Under the special environment of insufficient power supply, the most basic functions can be realized by using only a single main CPU, so that the technical effects of reducing power consumption of the power supply and maintaining part of main functions are achieved.

Description

Multi-path server power derating method based on processor
Technical Field
The application relates to the technical field of servers, in particular to a multi-path server power derating method based on a processor.
Background
In many cases, the outdoor power supply capability of the server product is insufficient under the actual use condition, or the total power consumption of the input power source distributed by the system equipment is limited, so that the normal nominal design power consumption requirement cannot be met. Special cases are required, normally in situations where performance/functionality may be reduced. This requires that the server device not only meets the standard normal use conditions in the case of normal external power supply, but also meets the requirements that in the case of special situations, in particular in the case of special external power supply insufficiency, the device and the important partial functions thereof can be used in a substantially normal manner when the partial functions can be discarded.
The conventional power consumption derating condition of the multi-path server product is basically used for reducing the main frequency of 2 or more CPUs under a conventional machine room or a conventional environment with normal environmental conditions, and the power consumption derating is realized by dynamically adjusting the working frequency of the CPUs.
In summary, in the prior art, there is a technical problem that the system of the multi-path server cannot be started up due to insufficient power supply equipment in the very special situations such as earthquake, out-of-control of the main power supply, and the like.
Disclosure of Invention
The application aims to provide a multi-path server power derating method based on a processor, which is used for solving the technical problem that the system startup of the multi-path server cannot be realized because insufficient power supply equipment is available under the extremely special conditions of earthquake, main power supply out of control and the like in the prior art.
In view of the foregoing, the present application provides a method for derating power of a multi-path server based on a processor.
In a first aspect, the present application provides a method for derating power of a multi-path server based on a processor, the method being implemented by a multi-path server power derating system based on a processor, wherein the method includes: acquiring external power supply environment information of a target multipath CPLD; acquiring multimode working modes of the target multipath CPLD; comparing the external power supply environment information with the calibration power supply information, and performing multi-path CPU working mode matching based on the comparison result to obtain a target CPU working mode; and starting the target CPU working mode, and operating the target multipath CPLD in the target CPU working mode.
In a second aspect, the present application further provides a processor-based multi-server power derating system for performing a processor-based multi-server power derating method according to the first aspect, wherein the system comprises: the external power supply environment acquisition module is used for acquiring external power supply environment information of the target multipath CPLD; the multimode working mode acquisition module is used for acquiring multimode working modes of the target multipath CPLD; the working mode matching module is used for comparing the external power supply environment information with the calibration power supply information, and carrying out multi-path CPU working mode matching based on the comparison result to obtain a target CPU working mode; and the working mode starting module is used for starting the target CPU working mode, and the target multipath CPLD runs in the target CPU working mode.
In a third aspect, the present application also provides an electronic device, including:
At least one processor;
A memory communicatively coupled to the at least one processor;
Wherein the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the steps of the method of any one of the first aspects above.
In a fourth aspect, a computer readable storage medium having stored thereon a computer program which, when executed, implements the steps of the method of any of the first aspects above.
One or more technical schemes provided by the application have at least the following technical effects or advantages:
acquiring external power supply environment information of a target multipath CPLD; acquiring multimode working modes of the target multipath CPLD; comparing the external power supply environment information with the calibration power supply information, and performing multi-path CPU working mode matching based on the comparison result to obtain a target CPU working mode; and starting the target CPU working mode, and operating the target multipath CPLD in the target CPU working mode. All other CPUs except the main CPU are turned off through direct control of the controllable CPLD, so that the function of turning off the source is realized, and the most basic function can be realized by only a single main CPU under the special environment of insufficient power supply, thereby achieving the technical effects of reducing power consumption and maintaining part of main functions.
The foregoing description is only an overview of the present application, and is intended to be implemented in accordance with the teachings of the present application in order that the same may be more clearly understood and to make the same and other objects, features and advantages of the present application more readily apparent. It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the application or to delineate the scope of the application. Other features of the present application will become apparent from the description that follows.
Drawings
In order to more clearly illustrate the application or the technical solutions of the prior art, the following brief description will be given of the drawings used in the description of the embodiments or the prior art, it being obvious that the drawings in the description below are only exemplary and that other drawings can be obtained from the drawings provided without the inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of a method for derating power of a multi-path server based on a processor according to the present application;
FIG. 2 is a schematic diagram of a processor-based multi-server power derating system according to the present application;
fig. 3 is a schematic structural view of an exemplary electronic device of the present application.
Reference numerals illustrate: the system comprises an external power environment acquisition module 11, a multimode operation mode acquisition module 12, an operation mode matching module 13, an operation mode starting module 14, a bus 300, a receiver 301, a processor 302, a transmitter 303 memory 304 and a bus interface 305.
Detailed Description
The application provides a multi-path server power derating method based on a processor, which solves the technical problem that the system of the multi-path server can not be started because insufficient power supply equipment is provided under the extremely special conditions of earthquake, main power supply out of control and the like in the prior art. All other CPUs except the main CPU are turned off through direct control of the controllable CPLD, so that the function of turning off the source is realized, and the most basic function can be realized by only a single main CPU under the special environment of insufficient power supply, thereby achieving the technical effects of reducing power consumption and maintaining part of main functions.
In the following, the technical solutions of the present application will be clearly and completely described with reference to the accompanying drawings, and it should be understood that the described embodiments are only some embodiments of the present application, but not all embodiments of the present application, and that the present application is not limited by the exemplary embodiments described herein. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application. It should be further noted that, for convenience of description, only some, but not all of the drawings related to the present application are shown.
Example 1
Referring to fig. 1, the present application provides a method for derating power of a multi-path server based on a processor, wherein the method is applied to a multi-path server power derating system based on a processor, and the method specifically comprises the following steps:
Step one: acquiring external power supply environment information of a target multipath CPLD;
Specifically, the application provides a multi-path server power derating method based on a processor, which is applied to a multi-path server power derating system based on the processor and is used for designing a CPU under the special condition of insufficient power so as to reduce power consumption of a power supply. The target multi-path CPLD is a server to be subjected to power derating analysis, and in short, only part of CPUs are started under the condition that the external power supply of the target multi-path CPLD is insufficient, for example, only the power supply function under a single CPU is started, so that the external power supply environment needs to be acquired, and the external power supply environment information including the external power supply voltage, the external power supply current and the like can be generated by acquiring the external power supply environment information through the existing sensor.
Step two: acquiring multimode working modes of the target multipath CPLD;
Specifically, the multimode operation mode of the target multi-path CPLD may be understood as a combination mode of multiple paths of CPUs, and if the target multi-path CPLD is a two-path server, the corresponding multimode operation mode is a two-path CPU operation mode and a one-path CPU operation mode.
Step three: comparing the external power supply environment information with the calibration power supply information, and performing multi-path CPU working mode matching based on the comparison result to obtain a target CPU working mode;
Specifically, the external power supply environment information is compared with the calibration power supply information, and when the external power supply environment information does not meet the calibration power supply information, the power shortage is indicated, and at the moment, power derating analysis is needed, namely, a CPU working mode under the condition of insufficient matching power, such as a single-path CPU working mode, is used as a target CPU working mode.
Step four: and starting the target CPU working mode, and operating the target multipath CPLD in the target CPU working mode.
Specifically, the target CPU operation mode is an operation mode capable of reducing power consumption of an external power supply, the target multi-path CPLD operates in the target CPU operation mode, and directly provides no power under a special environment with insufficient power, so that unnecessary external power consumption is not consumed, the power consumption is reduced, and when insufficient power is supplied, a minimum system of the target multi-path CPLD under the limit condition is started, and basic main functions can be realized.
Further, the first step of the present application further comprises:
Constructing a power supply detection circuit, wherein the power supply detection circuit is connected with the target multipath CPLD; the power supply detection circuit comprises a fluctuation switch; and detecting the external power supply state of the target multipath CPLD through the fluctuation switch, and generating the external power supply environment information.
Specifically, the method for acquiring the external power supply environment information of the target multipath CPLD is as follows: firstly, the power state parameters which are definitely required to be detected can generally comprise power voltage, and then a fluctuation switch is selected, wherein the fluctuation switch is generally a mechanical switch and can be used for detecting the on-off state of a power line, and when the power line is connected, the fluctuation switch is closed; when the power line is disconnected, the ripple switch is opened. A simple power supply detection circuit is thus designed which uses a ripple switch to detect the state of the power supply line. For example, a resistor may be used to connect one contact of the ripple switch to one input pin of the target multi-way CPLD, and the other contact to ground. When the power supply is on, the fluctuation switch is closed, and the input pin of the target multipath CPLD is pulled down; when the power is disconnected, the ripple switch is turned on, and the input pin of the target multi-path CPLD is pulled high. The designed power supply detection circuit is connected to one or more input pins of the target multi-way CPLD. The power supply detection circuit can simply detect whether the pin is at a high level or a low level, so that the power supply state is accurately detected, and external power supply environment information is generated. Therefore, the environment detection of the external power supply is realized, and a foundation is laid for the subsequent power derating analysis.
Further, the second step of the present application further comprises:
Acquiring multi-path CPU structure information of the target multi-path CPLD; performing multi-level derating matching based on the multi-path CPU structure information to generate a multi-level derating decision scheme, wherein the multi-level derating decision scheme comprises a plurality of CPU topological structures; performing operation power environment marking on the multi-level derating decision scheme; the multimode operation mode is generated by the operation power environment marking result and the multi-level derating decision scheme.
Further, the application also comprises the following steps:
Acquiring CPU basic design information of the multi-level derating decision scheme; acquiring multi-path derating configuration information of the multi-stage derating decision scheme; and judging whether the CPU basic design information supports the multi-path derating configuration information, and updating the multi-level derating decision scheme based on a judging result.
Specifically, the method for obtaining the multimode working mode of the target multipath CPLD is as follows:
And acquiring multi-path CPU structure information, namely referring to a hardware document of the target multi-path CPLD, and extracting information such as CPU type, number, topological structure and the like of the target multi-path CPLD as multi-path CPU structure information. It should be noted that, if the CPU configuration information of the target multi-path CPLD may be read by software, a corresponding software tool may be used to obtain the CPU configuration information. And then carrying out multi-level derating matching based on the multi-path CPU structure information, namely determining the derating level to be supported, such as 8 paths, 4 paths, 2 paths, 1 path and the like, so as to generate a multi-level derating decision scheme, wherein the multi-level derating decision scheme comprises a plurality of CPU topological structures, and the multi-level derating decision scheme is simply understood that if the multi-path CPU structure information is an 8-path CPU structure, a plurality of derating modes of 8 paths/4 paths/2 paths/1 paths can be realized, and the CPU topological structure corresponding to the plurality of derating modes of 8 paths/4 paths/2 paths/1 paths.
The power supply environment marking is further carried out on the multi-level derating decision scheme, namely, a person skilled in the art analyzes the power supply environment of the multi-level derating decision scheme by combining the actual situation, the power supply environment is marked by the information such as power supply voltage, current and the like, an operation power supply environment marking result is generated, the operation power supply environment marking result has a corresponding relation with the multi-level derating decision scheme, and the multi-mode working mode is formed by the operation power supply environment marking result and the multi-level derating decision scheme. Each mode corresponds to a specific CPU topological structure and a power supply environment, and when the power supply environment changes, the power supply environment is automatically or manually switched to a proper working mode, so that the flexible switching of the working mode is realized, the working frequency of the power supply is dynamically regulated, and the technical effect of reducing the power consumption is realized.
Specifically, the method of generating a multi-level derating decision scheme further comprises: firstly, inquiring a hardware design document of a target multipath CPLD, and extracting CPU basic design information of a multi-level derating decision scheme, including information such as CPU model and the like. Based on the previously generated multi-level derating decision schemes, CPU configuration information of each derating decision scheme, such as core number, clock frequency, memory allocation and the like, is extracted as multi-path derating configuration information. Further, whether the CPU basic design information supports the multi-path derating configuration information is further judged, and the judgment result is specifically obtained by checking whether the number of CPU cores is enough, whether the clock frequency is adjustable, whether the memory and other resources are enough and the like.
If some derating configurations are found to be unsupported, it is necessary to adjust the multi-level derating decision scheme, such as deleting the unsupported derating decision scheme, to effect an update to the multi-level derating decision scheme.
Further, the third step of the present application further comprises:
Based on the comparison result, judging whether the external power supply environment information meets the calibration power supply information; if not, performing traversal matching in the multi-level derating decision scheme based on the operation power supply environment marking result and the external power supply environment information to obtain a matching derating scheme; and generating the target CPU working mode according to the matching derating scheme.
Specifically, based on the comparison result, whether the external power supply environment information meets the calibration power supply information or not is judged, namely whether the external power supply meets the requirement of normal operation of a system is judged, if the external power supply environment information does not meet the calibration power supply information, a multi-level derating decision scheme generated before traversal is performed, a derating scheme corresponding to the current external power supply environment information is searched, in the traversal process, an operation power supply environment marking result corresponding to the multi-level derating decision scheme marking is referred to, and the derating scheme corresponding to the external power supply environment information is rapidly screened out to serve as a matched derating scheme. And finally, taking the CPU topological structure in the matching derating scheme as a target CPU working mode. And then running in a target CPU working mode to realize power derating under the condition of insufficient power supply.
Further, the application also comprises the following steps:
If the external power supply environment information meets the calibration power supply information, acquiring a normal working mode of the target multipath CPLD; and restoring the power supply function of the target multi-path CPLD to a multi-path CPU cooperative working state in the normal working mode.
Specifically, when judging whether the external power supply environment information meets the calibration power supply information, if the external power supply environment information meets the calibration power supply information, acquiring a normal working mode of the target multi-path CPLD, wherein the normal working mode refers to a normal server state of the multi-path CPU cooperative work under the condition of sufficient power supply, and restoring the power supply function of the target multi-path CPLD to the multi-path CPU cooperative work state in the normal working mode, namely, after confirming that the external power supply environment meets the requirement of the normal working mode, starting to restore the power supply function of the target multi-path CPLD.
Further, the fourth step of the present application further comprises:
matching CPU resource allocation based on the target CPU working mode; and starting a CPU power supply function in the target CPU working mode according to the CPU resource configuration.
Specifically, the target CPU working mode is started, and the method for operating the target multi-path CPLD in the target CPU working mode is as follows: the CPU resource allocation refers to the allocation of FW resources such as BIOS of the CPU in the target CPU working mode, and the CPU power supply function in the target CPU working mode is further started according to the CPU resource allocation, namely, PCIE or other main functional equipment in the system is loaded on the CPU in the target CPU working mode only through the CPU in the target CPU working mode, so that the basic function use in the special environment with insufficient power supply can be realized. After determining the CPU resource configuration, the corresponding power management setting needs to be configured to ensure that the CPU can normally supply power in the target CPU working mode, namely, the CPU power function in the target CPU working mode is started. Meanwhile, the external power supply environment information can be continuously monitored, and when the external power supply environment information meets the calibration power supply information, the working mode is switched in real time, so that the flexible switching of the working mode is realized, the working frequency is dynamically adjusted, and the technical effect of reducing the power consumption is realized.
In summary, the method for derating power of a multi-path server based on a processor provided by the application has the following technical effects:
acquiring external power supply environment information of a target multipath CPLD; acquiring multimode working modes of the target multipath CPLD; comparing the external power supply environment information with the calibration power supply information, and performing multi-path CPU working mode matching based on the comparison result to obtain a target CPU working mode; and starting the target CPU working mode, and operating the target multipath CPLD in the target CPU working mode. All other CPUs except the main CPU are turned off through direct control of the controllable CPLD, so that the function of turning off the source is realized, and the most basic function can be realized by only a single main CPU under the special environment of insufficient power supply, thereby achieving the technical effects of reducing power consumption and maintaining part of main functions.
Example two
Based on the same inventive concept as the method for derating power of a multi-path server based on a processor in the foregoing embodiment, the present application further provides a system for derating power of a multi-path server based on a processor, referring to fig. 2, the system includes:
the external power supply environment acquisition module 11 is used for acquiring external power supply environment information of the target multipath CPLD;
the multimode working mode acquisition module 12 is used for acquiring multimode working modes of the target multipath CPLD;
The working mode matching module 13 is used for comparing the external power supply environment information with the calibration power supply information, and carrying out multi-path CPU working mode matching based on the comparison result to obtain a target CPU working mode;
The working mode starting module 14, the working mode starting module 14 is configured to start the target CPU working mode, and the target multi-path CPLD operates in the target CPU working mode.
Further, the external power environment acquisition module 11 in the system is further configured to:
constructing a power supply detection circuit, wherein the power supply detection circuit is connected with the target multipath CPLD;
The power supply detection circuit comprises a fluctuation switch;
and detecting the external power supply state of the target multipath CPLD through the fluctuation switch, and generating the external power supply environment information.
Further, the multimode operation mode acquisition module 12 in the system is further configured to:
acquiring multi-path CPU structure information of the target multi-path CPLD;
performing multi-level derating matching based on the multi-path CPU structure information to generate a multi-level derating decision scheme, wherein the multi-level derating decision scheme comprises a plurality of CPU topological structures;
performing operation power environment marking on the multi-level derating decision scheme;
The multimode operation mode is generated by the operation power environment marking result and the multi-level derating decision scheme.
Further, the multimode operation mode acquisition module 12 in the system is further configured to:
Acquiring CPU basic design information of the multi-level derating decision scheme;
Acquiring multi-path derating configuration information of the multi-stage derating decision scheme;
and judging whether the CPU basic design information supports the multi-path derating configuration information, and updating the multi-level derating decision scheme based on a judging result.
Further, the operation pattern matching module 13 in the system is further configured to:
based on the comparison result, judging whether the external power supply environment information meets the calibration power supply information;
if not, performing traversal matching in the multi-level derating decision scheme based on the operation power supply environment marking result and the external power supply environment information to obtain a matching derating scheme;
And generating the target CPU working mode according to the matching derating scheme.
Further, the operation pattern matching module 13 in the system is further configured to:
if the external power supply environment information meets the calibration power supply information, acquiring a normal working mode of the target multipath CPLD;
and restoring the power supply function of the target multi-path CPLD to a multi-path CPU cooperative working state in the normal working mode.
Further, the operation mode initiation module 14 in the system is further configured to:
matching CPU resource allocation based on the target CPU working mode;
and starting a CPU power supply function in the target CPU working mode according to the CPU resource configuration.
Various embodiments of the present disclosure are described in a progressive manner, and each embodiment focuses on the difference from the other embodiments, and a method and a specific example of the foregoing processor-based multi-server power derating method in the first embodiment of fig. 1 are equally applicable to a processor-based multi-server power derating system in the present embodiment, and by the foregoing detailed description of the foregoing processor-based multi-server power derating method, those skilled in the art will clearly know that a processor-based multi-server power derating system in the present embodiment, so that for brevity of the disclosure will not be described in detail herein. For the system disclosed in the embodiment, since the system corresponds to the method disclosed in the embodiment, the description is simpler, and the relevant points refer to the description of the method section.
Example III
Based on the inventive concept of the multi-server power derating method based on a processor in the foregoing embodiments, the present application further provides an electronic device, including: at least one processor; a memory communicatively coupled to the at least one processor; wherein the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the steps of the method of any one of the embodiments above.
Fig. 3 is a schematic structural diagram of an exemplary electronic device of the present application. In fig. 3, a bus architecture is represented by bus 300, where bus 300 may include any number of interconnected buses and bridges, with bus 300 connecting together various circuits, including one or more processors, represented by processor 302, and memory, represented by memory 304. Bus 300 may also connect together various other circuits such as peripherals, voltage regulators, and power management circuits, which are well known in the art, and therefore, will not be described any further herein. Bus interface 305 provides an interface between bus 300 and receiver 301 and transmitter 303. The receiver 301 and the transmitter 303 may be the same element, i.e. a transceiver, providing a means for communicating with various other apparatus over a transmission medium. The processor 302 is responsible for managing the bus 300 and general processing, while the memory 304 may be used to store data used by the processor 302 in performing operations.
Example IV
Based on the same inventive concept as the method for derating power of a multi-path server based on a processor in the foregoing embodiment, the present application further provides a computer readable storage medium, where a computer program is stored on the computer readable storage medium, and the computer program implements the steps of the method in any one of the foregoing embodiments when executed.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present application without departing from the spirit or scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the present application and the equivalent techniques thereof, the present application is also intended to include such modifications and variations.

Claims (10)

1. A method for derating power to a multi-way processor-based server, comprising:
acquiring external power supply environment information of a target multipath CPLD;
Acquiring multimode working modes of the target multipath CPLD;
Comparing the external power supply environment information with the calibration power supply information, and performing multi-path CPU working mode matching based on the comparison result to obtain a target CPU working mode;
And starting the target CPU working mode, and operating the target multipath CPLD in the target CPU working mode.
2. The method of claim 1, wherein the obtaining the external power environment information of the target multi-way CPLD comprises:
constructing a power supply detection circuit, wherein the power supply detection circuit is connected with the target multipath CPLD;
The power supply detection circuit comprises a fluctuation switch;
and detecting the external power supply state of the target multipath CPLD through the fluctuation switch, and generating the external power supply environment information.
3. The method of claim 1, wherein said obtaining the multimode operating mode of the target multi-way CPLD comprises:
acquiring multi-path CPU structure information of the target multi-path CPLD;
performing multi-level derating matching based on the multi-path CPU structure information to generate a multi-level derating decision scheme, wherein the multi-level derating decision scheme comprises a plurality of CPU topological structures;
performing operation power environment marking on the multi-level derating decision scheme;
The multimode operation mode is generated by the operation power environment marking result and the multi-level derating decision scheme.
4. The method of claim 3, wherein the generating a multi-level derating decision scheme based on the multi-path CPU structure information comprises:
Acquiring CPU basic design information of the multi-level derating decision scheme;
Acquiring multi-path derating configuration information of the multi-stage derating decision scheme;
and judging whether the CPU basic design information supports the multi-path derating configuration information, and updating the multi-level derating decision scheme based on a judging result.
5. The method of claim 4, wherein comparing the external power environment information with the calibration power information, and performing multi-path CPU operation pattern matching based on the comparison result, to obtain a target CPU operation pattern, comprises:
based on the comparison result, judging whether the external power supply environment information meets the calibration power supply information;
if not, performing traversal matching in the multi-level derating decision scheme based on the operation power supply environment marking result and the external power supply environment information to obtain a matching derating scheme;
And generating the target CPU working mode according to the matching derating scheme.
6. The method of claim 5, wherein the method further comprises:
if the external power supply environment information meets the calibration power supply information, acquiring a normal working mode of the target multipath CPLD;
and restoring the power supply function of the target multi-path CPLD to a multi-path CPU cooperative working state in the normal working mode.
7. The method of claim 1, wherein the enabling the target CPU operating mode in which the target multi-way CPLD operates comprises:
matching CPU resource allocation based on the target CPU working mode;
and starting a CPU power supply function in the target CPU working mode according to the CPU resource configuration.
8. A processor-based multi-server power derating system for implementing the steps of the method of any one of claims 1 to 7, the system comprising:
The external power supply environment acquisition module is used for acquiring external power supply environment information of the target multipath CPLD;
The multimode working mode acquisition module is used for acquiring multimode working modes of the target multipath CPLD;
The working mode matching module is used for comparing the external power supply environment information with the calibration power supply information, and carrying out multi-path CPU working mode matching based on the comparison result to obtain a target CPU working mode;
And the working mode starting module is used for starting the target CPU working mode, and the target multipath CPLD runs in the target CPU working mode.
9. An electronic device, comprising:
At least one processor;
A memory communicatively coupled to the at least one processor;
wherein the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the steps of the method of any one of claims 1 to 7.
10. A computer readable storage medium, characterized in that it has stored thereon a computer program which, when executed, implements the steps of the method according to any of claims 1 to 7.
CN202410212166.3A 2024-02-27 2024-02-27 Multi-path server power derating method based on processor Pending CN118068947A (en)

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