CN118053724A - Semiconductor processing equipment - Google Patents

Semiconductor processing equipment Download PDF

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Publication number
CN118053724A
CN118053724A CN202211406956.2A CN202211406956A CN118053724A CN 118053724 A CN118053724 A CN 118053724A CN 202211406956 A CN202211406956 A CN 202211406956A CN 118053724 A CN118053724 A CN 118053724A
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CN
China
Prior art keywords
ring
aligned
plasma region
semiconductor processing
processing apparatus
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Pending
Application number
CN202211406956.2A
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Chinese (zh)
Inventor
连增迪
倪图强
谢林
刘武平
吴狄
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Advanced Micro Fabrication Equipment Inc Shanghai
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Advanced Micro Fabrication Equipment Inc Shanghai
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Application filed by Advanced Micro Fabrication Equipment Inc Shanghai filed Critical Advanced Micro Fabrication Equipment Inc Shanghai
Priority to CN202211406956.2A priority Critical patent/CN118053724A/en
Priority to TW112140775A priority patent/TW202420395A/en
Publication of CN118053724A publication Critical patent/CN118053724A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32532Electrodes
    • H01J37/32568Relative arrangement or disposition of electrodes; moving means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32623Mechanical discharge control means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67017Apparatus for fluid treatment
    • H01L21/67063Apparatus for fluid treatment for etching
    • H01L21/67069Apparatus for fluid treatment for etching for drying etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67155Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67207Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
    • H01L21/67213Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process comprising at least one ion or electron beam chamber

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

A semiconductor processing apparatus comprising an alignment adjustment device comprising at least one drive unit comprising a fixed portion connected to an upper electrode assembly and a moving portion connected to a plasma region confinement ring or a plasma region confinement plate or an upper electrode ring disposed on the upper electrode assembly, the moving portion being movable relative to the fixed portion in a plane parallel to the substrate. The alignment adjusting device is used for accurately adjusting the positions of the plasma region limiting ring, the plasma region limiting plate or the upper electrode ring, so that the plasma region limiting ring, the plasma region limiting plate or the upper electrode ring is aligned with the substrate or the lower electrode assembly, and the edge etching precision is ensured.

Description

Semiconductor processing equipment
Technical Field
The present invention relates to a semiconductor processing apparatus.
Background
During the semiconductor manufacturing process, the edges of the substrate are prone to deposition of side reactants, which may crack, fall off, and contaminate the process environment and/or the substrate after they are deposited to some extent. Therefore, the semiconductor device is required to clean the edge of the substrate, and the plasma edge etching device is generally used to etch the edge of the substrate, i.e., edge etching. In this process, a plasma region confinement ring or plasma region confinement plate is required to improve the dimensional accuracy of the substrate edge etch. In the process of carrying out edge etching on a substrate, the plasma region limiting ring or the plasma region limiting plate and the substrate are required to keep high coaxiality, the substrate is conveyed into the reaction cavity by the mechanical arm, after the substrate is placed on the base, certain deviation often exists between the center of the substrate and the center of the plasma region limiting ring or the plasma region limiting plate, so that eccentricity (such as +/-0.3 mm) exists between the substrate and the plasma region limiting ring or the plasma region limiting plate, the size of the edge etching region of the substrate is inconsistent, and the yield of the substrate is reduced.
The statements herein merely provide background information related to the present disclosure and may not necessarily constitute prior art.
Disclosure of Invention
The invention aims to provide a semiconductor processing device, which can accurately adjust the position of a plasma region limiting ring or a plasma region limiting plate, so that the plasma region limiting ring or the plasma region limiting plate is aligned with a substrate, and the edge etching precision is ensured.
In order to achieve the above object, the present invention provides a semiconductor processing apparatus comprising:
A reaction chamber;
A lower electrode assembly for carrying a substrate;
the upper electrode assembly is arranged opposite to the lower electrode assembly and comprises an upper dielectric plate and a mounting plate, and the upper dielectric plate is mounted on the mounting plate;
A member to be aligned, the member to be aligned being disposed at the upper electrode assembly;
The semiconductor processing apparatus further includes: an alignment adjustment device comprising at least one driving unit comprising a fixed portion connected with the upper electrode assembly and a moving portion connected with the element to be aligned; and the moving part can move relative to the fixed part in a plane parallel to the substrate, and the moving part drives the element to be aligned to move so as to align the element to be aligned with the substrate or the lower electrode assembly.
In some embodiments, the driving unit is a piezoelectric inertial displacement platform, wherein a portion of the piezoelectric inertial displacement platform connected to the upper electrode assembly is a fixed portion, and a portion connected to the element to be aligned is a moving portion.
In some embodiments, the driving unit is a sound induction coil assembly, wherein the sound induction coil assembly includes a magnet and a coil disposed around the magnet, the coil connected to the upper electrode assembly in the sound induction coil assembly is a fixed portion, the magnet connected to the element to be aligned is a moving portion, or the magnet connected to the upper electrode assembly is a fixed portion, and the coil connected to the element to be aligned is a moving portion.
In some embodiments, the driving unit is an annular driving unit, the fixing portion is an outer fixing ring of the annular driving unit, the moving portion is an inner movable ring of the annular driving unit, the outer fixing ring is sleeved outside the inner movable ring, and the outer fixing ring is connected with the inner movable ring through an actuator.
Preferably, the number of the actuators is two and two of the actuators are disposed at intervals of 90 ° in the circumferential direction, and the actuators provide only radial driving force.
Preferably, the actuator comprises a stack of piezoelectric ceramics.
Preferably, the actuator further comprises a mechanical amplifying structure connected to the stacked piezoelectric ceramics for amplifying the deformation amount of the stacked piezoelectric ceramics and transmitting the amplified deformation amount to the inner movable ring.
Preferably, the driving unit further comprises two followers, each of which is connected to the outer fixed ring and the inner movable ring, respectively, and the followers and the two actuators are symmetrically arranged, respectively.
Preferably, the follower is a spring or a seal ring.
Preferably, the element to be aligned is one of a plasma region confinement ring, a plasma region confinement plate, or an upper electrode ring.
Optionally, when the element to be aligned is a plasma region confinement ring or an upper electrode ring, the plasma region confinement ring or the upper electrode ring is composed of a plurality of arc segments, and each arc segment corresponds to one driving unit.
Preferably, when the element to be aligned is a plasma region confinement ring, a radial flange is provided at a lower portion of the upper dielectric plate, and the plasma region confinement ring is sleeved on the upper dielectric plate and is at least partially supported by the radial flange.
Preferably, a mounting portion is provided on the upper dielectric plate or the mounting plate, and the fixing portion is mounted on the mounting portion.
Preferably, the semiconductor processing apparatus comprises a controller and a position detector, the controller is in data transmission with the alignment adjustment device and the position detector, wherein the controller controls the alignment adjustment device according to detection data of the position detector so as to realize alignment of the element to be aligned with the substrate.
In another aspect, the invention also discloses a method for alignment adjustment according to the semiconductor processing equipment, comprising the steps of:
the position detector detects the position information of the element to be aligned and transmits the position information to the controller;
The controller determines the positional relationship of the element to be aligned with respect to the lower electrode assembly or the substrate;
And the controller controls the driving unit to adjust the unit to be aligned according to the position relation.
The alignment adjusting device is used for accurately adjusting the positions of the plasma region limiting ring, the plasma region limiting plate or the upper electrode ring, so that the plasma region limiting ring, the plasma region limiting plate or the upper electrode ring and the substrate are aligned, and the edge etching precision is ensured.
Drawings
Fig. 1 is a schematic structural view of a prior art semiconductor device for edge etching.
Fig. 2 is a schematic structural view of a semiconductor device provided in an embodiment of the present invention.
Fig. 3 is a schematic structural view of a semiconductor device according to another embodiment of the present invention.
Fig. 4 is a schematic structural view of a semiconductor device provided in still another embodiment of the present invention.
Fig. 5 is a schematic diagram of the structure of the driving unit in fig. 4.
Detailed Description
The following describes a preferred embodiment of the present invention with reference to fig. 1 to 5.
As shown in fig. 1, a prior art semiconductor processing apparatus for edge etching comprises a reaction chamber 1, wherein an upper electrode assembly is disposed on the top of the reaction chamber 1, a gas inlet channel is disposed on the upper electrode assembly to introduce a process gas into the reaction chamber 1, the upper electrode assembly comprises a mounting plate 4, and an upper dielectric plate 5 mounted on the mounting plate 4, and a plasma region confinement ring 6 is disposed on the mounting plate 4 or the upper dielectric plate 5. In some embodiments may also be a plasma region confinement plate or an upper electrode ring. In this example, the plasma region confinement ring 6 is specifically described as an example.
Specifically, the upper electrode assembly is connected to the top of the reaction chamber 1 through a bellows 7, and the gas inlet passage is provided through the bellows 7 so that the upper electrode assembly can move up and down.
A lower electrode assembly 2 is further disposed in the reaction chamber 1 and opposite to the upper electrode assembly, and the lower electrode assembly 2 is used for carrying a substrate 3. The lower electrode assembly 2 includes a susceptor around which a plasma confinement ring 8 may also be disposed, and upper and lower electrode rings (not shown) are disposed at radial peripheries of the plasma region confinement ring 6 and the plasma confinement ring 8.
The air inlet channel comprises a first air inlet channel 12 and a second air inlet channel 13, the first air inlet channel 12 is also arranged on the upper dielectric plate 5 in a penetrating way, the air outlet end of the first air inlet channel 12 is arranged in the central area of the lower electrode assembly 2, and the first air inlet channel 12 is used for introducing purge gas during the process; the second air inlet channel 13 is also disposed through the upper dielectric plate 5, and the air outlet end of the second air inlet channel is aligned to the edge region of the substrate, and the second air inlet channel 13 is used for introducing a reaction gas into the edge region of the substrate so as to etch the edge region of the substrate.
In the edge etching process, after the substrate 3 to be processed is carried into the reaction chamber 1, the substrate 3 is placed on the lower electrode assembly 2, and the upper electrode assembly is lowered until the distance between the plasma region confinement ring 6 (or the plasma region confinement plate or the upper electrode ring) and the surface of the substrate 3 reaches the distance required by the process.
The rf energy of the rf source may be coupled to the upper electrode and the lower electrode through the substrate 3 to excite the process gas at the edge of the substrate 3 to generate plasma, so as to etch the edge region of the substrate 3, and under the combined action of the plasma region confinement ring 6 (or the plasma region confinement plate or the upper electrode ring) and the plasma confinement ring 8, define the range of the edge etching region of the substrate 3, so as to implement edge etching of the substrate 3.
However, in general, for various reasons, there is often a certain deviation between the center of the substrate 3 and the center of the plasma region confinement ring 6 (or the plasma region confinement plate or the upper electrode ring), and the center alignment is not achieved, so that there is an eccentricity (for example, ±0.3 mm) between the substrate 3 and the ion body region confinement ring 6 (or the plasma region confinement plate or the upper electrode ring), resulting in inconsistent dimensions of the etched region at the edge of the substrate, and reduced yield of the substrate.
In order to overcome the above technical drawbacks, as shown in fig. 2, in the present invention, there is provided a semiconductor processing apparatus comprising a reaction chamber 1, an upper electrode assembly, a lower electrode assembly 2, a component to be aligned, and an alignment regulating means. The upper electrode assembly is arranged at the top of the reaction cavity 1, the lower electrode assembly 2 is arranged at the bottom of the reaction cavity 1 and positioned below the upper electrode assembly to correspond to the upper electrode assembly, and the lower electrode assembly 2 is used for bearing the substrate 3. The upper electrode assembly comprises a mounting plate 4 and an upper dielectric plate 5, wherein the mounting plate 4 is connected with the top of the reaction cavity 1 through a corrugated pipe 7 so as to realize the up-and-down movement of the upper electrode assembly, and the upper dielectric plate 5 is arranged in the middle of the mounting plate 4 and corresponds to the lower electrode assembly 2. In this embodiment, the element to be aligned is a plasma region confinement ring 6, and the plasma region confinement ring 6 is mounted on the upper electrode assembly by the alignment adjustment device and is movable relative to the upper electrode assembly in a plane parallel to the substrate.
In some embodiments, the alignment adjustment device comprises at least one driving unit, the driving unit is a piezoelectric inertia displacement platform 9, the piezoelectric inertia displacement platform 9 comprises a fixed portion and a moving portion (not shown in the figure), the portion of the piezoelectric inertia displacement platform 9 connected to the upper electrode assembly is the fixed portion, and the portion connected to the plasma region confinement ring 6 is the moving portion. The moving part can provide driving force in the X-axis direction and the Y-axis direction relative to the fixed part in a plane parallel to the substrate, the moving part can move relative to the fixed part in a plane parallel to the substrate, and the moving part drives the plasma region limiting ring 6 to move so as to enable the plasma region limiting ring 6 to be aligned with the substrate in the center. The fixing portion is connected to a mounting portion on the upper dielectric plate 5 by a fastener 10. Specifically, the mounting portion is a groove with a size matching that of the fixing portion, and the fastener 10 is a stud or a screw. During installation, the fixing part is embedded into the groove for installation. Preferably, in order to ensure the stable installation of the fixing portion, the top surface of the fixing portion is provided with a screw hole, and the upper dielectric plate 5 is provided with a corresponding through hole, and the fixing is performed by using a stud or a screw passing through the through hole and being screwed into the screw hole. The moving part is fixed with the plasma region limiting ring 6 through a fastener 18, specifically, a mounting hole is formed in the upper surface of the plasma region limiting ring 6, the fastener 18 is a pin fixed on the moving part, the pin is in interference fit with the mounting hole, and driving force generated by the moving part is transmitted to the plasma region limiting ring 6 through the pin. Further, it is easily understood that the moving part may be fixed to the plasma region confinement ring 6 by an adhesive. A cable 11 passes through the upper dielectric plate 5 to connect the piezoelectric inertial displacement platform 9 to a power source located outside the reaction chamber 1.
The semiconductor processing apparatus further comprises a position detector (not shown) provided in the reaction chamber 1 for detecting a relative positional relationship between the substrate and the plasma region confinement ring 6 to acquire detection data, thereby determining a positional relationship between the substrate and the plasma region confinement ring 6. Alternatively, in some embodiments, the position detector may also be used to detect the positional relationship between the plasma region confinement ring 6 and the pedestal of the lower electrode assembly, thereby adjusting the plasma region confinement ring 6. Further, the semiconductor processing apparatus is further provided with a controller, the controller is respectively connected with the position detector and the piezoelectric inertia displacement platform 9, the controller receives detection data of the position detector, if the detection data show that eccentricity exists between the current substrate and the plasma region limiting ring 6, the controller can control the piezoelectric inertia displacement platform 9 to act, and the piezoelectric inertia displacement platform 9 drives the plasma region limiting ring 6 to move along the X direction and the Y direction in a plane parallel to the substrate through driving forces in the X axis direction and the Y axis direction provided by the moving part, so that the position of the plasma region limiting ring 6 is adjusted to be aligned with the substrate, and the accuracy of edge etching is ensured.
In some embodiments, the position detector is a calibration tool used as needed, and adjustment of the plasma region confinement ring 6 can be achieved by means of the calibration tool. Specifically, the shape of the calibration tool is the same as that of the substrate to be processed, and a camera for photographing upwards is arranged on the calibration tool. Before the edge etching process, the calibration tool is transferred into the cavity through the mechanical arm according to a normal process flow, the calibration tool is placed on the lower electrode assembly, at the moment, the position of the calibration tool is completely matched with the substrate to be processed, then, the camera shoots a picture upwards, the position information of the plasma region limiting ring 6 is displayed in the picture, the picture is transmitted to the controller, and the controller obtains the position information of the plasma region limiting ring 6 through processing and adjusts the position information accordingly.
It will be readily appreciated that in the radial direction there is a gap 14 between the plasma zone confinement ring 6 and the mounting plate 4, and a gap 19 between the plasma zone confinement ring 6 and the upper dielectric plate 5, the gap 14 and the gap 19 being mounting gaps that ensure that the plasma zone confinement ring 6 moves in the X-direction and the Y-direction without colliding and contacting the mounting plate 4.
The piezoelectric inertia displacement platform 9 has nano-level resolution, the precision is higher, the total travel for driving the plasma region limiting ring 6 to move along the X direction and the Y direction respectively can reach 2mm, the moving step length is smaller than or equal to 0.001mm, and finally the coaxiality of the plasma region limiting ring 6 and the substrate is kept within +/-0.05 mm.
It will be appreciated that when the plasma region confinement ring 6 is relatively lightweight, a single piezoelectric inertial displacement platform 9 is used to provide the driving force for driving the plasma region confinement ring 6 to move in the X and Y directions. In some embodiments, if a piezoelectric inertial displacement platform 9 with a smaller volume or a plasma region confinement ring 6 with a heavier weight is used, in order to further ensure the movement stability of the plasma region confinement ring 6, one piezoelectric inertial displacement platform 9 may be added, and two piezoelectric inertial displacement platforms 9 are respectively disposed on two corresponding sides of the plasma region confinement ring 6. In other embodiments, two piezoelectric inertial displacement platforms 9 may be disposed at 90 ° intervals in the circumferential direction of the plasma region confinement ring 6, where one piezoelectric inertial displacement platform 9 provides only the driving force in the X direction and the other piezoelectric inertial displacement platform 9 provides only the driving force in the Y direction, so that the complexity of the piezoelectric inertial displacement platform 9 is reduced while further improving the stability and reliability of the movement of the plasma region confinement ring 6.
Similarly, in some embodiments, the driving unit may also be implemented using a voice coil assembly, i.e., the piezoelectric inertial displacement platform in the above embodiments may be replaced by a voice coil assembly. The sound induction coil assembly comprises a magnet and a coil arranged around the magnet, the magnet in the sound induction coil assembly is connected with the upper electrode assembly as a fixed part, and the coil in the sound induction coil assembly is connected with the plasma region limiting ring 6 as a moving part; or the coil in the sound-sensing coil assembly is connected with the upper electrode assembly as a fixed part, and the magnet in the sound-sensing coil is connected with the plasma region restriction ring 6 as a moving part.
The cable for supplying power to the induction coil assembly is connected to a power source located outside the reaction chamber 1 through the upper dielectric plate 5, which is not particularly limited herein. The position of the plasma region limiting ring can be adjusted by adopting the sound induction coil assembly. The controller is respectively connected with the position detector and the sound induction coil assembly, receives detection data of the position detector, and can control the sound induction coil assembly to act if the detection data show that eccentricity exists between the substrate 3 and the plasma region limiting ring 6 at present, and the sound induction coil assembly drives the plasma region limiting ring 6 to move in a plane parallel to the substrate 3 through driving force provided by the moving part, so that the position of the plasma region limiting ring 6 is adjusted to be aligned with the substrate 3, and edge etching accuracy is ensured.
In the embodiment, the position of the plasma region limiting ring is accurately adjusted through the piezoelectric inertia displacement platform or the sound induction coil assembly, so that the plasma region limiting ring is aligned with the substrate or the lower electrode assembly in the center, and the edge etching precision is ensured.
As shown in fig. 3, in some embodiments of the present invention, the component to be aligned is a plasma region confinement plate 6, that is, the plasma region confinement ring 6 in the embodiment shown in fig. 2 is replaced by a plasma region confinement plate 6, the plasma region confinement plate 6 is mounted below the upper dielectric plate 5 and opposite to the lower electrode assembly, and a mounting gap 14 is provided between the plasma region confinement plate 6 and the mounting plate 4. Likewise, the alignment adjustment means comprise at least one drive unit, which may be a piezoelectric inertial displacement platform 9, or may be a sound coil assembly; in the present embodiment, the piezoelectric inertial displacement platform 9 is described in detail as an example. The piezoelectric inertia displacement stage 9 includes a fixed portion and a moving portion (not shown), the fixed portion of the piezoelectric inertia displacement stage 9 is mounted to the upper dielectric plate 5, and the moving portion of the piezoelectric inertia displacement stage 9 is connected to the upper surface of the plasma region restriction plate 6. The plasma region restriction plate 6 in the present embodiment is of an integral disk-like structure, so that the piezoelectric inertia displacement stage 9 can be disposed at the center of the plasma region restriction plate 6 to ensure the stability of the movement of the plasma region restriction plate 6.
In the embodiment, the position of the plasma region limiting plate is accurately adjusted through the piezoelectric inertia displacement platform or the sound induction coil assembly, so that the plasma region limiting plate is aligned with the substrate or the lower electrode assembly in the center, and the edge etching precision is ensured.
It is easy to understand that the element to be aligned may also be specifically an upper electrode ring, which is not described herein again.
In addition, when the substrate is introduced into the reaction chamber, the substrate may warp due to temperature variation, and at this time, the wafer may have an oval shape in a top view, so as to ensure uniformity of edge etching, in some embodiments of the present invention, the plasma region confinement ring 6 and the upper electrode ring may be composed of a plurality of arc segments, and each of the arc segments corresponds to a driving unit, thereby making the plasma region confinement ring 6 and the upper electrode ring have a contour similar to that of the wafer in a top view as much as possible to improve accuracy of edge etching.
As shown in fig. 4, in some embodiments of the present invention, an upper dielectric plate 5 is mounted on the mounting plate 4, a radial flange is provided at a lower portion of the upper dielectric plate 5, and the component to be aligned employs a plasma region confinement ring 6, and the plasma region confinement ring 6 is sleeved on the upper dielectric plate 5 and is at least partially supported by the radial flange. In this way, the force applied to the alignment adjustment device in the vertical direction can be reduced, and tilting of the plasma region confinement ring 6 due to gravity when the alignment adjustment device is fixed on one side can be avoided.
In some embodiments of the present invention, as shown in fig. 4-5, the alignment adjustment device comprises a driving unit, specifically, an annular driving unit 15, where the annular driving unit 15 is disposed between the plasma region confinement ring 6 and the mounting plate 4, and the annular driving unit 15 includes a fixed portion and a moving portion, as shown in fig. 5, where the fixed portion is an outer fixed ring 1501, the moving portion is an inner movable ring 1502, and the outer fixed ring 1501 is sleeved outside the inner movable ring 1502. The outer fixing ring 1501 is fixedly disposed on the mounting plate 4 by a fixing assembly. Preferably, as shown in fig. 4, the fixing assembly comprises a fixing ring 16 provided on the mounting plate 4, the fixing ring 16 being fixed to the mounting plate 4 by bolts 17, and the outer fixing ring 1501 being fixedly connected to the fixing ring 16. The inner movable ring 1502 is sleeved outside the plasma region limiting ring 6, and the inner movable ring 1502 is connected with the plasma region limiting ring 6.
The ring-shaped driving unit 15 includes two actuators 1503, each actuator 1503 is disposed between the outer fixed ring 1501 and the inner movable ring 1502 and connects the outer fixed ring 1501 and the inner movable ring 1502, respectively, the two actuators 1503 are disposed at intervals of 90 ° in the circumferential direction, and the actuators 1503 provide only radial driving forces, so that the two actuators 1503 disposed at intervals of 90 ° can provide driving forces in the X-axis direction and the Y-axis direction, respectively. While the actuator 1503 outputs the driving force, the outer fixing ring 1501 fixedly connected to the mounting plate 4 is fixed, and the driving force provided by the actuator 1503 is applied to the inner movable ring 1502, so as to drive the plasma region confinement ring 6 connected to the inner movable ring 1502 to move relative to the outer fixing ring 1501 along the X-axis direction and the Y-axis direction in a plane parallel to the substrate, thereby adjusting the plasma region confinement ring 6 to achieve center alignment with the substrate or the lower electrode assembly and ensuring the accuracy of edge etching.
In some embodiments, the actuator 1503 includes a stacked piezoelectric ceramic 1504 and a mechanical amplifying structure 1505, where the stacked piezoelectric ceramic 1504 has a movement of about 40um, and the mechanical amplifying structure 1505 is connected to the stacked piezoelectric ceramic 1504 and is configured to amplify the deformation of the stacked piezoelectric ceramic 1504 to obtain a stroke of about 0.4mm and transmit the stroke to the inner movable ring 1502, so as to drive the inner movable ring 1502 to displace.
Preferably, the annular driving unit 15 further comprises two followers 1506, each of the followers 1506 being connected to the outer fixed ring 1501 and the inner movable ring 1502, respectively, and the followers 1506 being disposed opposite the actuator 1503, i.e. the two followers 1506 are also disposed at an angle of 90 °. The follower 1506 may employ a spring or an O-ring or other shaped seal, both ends of the spring being connected to the outer fixed ring 1501 and the inner movable ring 1502, respectively, and both opposite sides of the O-ring or other shaped seal on the same diameter being connected to the outer fixed ring 1501 and the inner movable ring 1502, respectively, the follower 1506 moves following the movement of the actuator 1503 and generates a resilient force to offset the excessive driving force of the actuator 1503, thereby making the movement of the plasma region confinement ring 6 smoother.
In this embodiment, the position of the plasma region confinement ring is precisely adjusted by the annular driving unit, so that the plasma region confinement ring is aligned with the substrate or the lower electrode assembly, and the edge etching accuracy is ensured.
Finally, the invention also relates to an alignment method for a semiconductor processing apparatus in the previous embodiments, comprising the steps of, when the position detector is arranged in the reaction chamber 1:
introducing a substrate into the reaction chamber and placing the substrate on the lower electrode assembly;
the position detector detects the position information of the element to be aligned and transmits the position information to the controller;
The controller determines the positional relationship of the element to be aligned with respect to the lower electrode assembly or the substrate;
And the controller controls the driving unit to adjust the unit to be aligned according to the position relation.
The method is suitable for alignment before each edge etch of the substrate. Therefore, the requirements on the transmission precision and the transmission consistency of the mechanical arm can be reduced, but the throughput rate of the equipment is affected to a certain extent. In order to reduce the influence on throughput, the position detection can be performed only when the position of the element to be aligned needs to be calibrated, and the position of the element to be aligned can be adjusted accordingly.
In some embodiments, when the position detector is the calibration tool, the method comprises the steps of:
Introducing the calibration tool into a reaction chamber and placing the calibration tool on a lower electrode assembly;
The calibration tool detects the position information of the element to be aligned and transmits the position information to the controller;
The controller determines the positional relationship of the element to be aligned with respect to the lower electrode assembly or the substrate;
And the controller controls the driving unit to adjust the unit to be aligned according to the position relation.
The method is used when the position of the element to be aligned is calibrated when the edge etching effect is poor, and is suitable for the condition that the consistency of the substrate is higher when the mechanical arm transmits the substrate each time.
The invention adopts the alignment adjusting device to accurately adjust the position of the element to be aligned, so that the element to be aligned is aligned with the substrate or the lower electrode assembly, and the edge etching precision is ensured.
It should be noted that, in the embodiments of the present invention, the term "disposed" is used to indicate that the apparatus or element is not directly mounted, but mounted through other components, and the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. indicate an orientation or a positional relationship based on the orientation or the positional relationship shown in the drawings, and are merely for convenience of describing the embodiments, but do not indicate or imply that the apparatus or element is necessarily in a specific orientation, is configured and operated in a specific orientation, and is therefore not to be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the present invention, unless explicitly specified and limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art according to the specific circumstances.
While the present invention has been described in detail through the foregoing description of the preferred embodiment, it should be understood that the foregoing description is not to be considered as limiting the invention. Many modifications and substitutions of the present invention will become apparent to those of ordinary skill in the art upon reading the foregoing. Accordingly, the scope of the invention should be limited only by the attached claims.

Claims (15)

1. A semiconductor processing apparatus, comprising:
A reaction chamber;
A lower electrode assembly for carrying a substrate;
the upper electrode assembly is arranged opposite to the lower electrode assembly and comprises an upper dielectric plate and a mounting plate, and the upper dielectric plate is mounted on the mounting plate;
A member to be aligned, the member to be aligned being disposed at the upper electrode assembly;
characterized in that the semiconductor processing apparatus further comprises: an alignment adjustment device comprising at least one driving unit comprising a fixed portion connected with the upper electrode assembly and a moving portion connected with the element to be aligned; and the moving part can move relative to the fixed part in a plane parallel to the substrate, and the moving part drives the element to be aligned to move so as to align the element to be aligned with the substrate or the lower electrode assembly.
2. The semiconductor processing apparatus according to claim 1, wherein the driving unit is a piezoelectric inertial displacement stage, wherein a portion of the piezoelectric inertial displacement stage connected to the upper electrode assembly is a fixed portion, and a portion connected to the element to be aligned is a moving portion.
3. The semiconductor processing apparatus according to claim 1, wherein the driving unit is a voice coil assembly, wherein the voice coil assembly includes a magnet and a coil disposed around the magnet, wherein the coil connected to the upper electrode assembly in the voice coil assembly is a fixed portion, wherein the magnet connected to the element to be aligned is a moving portion, or wherein the magnet connected to the upper electrode assembly is a fixed portion, and wherein the coil connected to the element to be aligned is a moving portion.
4. The semiconductor processing apparatus according to claim 1, wherein the driving unit is a ring-shaped driving unit, the fixing portion is an outer fixing ring of the ring-shaped driving unit, the moving portion is an inner movable ring of the ring-shaped driving unit, the outer fixing ring is sleeved outside the inner movable ring and the outer fixing ring is connected with the inner movable ring through an actuator.
5. The semiconductor processing apparatus of claim 4, wherein the number of actuators is two and the actuators are disposed at 90 ° intervals in a circumferential direction, the actuators providing radial driving force.
6. The semiconductor processing apparatus of claim 5, wherein the actuator comprises a stacked piezoelectric ceramic.
7. The semiconductor processing apparatus of claim 6, wherein the actuator further comprises a mechanical amplifying structure coupled to the stacked piezoelectric ceramic for amplifying the amount of deformation of the stacked piezoelectric ceramic and transferring the amplified amount of deformation to the inner movable ring.
8. The semiconductor processing apparatus of claim 7, wherein the drive unit further comprises two followers, each of which connects the outer fixed ring and the inner movable ring, respectively, and the followers and the two actuators are disposed symmetrically, respectively.
9. The semiconductor processing apparatus of claim 8, wherein the follower is a spring or a seal ring.
10. The semiconductor processing apparatus of claim 1, wherein the element to be aligned is one of a plasma region confinement ring, a plasma region confinement plate, or an upper electrode ring.
11. The semiconductor processing apparatus of claim 10, wherein when the element to be aligned is a plasma region confinement ring or an upper electrode ring, the plasma region confinement ring or upper electrode ring is composed of a plurality of arc segments, each of the arc segments corresponding to one of the driving units.
12. The semiconductor processing apparatus of claim 10, wherein when the component to be aligned is a plasma region confinement ring, the upper dielectric plate has a radial flange at a lower portion thereof, and the plasma region confinement ring is nested on the upper dielectric plate and at least partially supported by the radial flange.
13. The semiconductor processing apparatus of claim 1, wherein a mounting portion is provided on the upper dielectric plate or the mounting plate, the fixing portion being mounted to the mounting portion.
14. The semiconductor processing apparatus according to any one of claims 1 to 13, further comprising a controller and a position detector, the controller in data communication with the alignment adjustment device and the position detector, wherein the controller controls the alignment adjustment device to achieve alignment of the element to be aligned with the substrate based on detection data of the position detector.
15. An alignment method for a semiconductor processing apparatus according to claim 14, comprising the steps of:
the position detector detects the position information of the element to be aligned and transmits the position information to the controller;
The controller determines the positional relationship of the element to be aligned with respect to the lower electrode assembly or the substrate;
And the controller controls the driving unit to adjust the unit to be aligned according to the position relation.
CN202211406956.2A 2022-11-10 2022-11-10 Semiconductor processing equipment Pending CN118053724A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN202211406956.2A CN118053724A (en) 2022-11-10 2022-11-10 Semiconductor processing equipment
TW112140775A TW202420395A (en) 2022-11-10 2023-10-25 Semiconductor processing equipment characterized by allowing a plasma region limiting ring or a plasma region limiting plate or an upper electrode ring to align with a substrate or a lower electrode assembly and ensure an accuracy of etching the edge

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202211406956.2A CN118053724A (en) 2022-11-10 2022-11-10 Semiconductor processing equipment

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CN118053724A true CN118053724A (en) 2024-05-17

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