CN118011069A - Measuring circuit suitable for high-precision on-chip capacitor - Google Patents
Measuring circuit suitable for high-precision on-chip capacitor Download PDFInfo
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- CN118011069A CN118011069A CN202410047855.3A CN202410047855A CN118011069A CN 118011069 A CN118011069 A CN 118011069A CN 202410047855 A CN202410047855 A CN 202410047855A CN 118011069 A CN118011069 A CN 118011069A
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- 239000003990 capacitor Substances 0.000 title claims abstract description 61
- 238000005259 measurement Methods 0.000 claims abstract description 14
- 238000000034 method Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 238000013461 design Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 230000014509 gene expression Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/30—Structural combination of electric measuring instruments with basic electronic circuits, e.g. with amplifier
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/28—Provision in measuring instruments for reference values, e.g. standard voltage, standard waveform
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
- G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
- G01R27/26—Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants ; Measuring impedance or related variables
- G01R27/2605—Measuring capacitance
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Measurement Of Resistance Or Impedance (AREA)
Abstract
The invention relates to a measuring circuit suitable for high-precision on-chip capacitance, which adopts a bias current generating circuit, a time sequence control circuit, an operational amplifier, an analog-to-digital converter and a control switch to be connected to form a link, wherein a reference capacitance and a measured capacitance are connected in series in the link, the operational amplifier adopts two to carry out layout, the operational amplifier is provided with a positive input end, a negative input end and an output end, the negative input end of the operational amplifier is connected with the output end, the bias current generating circuit is provided with an independent output end, the output end is connected to the measured capacitance through a first switch, and meanwhile, the output end is connected to the positive input end of one unit gain circuit. Therefore, the capacitance value in the chip can be accurately measured by introducing an off-chip standard capacitor as a reference through the capacitance charge sharing principle. By taking the voltages at two ends of the capacitor as the input voltage and the reference voltage of the ADC respectively, non-ideal factors such as reference current, charging time, capacitor leakage and the like are eliminated, and the measurement accuracy is improved.
Description
Technical Field
The present invention relates to a measuring circuit, and more particularly, to a measuring circuit suitable for high-precision on-chip capacitance.
Background
In chip design, a capacitor is an indispensable device.
In combination with the current mainstream integrated circuit process, the common on-chip capacitor manufacturing methods include the following methods:
1. and MOS capacitor with MOS source drain and gate as polar plate.
2. And the adjacent metal is used as a metal interdigital capacitor of the polar plate.
3. And the MIM capacitor with upper and lower layers of metal as polar plates is utilized.
However, in any process, the absolute accuracy of the capacitor is difficult to achieve very precisely, and the actual capacitance value and the design value are greatly different in consideration of parasitic effects. But also changes with the parameters of process angle, temperature, etc. In some applications, we need to know the exact capacitance value of the capacitor in the chip.
At present, a conventional processing manner is shown in fig. 3, and a measurement circuit is constructed, in which C DUT is a capacitor to be measured. Firstly, discharging a capacitor to be tested, then charging the capacitor to be tested by using a reference current source I ref, wherein the charging time is delta t, and then turning off the current source. At this time, the voltage value on C DUT isThe voltage is analog-to-digital converted by ADC (here, 8bit ADC is taken as an example) to obtain digital code
Thus, the capacitance of the capacitor to be measured can be obtained as
However, in this method, it is difficult to achieve very accurate current value I ref, time Δt, and voltage V ref, and the absolute value of C DUT must not be measured accurately in consideration of the leakage condition existing on the capacitor.
In view of the above-mentioned drawbacks, the present inventors have actively studied and innovated to create a measurement circuit suitable for high-precision on-chip capacitance, which has a more industrial utility value.
Disclosure of Invention
In order to solve the technical problems, the invention aims to provide a measuring circuit suitable for high-precision on-chip capacitance.
The invention relates to a measuring circuit for high-precision on-chip capacitance, wherein: adopts a bias current generating circuit, a time sequence control circuit, an operational amplifier, an analog-to-digital converter and a control switch to be connected to form a link,
The reference capacitor and the tested capacitor are connected in series in the link,
The operational amplifier adopts two to carry out layout, the operational amplifier is provided with a positive input end, a negative input end and an output end, the negative input end is connected with the output end to respectively form a first unit gain circuit and a second unit gain circuit,
The bias current generating circuit is provided with an independent output end which is connected to the tested capacitor through a first switch, and meanwhile, the output end is connected to the positive input end of one unit gain circuit,
The measured capacitor is connected to the positive input of another unity gain circuit,
The reference capacitor has one end grounded.
Further, the measuring circuit suitable for high-precision on-chip capacitance is provided with three independent output ends, including a first output end, a second output end and a third output end,
The first output end is connected to a first switch between the bias current generating circuit and the tested capacitor,
The second output end is connected to a third switch among the measured capacitor, the reference capacitor and the ground,
The third output end is connected with the analog-to-digital converter.
Furthermore, in the measuring circuit suitable for high-precision on-chip capacitance, the signal input end of the analog-to-digital converter is connected with the output end of the second unit gain circuit, and the reference voltage input end of the analog-to-digital converter is connected with the output end of the first unit gain circuit.
Further, the measuring circuit suitable for high-precision on-chip capacitance described above, wherein the analog-to-digital converter is configured with an 8-bit output signal as the output signal of the entire measuring circuit.
By means of the scheme, the invention has at least the following advantages:
1. the capacitance value in the chip can be accurately measured by introducing an off-chip standard capacitor as a reference through the capacitance charge sharing principle.
2. By taking the voltages at two ends of the capacitor as the input voltage and the reference voltage of the ADC respectively, non-ideal factors such as reference current, charging time, capacitor leakage and the like are eliminated, and the measurement accuracy is improved.
3. The whole circuit layout is simple and easy to implement.
The foregoing description is only an overview of the present invention, and is intended to provide a better understanding of the present invention, as it is embodied in the following description, with reference to the preferred embodiments of the present invention and the accompanying drawings.
Drawings
Fig. 1 is a schematic diagram of a measurement circuit suitable for high-precision on-chip capacitance.
Fig. 2 is a timing chart of the first output terminal C1 and the second output terminal C2.
Fig. 3 is a schematic diagram of a prior art measurement circuit.
Detailed Description
The following describes in further detail the embodiments of the present invention with reference to the drawings and examples. The following examples are illustrative of the invention and are not intended to limit the scope of the invention.
The measuring circuit suitable for high-precision on-chip capacitance as in fig. 1 to 2 is distinguished in that: the bias current generating circuit, the time sequence control circuit, the operational amplifier, the analog-to-digital converter and the control switch are connected to form a link. Meanwhile, a reference capacitor and a measured capacitor are connected in series in the link, so that reference and corresponding measurement are facilitated. During implementation, the operational amplifier adopts two layouts, and has a positive input end, a negative input end and an output end, wherein the negative input end is connected with the output end to respectively form a first unit gain circuit and a second unit gain circuit. The bias current generating circuit is provided with an independent output end which is connected to the tested capacitor through the first switch, meanwhile, the output end is connected to the positive input end of one unit gain circuit, and the tested capacitor is connected to the positive input end of the other unit gain circuit. After the circuit is established, one end of the reference capacitor is grounded.
In combination with a preferred embodiment of the present invention, the timing control circuit is configured with three independent outputs, including a first output, a second output, and a third output. Specifically, the first output end is connected to a first switch between the bias current generating circuit and the capacitor to be tested, the second output end is connected to a third switch among the capacitor to be tested, the reference capacitor and the ground, and the third output end is connected to the analog-to-digital converter.
Further, the signal input end of the analog-to-digital converter is connected with the output end of the second unit gain circuit. Meanwhile, the reference voltage input end of the analog-to-digital converter is connected with the output end of the first unit gain circuit.
Furthermore, in order to achieve an efficient analog-to-digital processing during detection, the analog-to-digital converter is configured with an 8-bit output signal as the output signal of the entire measurement circuit.
The working principle of the invention is as follows:
As shown in fig. 1, the present invention is typeset according to the layout of the circuit, and the reference capacitor C REF is the off-chip known capacitance value. The time sequence control circuit generates control signals for controlling the three switches to charge and discharge the capacitor C DUT to be tested and the reference capacitor C REF and sampling control of the ADC. Meanwhile, the timing diagrams of the first output terminal C1 and the second output terminal C2 are shown in fig. 2.
First, the second switch S 2 and the third switch S 3 are turned on, and the capacitor to be tested C DUT and the reference capacitor C REF are discharged, so that the charges on the capacitors are 0.
The second switch S 2 and the third switch S 3 are turned off, and the first switch S 1 is turned on. Thus, the fixed bias current generated by the bias circuit charges the capacitance to be measured C DUT and the reference capacitance C REF. Then, let the charging time be Δt. The voltage of the upper polar plate of the capacitor C DUT to be detected is V X, and the voltage of the upper polar plate of the reference capacitor C REF is V T.
During typesetting, the test capacitor C DUT and the reference capacitor C REF are connected in series, and can share one polar plate, so that the charges on the two capacitors are the same.
Let V TCREF＝(VX-VT)CDUT be. Meanwhile, the equation is still true in the case of leakage of the capacitor.
Thus, it is possible to obtain:
Then, it can be seen that the voltage V T and the voltage V X are respectively used as the input and reference voltages of the 8-bit ADC after passing through two identical unity gain circuits.
For an analog-to-digital converter, its output
Due to the fact that the V IN＝VT,VREF＝VX,
Thus, the first and second substrates are bonded together,
The capacitance value of the on-chip capacitor can be obtained,
Therefore, the actual value of the capacitor C DUT to be measured can be obtained from the output digital code of the ADC, and is not related to parameters such as the bias current I REF, the charging time delta t and the like.
It should be noted that for the unit gain circuit, the current common method can be adopted, and the following low-speed 8-bit analog-digital converter can adopt various circuits due to low speed. These circuits are not essential to the protection required by the present invention and are not described in detail herein.
As can be seen from the above text expressions and the accompanying drawings, the invention has the following advantages:
1. the capacitance value in the chip can be accurately measured by introducing an off-chip standard capacitor as a reference through the capacitance charge sharing principle.
2. By taking the voltages at two ends of the capacitor as the input voltage and the reference voltage of the ADC respectively, non-ideal factors such as reference current, charging time, capacitor leakage and the like are eliminated, and the measurement accuracy is improved.
3. The whole circuit layout is simple and easy to implement.
Furthermore, the description of the present invention as to the orientation or positional relationship is based on the orientation or positional relationship shown in the drawings is for convenience of description and simplification of the description only, and is not intended to indicate or imply that the apparatus or configuration referred to must have a specific orientation or be operated in a specific orientation configuration, and thus should not be construed as limiting the present invention.
The above description is only of the preferred embodiments of the present invention and is not intended to limit the present invention, and it should be noted that it is possible for those skilled in the art to make several improvements and modifications without departing from the technical principle of the present invention, and these improvements and modifications should also be regarded as the protection scope of the present invention.
Claims (4)
1. Measurement circuit suitable for high accuracy on-chip capacitance, its characterized in that: adopts a bias current generating circuit, a time sequence control circuit, an operational amplifier, an analog-to-digital converter and a control switch to be connected to form a link,
The reference capacitor and the tested capacitor are connected in series in the link,
The operational amplifier adopts two to carry out layout, the operational amplifier is provided with a positive input end, a negative input end and an output end, the negative input end is connected with the output end to respectively form a first unit gain circuit and a second unit gain circuit,
The bias current generating circuit is provided with an independent output end which is connected to the tested capacitor through a first switch, and meanwhile, the output end is connected to the positive input end of one unit gain circuit,
The measured capacitor is connected to the positive input of another unity gain circuit,
The reference capacitor has one end grounded.
2. The measurement circuit for high precision on-chip capacitance as claimed in claim 1, wherein: the time sequence control circuit is provided with three independent output ends, including a first output end, a second output end and a third output end,
The first output end is connected to a first switch between the bias current generating circuit and the tested capacitor,
The second output end is connected to a third switch among the measured capacitor, the reference capacitor and the ground,
The third output end is connected with the analog-to-digital converter.
3. The measurement circuit for high precision on-chip capacitance as claimed in claim 1, wherein: the signal input end of the analog-to-digital converter is connected with the output end of the second unit gain circuit, and the reference voltage input end of the analog-to-digital converter is connected with the output end of the first unit gain circuit.
4. The measurement circuit for high precision on-chip capacitance as claimed in claim 1, wherein: the analog-to-digital converter is configured with an 8-bit output signal as the output signal of the entire measurement circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410047855.3A CN118011069A (en) | 2024-01-12 | 2024-01-12 | Measuring circuit suitable for high-precision on-chip capacitor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410047855.3A CN118011069A (en) | 2024-01-12 | 2024-01-12 | Measuring circuit suitable for high-precision on-chip capacitor |
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| Publication Number | Publication Date |
|---|---|
| CN118011069A true CN118011069A (en) | 2024-05-10 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202410047855.3A Pending CN118011069A (en) | 2024-01-12 | 2024-01-12 | Measuring circuit suitable for high-precision on-chip capacitor |
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| CN (1) | CN118011069A (en) |
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- 2024-01-12 CN CN202410047855.3A patent/CN118011069A/en active Pending
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