CN117639494A - Low-loss multipath four-quadrant linear power supply and control method thereof - Google Patents
Low-loss multipath four-quadrant linear power supply and control method thereof Download PDFInfo
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- 239000003990 capacitor Substances 0.000 claims description 77
- 238000004804 winding Methods 0.000 claims description 46
- 238000007599 discharging Methods 0.000 claims description 14
- 238000012360 testing method Methods 0.000 claims description 14
- 230000003068 static effect Effects 0.000 claims description 11
- 230000001105 regulatory effect Effects 0.000 claims description 9
- 238000013507 mapping Methods 0.000 claims description 3
- HEZMWWAKWCSUCB-PHDIDXHHSA-N (3R,4R)-3,4-dihydroxycyclohexa-1,5-diene-1-carboxylic acid Chemical compound O[C@@H]1C=CC(C(O)=O)=C[C@H]1O HEZMWWAKWCSUCB-PHDIDXHHSA-N 0.000 claims description 2
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- 239000000446 fuel Substances 0.000 description 4
- 238000001453 impedance spectrum Methods 0.000 description 2
- 238000011056 performance test Methods 0.000 description 2
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
- H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
- H02M3/06—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider
- H02M3/07—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0045—Converters combining the concepts of switch-mode regulation and linear regulation, e.g. linear pre-regulator to switching converter, linear and switching converter in parallel, same converter or same transistor operating either in linear or switching mode
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0048—Circuits or arrangements for reducing losses
- H02M1/0054—Transistor switching losses
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0083—Converters characterised by their input or output configuration
- H02M1/009—Converters characterised by their input or output configuration having two or more independently controlled outputs
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
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- Dc-Dc Converters (AREA)
Abstract
The four-quadrant power supply is difficult to realize high-frequency output through a conventional circuit of a switching device, and a linear device is the best method for realizing high frequency, but the biggest trouble of the linear power supply is that the linear power supply works in a linear state and has large loss. This disadvantage limits the application of the linear device to a large extent, making it difficult to develop excellent high-frequency characteristics of the linear device. The invention provides a technical scheme capable of effectively reducing the loss of a linear device, which comprises a four-quadrant linear output part, a multipath output unit, a transformer and a primary side circuit of the transformer, wherein linear four-quadrant operation is realized, the voltage feedback of the linear output part is used for controlling time-varying bus voltage across the circuit, the heat productivity of a mos tube is reduced, and the excellent characteristics of high frequency and low loss of a linear four-quadrant power supply are realized.
Description
Technical Field
The invention relates to the technical field of fuel and automobile electronic and electric performance test, in particular to a low-loss multipath four-quadrant linear power supply and a control method thereof.
Background
Currently emerging fuel cells, power cells and super capacitors are free from bipolar power supplies as testing equipment when electric performance analysis, electrochemical impedance spectrum testing and pulse testing are performed. The high-frequency four-quadrant power supply is often used as a bipolar power supply for electrochemical workstations, and is used for carrying out electrical performance analysis, electrochemical impedance spectrum test, soft package high-frequency pulse test and the like for batteries such as fuel cells, power cells, lead storage batteries, super capacitors and the like.
The automobile electronic and electric performance test standard requires that the power supply voltage meets the following conditions: ISO16750-2, ISO7637-2 variation test (pulse 2b, pulse 4, etc.), GB28046.2 standard test, and can meet relevant standards of various automobile manufacturers: LV124, LV148, SMTC3800 001, VW80300, GS95024-2, and the more complex it is to the high-speed response speed requirements of waveform fluctuation testing. This requires the power supply to be capable of providing power (source) and absorbing power (sink) through four-quadrant operation, achieving low ripple and noise, high speed response, and high frequency up to 500 kHz. And a function signal generator can be built in, so that arbitrary waveforms and setting time sequence control can be freely generated. The switching power supply is limited by the switching frequency of the device, so that high-speed response and 500kHz high-frequency output are difficult to achieve, and meanwhile, the switching-on and switching-off processes of the switching device also bring unwanted high-frequency interference. The switching power supply has high frequency difficulty and large output interference is a main problem. Most of the existing linear power supplies are unipolar power supplies, and complex test requirements cannot be met.
Disclosure of Invention
The invention aims to provide a low-loss multipath four-quadrant linear power supply and a control method thereof, which not only can reasonably utilize excellent high-frequency characteristics of a linear device, but also can effectively reduce the loss of the linear device.
The invention aims to achieve the aim, and the aim is achieved by the following technical scheme:
a low-loss multipath four-quadrant linear power supply comprises a four-quadrant linear output part, a multipath output unit, a three-phase transformer and a transformer primary side circuit;
the primary side of each phase of the three-phase transformer is provided with a primary side winding which is connected with a primary side circuit of the transformer, the secondary side is provided with a plurality of secondary side windings which are respectively connected with a plurality of output units one by one, and each output unit of each phase comprises a four-quadrant linear output part;
the four-quadrant linear output section includes: the system comprises a charge-discharge module, four linear mos tubes Q1, Q2, Q3 and Q4, a positive output terminal, a negative output terminal and a DUT (DUT) to be tested; the charging and discharging module comprises a first charging and discharging unit and a second charging and discharging unit, wherein the first charging and discharging unit and the second charging and discharging unit are connected in series between udc+ and Udc-, one end of the first charging and discharging unit is connected with udc+, and one end of the second charging and discharging unit is connected with Udc-; the four linear mos tubes are connected in series between udc+ and Udc-, specifically, the drain electrode of Q1 is connected with udc+, the source electrode is connected with the drain electrode of Q2, the source electrode of Q2 is connected with the drain electrode of Q3, the source electrode of Q3 is connected with the drain electrode of Q4, and the source electrode of Q4 is connected with Udc-; the connection point of the Q1 source electrode and the Q2 drain electrode and the connection point of the Q3 source electrode and the Q4 drain electrode are connected with a positive output terminal, and the other end of the positive output terminal is connected with a DUT (device under test); the connection point of the two charge and discharge units, the connection point of the Q2 source electrode and the Q3 drain electrode are connected with a negative output terminal, and the other end of the negative output terminal is connected with the other end of the DUT.
Further, the first charge-discharge unit and the second charge-discharge unit are an upper bus capacitor and a lower bus capacitor, a primary side of each phase of the three-phase transformer is provided with one winding, a secondary side is provided with four windings, the upper ends of the primary side windings are homonymous ends, the upper ends of the first windings of the secondary sides are connected with anodes of rectifier diodes DR1, the lower ends of the secondary side windings are connected with the upper ends of the second windings, the lower ends of the second windings are connected with anodes of rectifier diodes DR2, cathodes of the rectifier diodes DR1 and DR2 are connected with one end of a filter inductor Lo1, the other end of the Lo1 is connected with udc+, and a connection point of the first windings and the second windings is connected with a connection point of the upper bus capacitor and the lower bus capacitor; the upper end of the third winding of the secondary side is connected with the anode of a rectifier diode DR3, the lower end of the third winding is connected with the upper end of a fourth winding, the lower end of the fourth winding is connected with the anode of a rectifier diode DR4, the cathodes of the rectifier diodes DR3 and DR4 are connected with one end of a filter inductor Lo2, the other end of the Lo2 is connected with the connection point of an upper bus capacitor and a lower bus capacitor, the connection sections of the third winding and the fourth winding are connected with Udc-, and the upper ends of the four windings of the secondary side are respectively identical-name ends.
The first charge and discharge unit and the second charge and discharge unit can also be an upper bus capacitor and a lower bus capacitor of the three-level rectifier, or the first charge and discharge unit and the second charge and discharge unit are DCDC modules, so as to realize multiplexing output.
Further, the primary side circuit comprises a three-phase full-bridge circuit unit, a bus capacitor and a full-bridge inversion network unit, the three-phase full-bridge circuit unit comprises a first bridge arm, a second bridge arm, a third bridge arm, an inductor La, an inductor Lb and an inductor Lc, one ends of the inductor La, the inductor Lb and the inductor Lc are respectively connected with midpoints of the first bridge arm, the second bridge arm and the third bridge arm, the other ends of the inductor Lb and the inductor Lc are respectively connected with three phases a, b and c, the bus capacitor is connected with two ends of the three-phase full-bridge circuit unit in parallel, the voltage at two ends of the bus capacitor is a first-stage rectification-level bus voltage DC, the full-bridge inversion network unit is connected with two ends of the bus capacitor in parallel, the full-bridge inversion network unit comprises a fourth bridge arm, a fifth bridge arm, a sixth bridge arm, an inductor Lr1, an inductor Lr2, an inductor Lr3, a capacitor Cr1, a capacitor Cr2 and a capacitor Cr3, the fourth and the midpoints of the fifth bridge arm and the inductor Lr1 are respectively connected with one ends of the inductor Lr1, the inductor Lr2 and the inductor Lr3, the other ends of the inductor Lr1 and the inductor Cr3 are respectively connected with three-phase ends of the capacitor Cr1 and the capacitor Cr3, and the other ends of the three-phase transformer 35, and the transformer 35 is connected with the primary side capacitor 35, respectively, and the primary side capacitor 3 is connected with the other ends of the three-phase bridge capacitor and the primary bridge capacitor and the capacitor.
The invention also provides a low-loss multipath four-quadrant linear power supply control method, which adopts a cross-circuit time-varying bus control method and utilizes the feedback value of the outer ring of the time-varying bus voltage and the given value of the outer ring of the time-varying bus voltage to control the bus voltage DC of the first-stage rectifying circuit through the cross-circuit.
The given value udc_set=uddrop+maxout () of the time-varying bus voltage outer ring, uddrop is the voltage drop between the linear output part and the bus, maxout () is the maximum value of the output voltages of the positive output terminal and the negative output terminal of all four-quadrant linear output parts in each phase and each path, the feedback value udc_back=f < maxout () >, the output result of the mapping function f () is the bus voltage DC1 or DC2 corresponding to the maximum output voltage, the voltage at two ends of the first charge-discharge unit is defined as DC1, and the voltage at two ends of the second charge-discharge unit is defined as DC2.
Specifically, the three-part control comprises a time-varying bus voltage outer ring, a time-varying bus voltage inner ring and an active current inner ring;
the time-varying bus voltage outer loop control includes: the static difference between the Udc_SET and the Udc_back is regulated by a PI controller PI1, and the static difference is output as a given value of a time-varying bus voltage inner ring;
the time-varying bus voltage inner loop control includes: the static difference of the given value of the time-varying bus voltage inner ring and DC_ref and DC_back is regulated by a PI controller PI2, and the given value is output as the given value of the active current inner ring; wherein, DC_ref is the fixed given value of the outer ring of the busbar voltage DC of the rectifying stage, and DC_back is the feedback value of the inner ring of the busbar voltage;
active current inner loop control includes: after the static difference between the given value of the active current inner loop and the feedback value id of the active current inner loop is regulated by a PI controller PI3, the control quantity of the first integrated rectifying circuit bus DC is output; wherein id is the active current.
Further, the conduction of the linear mos transistors Q1, Q2, Q3, Q4 is controlled to realize four working modes of positive polarity source, negative polarity source, positive polarity load and negative polarity load of the four-quadrant linear output part:
the linear mos tubes Q2, Q3 and Q4 are turned off, and Q1 is controlled to be turned on linearly and works as a positive polarity source;
the linear mos tubes Q1, Q2 and Q3 are turned off, and Q4 is controlled to be turned on in a linear mode and works as a negative polarity source;
the linear mos tubes Q1, Q3 and Q4 are turned off, and Q2 is controlled to be turned on in a linear mode and works as positive polarity load;
the linear mos transistors Q1, Q2 and Q4 are turned off, and Q3 is controlled to be turned on in a linear mode and works as a negative polarity load.
The DC_ref is a fixed given value of an outer ring of the bus voltage DC of the rectifying stage, the fixed given value is unchanged, the DC_ref is set to the bus working voltage when no multiplexing output is started, and the controller PI1 is initialized to 0 when no multiplexing output is started.
Udrop takes 50V for voltage systems with system voltages of one hundred volts and above, and 5-10V for voltage systems with voltages below one hundred volts.
The invention has the advantages that: firstly, a simple and efficient four-quadrant linear power supply circuit topology is provided, and the simple circuit realizes linear four-quadrant operation. Secondly, a scheme of multiplexing output of the four-quadrant linear power supply is provided, multiplexing output is achieved, and finally, a cross-circuit time-varying bus control method is provided, the linear output and bus voltage thereof are dynamically kept at a fixed differential pressure Udrop, and the heating value of linear mos is greatly reduced. The whole scheme provides a test power supply technical scheme with multiple paths, high frequency, low loss and four-quadrant linear operation for fuel cells and automobile electronic tests
Drawings
FIG. 1 is a circuit diagram of a four-quadrant linear output portion of the present invention;
FIG. 2 is a modal diagram and equivalent circuit of a linear output section of the invention operating as a positive polarity source;
FIG. 3 is a modal diagram and equivalent circuit of a linear output section of the invention operating as a negative polarity source;
FIG. 4 is a schematic diagram of the linear output section of the present invention operating as a positive polarity load and an equivalent circuit;
FIG. 5 is a modal view and equivalent circuit of a linear output section of the invention operating as a negative polarity source;
FIG. 6 is a circuit diagram of a multiplexing output unit according to the present invention;
FIG. 7 is a block diagram of a transformer;
FIG. 8 is a primary side circuit diagram of a transformer;
FIG. 9 is a diagram of a cross-circuit time-varying bus control method of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.
Example 1
The embodiment discloses a low-loss multipath four-quadrant linear power supply, which comprises a four-quadrant linear output part, a multipath output unit, a three-phase transformer and a transformer primary side circuit.
Referring to fig. 1, taking a phase a1 st circuit as an example, the four-quadrant linear output section includes: an upper bus capacitor Co1, a lower bus capacitor Co2, four linear mos transistors Q1, Q2, Q3 and Q4, output terminals OUTA1+, OUTA 1-and a DUT. The upper bus capacitor Co1 and the lower bus capacitor Co2 are connected in series between udc+ and Udc-, the upper end of the upper bus capacitor Co1 is connected with udc+, the lower end of the lower bus capacitor Co2 is connected with Udc-, and the midpoint of the upper bus capacitor and the lower bus capacitor is the o1a end. Four linear mos tubes are connected in series between udc+ and Udc-, specifically: the drain electrode of the Q1 is connected with the udc+, the source electrode is connected with the drain electrode of the Q2, the source electrode of the Q2 is connected with the drain electrode of the Q3, the source electrode of the Q3 is connected with the drain electrode of the Q4, and the source electrode of the Q4 is connected with the Udc-; the connection point of the Q1 source electrode and the Q2 drain electrode, the connection point of the Q3 source electrode and the Q4 drain electrode are connected with a positive output terminal, and the other end of the positive output terminal is connected with a DUT (device under test); the connection point of the two charge and discharge units, the connection point of the Q2 source electrode and the Q3 drain electrode are connected with a negative output terminal, and the other end of the negative output terminal is connected with the other end of the DUT.
As shown in FIG. 2, the mode diagram and equivalent circuit of the linear output part when the positive polarity source works are shown, the linear mos transistors Q2, Q3 and Q4 are turned off, the Q1 is controlled to be turned on linearly, the upper end of the upper capacitor Co1 provides power, the output terminal OUTA1+ is regulated by the Q1, and the output terminal OUTA 1-flows back to the lower end of the upper capacitor Co1 after flowing through the DUT. The equivalent circuit is that Co1 is output after passing through the linear mos tube Q1, and the output positive voltage is added to the DUT to be tested, so that positive source output is realized, and the operation is in the first quadrant.
As shown in FIG. 3, the mode diagram and equivalent circuit of the linear output part when the linear mos transistors Q1, Q2 and Q3 are turned off, Q4 is controlled to be turned on linearly, the upper end of the lower capacitor Co2 provides power to the output terminal OUTA1-, after flowing through the DUT, the output terminal OUTA1+ flows through the linear mos transistor Q4, and the output terminal goes back to the lower end of the lower capacitor Co 2. The equivalent circuit is that Co2 is output after passing through the linear mos tube Q4, and the output negative voltage is added to the DUT to be tested, so that negative source output is realized, and the operation is in the third quadrant.
As shown in FIG. 4, the mode diagram and equivalent circuit of the linear output part in positive polarity load operation are shown, the linear mos transistors Q1, Q3 and Q4 are turned off, Q2 is controlled to be turned on in a linear manner, the DUT provides power, and the power flows through the output terminal OUTA1+ and then flows back to the DUT through the output terminal OUTA 1-. The equivalent circuit is that the measured object DUT flows through the linear mos tube Q2 through the output terminal OUTA1+ and then flows back to the measured object DUT through the output terminal UOUTA-. The energy provided by the DUT flows from OUTA1+ to the four-quadrant linear power supply and from UOUTA-back to the DUT. The linear mos tube Q2 is in linear conduction and generates heat, so that a positive polarity load function is realized, and the linear mos tube Q2 works in a second quadrant.
As shown in FIG. 5, the mode diagram and equivalent circuit of the linear output part in the negative loading operation are shown, the linear mos transistors Q1, Q2 and Q4 are turned off, Q3 is controlled to be turned on in a linear manner, the DUT provides power, and the output terminal OUTA 1-flows through the linear mos transistor Q3 and then flows back to the DUT through the output terminal OUTA 1+. The equivalent circuit is that the DUT flows through the output terminal OUTA 1-through the linear mos tube Q3 and then flows back to the DUT through the output terminal UOUTA+. The energy provided by the DUT flows from OUTA 1-into the four-quadrant linear power supply and from UOUTA+ back into the DUT. The linear mos tube Q4 is in linear conduction and generates heat, so that a negative polarity load function is realized, and the linear mos tube Q4 works in a fourth quadrant.
The linear mos transistors Q1, Q2, Q3 and Q4 are controlled to be conducted by simulating the output voltage of the PI controller, the higher the output voltage of the PI controller is, the larger the linear degree of conduction of the linear mos is, the smaller the voltage drop on the linear mos transistors is, and the higher the output voltage is; conversely, the lower the output voltage of the PI controller, the smaller the linear mos conduction linearity, and the larger the voltage drop across the linear mos tube, the lower the output voltage.
For example, referring to fig. 6, an a-phase winding is taken as an example, an a-phase winding is provided, n secondary windings are provided on the secondary side, corresponding to the 1 st-n circuit of the a-phase, each secondary winding has four windings, A1 to o1a_1, o1a_1 to a2, a3 to o2a_1, o2a_1 to a4, the same name ends are A1, a3, o1a_1, and o2a_1, the end of the first secondary winding A1 is connected with the anode of a rectifier diode DR1, the end of A2 is connected with the anode of a rectifier diode DR2, the cathodes of the rectifier diodes DR1 and DR2 are connected with a filter inductor Lo1, the other end of Lo1 is connected with the upper end of a capacitor Co1, and the end of the first secondary winding o1a_1 is connected with the lower end of the capacitor Co 1. The end of the first secondary winding a3 is connected with the anode of a rectifying diode DR3, the end a4 is connected with the anode of a rectifying diode DR4, cathodes of the rectifying diodes DR3 and DR4 are connected with a filter inductor Lo2, the other end of the Lo2 is connected with the upper end of a capacitor Co2, and the end o2 a-1 of the first secondary winding is connected with the lower end of the capacitor Co 2.
The partial circuit is connected with a first four-quadrant linear output part, and outputs OUTA1+/OUTA1-, so as to form an A1-th circuit. And the n-th secondary winding of the A phase is used for outputting OUTAn+/OUTAn-, so as to form An An path. B. The C phase and the A phase have the same structure, and as shown in FIG. 7, the outputs from the B1 path to the Bn path and the C1 path to the Cn path are formed. And 3n paths of bipolar linear power supplies are output in total.
Referring to fig. 8, the three-phase full-bridge circuit unit includes a first bridge arm, a second bridge arm, a third bridge arm, an inductor La, an inductor Lb, and an inductor Lc, one ends of the inductor La, the inductor Lb, and the inductor Lc are respectively connected with midpoints of the first bridge arm, the second bridge arm, and the third bridge arm, the other ends are respectively connected with three phases of the commercial power a, b, and c, the bus capacitor is connected in parallel across the three-phase full-bridge circuit unit, the voltage across the bus capacitor is a first-stage rectification-stage bus voltage DC, the full-bridge inverter network unit is connected in parallel across the bus capacitor, the full-bridge inverter network unit includes a fourth bridge arm, a fifth bridge arm, an inductor Lr1, an inductor Lr2, an inductor Lr3, a capacitor Cr1, a capacitor Cr2, and a capacitor Cr3, the fourth midpoint, the fifth midpoint, the inductor Lr2, the other ends of the inductor Lr3 are respectively connected with one ends of the inductor Lr1, the inductor Lr2, the capacitor Cr3, the other ends of the inductor Lr2, the capacitor Cr2, and the capacitor Cr3, and the other ends of the three-phase transformer are respectively connected with the primary side capacitor 35 Cr2, and the transformer 35 is connected with the other ends of the primary side capacitor.
Example 2
In this embodiment, the upper bus capacitors Co1 and Co2 are replaced by upper and lower bus capacitors of a three-level rectifier, or two DCDCs are connected in series, so that the same function can be realized.
Example 3
In order to reduce the heat productivity of the linear mos tube and realize the working state of the multi-output power supply with high efficiency and high reliability, a cross-circuit time-varying bus control method is designed, and referring to fig. 9, the cross-circuit time-varying bus control method comprises a time-varying bus voltage outer ring, a time-varying bus voltage inner ring and an active current inner ring.
Time-varying busbar voltage outer loop: the voltage between the buses udc+ and o1a of the linear section is defined as DC1, the voltage between o1a and Udc-is defined as DC2, and the buses DC1 and DC2 of the linear section are taken as control targets. Searching all output voltages uoutxn+, |uoutxn- | (x= A, B, C), taking out the given value udc_set as the time-varying busbar voltage outer loop after adding the preset voltage drop value Udrop to this maximum value, i.e. udc_set=udro+maxout (), the system voltage takes 50V for several hundred volts, the voltage system of tens volts or tens volts can take 5-10V for the linear output part, the intelligent active control can be performed on the voltage drop of the linear output part, and the linear loss is greatly reduced.
Udc_back=f < maxout () >, the output result of the mapping function f () is the bus voltage DC1 or DC2 corresponding to the maximum output voltage, for example, maxout () = |uoutb1- |, udc_back=f < maxout () > =dc2; for another example, maxout () =uoutc1+, udc_back=f < maxout () > =dc1.
The static difference of the Udc_SET and the Udc_back is used as a given value of a time-varying bus voltage inner ring after being regulated by a PI regulator, and a cross circuit is used for controlling the bus voltage DC of the first-stage rectifying circuit, so that the bus voltage DC of the first-stage rectifying circuit is automatically adapted to a multiplexing output linear part.
Time-varying bus voltage inner loop: the sampling value DC_back of the first-stage rectifying stage bus voltage DC is used as a feedback value of a time-varying bus voltage inner loop, DC_ref is a fixed given value of an outer loop of the rectifying stage bus voltage DC, the value is fixed, DC_ref is set to be bus working voltage when multiplexing output is not started, a controller PI1 is initialized to be 0 when multiplexing output is not started, and a static difference is used as a given value of an active current inner loop through a PI controller PI 2.
Active current inner loop: the active current id is used as a feedback value of the useful current inner loop, and the static difference is regulated by PI3 and then the control quantity of the first-stage rectifying circuit bus DC is output.
Finally, it should be noted that: the foregoing description of the preferred embodiments of the invention is not intended to limit the invention to the precise form disclosed, and any such modifications, equivalents, and alternatives falling within the spirit and principles of the invention are intended to be included within the scope of the invention.
Claims (10)
1. The low-loss multipath four-quadrant linear power supply is characterized by comprising a four-quadrant linear output part, a multipath output unit, a three-phase transformer and a transformer primary side circuit;
the primary side of each phase of the three-phase transformer is provided with a primary side winding which is connected with a primary side circuit of the transformer, the secondary side is provided with a plurality of secondary side windings which are respectively connected with a plurality of output units one by one, and each output unit of each phase comprises a four-quadrant linear output part;
the four-quadrant linear output section includes: the system comprises a charge-discharge module, four linear mos tubes Q1, Q2, Q3 and Q4, a positive output terminal, a negative output terminal and a DUT (DUT) to be tested; the charging and discharging module comprises a first charging and discharging unit and a second charging and discharging unit, wherein the first charging and discharging unit and the second charging and discharging unit are connected in series between udc+ and Udc-, one end of the first charging and discharging unit is connected with udc+, and one end of the second charging and discharging unit is connected with Udc-; the four linear mos tubes are connected in series between udc+ and Udc-, specifically, the drain electrode of Q1 is connected with udc+, the source electrode is connected with the drain electrode of Q2, the source electrode of Q2 is connected with the drain electrode of Q3, the source electrode of Q3 is connected with the drain electrode of Q4, and the source electrode of Q4 is connected with Udc-; the connection point of the Q1 source electrode and the Q2 drain electrode and the connection point of the Q3 source electrode and the Q4 drain electrode are connected with a positive output terminal, and the other end of the positive output terminal is connected with a DUT (device under test); the connection point of the two charge and discharge units, the connection point of the Q2 source electrode and the Q3 drain electrode are connected with a negative output terminal, and the other end of the negative output terminal is connected with the other end of the DUT.
2. The low-loss multi-channel four-quadrant linear power supply according to claim 1, wherein the first charge-discharge unit and the second charge-discharge unit are an upper bus capacitor and a lower bus capacitor, each primary side of the three-phase transformer is provided with a winding, the secondary side is provided with four windings, the upper ends of the primary side windings are homonymous ends, the upper ends of the first windings of the secondary side are connected with anodes of rectifier diodes DR1, the lower ends of the secondary side windings are connected with the upper ends of the second windings, the lower ends of the second windings are connected with anodes of rectifier diodes DR2, cathodes of the rectifier diodes DR1 and DR2 are connected with one end of a filter inductor Lo1, the other end of the Lo1 is connected with Udc+, and a connection point of the first windings and the second windings is connected with a connection point of the upper bus capacitor and the lower bus capacitor; the upper end of the third winding of the secondary side is connected with the anode of a rectifier diode DR3, the lower end of the third winding is connected with the upper end of a fourth winding, the lower end of the fourth winding is connected with the anode of a rectifier diode DR4, the cathodes of the rectifier diodes DR3 and DR4 are connected with one end of a filter inductor Lo2, the other end of the Lo2 is connected with the connection point of an upper bus capacitor and a lower bus capacitor, the connection sections of the third winding and the fourth winding are connected with Udc-, and the upper ends of the four windings of the secondary side are respectively identical-name ends.
3. The low-loss multi-channel four-quadrant linear power supply according to claim 1, wherein the first charge-discharge unit and the second charge-discharge unit are upper bus capacitors and lower bus capacitors of a three-level rectifier, or the first charge-discharge unit and the second charge-discharge unit are DCDC modules.
4. The low-loss multi-path four-quadrant linear power supply according to claim 1, wherein the primary side circuit comprises a three-phase full-bridge circuit unit, a bus capacitor and a full-bridge inverter network unit, the three-phase full-bridge circuit unit comprises a first bridge arm, a second bridge arm, a third bridge arm, an inductor La, an inductor Lb and an inductor Lc, one ends of the inductor La, the inductor Lb and the inductor Lc are respectively connected with midpoints of the first bridge arm, the second bridge arm and the third bridge arm, the other ends of the inductor La, the inductor Lb and the inductor Lc are respectively connected with three phases a, b and c, the bus capacitor is connected in parallel and connected with two ends of the three-phase full-bridge circuit unit, the voltage of two ends of the bus capacitor is the bus voltage DC of a first-stage rectifying stage, the full-bridge inverter network unit is connected in parallel and connected with two ends of the bus capacitor, the full-bridge inverter network unit comprises a fourth bridge arm, a fifth bridge arm, a sixth bridge arm, an inductor Lr1, an inductor Lr2, an inductor Lr3, a capacitor Cr1, a capacitor Cr2 and a capacitor Cr3, the midpoints of the fourth bridge arm, the fifth bridge arm and the sixth bridge arm are respectively connected with one ends of the inductor Lr1, the inductor Lr2 and the inductor Cr3, the other ends of the inductor Lr2 and the capacitor Cr2 are respectively connected with the other ends of the three-phase capacitor and the other ends of the three-stage rectifier capacitor and the capacitor 35 Cr2 are respectively connected with the other ends of the primary side capacitor and the primary capacitor 3 and the primary side capacitor 3 is respectively connected with the three-phase capacitor ends of the capacitor and 3.
5. The low-loss multi-path four-quadrant linear power supply control method is based on the low-loss multi-path four-quadrant linear power supply of any one of claims 1-4 and is characterized in that a cross-circuit time-varying bus control method is adopted, and the feedback value of an outer ring of time-varying bus voltage and the given value of the outer ring of time-varying bus voltage are utilized to control the bus voltage DC of a first-stage rectifying circuit in a cross-circuit mode.
6. The method according to claim 5, wherein the given value udc_set=udrop+maxout () of the outer ring of the time-varying bus voltage is a voltage drop between the linear output portion and the bus, maxout () is a maximum value of output voltages of positive output terminals and negative output terminals of all four-quadrant linear output portions in each phase and each path, the feedback value udc_back=f < maxout () >, the output result of the mapping function f () is a bus voltage DC1 or DC2 corresponding to a maximum output voltage, the voltages across the first charge and discharge unit are defined as DC1, and the voltages across the second charge and discharge unit are defined as DC2.
7. The low-loss multi-channel four-quadrant linear power supply control method according to claim 6, comprising three parts of control of a time-varying bus voltage outer ring, a time-varying bus voltage inner ring and an active current inner ring;
the time-varying bus voltage outer loop control includes: the static difference between the Udc_SET and the Udc_back is regulated by a PI controller PI1, and the static difference is output as a given value of a time-varying bus voltage inner ring;
the time-varying bus voltage inner loop control includes: the static difference of the given value of the time-varying bus voltage inner ring and DC_ref and DC_back is regulated by a PI controller PI2, and the given value is output as the given value of the active current inner ring; wherein, DC_ref is the fixed given value of the outer ring of the busbar voltage DC of the rectifying stage, and DC_back is the feedback value of the inner ring of the busbar voltage;
the active current inner loop control includes: after the static difference between the given value of the active current inner loop and the feedback value id of the active current inner loop is regulated by a PI controller PI3, the control quantity of the first integrated rectifying circuit bus DC is output; wherein id is the active current.
8. The method of any one of claims 5-7, wherein the conduction of the linear mos transistors Q1, Q2, Q3, Q4 is controlled to realize four modes of operation of the four-quadrant linear output portion, namely positive polarity source, negative polarity source, positive polarity load, and negative polarity load:
the linear mos tubes Q2, Q3 and Q4 are turned off, and Q1 is controlled to be turned on linearly and works as a positive polarity source;
the linear mos tubes Q1, Q2 and Q3 are turned off, and Q4 is controlled to be turned on in a linear mode and works as a negative polarity source;
the linear mos tubes Q1, Q3 and Q4 are turned off, and Q2 is controlled to be turned on in a linear mode and works as positive polarity load;
the linear mos transistors Q1, Q2 and Q4 are turned off, and Q3 is controlled to be turned on in a linear mode and works as a negative polarity load.
9. The method of claim 7, wherein dc_ref is a fixed value of the external loop of the rectified stage bus voltage DC, the value is fixed, dc_ref is set to the bus operating voltage when none of the outputs is started, and PI1 is initialized to 0 when none of the outputs is started.
10. The method of claim 6, wherein Udrop is set to 50V for voltage systems with one hundred volts and above, and 5-10V for voltage systems with less than one hundred volts.
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