CN117497610A - P-type-SiC and N-type-Ga 2 O 3 Heterojunction power device and preparation method and application thereof - Google Patents

P-type-SiC and N-type-Ga 2 O 3 Heterojunction power device and preparation method and application thereof Download PDF

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CN117497610A
CN117497610A CN202311371023.9A CN202311371023A CN117497610A CN 117497610 A CN117497610 A CN 117497610A CN 202311371023 A CN202311371023 A CN 202311371023A CN 117497610 A CN117497610 A CN 117497610A
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metal
power device
sic
epitaxial layer
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李培刚
王进进
刘学
储童
季学强
周利
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Hefei Anxin Ruichuang Semiconductor Co ltd
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Hefei Anxin Ruichuang Semiconductor Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1608Silicon carbide
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/6609Diodes

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Abstract

The present disclosure discloses a P-type-SiC and N-type-Ga in the technical field of semiconductor materials 2 O 3 The invention designs a P-type-SiC substrate and an N-type-Ga by adopting a P-type-SiC substrate with high heat conductivity 2 O 3 The heterojunction diode power device remarkably improves the breakdown voltage of the SiC base diode power device. Preparing a high-performance SiC-based diode power device by optimizing the thickness, doping concentration and interface contact of the gallium oxide epitaxial layer and the SiC substrate; and Ga is optimized by a specific annealing process 2 O 3 Interface contact of epitaxial layer and SiC substrate, displaySignificantly improving the performance of the device.

Description

P (P)SiC and Ga 2 O 3 Heterojunction power device and preparation method and application thereof
Technical Field
The present disclosure relates to semiconductor material technology, and is especially one kind of P-SiC and N-Ga 2 O 3 Heterojunction power devices and methods of making and using the same.
Background
The wide forbidden band semiconductor is a third generation semiconductor material after Si base and GaAs base, has the advantages of large forbidden band width, high breakdown electric field intensity, high saturated electron drift speed, large thermal conductivity, small dielectric constant, strong radiation resistance and good chemical stability, is very suitable for manufacturing high-efficiency power conversion devices, control and power driving devices and the like with quicker response, wider frequency spectrum, lower energy consumption, stronger function and smaller volume, and can reduce the electric energy conversion loss by up to 90 percent. The wide forbidden band high-power high-frequency device can be widely applied to the fields of new energy automobiles, rail transit, smart grids, semiconductor illumination, new generation mobile communication, consumer electronics and the like, and is a core technology for supporting the development of industries such as energy, traffic, information, national defense and the like. The wide forbidden band device is particularly suitable for deep well drilling, solar energy inverters, wind energy inverters, electric vehicles, hybrid electric vehicles, industrial driving, light rail traction and other applications requiring high-power supply conversion. New energy automobiles and charging facilities are two application scenes with the fastest growth, the driving force comes from the demands of hybrid power, electric automobiles, electric power, photovoltaic inverters and the like, and the new energy automobiles and charging facilities have huge market potential and wide prospects.
SiC materials are much superior to Si and GaAs in basic characteristics, and have advantages of wide forbidden band, high thermal conductivity, high critical breakdown electric field, fast saturated electron drift velocity, etc., so that the device can operate at high temperature, high power, high speed, etc. The SiC material has the characteristics of high hardness, good thermal stability, corrosion resistance and the like. The SiC material has great advantages in the fields of extreme electronics such as photoelectric devices, high-temperature devices, radiation-resistant corrosion-resistant devices, high-voltage high-frequency high-power devices and the like. Technological researches of related theoretical technologies such as SiC single crystal substrate preparation technology and SiC devices are rapidly developed, and the SiC single crystal substrate has high thermal conductivity and can realize P-type doping. However, the reverse breakdown characteristic of the SiC schottky diode is poor, and the breakdown voltage is only about 100V, which greatly hinders the application of the SiC schottky diode in the high-voltage and high-power fields.
Gallium oxide Ga 2 O 3 The semiconductor material has a wide band gap, a band gap width of 4.2-5.3eV, a breakdown electric field strength of 8MV/cm, si of approximately 27 times, siC and GaN of more than 2 times, and Barlington values of more than 10 times and 4 times of SiC and GaN respectively, and when a unipolar power element with the same withstand voltage is manufactured, the on-resistance of the element is much lower than that of the element adopting the SiC and the GaN. The reduction of on-resistance is beneficial to reducing the power loss of a power supply circuit when the power supply circuit is conducted, is one of key materials for manufacturing high-power devices in the future, and is a preferred semiconductor material for manufacturing high-temperature high-frequency high-power microelectronic devices.
But now grow large-size high-quality beta-Ga 2 O 3 Single crystals are very difficult. (1) Gallium oxide single crystal substrates are expensive, and their price is nearly 10 times higher than that of the same type of SiC substrate. In addition, (2) the gallium oxide substrate has low heat conductivity, poor heat dissipation performance of the device, influences the stability of the device, and has a certain restriction on the application in the high-temperature high-pressure high-power application market. And (3) due to Ga 2 O 3 Intrinsic defects in particular oxygen vacancies, low hole mobility, ga 2 O 3 In general, N-type and high-carrier concentration P-type Ga with high quality 2 O 3 Development is very difficult. The difficulty in preparing the P-type gallium oxide nano-structure film on the gallium oxide single crystal substrate is high, the hole concentration obtained by conventional doping is low and unstable, and an effective P-N junction base power device is difficult to prepare, and the heterojunction bipolar device prepared from the P-type gallium oxide nano-structure film and other P-type materials has the problems of multiple defects, large leakage current and the like, which greatly hinders Ga 2 O 3 Application of material advantages.
Existing SiC-Ga 2 O 3 The heterojunction diode power device is mainly composed of N-type silicon carbide and intrinsic Ga 2 O 3 Or N-Ga 2 O 3 Prepared from the material, P-type silicon carbide material and Ga 2 O 3 Heterojunction devices formed by the materials do not exist at present, the device performance is less researched, and the development and the application of silicon carbide-based power devices are limited.
Based on the above problems, it is needed to provide a diode power device with high thermal conductivity, high voltage resistance and high power and a manufacturing method thereof.
Disclosure of Invention
In order to solve the problems of low thermal conductivity of the gallium oxide single crystal substrate, poor reverse breakdown characteristics of the P-type doped and SiC Schottky diode and the like, the invention adopts the P-type SiC substrate with high thermal conductivity. By designing a P-type SiC substrate and an N-type Ga 2 O 3 The heterojunction diode power device improves the breakdown voltage of the SiC-based diode power device. P-type-SiC substrate and N-type-Ga with high performance are prepared by optimizing thickness, doping concentration and interface contact shape with SiC substrate of gallium oxide epitaxial layer 2 O 3 Heterojunction (denoted as P-SiC/N-Ga 2 O 3 ) SiC-based diode power devices of (c). And optimizing Ga by annealing process 2 O 3 The epitaxial layer is in contact with the interface of the SiC substrate, so that the performance of the device is further improved.
The disclosed method grows N-type Ga with specific doping concentration on P-type SiC substrate with specific doping concentration by using magnetron sputtering equipment 2 O 3 A film; further activation of dopant ions and improvement of Ga using an annealing process 2 O 3 Interface contact state of epitaxial layer and SiC substrate; then in N-type Ga 2 O 3 Depositing an electrode on the epitaxial film; and finally, depositing ohmic contact metal on the back surface of the SiC substrate. The specific contents are as follows:
a silicon carbide power device, wherein the device employs silicon carbide SiC as a substrate material; an epitaxial layer is arranged on one side of the substrate material, the epitaxial layer is a gallium oxide film,
the silicon carbide is a P-type doping material and is marked as P-SiC; preferably, the doping element comprises N and/or Al; more preferably Al;
the gallium oxide film is an N-doped material, and is marked as N-Ga 2 O 3 The method comprises the steps of carrying out a first treatment on the surface of the Preferably, the doping element comprises Sn andand/or Si; more preferably Si.
In some preferred embodiments, the silicon carbide power device further comprises a dielectric layer, a first metal layer, an Al layer, and a second metal layer; the dielectric layer forms a groove shape; the dielectric layer and the first metal layer cover the epitaxial layer; the Al layer covers the dielectric layer and the first metal layer; the second metal layer covers the other side of the substrate material;
the first metal layer comprises a Ti layer and an Au layer; the Ti layer covers the epitaxial layer;
in some preferred embodiments, the second metal layer includes a Ni layer and an Ag layer or a Ni layer and an Au layer; the Ni layer covers the substrate material.
In some preferred embodiments, the epitaxial layer thickness is 1-20 μm; preferably 7-15 μm; more preferably 10. Mu.m.
In some preferred embodiments, the doping concentration of the epitaxial layer is 1×10 15 cm -3 ~1×10 19 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the Preferably 1X 10 16 cm -3 ~2.4×10 16 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the More preferably 2X 10 16 cm -3
In some preferred embodiments, the substrate material has a doping concentration of 1×10 18 cm -3 ~1×10 20 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the Preferably 1X 10 19 cm -3
In some preferred embodiments, the first metal layer has a thickness of 30-50nm;
or (b)
In some preferred embodiments, the thickness of the second metal layer is 30-50nm;
or (b)
In some preferred embodiments, the thickness of the first metal layer is less than the thickness of the dielectric layer.
In some preferred embodiments, the gallium oxide film is grown on the Si-face of the SiC substrate material.
The disclosure also provides a preparation method of the silicon carbide power device, comprising the following steps:
1) A substrate:
preparing a SiC substrate;
the SiC substrate is cleaned and dried before being used;
the cleaning includes: sequentially rinsing or ultrasonically cleaning with hydrochloric acid, deionized water, acetone solution, ethanol solution, deionized water and absolute ethanol;
the cleaning includes: blowing the mixture by adopting nitrogen;
2) Epitaxial layer:
magnetron sputtering growth of Ga on Si-face of SiC substrate 2 O 3 Obtaining Ga 2 O 3 An epitaxial layer; and performing high-temperature annealing;
the high temperature anneal satisfies any one or more of the following conditions:
annealing is carried out under nitrogen atmosphere;
the annealing temperature is 700-900 ℃; preferably 850-900 ℃;
the annealing time is 0.1-2h; preferably 1.5 to 1h;
the heating rate of annealing is less than or equal to 10 ℃/min; preferably 6-8deg.C/min;
3) Dielectric layer:
in Ga 2 O 3 Spin coating photoresist on the epitaxial layer, exposing at two end positions, and then developing with a developing solution and fixing with a fixing solution; growing a dielectric material on the epitaxial layer by magnetron sputtering to obtain a dielectric layer; the dielectric layer is groove-shaped and does not completely cover the epitaxial layer;
the dielectric layer part is an epitaxial layer part uncovered by the alloy layer;
the thickness of the dielectric layer exceeds the thickness of the metal layer;
the dielectric material comprises silicon dioxide or hafnium dioxide; preferably silica.
4) A first metal layer:
spin coating photoresist on the epitaxial layer, exposing the intermediate position, i.e. the trench-like position not covered by the dielectric layer, with photoresist stripping solution, and then developing with developing solution and fixing with fixing solution; in Ga 2 O 3 Magnetron sputtering titanium metal on the epitaxial layer to form ohmic contact, and sputtering gold metalThe method comprises the steps of carrying out a first treatment on the surface of the The first metal layer comprises a Ti layer and an Au layer;
the thickness of the first metal layer is 30-50nm;
the thickness of the first metal layer is smaller than that of the dielectric layer;
5) A second metal layer:
the other surface of the SiC substrate is subjected to magnetron sputtering of nickel metal, an ohmic contact is formed between the Ni layer and the SiC substrate, and then silver metal or gold metal is sputtered;
the second metal layer comprises a Ni layer and an Ag layer or a Ni layer and an Au layer;
the thickness of the second metal layer is 30-50nm;
6) Al layer:
sputtering an Al target above the first metal layer and the dielectric layer by using magnetron sputtering equipment to obtain an Al layer serving as a Pad of the device; the Al layer covers both the alloy layer and the dielectric layer.
The beneficial effects are that:
in order to solve the difficulties of low thermal conductivity, P-type doping and the like of a gallium oxide single crystal substrate, the invention designs the P-type SiC substrate and the N-type Ga by adopting the P-type SiC substrate with high thermal conductivity 2 O 3 Heterojunction diode power device (P-SiC/N-Ga) 2 O 3 ) And the breakdown voltage of the SiC-based diode power device is improved. And preparing the high-performance SiC-based diode power device by optimizing the thickness and doping concentration of the gallium oxide epitaxial layer. But Ga 2 O 3 The interface contact state of the epitaxial layer and the SiC substrate also affects the performance of the silicon carbide power device. The invention optimizes Ga through annealing process 2 O 3 The interface contact of the epitaxial layer and the SiC substrate further improves the performance of the device, and comprises the following steps:
1. the application adopts a specific P-type SiC substrate and N-type Ga 2 O 3 The heterojunction is used for preparing a power device, and a novel P-N base power device is prepared.
2. Through the thickness of the specific gallium oxide epitaxial layer, the breakdown voltage and the conduction voltage of the SiC-based diode power device can be obviously improved, and the resistance is reduced; wherein the reverse breakdown voltage is about 2000-2400V, the on-voltage is controlled to be above 2.95V, and the on-resistance is as low as 30-60mm 2 Left and right.
3. Through the specific gallium oxide P-type doping concentration, the interface contact between the SiC substrate and the gallium oxide epitaxial film is improved, the breakdown voltage of the SiC-based diode power device is improved, the on-resistance is obviously reduced, the reverse breakdown voltage is about 2000-2400V, the on-voltage is over 2.94-2.96V, and the on-resistance is 40-65 omega mm 2
4. Improving the thermal conductivity of the substrate: by using the P-type SiC substrate, the heat conductivity of the device is improved, and the device is better applied to the market of high-voltage high-power devices.
5. The breakdown voltage of the device is improved, namely the gallium oxide band gap, the breakdown electric field strength is larger, the high temperature resistance and the low loss are realized, and the electrical property of the device can be further improved by using the gallium oxide epitaxial film.
Drawings
FIG. 1 is a simulated forward characteristic of a device with different epitaxial layer thicknesses according to example 1 of the present disclosure;
FIG. 2 is a graph showing simulated reverse characteristics of devices with different epitaxial layer thicknesses according to example 1 of the present disclosure;
FIG. 3 is a simulated forward characteristic of a device with different epitaxial layer doping concentrations according to example 2 of the present disclosure;
FIG. 4 is a graph showing simulated reverse characteristics of devices with different epitaxial layer doping concentrations according to example 2 of the present disclosure;
FIG. 5 is a Schottky P-SiC/N-Ga of the present disclosure 2 O 3 A preparation method and an applied structure schematic diagram of the power device;
wherein: 1-Ag,2-Ni,3-SiC substrate, 4-Ga 2 O 3 Epitaxial layer, 5-Ti,6-SiO 2 ,7-Au,8-Al。
Detailed Description
The following examples are now presented to illustrate the disclosure, but are not intended to limit the scope thereof. The means used in the examples are conventional in the art unless otherwise specified.
The disclosure is further described in detail below with reference to the attached drawing figures and specific examples:
the present disclosure uses a P-type silicon carbide substrate, and the present invention employsP-type SiC substrate and N-type Ga with high thermal conductivity 2 O 3 The epitaxial layer forms a heterojunction and can be used for preparing a power device. By designing P-SiC/N-Ga 2 O 3 The heterojunction diode power device improves the breakdown voltage of the SiC-based diode power device. And the high-performance SiC-based diode power device is prepared by optimizing the thickness, doping concentration and interface contact shape of the gallium oxide epitaxial layer and the SiC substrate. But Ga 2 O 3 The interface contact state of the epitaxial layer and the SiC substrate also affects the performance of the silicon carbide power device, so the invention optimizes Ga through an annealing process 2 O 3 The epitaxial layer is in contact with the interface of the SiC substrate, so that the performance of the device is further improved, and the epitaxial layer can be applied to silicon carbide-based power devices.
Example 1
P-SiC/N-Ga 2 O 3 The preparation method of the heterojunction diode power device comprises the following operations:
1) Preparing a substrate material having an Al doping concentration of 1×10 19 cm -3 Cleaning and drying the 3SiC substrate; the cleaning comprises the following steps: sequentially rinsing or ultrasonically cleaning with hydrochloric acid, deionized water, acetone solution, ethanol solution, deionized water and absolute ethanol; the cleaning comprises the following steps: and drying by adopting nitrogen.
2) Epitaxial layer:
magnetron sputtering growth of Ga on Si surface of SiC substrate 2 O 3 Obtaining 4Ga 2 O 3 Epitaxial layer, wherein, N-type Ga 2 O 3 The doping element is Si, and the doping concentration is 2 multiplied by 10 16 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the The thickness of the epitaxial layer is respectively 5, 7.5, 10, 12.5 and 15 mu m;
heteroepitaxial Ga on Si surface of SiC substrate 2 O 3 Annealing the film for 2 hours at 900 ℃ in nitrogen atmosphere, wherein the heating rate of annealing is 8 ℃/min;
3) Dielectric layer:
in Ga 2 O 3 Spin coating photoresist on the epitaxial layer, exposing at two end positions, and then developing with a developing solution and fixing with a fixing solution; growth of 6 dioxygen on epitaxial layer using magnetron sputtering apparatusSilicon oxide SiO 2 As a dielectric material, a trench-shaped dielectric layer is obtained; removing the glue by using a glue removing solution;
the thickness of the dielectric layer is 50nm;
4) A first metal layer:
spin-coating photoresist on the epitaxial layer, exposing at the middle position, and then developing by using a developing solution and fixing by using a fixing solution; in Ga 2 O 3 Forming ohmic contact by magnetron sputtering titanium metal on the epitaxial layer, and sputtering gold metal; removing the glue by using a glue removing solution;
the thickness of the titanium layer is 20nm, and the thickness of the gold layer is 20nm; the 5Ti layer and the 7Au layer form a first metal layer;
5) A second metal layer:
performing magnetron sputtering of nickel metal on the other surface of the SiC substrate to form ohmic contact, and then sputtering silver metal; the 2Ni layer and the 1Ag layer form a second metal layer with the thickness of 30nm; wherein the Ni layer is in contact with the SiC substrate;
6) Sputtering an Al target by using magnetron sputtering equipment to obtain an 8Al layer serving as a Pad of the device; the Al layer covers both the alloy layer and the dielectric layer.
The prepared P-SiC substrate-N-Ga 2 O 3 The heterojunction diode power device structure is shown in fig. 5, performance is performed by using simulation software, voltage-current characteristics of the heterojunction diode power device are shown in fig. 1 and 2, and performance simulation results of the heterojunction diode power device are shown in the following table 1.
By comparing the simulation performance of devices with different epitaxial layer thicknesses, the device with the epitaxial layer thickness of 10 μm has the highest reverse breakdown voltage and lower on-resistance, the reverse breakdown voltage of 2347V, the on-voltage of 2.9570V and the on-resistance of 47.4816 Ω mm, and the breakdown voltage of the device is smaller and the on-resistance is continuously increased along with the increase of the epitaxial layer thickness 2
TABLE 1
Example 2
P-type-SiC substrate-N-Ga 2 O 3 The preparation method of the heterojunction diode power device comprises the following operations:
1) Preparing a substrate material having an Al doping concentration of 1×10 19 cm -3 Cleaning and drying the SiC substrate; the cleaning comprises the following steps: sequentially rinsing or ultrasonically cleaning with hydrochloric acid, deionized water, acetone solution, ethanol solution, deionized water and absolute ethanol; and drying by adopting nitrogen.
2) Magnetron sputtering growth of Ga on Si surface of SiC substrate 2 O 3 Obtaining Ga 2 O 3 Epitaxial layer, wherein, N-type Ga 2 O 3 The doping element is Si; the thickness of the epitaxial layer is 10 mu m; preparing Ga with different doping concentrations 2 O 3 Respectively obtain the targets with doping concentration of 1 multiplied by 10 16 cm -3 ,1.4×10 16 cm -3 ,2×10 16 cm -3 ,2.4×10 16 cm -3 ,3×10 16 cm -3 Is a semiconductor device;
heteroepitaxial Ga on Si surface of SiC substrate 2 O 3 The film was annealed under the following conditions:
annealing is carried out under nitrogen atmosphere;
the annealing temperature is 900 ℃;
the annealing time is 2h;
the temperature rise rate of the annealing is 8 ℃/min.
3) In Ga 2 O 3 Spin coating photoresist on the epitaxial layer, exposing at two end positions, and then developing with a developing solution and fixing with a fixing solution; growing silicon dioxide dielectric materials on the epitaxial layer by utilizing magnetron sputtering equipment to obtain a dielectric layer; the dielectric layer part is an epitaxial layer part uncovered by the alloy layer; removing the glue by using a glue removing solution;
the thickness of the dielectric layer is 50nm;
4) A first metal layer:
spin-coating photoresist on the epitaxial layer, exposing at the middle position, and then developing by using a developing solution and fixing by using a fixing solution; in Ga 2 O 3 Magnetron sputtering titanium metal on the epitaxial layer to formOhmic contact, and then sputtering gold metal; removing the glue by using a glue removing solution; the Ti layer does not completely cover the epitaxial layer; the thickness of the titanium layer is 20nm, and the thickness of the gold layer is 20nm; the Ti layer and the Au layer form a first metal layer; wherein the Ni layer is in contact with the SiC substrate.
5) A second metal layer:
performing magnetron sputtering of nickel metal on the other surface of the SiC substrate to form ohmic contact, and then sputtering silver metal; the Ni layer and the Ag layer form a second metal layer; wherein the Ni layer is in contact with the SiC substrate.
6) Sputtering an Al target by using magnetron sputtering equipment to obtain an Al layer serving as a Pad of the device; the Al layer covers the alloy layer and the dielectric layer simultaneously;
the prepared P-SiC substrate-N-Ga 2 O 3 The heterojunction diode power device structure is shown in fig. 5, performance is performed by using simulation software, voltage-current characteristics of the heterojunction diode power device are shown in fig. 3 and 4, and performance simulation results of the heterojunction diode power device are shown in table 2 below.
By comparing the simulation performance of devices with different doping concentrations of the epitaxial layer, the on-state voltage is slowly increased, the on-state resistance is continuously reduced, the breakdown voltage is continuously reduced, and the epitaxial layer is doped to be 2 multiplied by 10 in comprehensive comparison 16 cm -3 Has higher reverse breakdown voltage and lower on-resistance, the reverse breakdown voltage is 2347V, the on-voltage is 2.9570V, and the on-resistance is 47.4816 Omegamm 2
TABLE 2

Claims (9)

1. A silicon carbide power device, wherein the device employs silicon carbide SiC as a substrate material; an epitaxial layer is arranged on one side of the substrate material, the epitaxial layer is a gallium oxide film,
the silicon carbide is a P-type doping material; preferably, the doping element comprises N and/or Al; more preferably Al;
the gallium oxide film is an N-type doping material; preferably, the doping element comprises Sn and/or Si; more preferably Si.
2. A silicon carbide power device according to the preceding claim, further comprising a dielectric layer, a first metal layer, an Al layer, a second metal layer; the dielectric layer forms a groove shape; the dielectric layer and the first metal layer cover the epitaxial layer; the Al layer covers the dielectric layer and the first metal layer; the second metal layer covers the other side of the substrate material;
the first metal layer comprises a Ti layer and an Au layer; the Ti layer covers the epitaxial layer;
the second metal layer comprises a Ni layer and an Ag layer or a Ni layer and an Au layer; the Ni layer covers the substrate material.
3. A silicon carbide power device according to the preceding claim, wherein the epitaxial layer has a thickness of 1-20 μm; preferably 7-15 μm; more preferably 10. Mu.m.
4. A silicon carbide power device according to any preceding claim, wherein the epitaxial layer has a doping concentration of 1 x 10 15 cm -3 ~1×10 19 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the Preferably 1X 10 16 cm -3 ~2.4×10 16 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the More preferably 2X 10 16 cm -3
5. A silicon carbide power device according to any preceding claim, wherein the substrate material has a doping concentration of 1 x 10 18 cm -3 ~1×10 20 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the Preferably 1X 10 19 cm -3
6. A method of manufacturing a silicon carbide power device according to any preceding claim, comprising the steps of:
1) A substrate:
preparing a SiC substrate;
2) Epitaxial layer:
magnetic control on Si surface of SiC substrateSputter growth of Ga 2 O 3 Obtaining Ga 2 O 3 An epitaxial layer; and performing high-temperature annealing;
3) Dielectric layer:
in Ga 2 O 3 Spin coating photoresist on the epitaxial layer, exposing at two ends, and magnetically sputtering the epitaxial layer to grow dielectric material to obtain a dielectric layer; the dielectric layer is groove-shaped and does not completely cover the epitaxial layer;
4) A first metal layer:
spin-coating photoresist on the epitaxial layer, exposing at the intermediate position, i.e. the trench-like position not covered by the dielectric layer, and then developing with a developing solution and fixing with a fixing solution; in Ga 2 O 3 Forming ohmic contact by magnetron sputtering titanium metal on the epitaxial layer, and sputtering gold metal; the first metal layer comprises a Ti layer and an Au layer;
the thickness of the first metal layer is smaller than that of the dielectric layer;
5) A second metal layer:
the other surface of the SiC substrate is subjected to magnetron sputtering of nickel metal, an ohmic contact is formed between the Ni layer and the SiC substrate, and then silver metal or gold metal is sputtered;
the second metal layer comprises a Ni layer and an Ag layer or a Ni layer and an Au layer;
6) Al layer:
sputtering an Al target above the first metal layer and the dielectric layer by using magnetron sputtering equipment to obtain an Al layer serving as a Pad of the device; the Al layer covers both the alloy layer and the dielectric layer.
7. The method for manufacturing a silicon carbide power device according to claim 6, wherein in the step 2), the high temperature annealing satisfies any one or more of the following conditions:
annealing is carried out under nitrogen atmosphere;
the annealing temperature is 700-900 ℃; preferably 850-900 ℃;
the annealing time is 0.1-2h; preferably 1.5 to 1h;
the heating rate of annealing is less than or equal to 10 ℃/min; preferably 6-8deg.C/min.
8. The method of making a silicon carbide power device according to claim 6, wherein the dielectric material comprises silicon dioxide or hafnium dioxide; preferably silica.
9. Use of a silicon carbide power device according to any of claims 1 to 5 in the field of electronic devices.
CN202311371023.9A 2023-10-23 2023-10-23 P-type-SiC and N-type-Ga 2 O 3 Heterojunction power device and preparation method and application thereof Pending CN117497610A (en)

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JP2016025256A (en) * 2014-07-22 2016-02-08 株式会社Flosfia Semiconductor device
CN107369707A (en) * 2017-06-07 2017-11-21 西安电子科技大学 Based on 4H SiC substrate hetero-junctions spin fets and its manufacture method
CN109545657A (en) * 2018-10-25 2019-03-29 北京镓族科技有限公司 A kind of method of the gallium oxide film grown in improvement silicon carbide substrates
CN109904239A (en) * 2019-03-19 2019-06-18 南方科技大学 PIN diode and preparation method thereof
CN112635594A (en) * 2020-12-18 2021-04-09 西安电子科技大学 Based on polar J-TMDS/beta-Ga2O3Heterojunction high-speed optoelectronic device and preparation method thereof
KR20210152310A (en) * 2020-06-08 2021-12-15 광운대학교 산학협력단 HETEROJUNCTION DIODE MADE OF GALLIUM OXIDE/4H-SiC AND MANUFACTURING METHOD THEREOF

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016025256A (en) * 2014-07-22 2016-02-08 株式会社Flosfia Semiconductor device
CN107369707A (en) * 2017-06-07 2017-11-21 西安电子科技大学 Based on 4H SiC substrate hetero-junctions spin fets and its manufacture method
CN109545657A (en) * 2018-10-25 2019-03-29 北京镓族科技有限公司 A kind of method of the gallium oxide film grown in improvement silicon carbide substrates
CN109904239A (en) * 2019-03-19 2019-06-18 南方科技大学 PIN diode and preparation method thereof
KR20210152310A (en) * 2020-06-08 2021-12-15 광운대학교 산학협력단 HETEROJUNCTION DIODE MADE OF GALLIUM OXIDE/4H-SiC AND MANUFACTURING METHOD THEREOF
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