CN117012874A - Light-emitting chip, display module, electronic equipment and processing method of light-emitting chip - Google Patents
Light-emitting chip, display module, electronic equipment and processing method of light-emitting chip Download PDFInfo
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- CN117012874A CN117012874A CN202210459523.7A CN202210459523A CN117012874A CN 117012874 A CN117012874 A CN 117012874A CN 202210459523 A CN202210459523 A CN 202210459523A CN 117012874 A CN117012874 A CN 117012874A
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
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- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/10—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
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- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
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- H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
- H01L33/46—Reflective coating, e.g. dielectric Bragg reflector
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- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
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- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/80—Constructional details
- H10K50/85—Arrangements for extracting light from the devices
- H10K50/856—Arrangements for extracting light from the devices comprising reflective means
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Abstract
The application provides a light emitting chip, a display module, electronic equipment and a processing method of the light emitting chip, and relates to the technical field of electronic equipment. The light-emitting chip comprises a light-emitting chip main body and a light filtering structure; the light-emitting chip main body is provided with a light-emitting surface; the light filtering structure is formed on the light emitting surface of the light emitting chip main body. The light-emitting chip main body comprises an N-type doped gallium nitride layer, a quantum well layer and a P-type doped gallium nitride layer which are sequentially stacked, and the light-emitting surface of the light-emitting chip main body is positioned at one side, far away from the quantum well layer, of the N-type doped gallium nitride layer. The light emitting chip body further includes a barrier layer; the barrier layer is formed on the surface of the N-type doped gallium nitride layer far away from the quantum well layer; the surface of the barrier layer far away from the N-type doped gallium nitride layer forms a light-emitting surface of the light-emitting chip main body.
Description
Technical Field
The present application relates to the field of electronic devices, and in particular, to a light emitting chip, a display module, an electronic device, and a method for processing the light emitting chip.
Background
Currently, RGB full-color micro-displays (microLED microdisplay) cannot meet the brightness requirements of augmented reality (augmented reality, AR) glasses, mainly because the current photo-conversion efficiency of aluminum indium gallium phosphide (AlInGaP)/gallium arsenide (GaAs) based red light micro-displays is less than 1%. The core problem of the inefficiency is that the non-radiative compliance of the side wall of the light-Emitting Diode (LED) increases due to damage caused by plasma etching, resulting in low red edge luminance of the AlInGaP LED. The gallium nitride-based red light micro-display is sensitive to the red light of the aluminum indium gallium phosphide-free red light emitting diode due to different material systems, and is expected to achieve higher photoelectric conversion efficiency in the micro-display.
However, current gallium nitride red light emitting diodes have a very strong Quantum Confined Stark Effect (QCSE) of the red gallium nitride quantum well due to the indium (In) content of more than 30% In indium gallium nitride (InGaN), which has a very wide full width at half maximum (full width at half maximum, FWHM) that is greater than 70nm. Resulting in a red gan microdisplay with poor color performance. A Color Filter (CF) structure is required to reduce the full width at half maximum and improve the color purity. Also, since the micro display Shan Xiangsu (pitch) for augmented reality (augmented reality, AR) glasses is smaller than 5um. The general filters are difficult to pixelate in such small sizes and difficult to integrate in red gan microdisplays, thus preventing the application of color filters in miniaturized, high-density display fields (especially AR glasses fields).
Disclosure of Invention
The embodiment of the application provides a light emitting chip, a display module, electronic equipment and a processing method of the light emitting chip, wherein a light filtering structure and a light emitting chip main body are arranged into an integrated structure, so that the miniaturization of the light emitting chip main body and the improvement of color purity are realized.
In order to achieve the above purpose, the embodiment of the present application adopts the following technical scheme:
in a first aspect, some embodiments of the present application provide a light emitting chip, the light emitting chip comprising: a light emitting chip main body and a light filtering structure; the light-emitting chip main body is provided with a light-emitting surface; the light filtering structure comprises a gallium nitride layer, and the gallium nitride layer is formed on the light emitting surface of the light emitting chip main body.
In the light emitting chip provided by the embodiment of the application, the light emitted by the light emitting chip body irradiates through the light emitting surface, the light filtering structure filters the light with unnecessary wavelength, only the light with specific wavelength is allowed to pass through, and further the color purity of the light emitting chip body is improved.
In a possible implementation manner of the first aspect, the light emitting chip body includes an N-type doped gallium nitride layer, a quantum well layer, and a P-type doped gallium nitride layer that are sequentially stacked, and the light emitting surface of the light emitting chip body is located on a side of the N-type doped gallium nitride layer away from the quantum well layer. Because of the characteristic of a main body material system of the gallium nitride-based light-emitting chip, the gallium nitride-based light-emitting chip is insensitive to damage to the side wall and has higher photoelectric conversion efficiency.
In a possible implementation manner of the first aspect, the light emitting chip body further includes a barrier layer formed on a surface of the N-doped gallium nitride layer away from the quantum well layer; the surface of the barrier layer far away from the N-type doped gallium nitride layer forms a light-emitting surface of the light-emitting chip main body. Because the barrier layer is arranged between the light-emitting chip main body and the light filtering structure, the light-emitting chip main body integrally formed with the light filtering structure is easy to damage in the process of processing and manufacturing the light filtering structure, the light filtering structure and the light-emitting chip main body are physically isolated through the barrier layer, and further the damage to the light-emitting chip main body is avoided in the process of processing and manufacturing the light filtering structure, so that the light-emitting chip main body can maintain good working performance. The current blocking layer also has a current blocking effect, so that the damage to the light-emitting chip main body caused by current overload on the single light-emitting chip main body is prevented, the working performance of the light-emitting chip main body is further ensured, and the service life of the light-emitting chip main body is prolonged.
In a possible implementation manner of the first aspect, the gallium nitride layer further includes a first mirror, where the first mirror includes a first N-type doped gallium nitride layer and a second N-type doped gallium nitride layer that are sequentially stacked and staggered, a concentration of electrons in the first N-type doped gallium nitride layer is smaller than a concentration of electrons in the second N-type doped gallium nitride layer, and a thickness d1 of the first N-type doped gallium nitride layer satisfies n1xd1= (λ/8-3λ/8), where N1 is a refractive index of the first N-type doped gallium nitride layer, and λ is a central wavelength of light emitted by the light emitting chip body; the thickness d2 of the second N-type doped gallium nitride layer satisfies n2×d2= (λ/8-3λ/8), where N2 is the refractive index of the second N-type doped gallium nitride layer. When the physical thickness d of each gallium nitride layer satisfies n×d=λ/4, the interference presents the greatest reinforcing or destructive interference, and has better filtering effect. Therefore, by controlling the stacking mode, physical thickness and material of the first N-type doped gallium nitride layer and the second N-type doped gallium nitride layer, the ideal interference effect can be obtained.
In a possible implementation manner of the first aspect, the thicknesses of the first N-type doped gallium nitride layer and the second N-type doped gallium nitride layer are greater than or equal to 77.5nm and less than or equal to 232.5nm, and the physical thickness ranges of the first N-type doped gallium nitride layer and the second N-type doped gallium nitride layer are determined according to a central wavelength range of light emitted by the main body of the light emitting chip to be filtered. The interference of the first N-type doped gallium nitride layer and the second N-type doped gallium nitride layer presents the biggest reinforcement or destructive interference, and has better filtering effect.
In a possible implementation manner of the first aspect, in the first mirror, one of the first N-doped gallium nitride layer and the second N-doped gallium nitride layer is one more than the other, so that the first layer and the last layer in the first mirror 341 are the same gallium nitride layer, so as to achieve a better filtering effect.
In a possible implementation manner of the first aspect, the optical filtering structure further includes a second mirror, the second mirror includes a third N-type doped gallium nitride layer, and the second mirror is stacked with the first mirror. By arranging the second reflecting mirror between the adjacent first reflecting mirrors, the thickness and the material of the third N-type doped gallium nitride layer can be consistent with those of the first N-type doped gallium nitride layer, and the third N-type doped gallium nitride layer is used for adjusting the cavity length of the first N-type doped gallium nitride layer in the first reflecting mirrors, so that a better light filtering effect is achieved.
In a possible implementation manner of the first aspect, in the optical filtering structure, the first N-type doped gallium nitride layer is provided with a microporous structure. The light refractive index of the light filtering structure is changed by arranging the micropores on the second N-type doped gallium nitride layer, so that the light filtering effect is achieved, miniaturized manufacturing of the light filtering structure is facilitated, the light filtering of different wavelengths is achieved by changing the cycle number of the first reflecting mirror and the second reflecting mirror, and the light filtering of different colors is met.
In a possible implementation manner of the first aspect, the number of the light emitting chip bodies is a plurality; the light-emitting chip main bodies further comprise a driving substrate, the plurality of light-emitting chip main body arrays are arranged on the driving substrate, two adjacent light-emitting chip main bodies are arranged at intervals, and a first gap is formed between the two adjacent light-emitting chip main bodies; the light-emitting chip main bodies are arranged in an array mode, display light rays are provided for different application scenes, and the first gaps are used for spacing different light-emitting chip main bodies, so that the light rays of the different light-emitting chip main bodies are independent from each other and do not interfere with each other. The first gap is arranged between the light-emitting chip main bodies, so that the thermal strain caused by the mismatch of the thermal expansion coefficients between the driving substrate and the light-emitting chip main bodies is effectively reduced, and the light-emitting chip main bodies can still keep the characteristics of uniform, stable and reliable light emission under the injection of high current.
The number of the light filtering structures is also a plurality of, the number of the light filtering structures is equal to that of the light emitting chip main bodies, the light filtering structures are arranged on the light emitting surfaces of the light emitting chip main bodies in a one-to-one correspondence manner, a second gap is formed between every two adjacent light filtering structures at intervals, orthographic projection of the second gap on the driving substrate is overlapped with orthographic projection of the first gap on the driving substrate, and the second gap is communicated with the first gap. The second gap is arranged between the light filtering structures, so that the thermal strain caused by mismatch of thermal expansion coefficients between the light emitting chip main body and the light filtering structures is effectively reduced, and the light filtering structures can still keep the characteristics of uniformity, stability and reliability in light emission under high current injection.
In a possible implementation manner of the first aspect, the orthographic projection of the light emitting chip body on the driving substrate coincides with an orthographic projection center point of the filter structure on the light emitting chip body on the driving substrate. Through setting up the optical filtering structure with the luminous chip main part one-to-one, play better optical filtering effect for the light of luminous chip main part.
In a possible implementation manner of the first aspect, the first gap and the second gap are both filled with an insulating material. The insulating layer can isolate the light-emitting chip main bodies from each other and the light filtering structures, so that the influence of mutual interference of currents between the adjacent light-emitting chip main bodies and the light filtering structures on the respective light emission is avoided; the insulating material may also be a material having a light shielding effect, and further prevents optical crosstalk in addition to preventing current crosstalk, to improve the light emission purity.
In a possible implementation manner of the first aspect, the light emitting chip further includes an N electrode layer, the N electrode layer is disposed on a side of the plurality of light filtering structures away from the plurality of light emitting chip bodies, and the N-doped gallium nitride layers of the plurality of light emitting chip bodies are electrically connected to the N electrode layer. The N electrode layer is electrically connected with the N-type doped gallium nitride layer, and voltage is applied to the N-type doped gallium nitride layer through the N electrode layer so as to drive the light-emitting chip main body to emit light.
In a possible implementation manner of the first aspect, the driving substrate is a circuit board; the P-type gallium nitride layers of the plurality of light-emitting chip bodies are electrically connected with the driving substrate. The P electrode layer is electrically connected with the P-type doped gallium nitride layer, and voltage is applied to the P-type doped gallium nitride layer through the P electrode layer so as to drive the light-emitting chip main body to emit light.
In a second aspect, some embodiments of the present application provide a display module, including a light emitting chip according to any one of the above-mentioned aspects; a driving circuit is arranged on the driving substrate; the driving circuit is coupled with the N electrode layer and the driving substrate; the driving circuit is used for applying voltage to the N electrode layer and the driving substrate to drive the light-emitting chip main body to emit light.
The display module provided by the embodiment of the application comprises the light-emitting chip in any technical scheme, so that the two can solve the same technical problems and achieve the same technical effects.
In a third aspect, some embodiments of the present application provide an electronic device, which includes a processor and a display module as described above, where the processor is configured to control the display module to display an image.
The electronic equipment provided by the embodiment of the application comprises the light-emitting chip in any technical scheme, so that the electronic equipment and the light-emitting chip can solve the same technical problems and achieve the same technical effects.
In a fourth aspect, some embodiments of the present application provide a method for manufacturing a light emitting chip, where the light emitting chip includes a light emitting chip body, and the light emitting chip body has a light emitting surface, the method includes: and forming a light filtering structure on the light emitting surface of the light emitting chip main body.
In a possible implementation manner of the fourth aspect, forming a light filtering structure on the light emitting surface of the light emitting chip body includes: forming a filter layer on a substrate; forming a light-emitting chip main body layer on the surface of the light filtering structure, which is far away from the substrate, and enabling the light-emitting surface of the light-emitting chip main body layer to face the light filtering layer; the light emitting chip body layer and the filter layer are pixelated to form a plurality of light emitting chip bodies and a plurality of filter structures.
In a possible implementation manner of the fourth aspect, before the pixelated light emitting chip body layer and the filter layer, the processing method further includes: a driving substrate is arranged on the surface, far away from the filter layer, of the main body layer of the light-emitting chip; removing the substrate;
the pixelated light emitting chip body layer and the filter layer include: pixelating the filter layer to obtain a plurality of filter structures, wherein a second gap is formed between every two adjacent filter structures; and through the second gap, the luminous chip main body layers are pixelated to obtain a plurality of luminous chip main bodies, and a first gap is arranged between two adjacent luminous chip main bodies.
In a possible implementation manner of the fourth aspect, after the pixelating the filter layer and before the pixelating the light emitting chip body layer, the method further comprises a step of forming a sidewall of the porous filter structure.
In a possible implementation manner of the fourth aspect, the pixelated light emitting chip body layer further includes: and filling insulating materials in the first gap and the second gap. The insulating material can isolate the main bodies of the light emitting chips from each other and the light filtering structures, so that the current between the adjacent main bodies of the light emitting chips and the current between the light filtering structures are prevented from interfering with each other to influence the respective light emission; the insulating material may also be a material having a light shielding effect, and further prevents optical crosstalk in addition to preventing current crosstalk, to improve the light emission purity.
In a possible implementation manner of the fourth aspect, an N electrode layer is disposed on a side of the plurality of light filtering structures away from the plurality of light emitting chip bodies, and the N electrode layer and the N-type doped gallium nitride layer of the plurality of light emitting chip bodies form a common cathode electrode.
The processing method of the light-emitting chip provided by the embodiment of the application comprises the light-emitting chip according to any technical scheme, so that the light-emitting chip and the light-emitting chip can solve the same technical problems and achieve the same effects.
Drawings
Fig. 1 is a schematic structural diagram of an electronic device according to some embodiments of the present application;
fig. 2a is a schematic layout diagram of a light emitting chip in a display module according to some embodiments of the present application;
fig. 2b is a schematic layout diagram of a light emitting chip in a display module according to some embodiments of the present application;
FIG. 2c is a schematic diagram illustrating connection between a light emitting chip and a driving chip according to some embodiments of the present application;
fig. 3a is a schematic structural diagram of a light emitting chip according to some embodiments of the present application;
fig. 3b is a schematic structural diagram of a light emitting chip body according to some embodiments of the present application;
fig. 4a is a schematic structural diagram of a light emitting chip body according to some embodiments of the present application;
FIG. 4b is a schematic diagram illustrating a static light emitting device according to some embodiments of the present application;
FIG. 4c is a schematic diagram of dynamic light emission of a light emitting chip body according to some embodiments of the present application;
fig. 5 is a schematic structural diagram of a light emitting chip according to some embodiments of the present application;
FIG. 6a is a schematic diagram illustrating one of the filter structures according to some embodiments of the present application;
FIG. 6b is a schematic diagram illustrating an assembly of a light filtering structure and a light emitting chip body according to some embodiments of the present application;
FIG. 7a is a schematic diagram of the structure of a first mirror and a second mirror according to some embodiments of the present application;
FIG. 7b is a schematic diagram illustrating a structure of a filtering structure according to some embodiments of the present application;
FIG. 7c is a diagram showing one of the filtering effects of the filtering structure according to some embodiments of the present application;
FIG. 7d is a schematic diagram illustrating one of the filter structures according to some embodiments of the present application;
FIG. 7e is a diagram showing one of the filtering effects of the filtering structure according to some embodiments of the present application;
FIG. 7f is a diagram showing one of the filtering effects of the filtering structure according to some embodiments of the present application;
FIG. 8a is a schematic diagram of one of the light-emitting bodies according to some embodiments of the present application;
FIG. 8b is a schematic diagram illustrating a driving substrate according to some embodiments of the present application;
FIG. 9 is a schematic diagram of one of the light emitting chips according to some embodiments of the present application;
FIG. 10 is a schematic diagram illustrating a structure of a light emitting chip according to some embodiments of the present application;
FIG. 11 is a schematic diagram illustrating a structure of a light emitting chip according to some embodiments of the present application;
FIG. 12 is a flowchart of a method for fabricating a light emitting chip according to some embodiments of the present application;
FIG. 13 is a second flowchart of a method for fabricating a light emitting chip according to some embodiments of the present application;
Fig. 14 is a flow chart of a processing method of a light emitting chip according to some embodiments of the present application.
Detailed Description
In embodiments of the present application, the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature.
In embodiments of the present application, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The application provides an electronic device. The electronic device may be a cell phone, tablet computer, notebook, personal digital assistant (personal digital assistant, PDA), vehicle-mounted computer, smart wearable product (e.g., smart watch, smart bracelet), augmented reality (augmented reality, AR) glasses device, virtual Reality (VR) electronic device, etc.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an electronic device 01 according to some embodiments of the present application. This embodiment and the following embodiments are exemplary descriptions of the electronic device as AR glasses, and are not to be construed as limiting the application. The AR glasses are wearable devices which can be worn on the head of a human body to display, virtual information can be overlapped to the real world through a computer technology, so that a real environment and a virtual object can be overlapped to the same picture in real time, mutual complementation of the two information is realized, information interaction such as vision and hearing is carried out, picture display is carried out in front of eyes of a user through devices such as helmets and glasses, and reality of the user is enhanced. The glasses body is a main part for realizing the function of AR glasses. The glasses main body is provided with an inner surface opposite to the face of a user when in use, the inner surface is provided with a display module 20, and when the AR glasses are worn on the head of a human body, the display module 20 is in the vision range of the human body, so that picture display is provided for the wearer.
In addition, for convenience of description of the embodiments below, an XYZ coordinate system is established. Specifically, the width direction of the electronic device 01 is defined as the X-axis direction, the length direction of the electronic device 01 is defined as the Y-axis direction, and the thickness direction of the electronic device 01 is defined as the Z-axis direction. It is to be understood that the coordinate system setting of the electronic device 01 may be flexibly set according to actual needs, which is not specifically limited herein.
Referring to fig. 1, in particular, an electronic device 01 includes an eyeglass body 10, a mounting base 11, an eyeshade 12, and a display module 20. The glasses body 10 is a main part for realizing the AR glasses function. The glasses body 10 is provided with a mounting seat 11, and the mounting seat 11 is annular in shape so as to be fitted to the periphery of eyes. The material of the mounting base 11 includes, but is not limited to, plastic and metal, in some embodiments, the material of the mounting base 11 is the same as the material of the glasses main body 10, and the mounting base 11 and the glasses main body 10 are integrally formed, so that the number of component parts of the glasses can be reduced, and the assembly complexity of the glasses can be reduced. The mounting seat 11 is provided with an eye cover 12 which is attached to the face of the user, and the eye cover 12 is made of elastic soft materials such as silica gel and foam. In this way, the eye mask 12 is less pressurized against the user's face, and the wearing comfort of the glasses can be improved. The eye mask 12 is internally provided with a display module 20, the display module 20 comprises a back surface and a light emitting surface, wherein the light emitting surface faces the human eyes, and the back surface is opposite to the light emitting surface of the display module 20.
The glasses body 10 is provided with functional devices, which may be a power management unit (power maNagemeNt uNit, PMU), an image processor (graPhics processiNg uNit, GPU), a central processing unit (ceNtral ProcessiNg uNit, CPU), a flash memory (uNiversal flash storage, UFS), a Double Data Rate (DDR) memory, a System ON ChiP (SOC), a radio frequency unit (remote radio uNit, RRU), or the like, and the display module 20 displays images under the cooperation control of the functional devices.
It is to be understood that fig. 1 and the following related drawings only schematically show some components included in the electronic device 01, and the actual shape, actual size, actual position and actual configuration of these components are not limited by fig. 1 and the following drawings. In addition, when the electronic apparatus 01 is an apparatus of some other form, the electronic apparatus 01 may not include the eyeglass main body 10, the mount 11, and the eyecup 12.
The structure of the display module 20 will be described in detail below.
In some embodiments of the present application, the display module 20 may include a substrate, and a plurality of light emitting chips 30 disposed on the substrate, wherein each light emitting chip 30 is located in one subpixel of the display module 20. In the micro display, the size of the light emitting chip 30 is generally smaller than 20 μm. In micro light emitting diodes, the size of the light emitting chip is typically between 2 μm and 200 μm, and in some scenarios where the light emitting diode chip size requirements are not very strict, light emitting chips with a size between 200-15000 μm, called mini light emitting diodes, may also be used. It should be noted that the size of the light emitting chip may vary depending on the specific manufacturing process, but the light emitting chip is essentially a discrete light emitting diode chip, so that the same or the same technical schemes of colorization, color filtering, etc. may be adopted. In order to enable the display module 20 to implement color display, for example, three adjacent light emitting chips may be used to emit red light, green light, and blue light, respectively.
In some embodiments of the present application, referring to fig. 2a and 2b, fig. 2a is a schematic layout view of a light emitting chip 30 according to some embodiments of the present application, and fig. 2b is another schematic layout view of a light emitting chip 30 according to some embodiments of the present application. The specific arrangement method of the shape, size, arrangement order, pitch, etc. of the sub-pixels in the display module 20 is not limited. For example, in fig. 1, each sub-pixel is rectangular in shape, and each sub-pixel is arranged side by side in the order R, G, B; whereas in fig. 2b the sub-pixels are circular in shape and are arranged together in a triangular fashion with respect to each other. The above are just a few examples, and in other embodiments the shape of the sub-pixels may be elliptical, or of various other shapes. The interval between the two pixels is not limited either, and may be, for example, the same as the interval between the sub-pixels, or may be a distance of several times to several tens times the sub-pixel size (e.g., diameter in the case of a circle, length of one side in the case of a rectangle).
It should be noted that, although the shapes, sizes, and mutual distances of the sub-pixels are not limited, they are not meant to be arbitrarily set, and those skilled in the art will understand that, whether the shapes, sizes, pitches, or other parameters are parameters that can be selected under the index required for product display, and specific implementation of these parameters is in the prior art (for example, may be obtained by means of simulation, empirical values, testing, etc.), which is not described herein. Meanwhile, the arrangement of the shape, size, interval, etc. of each pixel or sub-pixel in fig. 2a and 2b is also merely an example, and does not represent the same in actual products.
The driving chip 102 drives the light emitting chips 30 with corresponding colors in each pixel unit to emit light, so that the display module 20 displays a color picture. It will be appreciated that in some embodiments of the present application, a white light emitting chip may be further included in each pixel unit to increase the brightness of the display module 20.
In some embodiments, the display module 20 includes a plurality of driving chips 102, and each driving chip 102 is connected to the light emitting chip 30 in one or more pixel units, so as to control whether the light emitting chip 30 connected thereto emits light or not and the light emitting brightness through the driving chip 102, thereby controlling the display module 20 to display a color picture. In the embodiment shown in fig. 2c, fig. 2c is a schematic diagram illustrating connection between the light emitting chips 30 and the driving chips 102 according to some embodiments of the present application, where each driving chip 102 is connected to three light emitting chips 30 in a pixel unit, so as to control the light emission and the light emission brightness of the three light emitting chips 30 in the pixel unit through the driving chip 102. In the present embodiment, the three light emitting chips 30 in one pixel unit are a red light emitting chip 30R, a green light emitting chip 30G, and a blue light emitting chip 30B, respectively. In this embodiment, the driving chip 102 includes a plurality of pins, and three Micro-LED chips 104 in the pixel unit 100A are respectively connected to different pins of the driving chip 102. Different pins of the driving chip 102 transmit different signals to control whether the light emitting chip 30 connected to the corresponding pin emits light or not and the intensity of the emitted light.
The structure of the light emitting chip 30 will be described in detail below.
In the prior art, since the purity of the emitted light color of the light emitting chip main body 35 is not high enough, after the light emitting chip main body 35 is generated, a layer of filter structure 34 is additionally covered on the surface of the light emitting chip main body 35, and the purity of the light color of the light emitting chip main body 35 is improved through the filter structure 34. Specifically, the filter structure 34 may be disposed on the light emitting surface side of the light emitting chip body 35, in the related art, the filter structure 34 may be disposed in contact with the light emitting chip body 35, and in the other related art, the filter structure 34 may be disposed at a distance from the light emitting chip body 35. The integration of the arrangement mode of the optical filter structure 34 in the prior art is too low, which is not beneficial to the miniaturized arrangement of the light emitting chip 30, especially for the application scene of the AR glasses, the display module 20 of the AR glasses is smaller, and has extremely high requirement for the miniaturization of the light emitting chip 30. If the split type arrangement of the light emitting chip main body 35 and the light filtering structure 34 in the prior art is adopted, the volume of the AR glasses display module 20 can be increased, and the whole volume of the AR glasses can be increased, so that the small and light requirements of users cannot be met. And because the micro display single pixel point (Pitch) for the AR glasses is smaller than 5um. The typical filter structure 34 is difficult to pixelate at such small dimensions and difficult to integrate in a red gan microdisplay.
In some embodiments of the present application, please refer to fig. 3a, fig. 3a is a schematic diagram illustrating a structure of a light emitting chip 30 according to some embodiments of the present application. The light emitting chip 30 includes a light emitting chip body 35 and a light filtering structure 34; referring to fig. 3b, fig. 3b is a schematic structural diagram of a light emitting chip body 35 according to some embodiments of the present application. The light emitting chip body 35 has a light emitting surface c1; the filter structure 34 is formed on the light-emitting surface c1 of the light-emitting chip body 35. The light emitting chip main body 35 and the light filtering structure 34 are integrally formed, that is, the light emitting chip main body 35 and the light filtering structure 34 are integrated, no gap exists between the light emitting chip main body 35 and the light filtering structure 34, and other devices are not needed for assembling the light emitting chip main body 35 and the light filtering structure 34, so that the integration level of the light emitting chip 30 is higher, the size of the light emitting chip 30 is further reduced, the light emitting chip 30 is miniaturized, the light emitting chip is more conveniently arranged on the display module 20 of the AR glasses, and the application scene of the ultra-high pixel density unit (Pixels Per Inch, PPI) can be met. The pixel density unit indicates the number of pixels possessed per inch. Thus, a higher PPI value represents a display screen capable of displaying images at a higher density. The higher the density of the display, the higher the fidelity. The light emitting chip main body 35 and the light filtering structure 34 are integrally arranged, so that the light emitting chip 30 is miniaturized, more light emitting chips 30 can be arranged in a unit area, namely, more pixels can be arranged in the unit area, the pixelation of the light emitting chips 30 is facilitated, and the more the display module 20 is more realistic.
In the prior art, the material of the light emitting chip main body 35 is usually aluminum indium gallium phosphide (AlINGaP) or gallium arsenide (GaAs) based red light emitting chip main body 35, but, because the damage generated by plasma etching of the side walls of the aluminum indium gallium phosphide and gallium arsenide based light emitting chip main body 35 results in non-radiative compliance increase, the photoelectric conversion efficiency is less than 1%, resulting in low light emitting rate of the aluminum indium gallium phosphide and gallium arsenide based light emitting chip main body 35, which cannot meet the brightness requirement of the RGB full-color micro-display, that is, the brightness requirement when applied to AR glasses.
In the embodiment of the present application, the light emitting chip body 35 is a gallium nitride (GaN) -based light emitting chip body 35, which can better avoid the disadvantage, and since the material system of the gallium nitride-based light emitting chip body 35 is different from that of the aluminum indium gallium phosphide light emitting chip body 35, the gallium nitride-based light emitting chip body 35 is sensitive to the damage of the side wall without the aluminum indium gallium phosphide light emitting chip body 35, and is expected to achieve higher photoelectric conversion efficiency in the micro-display.
In some embodiments of the present application, as shown in fig. 4a, fig. 4a is another schematic structural diagram of a light emitting chip body 35 according to some embodiments of the present application. The light emitting chip body 35 specifically includes an N-type doped gallium nitride layer 351, a quantum well layer 352 and a P-type doped gallium nitride layer 353, which are sequentially stacked, and the light emitting surface C1 of the light emitting chip body 35 is located on one side of the N-type doped gallium nitride layer 351 away from the quantum well layer 352. Specifically, the N-doped gallium nitride layer 351 is formed by N-doping, for example, doping a tetravalent element, in a pure gallium nitride material (i.e., an intrinsic gallium nitride material). The N-type doped gallium nitride layer 351 is formed with multiple electrons 43 and fewer holes 42. Pure gallium nitride material refers to gallium nitride (GaN) and the tetravalent element may be, for example, silicon (Si). Thus, the N-doped gan layer 351 is mainly conductive by electrons 43. The higher the concentration of the doped element during the N-type doping, the higher the concentration of the multi-electrons (electrons 43) and the higher the conductivity of the N-type doped gallium nitride layer 351. The above description is of the N-type doping process taking doping of tetravalent elements in pure gallium nitride material as an example. In the application, the doped element is not limited in the implementation of N-type doping, and electrons 43 in the N-type doped gallium nitride layer 351 are multiple electrons, and holes 42 are fewer.
In some embodiments of the present application, the P-doped gallium nitride layer 353 may be formed by P-doping, for example, by doping divalent elements, in a pure gallium nitride material. The free holes 42 and electrons 43 in the P-doped gan layer 353 are phonons. The pure gallium nitride material refers to GaN (gallium nitride), and the divalent element may be magnesium (Mg). Thus, the P-doped gan layer 353 is mainly conductive by the holes 42. The higher the concentration of the doped element during P-type doping, the higher the concentration of the majority carrier (holes 42) and the higher the conductivity of the P-type doped gallium nitride layer 353. Similarly, the P-type doping process is described above by taking doping of divalent elements into pure gallium nitride material as an example. In the present application, the doped element is not limited in the P-type doping, and the P-type doped gallium nitride layer 353 may have more holes 42 and less electrons 43.
The doping concentrations of the P-type doped gallium nitride layer 353 and the N-type doped gallium nitride layer 351 are described. The N-type doped gallium nitride may be divided into different gallium nitride layers according to different concentrations, and specifically, the concentration of electrons 43 of the N-type doped gallium nitride layer 351 and the P-type doped gallium nitride layer 353 is 10E17-10E20/cm3.
The light emitting principle of the gallium nitride-based light emitting chip body 35 will be explained below, and as shown in fig. 4b, fig. 4b is a schematic diagram of static light emitting of the light emitting chip body 35 according to some embodiments of the present application. The gan-based light emitting chip body 35 is a semiconductor device capable of performing electro-optic conversion, and the gan-based light emitting chip body 35 and a general diode are similar in main constitution, and are P-N junctions, which are a very thin special physical structure formed at the interface of the P-type doped gan layer 353 and the N-type doped gan layer 351 when they are combined together. The majority carriers in P-doped gallium nitride layer 353 are holes 42 and the majority carriers in N-doped gallium nitride layer 351 are electrons 43. As shown in fig. 4c, fig. 4c is a schematic diagram of dynamic light emission of the light emitting chip body 35 according to some embodiments of the present application. These two carriers form a region of equal numbers of positive ions and negative ions at the interface, i.e., a space charge region, due to diffusion motion. Due to the presence of positive and negative ions, an electric field, called an internal electric field, is formed in the space charge region, which is directed from the P region 40 (P-type doped gallium nitride layer 353) to the N region 41 (N-type doped gallium nitride layer 351). When a forward voltage is applied across the light emitting chip body 35, i.e., the P-N junction is forward biased, the resulting electric field is referred to as an external electric field. The directions of the external electric field and the internal electric field are just opposite, so that the external electric field has a weakening effect on the internal electric field, the space charge region becomes thinner under the effect of the external electric field, and the carrier electrons 43 of the N-type doped gallium nitride layer 351 and the carrier holes 42 of the P-type doped gallium nitride layer 353 are injected into the active region, and form collision, recombination and light generation at the interface of the two. In the specifically prepared gallium nitride-based LED, in order to optimize the transmission and light-emitting characteristics of the device, more complex optimized structures may be added on the basis of the PN junction, such as adding a quantum well layer between the P region and the N region, and the quantum well layer 352 collides, recombines and emits light, which has higher efficiency than the general PN structure, and the color of the emitted light is determined by the material of the quantum well in the P-N junction. In practical light emitting chips, the N-type doped gallium nitride layer, the P-type doped gallium nitride layer and the quantum well layer may be formed by stacking gallium nitride layers with different doping compositions and ratios according to different needs, which are not shown here.
The light emitting color of the light emitting chip body 35 changes the light emitting color of the light emitting chip body 35 specifically by adding indium of different contents to gallium nitride. In general, when the indium content in the gallium nitride light-emitting chip main body 35 is 10% -20%, the gallium nitride light-emitting chip main body 35 emits blue light; when the indium content in the gallium nitride light-emitting chip main body 35 is 20% -30%, the gallium nitride light-emitting chip main body 35 emits green light; when the indium content in the gallium nitride light-emitting chip main body 35 is 30% -40%, the gallium nitride light-emitting chip main body 35 emits red light. Since the current gan red light emitting chip body 35 has an indium content of more than 30% due to InGaN, the red gan quantum well layer 352 is more susceptible to an external electric field, and the InGaN red light emitting chip body 35 has a very wide full width at half maximum, which is more than 70Nm. Resulting in poor color rendering of the red gan light emitting chip body 35. Therefore, the full width at half maximum is reduced and the color purity is improved by providing the integrated filter structure 34 on the light emitting surface of the light emitting chip main body 35.
In some embodiments of the present application, as shown in fig. 5, fig. 5 is another schematic structural diagram of a light emitting chip 30 according to some embodiments of the present application. The light emitting chip body 35 further includes a blocking layer 36; the barrier layer 36 is formed on the surface of the N-type doped gallium nitride layer 351 away from the quantum well layer 352; the surface of the barrier layer 36 away from the N-type doped gallium nitride layer 351 forms the light-emitting surface c1 of the light-emitting chip body 35. The filter structure 34 is physically isolated from the light emitting chip body 35 by the barrier layer 36, so that the light emitting chip body 35 is prevented from being damaged in the process of arranging the filter structure 34.
In some embodiments of the present application, different concentrations of N-doped gallium nitride may be divided into undoped gallium nitride layer, N-weakly doped gallium nitride layer, and N-doped gallium nitride layer 351. Wherein, the concentration of electrons 43 of the undoped gallium nitride layer and the N-type weakly doped gallium nitride layer is 10E16-10E17/cm3, and the concentration of electrons 43 of the N-type doped gallium nitride layer 351 is 10E17-10E20/cm3. The barrier layer 36 may be configured as an undoped gallium nitride layer, and the undoped gallium nitride layer blocks the contact between the light filtering structure 34 and the light emitting chip main body 35, so that the undoped gallium nitride layer can better protect the light emitting chip main body 35 when the light filtering structure 34 is configured, the usability of the light emitting chip main body 35 is ensured, and the service life of the light emitting chip 35 is prolonged.
In some embodiments of the present application, the blocking layer 36 may be an N-type lightly doped gallium nitride layer, and when the optical filtering structure 34 is provided in the present application, the N-type lightly doped gallium nitride layer may isolate the optical filtering structure 34 from the light emitting chip main body 35, and protect the light emitting chip main body 35 by the N-type lightly doped gallium nitride layer, so as to ensure the light emitting performance of the light emitting chip main body 35 and prolong the lifetime of the light emitting chip main body 35.
In some embodiments of the present application, as shown in fig. 6a, fig. 6a is a schematic structural diagram of the filtering structure 34 in some embodiments of the present application. The light filtering structure 34 includes a first mirror 341, where the first mirror 341 includes a first N-doped gallium nitride layer 3411 and a second N-doped gallium nitride layer 3421 that are sequentially stacked and staggered, and a concentration of electrons in the first N-doped gallium nitride layer 3411 is less than a concentration of electrons in the second N-doped gallium nitride layer 3421, where a concentration of electrons 43 in the first N-doped gallium nitride layer 3411 is 10E19-10E20/cm3, and a concentration of electrons 43 in the second N-doped gallium nitride layer 3421 is 10E16-10E17/cm3. The first N-type doped gallium nitride layer 3411 and the second N-type doped gallium nitride layer 3421 are one set of reflective layers, and one or more sets of reflective layers may be provided in the first mirror 341. When a plurality of reflection layers are provided, the first N-type doped gallium nitride layer 3411 and the second N-type doped gallium nitride layer 3421 are stacked in this order.
In some embodiments of the present application, as shown in fig. 6b, fig. 6b is an assembly schematic diagram of the light filtering structure and the light emitting chip body 35 according to some embodiments of the present application. The first mirror 341 includes a first N-doped gallium nitride layer 3411 and a second N-doped gallium nitride layer 3412. The first N-doped gan layer 3411 and the barrier layer 36 are stacked, and the second N-doped gan layer 3412 is stacked on a side of the first N-doped gan layer 3411 facing away from the barrier layer 36. A microporous structure is disposed in the first N-doped gan layer 3411, and the refractive index of the light of the first reflector 341 is changed by the microporous structure, so that the filtering effect is achieved by adjusting the refractive index of the light, so as to improve the color purity of the light emitted by the light emitting chip body 35. The first N-type doped gallium nitride layer 3411 and the second N-type doped gallium nitride layer 3412 are alternately arranged, wherein the refractive index of the first N-type doped gallium nitride layer 3411 is N1, the refractive index of the second N-type doped gallium nitride layer 3412 is N2, and the refractive index difference between the first N-type doped gallium nitride layer 3411 and the second N-type doped gallium nitride layer 3412 is Δn=n1-N2. The larger the plurality of refractive index differences Δn=n1-n 2, the fewer times can be stacked to achieve higher reflectivity. Thus, providing micropores in the first N-type gallium nitride layer 3411 changes the refractive index of the first N-type gallium nitride layer 3411, and providing no microporous structure in the second N-type gallium nitride layer 3412 results in a large difference in refractive index between the first N-type gallium nitride layer 3411 and the second N-type gallium nitride layer 3412. When the filter structure is provided, a better filter effect can be obtained when the period of the first reflecting mirror 341 is less. In the first mirror 341, the number of one of the first N-type doped gallium nitride layer 3411 and the second N-type doped gallium nitride layer 3412 is one more than the number of the other, so that the first layer and the last layer in the first mirror 341 are the same gallium nitride layer. For example, in the first mirror 341, two first N-type doped gallium nitride layers 3411 are provided, one second N-type doped gallium nitride layer 3412 is provided, and one second N-type doped gallium nitride layer 3412 is provided between two adjacent first N-type doped gallium nitride layers 3411.
In some embodiments of the present application, the microporous structure in the light filtering structure 34 may be generated by electrochemical reaction, photoelectrochemical reaction or vacuum annealing, and in the process of generating the microporous structure, damage of the porous reaction to the light emitting chip body 35 is avoided, and the barrier layer 36 is provided to physically isolate the light filtering structure 34 from the light emitting chip body 35, so as to prevent the porous reaction from damaging the light emitting chip body 35 in the process of generating the microporous structure.
In some embodiments of the present application, the physical thickness of the first N-doped gallium nitride layer 3411 and the second N-doped gallium nitride layer 3421 are each 1/4 of the transmission wavelength of the center wavelength light emitted by the light emitting chip body 35 within the first N-doped gallium nitride layer 3411. By 1/4 is meant approximately 1/4 and small errors can be tolerated. Wherein, the center wavelength refers to the light source weighted average vacuum wavelength expressed in nanometer units. The physical thickness of the filter layer of each layer of the filter structure 34 should satisfy the above conditions to optimize the filtering effect. Firstly, setting the following parameters, wherein the physical thickness of each filter layer of the filter structure 34 is d, the refractive index of each filter layer of the filter structure 34 is n, the wavelength of light passing through the filter structure 34 is lambda, the product of the optical thickness nd is the product of the optical thickness nd, and the product of the optical thickness nd satisfies 1/4 wavelength lambda, namely nd=lambda/4; when the optical thickness nd value is equal to a quarter of the wavelength λ of light, the interference exhibits the greatest reinforcing or destructive interference. Therefore, by controlling the stacking mode, thickness and material of the first reflector, the ideal interference effect can be obtained.
In some embodiments of the present application, the thicknesses of the first N-type doped gallium nitride layer 3411 and the second N-type doped gallium nitride layer 3421 are greater than or equal to 77.5nm and less than or equal to 232.5nm, and the physical thickness ranges of the first N-type doped gallium nitride layer 3411 and the second N-type doped gallium nitride layer 3421 are determined according to the central wavelength range of light emitted from the light emitting chip body 35 to be filtered. The interference between the first N-type doped gan layer 3411 and the second N-type doped gan layer 3421 presents the greatest reinforced or destructive interference, and has better filtering effect.
In some embodiments of the present application, please refer to fig. 7a, fig. 7a is a schematic structural diagram of a first mirror 341 and a second mirror 342 according to some embodiments of the present application. The filter structure 34 further includes a second mirror 342, where the second mirror 342 is laminated with the first mirror 341, and the second mirror 342 includes a third N-doped gallium nitride layer 3421, as shown in fig. 7a, where the filter structure 34 is formed by sequentially repeating the first mirror 341 and the second mirror 342, and the thickness of the filter structure 34 is changed by setting a repetition period of the first mirror 341 and the second mirror 342, where the first mirror 341 is laminated with the N-doped gallium nitride layer 351 of the light emitting chip main body 35, and the second mirror 342 is laminated on a surface of the first mirror 341 facing away from the light emitting chip main body 35. The repetition period of the first mirror 341 is different from that of the second mirror 342, specifically, the number of the second mirrors 342 is n, the period of the first mirror 341 is n+1, and n is 1 or more. The second mirror 341 is disposed between two adjacent first mirrors 341. For example, the first mirror 341 is set to 2 periods, the second mirror 342 is set to 1 period, and the second mirror 342 of 1 period is set between the first mirrors 341 of 2 periods. In a specific embodiment, the period of the first mirror 341 and the second mirror 342 is determined by the wavelength of the light to be transmitted, and the refractive index and the transmittance of the light to be filtered are changed by setting the first mirror 341 and the second mirror 342 in a specific period, so that the full width at half maximum is reduced, and the color purity of the light to be transmitted is further improved.
By providing the first mirror 341 and the second mirror 342 for a specific period, the reflectance of different wavelengths can be selectively modulated. Wherein the first reflecting mirror 341 satisfies (2 i-1)/4 times of optical thickness, wherein i represents any positive integer, thus playing a role of reflection; the second mirror 342, in combination with the same refractive index portion of the first mirror 341, forms a larger reflective cavity, i.e., (2 j)/4 times the optical thickness, where j also represents any positive integer, for modulating and enhancing the luminescence at the corresponding wavelength. It can be seen that the area where the second mirror 342 meets the first mirror 341 is the same or similar doped gallium nitride layer. It should therefore be noted that the first mirror 341 and the second mirror 342 do not necessarily have a well-defined physical demarcation themselves, but their optical thickness combinations satisfy the above relationship.
The following embodiment describes the setting period of the filter structure 34 in detail.
Example 1
In some embodiments of the present application, the light emitted from the light emitting chip body 35 includes red light having a wavelength of 610 nm. The red light passes through the filter structure 34, and the filter structure 34 filters the light of other colors, so that the color purity of the red light emitted from the light emitting chip body 35 is improved.
In some implementations of the present embodiment, please refer to fig. 7b, fig. 7b is a schematic structural diagram of a filtering structure according to some embodiments of the present application. First, two periods of first reflecting mirrors 341 are provided; then, a second mirror 342 is laminated on the first mirror 341 for one period; finally, the first mirror 341 of two periods is laminated on the second mirror 342. Wherein the first mirror 341 includes a first N-type doped gallium nitride layer 3411 and a second N-type doped gallium nitride layer 3412; the second mirror 342 is a third N-doped gallium nitride layer 3421. Wherein the first N-type doped gallium nitride layer 3411 and the third N-type doped gallium nitride layer 3421 have a microporous structure, and are porous layers.
In the filter structure 34, the physical thickness (physical Thickness) d1 of the first N-type doped gallium nitride layer 3411 is set to 98.07nm, the physical thickness (physical Thickness) d2 of the second N-type doped gallium nitride layer 3412 is set to 63.77nm, and the physical thickness (physical Thickness) d1 of the third N-type doped gallium nitride layer 3421 is set to 98.07 nm. The red light wavelength to be passed through in this embodiment is 610nm, and the optical thickness (Optical Thickness) of each of the filter layers (the first N-type doped gan layer 3412, the second N-type doped gan layer 3412 and the third N-type doped gan layer 3421) has an optimal filtering effect when the value of the optical thickness is one fourth of the wavelength λ, that is, the value of the optical thickness of each of the filter layers is about 152.5nm. Wherein the optical thickness is the product of the thickness of each filter layer and the refractive index of each filter layer.
The filter layers with different refractive indexes are staggered to obtain a larger refractive index difference, and in the stacking manner, the refractive index of the first N-type doped gallium nitride layer 3411 and the refractive index of the third N-type doped gallium nitride layer 3421 are N1, the refractive index of the second N-type doped gallium nitride layer 3412 is N2, and the refractive index difference N is obtained between each filter layer, wherein the refractive index n=n2-N1. By staggering the filter layers with different refractive indexes to obtain a refractive index difference, the first N-type doped gallium nitride layer 3411 and the second N-type doped gallium nitride layer 3412 with fewer periods are stacked in the first reflector 341, so that a higher reflectivity can be achieved, and a better filtering effect on light rays can be achieved.
Specific parameters of the filter structure 34 of the first embodiment
Referring to fig. 7c, fig. 7c is a diagram illustrating a filtering effect of a filtering structure according to some embodiments of the application. By the lamination mode of the optical filtering structure 34 in this embodiment, the full width at half maximum of the light emitting chip main body 35 is reduced, the light passing rate of the light emitting chip main body 35 is higher, and the red light purity of the red light emitting chip main body 35 is improved.
Example two
In some embodiments of the present application, the light emitted from the light emitting chip body 35 is red light, and the center wavelength of the red light is 610nm. The red light passes through the filter structure 34, and the filter structure 34 filters the light of other colors, so that the color purity of the red light emitted from the light emitting chip body 35 is improved.
In some implementations of the present embodiment, referring to fig. 7d, fig. 7d is a schematic structural diagram of a filtering structure 34 according to some embodiments of the present application. The present embodiment differs from the first embodiment in that the period of the first mirror 341 is different. In this example, first, the first reflecting mirror 341 of three periods is set; then, a second mirror 342 is laminated on the first mirror 341 for one period; finally, the first mirror 341 of three periods is laminated on the second mirror 342. Wherein the first mirror 341 includes a first N-type doped gallium nitride layer 3411 and a second N-type doped gallium nitride layer 3412; the second mirror 342 is a third N-doped gallium nitride layer 3421. The first N-type doped gallium nitride layer 3411 and the third N-type doped gallium nitride layer 3421 have a microporous structure, and are porous layers.
In some implementations of the present embodiment, the parameters related to the filter structure 34 are the same as those of the first embodiment. That is, in the first mirror 341, the physical thickness (Physical Thickness) d1 of the first N-type doped gallium nitride layer 3411 is set to 98.07nm, the physical thickness (Physical Thickness) d2 of the second N-type doped gallium nitride layer 3412 is set to 63.77nm, and the physical thickness (Physical Thickness) d1 of the third N-type doped gallium nitride layer 3421 is set to 98.07nm. The red light wavelength to be passed through in this embodiment is 610nm, and the optical thickness of each filter layer (i.e. the first N-type doped gan layer 3411, the second N-type doped gan layer 3412 and the third N-type doped gan layer 3421) has the best filtering effect when the optical thickness of each filter layer satisfies the quarter of the wavelength λ, that is, the optical thickness of each filter layer is about 152.5nm. Wherein the optical thickness is the product of the thickness of each filter layer and the refractive index of each filter layer.
The filter layers with different refractive indexes are staggered to obtain a larger refractive index difference, and in the stacking manner, the refractive index N1 of the first N-type doped gallium nitride layer 3411 and the refractive index N1 of the third N-type doped gallium nitride layer 3421 are the same, the refractive index N2 of the second N-type doped gallium nitride layer 3412 is the refractive index N, and the refractive index difference N is obtained between each filter layer, wherein the refractive index n=n2-N1. By staggering the filter layers with different refractive indexes to obtain a refractive index difference, the first N-type doped gallium nitride layer 3411 and the second N-type doped gallium nitride layer 3412 with fewer periods are stacked in the first reflector 341, so that a higher reflectivity can be achieved, and a better filtering effect on light rays can be achieved.
Specific parameters of the filter structure 34 of the second embodiment
Referring to fig. 7e, fig. 7e is a diagram showing a filtering effect of a filtering structure according to some embodiments of the present application, by the lamination of the filtering structure 34 according to the present embodiment, the full width at half maximum of the light emitting chip main body 35 is further reduced, and the red purity of the red light emitting chip main body 35 is further improved as compared with the first embodiment.
Example III
In some embodiments of the present application, the light emitted from the light emitting chip body 35 is green light, and the central wavelength of the green light is 515nm. The green light passes through the filter structure 34, and the filter structure 34 filters the light of other colors, so that the color purity of the green light emitted from the light emitting chip body 35 is improved.
In some implementations of the present embodiment, the setting periods of the first mirror 341 and the second mirror 342 of the present embodiment are the same as those of the embodiment, as shown in fig. 7d, first, the first mirror 341 of three periods is set; then, a second mirror 342 is laminated on the first mirror 341 for one period; finally, the first mirror 341 of three periods is laminated on the second mirror 342. Wherein the first mirror 341 includes a first N-type doped gallium nitride layer 3411 and a second N-type doped gallium nitride layer 3412; the second mirror 342 is a third N-doped gallium nitride layer 3421. The first N-type doped gallium nitride layer 3411 and the third N-type doped gallium nitride layer 3421 have a microporous structure, and are porous layers.
In the first mirror 341, the physical thickness (Physical Thickness) d1 of the first N-type doped gallium nitride layer 3411 is set to 82.8nm, the physical thickness (Physical Thickness) d2 of the second N-type doped gallium nitride layer 3412 is set to 52.91nm, and the physical thickness (Physical Thickness) d1 of the third N-type doped gallium nitride layer 3411 is set to 82.8nm. The wavelength of red light to be passed through in this embodiment is 515nm, and the optical thickness of each filter layer (i.e., the first N-type doped gan layer 3411, the second N-type doped gan layer 3412, and the third N-type doped gan layer 3421) has an optimal filtering effect when the optical thickness of each filter layer satisfies a quarter of the wavelength λ, that is, the optical thickness of each filter layer is equal to 128.75nm. Wherein the optical thickness is the product of the thickness of each filter layer and the refractive index of each filter layer.
The filter layers with different refractive indexes are staggered to obtain a larger refractive index difference, and in the stacking manner, the refractive index N1 of the first N-type doped gallium nitride layer 3411 is the same, the refractive index N2 of the second N-type doped gallium nitride layer 3412 is the refractive index N, and the refractive index difference N is obtained between each filter layer, wherein the refractive index n=n2-N1. By staggering the filter layers with different refractive indexes to obtain a refractive index difference, the first N-type doped gallium nitride layer 3411 and the second N-type doped gallium nitride layer 3412 with fewer periods are stacked in the first reflector 341, so that a higher reflectivity can be achieved, and a better filtering effect on light rays can be achieved.
Specific parameters of the filter structure 34 of the third embodiment
Referring to fig. 7f, fig. 7f is a diagram showing a filtering effect of a filtering structure according to some embodiments of the present application, in which the full width at half maximum of the green light emitting chip main body 35 is reduced and the green purity of the green light emitting chip main body 35 is improved by the lamination of the filtering structure 34 according to the embodiment.
The light passing through the filter structure 34 can also be red light with the center wavelength of 620nm, and the light emitted by the light emitting chip main body 35 is filtered through the filter structure 34, so that the color purity of the light emitted by the light emitting chip main body 35 is improved.
All of the first N-type doped gallium nitride layers 3412 described above may be replaced with first N-type lightly doped gallium nitride layers.
In some embodiments of the present application, please refer to fig. 8a, fig. 8a is a schematic structural diagram of a light-emitting body 35 according to some embodiments of the present application. The light emitting chip body 35 further includes a driving substrate 39, and the plurality of light emitting chip bodies 35 are disposed on the driving substrate 39 in an array. Referring to fig. 8b, fig. 8b is a schematic structural diagram of a driving substrate 39 according to some embodiments of the application. The driving substrate 39 includes a first surface 311 and a second surface 312, the light emitting chip body 35 and the filter structure 34 are sequentially disposed on the first surface 311 of the driving substrate 39, and the light emitting surface c1 of the light emitting chip body 35 faces the filter structure 34. The driving substrate 39 is a base of the light emitting chip body 35 and the light filtering structure 34, and is also a main component of the display module 20, and the driving substrate 39 should be a substance that is easy to remove, can play a supporting role, has a certain thickness, and in some embodiments, can be a silicon, sapphire, glass, ceramic or polymer substrate, and the substrate material is not limited.
In some embodiments of the present application, the number of the light emitting chip bodies 35 is plural, the number of the light filtering structures 34 is equal to the number of the light emitting chip bodies 35, and the light filtering structures 34 are disposed on the light emitting surfaces c1 of the light emitting chip bodies 35 in a one-to-one correspondence. The driving substrate 39 may be provided with a plurality of light emitting chip bodies 35, and correspondingly, a plurality of light filtering structures 34 corresponding to the light emitting chip bodies 35 one by one are provided. The shape and size of the light filtering structure 34 can be consistent with those of the light emitting chip main body 35, and the shape and periphery of the light filtering structure 34 can be slightly larger than those of the light emitting chip main body 35, so that light emitted by the light emitting chip main body 35 can be well filtered by the light filtering structure 34. In addition, the shape periphery of the light filtering structure 34 may be slightly smaller than the shape periphery of the light emitting chip body 35 in some cases due to process limitations, and additional light emission optimization of the light emitting body 35 is required, which will not be described in detail herein.
In some embodiments of the present application, please refer to fig. 9, fig. 9 is a schematic diagram illustrating a structure of a light emitting chip 35 according to some embodiments of the present application. The two adjacent light-emitting chip main bodies 35 are arranged at intervals, and a first gap 354 is formed between the two adjacent light-emitting chip main bodies 35; the two adjacent filter structures 34 are arranged at intervals to form a second gap 343, the orthographic projection of the second gap 343 on the driving substrate 39 overlaps with the orthographic projection of the first gap 354 on the driving substrate 39, and the second gap 343 is communicated with the first gap 354. The plurality of light emitting chip bodies 35 are spaced apart by the first gaps 354 disposed between the light emitting chip bodies 35, and the plurality of filter structures 34 are spaced apart by the second gaps 343 disposed between the filter structures 34. The front projection of the second gap 343 on the driving substrate 39 overlaps the front projection of the first gap 354 on the driving substrate 39, and the second gap 343 and the first gap 354 may be completely overlapped on the front projection on the driving substrate 39, i.e. the shapes and the arrangement of the first gap 354 and the second gap 343 are consistent. The second gap 343 and the first gap 354 may also be partially overlapped, i.e. the second gap 343 may be slightly larger than the first gap 354. In addition, the shape periphery of the second gap 343 may be slightly smaller than the shape periphery of the first gap 354 in some cases due to process limitations, and the light emitting body 35 may be optimized for additional light emission, which will not be described in detail herein.
In some embodiments of the present application, the second gaps 343 are in communication with the first gaps 354, the plurality of light emitting chip bodies 35 are spaced apart by the first gaps 354, and the light filtering structures 34 are disposed in one-to-one correspondence with the light emitting chip bodies 35, so that the second gaps 343 between the light filtering structures 34 are also disposed in correspondence with the first gaps 354, and the first gaps 354 are in communication with the second gaps 343 in the Y direction. The first gap 354 is disposed between the light emitting chip main bodies 35, so that thermal strain caused by mismatch of thermal expansion coefficients between the driving substrate 39 and the light emitting chip main bodies 35 is effectively reduced, and the light emitting chip main bodies 35 can still maintain uniform, stable and reliable light emission under high current injection.
In some embodiments of the present application, both the first gap 354 and the second gap 343 are filled with an insulating material. The light emitting chip body 35 includes a peripheral surface c1, and the filter structure 34 includes a peripheral surface c2. The peripheral surface c1 is a surface of the light emitting chip body 35 connected between a surface of the driving substrate 39 facing away from the filter structure 34 and a surface of the filter structure 34 facing away from the driving substrate 39. The peripheral surface c2 is a surface of the light-emitting chip body 35, which is connected between a surface of the N electrode layer 32 facing away from the light-emitting chip body 35, and a surface of the N electrode layer 32 facing away from the light-emitting chip body 35. The insulating material covers the peripheral surfaces c1 and c2, and thus protects the light emitting chip main body 35 and the filter structure 34 from being damaged by external corrosion, impact, or the like. Further, the insulating material covers the peripheral surface c1 of the light emitting chip body 35, and thus it is possible to prevent current in the light emitting chip body 35 from leaking out through the side wall and the side wall of the P electrode or the N electrode, thereby improving the light emitting efficiency of the light emitting chip body 35. In addition, when the plurality of light emitting chip main bodies 35 are arranged in an array, the insulating layer can isolate each light emitting chip main body 35, so that the influence of the mutual interference of the currents of the adjacent light emitting chip main bodies 35 on the respective light emission is avoided.
In some embodiments of the present application, please refer to fig. 10, fig. 10 is a schematic diagram illustrating a light emitting chip according to some embodiments of the present application. The light emitting chip 30 further includes an N electrode layer 32, the N electrode layer 32 is disposed on a side of the plurality of filter structures 34 away from the plurality of light emitting chip bodies 35, and the N-doped gallium nitride layers 351 of the plurality of light emitting chip bodies 35 are electrically connected to the N electrode layer 32. The light emitting chip body 35 and the filter structure 34 are sequentially laminated on the first surface 311 of the driving substrate 39, and when the N electrode layer 32 and the P electrode layer 33 transmit current to the light emitting chip body 35, the light emitting chip body 35 emits light. The filter structure 34 is disposed on the light emitting surface c1 of the light emitting chip body 35, and the light emitted by the light emitting chip body 35 passes through the filter structure 34, and the filter structure 34 filters the light of the light emitting chip body 35. According to the different light emitting chip bodies 35, corresponding light emitting chip bodies 35 are arranged, for example, for the light emitting chip bodies 35 emitting red light, the filter structure 34 is arranged to filter light except for the wavelength of the red light, and after the light emitted by the light emitting chip bodies 35 passes through the filter structure 34, the red color purity of the red light emitting chip bodies 35 is improved only through the red light in a specific wavelength range. In other embodiments, the light emitting chip body 35 may be further configured to emit blue light, and accordingly, the filter structure 34 is configured to filter light other than blue light, and after the light emitted by the light emitting chip body 35 passes through the filter structure 34, only blue light in a specific wavelength range is passed, so as to improve the blue color purity of the blue light emitting chip body 35.
In another embodiment, the light emitting chip body 35 may be further configured to emit green light, and accordingly, the filter structure 34 is configured to filter light other than the wavelength of green light, and after the light emitted by the light emitting chip body 35 passes through the filter structure 34, the green color purity of the green light emitting chip body 35 is improved only through the green light in the specific wavelength range. The light emitting chip body 35 may be configured to emit light of other colors in addition to the above-exemplified several colors, and accordingly, the filter structure 34 may be configured to pass only light of a specific wavelength range to enhance the color purity of the light emitted from the light emitting chip body 35.
Wherein the P-type doped gallium nitride layer 353 is disposed on the surface of the driving substrate 39, in another embodiment, the P-electrode layer 33 may be disposed between the P-type doped gallium nitride layer 353 and the driving substrate 39. The N-type doped gallium nitride layer 351 is disposed on a side of the P-type doped gallium nitride layer 353 away from the driving substrate 39, and a quantum well layer 352 is disposed between the N-type doped gallium nitride layer 351 and the P-type doped gallium nitride layer 353. The N-type doped gallium nitride layer 351, the quantum well layer 352 and the P-type doped gallium nitride layer 353 are integrally formed.
In some embodiments of the present application, in order to enable the driving circuit to control the light emitting chip 30 to emit light, the N electrode layer 32 is electrically connected to the N-type doped gallium nitride layer 351, and the P electrode layer 33 is electrically connected to the P-type doped gallium nitride layer 353. The N electrode layer 32 and the filter structure 34 are stacked and disposed on a surface of the filter structure 34 facing away from the light emitting chip body 35, and the P electrode layer 33 may be disposed between the driving substrate 39 and the light emitting chip body 35, or may be disposed as an integral structure with the driving substrate 39, that is, the driving substrate 39 is disposed as a circuit board. A driving circuit may be further disposed in the driving substrate 39, and the N electrode layer 32 and the P electrode layer 33 may be coupled to the driving circuit on the substrate, and the driving circuit may apply a voltage to the N electrode layer 32 and the P electrode layer 33 to drive the light emitting chip body 35 to emit light.
In some embodiments of the present application, please refer to fig. 11, fig. 11 is a schematic diagram illustrating a light emitting chip according to some embodiments of the present application. The peripheral surface c3 of the light emitting chip 30 is covered with an insulating reflective layer 37, and the peripheral surface c3 is wrapped around the peripheral wall of the light emitting chip 30. When the light emitted from the light emitting chip body 35 is irradiated through the light filtering structure 34, a part of the light is emitted to the periphery of the light emitting chip 30. In order to improve the light utilization rate, the insulating reflective layer 37 is wrapped around the light emitting chip 30, and when the light irradiates on the insulating reflective layer 37, the insulating reflective layer 37 can reflect the light to the light filtering structure 34. The light emitting utilization rate of the light emitting chip body 35 is improved by providing the insulating reflection layer 37.
In some embodiments of the present application, an optical film may also be disposed on partially insulating reflective layer 37. The light emitted from the light emitting chip body 35 is partially reflected on the optical film, and the light is reflected through the filter structure 34 after being optically adjusted by the optical film. The optical film is arranged to increase the reflectivity, so that optical crosstalk is prevented.
In some embodiments of the present application, a buffer layer 38 may be further disposed between the substrate 31 and the light emitting chip main body 35, where the material of the buffer layer 38 can improve wettability between the surface of the sapphire substrate and gallium nitride, provide a nucleation center, relieve stress caused by lattice mismatch and thermal mismatch during the disposition, reduce curvature of the wafer, reduce occurrence of defects of an epitaxial layer, and significantly improve surface roughness and uniformity of a surface crystal orientation of the light emitting chip main body 35. In some embodiments of the present application, the buffer layer 38 material may be GaN (gallium nitride), alN (aluminum nitride), znO (zinc oxide), or the like.
The application also provides a processing method of the light emitting chip 30.
In some embodiments of a method of fabricating a light emitting chip 30 of the present application, the method includes: the filter structure 34 is formed on the light-emitting surface of the light-emitting chip body 35. The light emitting chip main body 35 and the light filtering structure 34 are integrally arranged, no gap is reserved between the light emitting chip main body 35 and the light filtering structure 34, other devices are not needed for assembling the light emitting chip main body 35 and the light filtering structure 34, the integration level of the light emitting chip main body and the light filtering structure 34 is high, the size of the light emitting chip 30 is further reduced, the light emitting chip main body is beneficial to miniaturized arrangement of the light emitting chip 30, the light emitting chip main body and the light filtering structure are more convenient to arrange on the display module 20 of the AR glasses, and the application scene of the ultra-high pixel density unit (Pixels Per Inch, PPI) can be met. The light emitting chip main body 35 and the light filtering structure 34 are integrally arranged, more light emitting chips 30 can be arranged in a unit area due to miniaturization of the light emitting chips 30, namely, more pixels can be arranged in the unit area, pixelation of the light emitting chips 30 is facilitated, and the more the display module 20 is more realistic.
In some embodiments of a method for fabricating a light emitting chip of the present application, the process of disposing the light emitting chip body 35 may be performed in an organometallic chemical vapor deposition (metalorganic chemical vapour deposition, MOCV D) apparatus that may control the introduction of a gas (or vaporized liquid) into the apparatus to perform a chemical reaction, thereby disposing the light emitting chip body 35. In the setting process, it is possible to determine when to stop or continue the setting by controlling the amount of the chemical substance introduced and by detecting the thickness of each layer of the light emitting chip body 35 that has been set
In some embodiments of a method of fabricating a light emitting chip 30 of the present application, as shown in fig. 12, first, a buffer layer 38 is provided on a substrate 31.
The substrate 31 in this embodiment refers to a medium that is not identical to the material of the light emitting chip body 35, and the material of the light emitting chip body 35 is a gallium nitride-based material, and therefore, the substrate 31 refers to a medium other than gallium nitride. In some embodiments of the present application, the substrate 31 is a substance that is easy to remove, can support, and has a certain thickness, and may be a silicon, sapphire, glass, ceramic, or polymer substrate. In the present embodiment, the substrate 31 is made of sapphire, and may be a C-Plane sapphire substrate, a patterned sapphire substrate, or another type of sapphire substrate.
As shown in fig. 13, the gallium nitride buffer layer 38 is provided at 900 to 1100 degrees.
Gallium nitride buffer, i.e., a layer of gallium nitride, is used as buffer layer 38. Specifically, the substrate 31 may be placed in an MOCVD apparatus, the temperature is controlled to 900 to 1100 degrees, and then trimethylgallium and ammonia gas are introduced to form a gallium nitride buffer layer. In this embodiment and other embodiments, unless otherwise specified, the term "degree" refers to "celsius".
In some embodiments of the present application, in order to be able to better set gallium nitride buffer at 900-1100 degrees, the set pressure may be controlled to be 100-1000 mBar, V/III to be 1000-10000, and the set rate to be 1-10 nm/min (nanometers/min), where the set pressure refers to air pressure; V/III means the molar ratio of group 5 element (N) to group 3 element (Ga); the set rate refers to the amount of increase in thickness of the substance set over a certain period of time.
A mask is provided over buffer layer 38. The mask material may be silicon dioxide and the thickness may be 500nm. Specifically, the mask may be manufactured by a Plasma Enhanced Chemical Vapor Deposition (PECVD) method, i.e., the substrate with the buffer layer 38 is removed from the sputtering station and then placed in a dedicated PECVD apparatus to complete the manufacture of the mask, which is specifically implemented in the prior art and is not described herein in detail.
The mask serves to prevent the light emitting chip 30 from being generated in a region where the light emitting chip 30 is not required, and thus the light emitting chip 30 is not disposed in a region covered by the mask, and of course, substances are formed on the mask during the disposition of the light emitting chip 30, and these substances can be removed by an etching step.
After the mask is manufactured, the filter structure 34 is grown on the buffer layer 38, where "growth" is a special term in the field of manufacturing the light emitting chip main body 35, and means a process of forming different layers of the light emitting chip main body 35 as shown in fig. 13 by stacking the buffer layer 38 layer by layer, for example, forming the gallium nitride buffer layer 38, forming the filter structure 34, forming the N-type doped gallium nitride 351, and so on, and finally forming the P-type doped gallium nitride 353.
As shown in fig. 13, first, after the buffer layer 38 is provided, the filter structure 34 is provided on the buffer layer 38.
In this step, different filter layers of the filter structure 34 are prepared by setting different doping concentrations. The filter structure 34 includes a first mirror 341 and a second mirror 342. The filter structure 34 is formed by staggering the first mirror 341 and the second mirror 342. The first mirror 341 includes an N-type doped gallium nitride layer 3411 and a first N-type doped gallium nitride layer 3412; the second mirror 342 includes a third doped gallium nitride layer 3421. Specifically, the electron 43 concentration of the undoped gallium nitride layer and the N-type weakly doped gallium nitride layer is 1016-1017/cm3, the electron 43 concentration of the N-type doped gallium nitride layer 351 is 1017-1019/cm3, and the electron 43 concentration of the N-type doped gallium nitride layer 351 is 1019-1020/cm3. By doping trace amounts of phosphorus, arsenic, antimony, etc. into the N-doped gallium nitride, a large number of negatively charged electrons 43 are generated, so that the concentration of free electrons 43 in the filter structure 34 is substantially higher than the concentration of holes 42. The period of the first mirror 341 and the second mirror 342 is set according to the difference of the passing light. Depending on the setting period, the following is a specific embodiment of the setting of the filter structure 34.
Example 1
The light passing through the filter structure 34 is red light with a central wavelength of 610 nm. Specifically, first two periods of the first mirror 341 are provided on the buffer layer 38. Then, a second mirror 342 is laminated on the first mirror 341 for one period; finally, the first mirror 341 of two periods is laminated on the second mirror 342. Wherein the first mirror 341 includes a first N-type doped gallium nitride layer 3411 and a second N-type doped gallium nitride layer 3412; the second mirror 342 is a third N-doped gallium nitride layer 3421.
In the first mirror 341, the thickness d1 of the first N-type doped gallium nitride layer 3411 is set to 98.07nm, the thickness d2 of the second N-type doped gallium nitride layer 3412 is set to 63.77nm, and the thickness d1 of the third N-type doped gallium nitride layer 3421 is set to 98.07nm.
Example two
The present embodiment differs from the first embodiment in that the period of the first mirror 341 is different. In this example, first, the first reflecting mirror 341 of three periods is set; then, a second mirror 342 is laminated on the first mirror 341 for one period; finally, the first mirror 341 of three periods is laminated on the second mirror 342. Wherein the first mirror 341 includes an N-type doped gallium nitride layer 3411 and a first N-type doped gallium nitride layer 3412; the second mirror 342 is a third N-doped gallium nitride layer 3421.
Example III
The light passing through the filter structure 34 is green light with a center wavelength of 515 nm. Specifically, first, three periods of the first mirror 341 are set; then, a second mirror 342 is laminated on the first mirror 341 for one period; finally, the first mirror 341 of three periods is laminated on the second mirror 342. Wherein the first mirror 341 includes a first N-type doped gallium nitride layer 3411 and a second N-type doped gallium nitride layer 3412; the second mirror 342 is a third N-doped gallium nitride layer 3421.
The first N-type doped gallium nitride layer 3412 in the above embodiment may be replaced by an N-type lightly doped gallium nitride layer.
The above-mentioned process is a process of disposing the light filtering structure 34 in the light emitting chip 30, and the normal operation flow is to dispose the light filtering structure 34 integrally formed with the light emitting chip body 35, but in order to prevent the preparation of the light emitting chip body 35 from affecting the light filtering structure 34, the barrier layer 36 is disposed before disposing the light emitting chip body 35 to space the light emitting chip body 35 from the light filtering structure 34, to protect the light filtering structure 34 from being affected, and the preparation of the barrier layer 36 will be described in detail below.
In the present embodiment, the barrier layer 36 may be a transparent barrier layer 36 formed of silicon oxide (SiO). The barrier layer 36 forms an N-doped gallium nitride layer 351 by vapor deposition. It is to be appreciated that in other embodiments of the present application, the barrier layer 36 may be a transparent barrier layer 36 formed of a material such as silicon nitride (SiN), or may be a non-transparent barrier layer 36 formed of a plastic, ceramic, or the like.
After the barrier layer 36 is provided, the light emitting chip body 35 is provided on the barrier layer 36.
In this embodiment, the light emitting chip body 35 sequentially stacks the N-type doped gallium nitride layer 351, the quantum well layer 352 and the P-type doped gallium nitride layer 353, i.e., the quantum well layer 352 is located between the N-type doped gallium nitride layer 351 and the P-type doped gallium nitride layer 353. Wherein N-type doped gallium nitride layer 351 is used to provide electrons 43 and p-type doped gallium nitride layer 353 is used to provide holes 42 for electrons 43. Under the action of the current, the redundant electrons 43 in the N-type doped gallium nitride layer 351 and the redundant electrons 43 and holes 42 in the P-type doped gallium nitride layer 353 can move to the quantum well layer 352, and the redundant electrons 43 in the N-type doped gallium nitride layer 351 and the redundant electrons 43 and holes 42 in the P-type doped gallium nitride layer 353 are combined in the quantum well layer 352 to generate photon luminescence, so that the luminescence of the luminescence chip main body 35 is realized. In this embodiment, a surface of the N-doped gallium nitride layer 351 facing away from the quantum well layer 352 is bonded to the filter structure 34.
The following description will specifically describe the process of setting the light emitting chip body 35, and the process of setting the light emitting chip body 35 may be performed in an MOCVD (metalorganic chemical vapour deposition, metal organic chemical vapor deposition) apparatus, which may control some gases (or vaporized liquids) to be introduced into the apparatus for chemical reaction, thereby setting the light emitting chip body 35. In the setting process, the amount of the chemical substances introduced and the thickness of each layer of the LED which is already set can be controlled to determine when to stop or continue setting, and specific control and detection methods are in the prior art and are not described herein. This setting process will be specifically described below.
The method can comprise the following steps:
first, the N-type doped gallium nitride layer 351 is provided under a condition of 450 to 500 degrees.
In this step, silane may be introduced to set N-type doped gallium nitride, where silane is a dopant for forming N-type gallium nitride, and the doping concentration may be 1E19/cm3. In order to be able to set the N-doped gallium nitride layer 351 better at 450-500 degrees, the set pressure can be controlled to be 200-400 mBar, V/III to be 6000-10000, and the set rate to be 0.55-8 um/h (micrometers/hour).
Next, after the N-type doped gallium nitride layer 351 is formed, the quantum well layer 352 of the light emitting chip body 35 is formed at 400 to 500 degrees.
In this step, trimethyl indium and ammonia gas may be introduced to provide the quantum well layer 352. The light emitting color of the light emitting chip body 35 is adjusted by controlling the composition of indium. Specifically, when the indium content in the gallium nitride light-emitting chip main body 35 is 10% -20%, the gallium nitride light-emitting chip main body 35 emits blue light; when the indium content in the gallium nitride light-emitting chip main body 35 is 20% -30%, the gallium nitride light-emitting chip main body 35 emits green light; when the indium content in the gallium nitride light-emitting chip main body 35 is 30% -40%, the gallium nitride light-emitting chip main body 35 emits red light. When the quantum well layer 352 is prepared, indium with different components is doped according to different light emitting requirements to prepare light emitting chip bodies 35 with different colors.
In order to be able to set the multiple quantum well layer 352 at 400 to 500 degrees, the set pressure may be controlled to 200 to 400mBar, V/III may be controlled to 12000 to 30000, and the set rate may be controlled to 0.5 to 3um/h.
Next, after the quantum well layer 352 is formed, the P-type doped gallium nitride layer 353 is formed at 400 to 500 degrees.
In the step, P-type doping is realized by introducing trimethyl gallium, ammonia and Cp2M, wherein the doping concentration is 1E20/cm < 3 >.
In order to set the P-doped gallium nitride layer 353 at 400-500 degrees, the setting pressure can be controlled to be 200-400 mBar, the V/III can be controlled to be 6000-10000, and the setting rate can be controlled to be 0.5-8 um/h (micrometers/hour).
As shown in fig. 13, after the above steps are completed, the filter structure 34, the barrier layer 36 and the light emitting chip body 35 are reversely transferred onto the second substrate 391, and the second substrate 391 may be a sapphire, silicon, glass, quartz, metal or other general substrate material, or may be a complementary metal oxide semiconductor substrate or a thin film transistor driving substrate for driving the LED.
After the filter structure 34, the blocking layer 36 and the light emitting chip body 35 are transferred to the second substrate 39 upside down, the buffer layer 38 may be selectively removed or may be remained. The filter structure 34 and the light emitting chip body 35 are then pixelated, i.e. the entire filter structure 34 and light emitting chip body 35 are etched into individual micro filter structures 34 and light emitting chip bodies 35. The filter structure 34 and the light emitting chip body 35 may be etched into different array patterns according to the use scene. Specifically, first, the second gap 343 is etched on the filter structure 34, wherein the deep groove of the second gap 343 is obtained by dry etching or wet etching, so that isolation is achieved between the filter structures 34. Next, the first gap 354 is etched on the light emitting chip main body 35, wherein a deep groove of the first gap 354 is obtained by dry etching or wet etching, so that isolation is achieved between the respective light emitting chip main bodies 35. The light filtering structure 34 and the light emitting chip main body 35 are miniaturized by etching, so that isolation is realized between each light emitting region and the light filtering region, and thermal strain caused by mismatch of thermal expansion coefficients between the light emitting chip main body 35 and the light filtering structure 34 is reduced, so that the gallium nitride-based light emitting chip 30 with uniform, stable and reliable light emission under high current injection is obtained.
The pixelated filter structure 34 is subjected to a microporation process, and after the N-type doped gallium nitride layer 351 with different doping concentrations is provided, the filter layer with different doping concentrations is subjected to a microporation process. Specifically, the first N-type doped gallium nitride layer 3411 and the third N-type doped gallium nitride layer 3421 in the optical filtering structure 34 are subjected to a micro-pore process by an electrochemical reaction method, and light refraction is formed by micro-pores in the first N-type doped gallium nitride layer 3411 and the third N-type doped gallium nitride layer 3421, so as to change the refractive index of the light and improve the color purity of the passing light. Specifically, the electrochemical reaction method can select electrolyte as acid, alkali and salt solution, such as 10% -40% hydrofluoric acid solution, 20% -50% potassium hydroxide solution and 5% -20% sodium chloride solution. The first gap 354 and the second gap 343 are filled with an insulating layer, and the insulating layer is made of an insulating material.
As shown in fig. 14, finally, an insulating reflective layer 37 is prepared on the peripheral surface c3 of the light emitting chip 30, and the insulating reflective layer 37 can reflect light onto the filter structure 34, so that the light emitting utilization rate of the light emitting chip main body 35 is improved by providing the insulating reflective layer 37.
In the description of the present specification, a particular feature, structure, material, or characteristic may be combined in any suitable manner in one or more embodiments or examples.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present application, and are not limiting; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application.
Claims (22)
1. A light emitting chip (30), characterized by comprising: a light emitting chip body (35) and a light filtering structure (34);
the light-emitting chip main body (35) is provided with a light-emitting surface (c 1); the light filtering structure (34) comprises a gallium nitride layer, and the gallium nitride layer is formed on a light emitting surface (c 1) of the light emitting chip main body (35).
2. The light emitting chip (30) according to claim 1, wherein the light emitting chip body (35) comprises an N-type doped gallium nitride layer (351), a quantum well layer (352) and a P-type doped gallium nitride layer (353) which are sequentially stacked, and the light emitting surface (c 1) of the light emitting chip body (35) is located on a side of the N-type doped gallium nitride layer (351) away from the quantum well layer (352).
3. The light emitting chip (30) according to claim 2, wherein the light emitting chip body (35) further comprises a barrier layer (36); the barrier layer (36) is formed on the surface of the N-type doped gallium nitride layer (351) away from the quantum well layer (352);
the surface of the barrier layer (36) far away from the N-type doped gallium nitride layer (351) forms a light emitting surface (c 1) of the light emitting chip main body (35).
4. A light emitting chip (30) according to any one of claims 1-3, wherein the gallium nitride layer comprises:
the first reflector (341), the first reflector (341) comprises a first N-type doped gallium nitride layer (3411) and a second N-type doped gallium nitride layer (3412) which are sequentially stacked and staggered, and the doping concentration in the first N-type doped gallium nitride layer (3411) is smaller than the doping concentration in the second N-type doped gallium nitride layer (3412).
5. The light emitting chip (30) of claim 4, wherein the physical thickness d1 of the first N-doped gallium nitride layer (3411) satisfies n1xd1= (λ/8-3λ/8), where N1 is the refractive index of the first N-doped gallium nitride layer (3411) and λ is the central wavelength of light emitted by the light emitting chip body (35); the physical thickness d2 of the second N-type doped gallium nitride layer (3412) satisfies n2xd2= (λ/8-3λ/8), wherein N2 is the refractive index of the second N-type doped gallium nitride layer (3412).
6. The light emitting chip (30) of claim 5, wherein the physical thickness of the first N-doped gallium nitride layer (3411) and the second N-doped gallium nitride layer (3412) is greater than or equal to 77.5nm and less than or equal to 232.5nm.
7. The light emitting chip (30) according to any one of claims 4-6, wherein in the first mirror (341), one of the first N-doped gallium nitride layer (3411) and the second N-doped gallium nitride layer (3412) is one more than the other.
8. The light emitting chip (30) of claim 7, wherein the gallium nitride layer further comprises:
a second reflecting mirror (342), wherein the second reflecting mirror (342) is laminated with the first reflecting mirror (341); the second mirror (342) includes a third N-doped gallium nitride layer (3421).
9. The light emitting chip (30) according to any one of claims 4-8, wherein in the filter structure (34), the first N-doped gallium nitride layer (3411) and the third N-doped gallium nitride layer (3421) are provided with a microporous structure.
10. The light emitting chip (30) according to any one of claims 1-9, wherein the number of light emitting chip bodies (35) is a plurality; the light emitting chip body (35) further includes:
A driving substrate (39), wherein a plurality of light-emitting chip main bodies (35) are arranged on the driving substrate (39) in an array manner, two adjacent light-emitting chip main bodies (35) are arranged at intervals, and a first gap (354) is formed between the two adjacent light-emitting chip main bodies (35);
the number of the light filtering structures (34) is also a plurality of, the number of the light filtering structures (34) is equal to the number of the light emitting chip main bodies (35), the light filtering structures (34) are arranged on the light emitting surfaces (c 1) of the light emitting chip main bodies (35) in a one-to-one correspondence mode, second gaps (343) are formed between two adjacent light filtering structures (34) at intervals, orthographic projections of the second gaps (343) on the driving substrate (39) are overlapped with orthographic projections of the first gaps (354) on the driving substrate (39), and the second gaps (343) are communicated with the first gaps (354).
11. The light emitting chip (30) according to claim 10, wherein the orthographic projection of the light emitting chip body (35) on the driving substrate (39) coincides with the orthographic projection center point of the filter structure (34) on the light emitting chip body (35) on the driving substrate (39).
12. The light emitting chip (30) of claim 11, wherein the first gap (354) and the second gap (343) are both filled with an insulating material.
13. The light emitting chip (30) according to any one of claims 1-12, further comprising:
the N electrode layer (32), N electrode layer (32) are transparent electrode, N electrode layer (32) set up in a plurality of filter structure (34) keep away from a plurality of one side of luminous chip main part (35), and a plurality of N type doped gallium nitride layer of luminous chip main part (35) all with N electrode layer (32) electricity is connected.
14. The light emitting chip (30) according to any one of claims 1-13, wherein the drive substrate (39) is a circuit board;
the P-type doped gallium nitride layers (353) of the plurality of light emitting chip bodies (35) are electrically connected to the driving substrate (39).
15. A display module comprising a display panel and a light emitting chip (30) according to any of the claims 1-13, said display panel being arranged on the light exit side of the light emitting chip (30).
16. An electronic device comprising a processor and the display module of claim 15, the processor configured to control the display module to display an image.
17. A method of processing a light emitting chip (30), the light emitting chip (30) including a light emitting chip body (35), the light emitting chip body (35) having a light emitting surface (c 1), the method comprising:
A filter structure (34) is formed on the light-emitting surface (c 1) of the light-emitting chip body (35).
18. The processing method according to claim 17, wherein forming the light filtering structure (34) on the light emitting surface of the light emitting chip body (35) includes:
forming a filter layer on a substrate (31);
forming a light emitting chip main body (35) on the surface of the light filtering structure (34) far away from the substrate (31), and enabling the light emitting surface of the light emitting chip main body (35) to face the light filtering layer;
the light emitting chip body (35) layer and the filter layer are pixelated to form a plurality of light emitting chip bodies (35) and a plurality of filter structures (34).
19. The processing method according to claim 17, wherein before pixelating the light emitting chip body (35) and the filter layer, the processing method further comprises:
a driving substrate (39) is arranged on the surface of the light-emitting chip main body (35) layer far away from the light filtering layer;
-removing the drive substrate (39);
the pixelating the light emitting chip body (35) and the filter layer comprises:
pixelating the filter layer to obtain a plurality of filter structures (34), wherein a second gap (343) is arranged between two adjacent filter structures (34);
and through the second gap (343), the luminescent chip main body (35) layers are pixelated to obtain a plurality of luminescent chip main bodies (35), and a first gap (354) is arranged between two adjacent luminescent chip main bodies (35).
20. The method of processing of claim 19, wherein after pixelating the filter layer, before pixelating the light emitting chip body (35) layer, further comprises:
the sidewalls of the filter structure (34) are porous.
21. The processing method according to any one of claims 17 to 20, characterized in that after the layer of pixelated light emitting chip bodies (35) further comprises:
an insulating material is filled in the first gap (354) and the second gap (343).
22. The processing method according to any one of claims 17 to 21, wherein an N electrode layer (32) is provided on a side of the plurality of filter structures (34) remote from the plurality of light emitting chip bodies (35), and the N electrode layer (32) is electrically formed to have a common cathode electrode with the N-type doped gallium nitride layer (351) of the plurality of light emitting chip bodies (35).
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| CN202210459523.7A CN117012874A (en) | 2022-04-27 | 2022-04-27 | Light-emitting chip, display module, electronic equipment and processing method of light-emitting chip |
| PCT/CN2023/089313 WO2023207727A1 (en) | 2022-04-27 | 2023-04-19 | Light-emitting chip, display module, electronic device and processing method for light-emitting chip |
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| CN202210459523.7A CN117012874A (en) | 2022-04-27 | 2022-04-27 | Light-emitting chip, display module, electronic equipment and processing method of light-emitting chip |
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| EP1764840A1 (en) * | 2005-09-15 | 2007-03-21 | SuperNova Optoelectronics Corporation | Gallium nitride semiconductor light emitting device |
| CN101740691A (en) * | 2009-12-22 | 2010-06-16 | 苏州纳晶光电有限公司 | High-power gallium nitride based LED with novel structure |
| CN102054916B (en) * | 2010-10-29 | 2012-11-28 | 厦门市三安光电科技有限公司 | Reflector, manufacturing method thereof and luminescent device applying same |
| CN105489721B (en) * | 2015-09-21 | 2018-02-27 | 大连德豪光电科技有限公司 | A kind of LED flip chip containing reflecting layer and preparation method thereof |
| CN109037407B (en) * | 2018-08-03 | 2024-04-23 | 厦门乾照光电股份有限公司 | Semiconductor light emitting chip and method for manufacturing the same |
| CN110061109B (en) * | 2019-04-26 | 2020-10-30 | 山东大学 | Porous GaN conductive DBR and preparation method thereof |
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