CN116718883A - Surge testing circuit based on SiC power device - Google Patents

Surge testing circuit based on SiC power device Download PDF

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Publication number
CN116718883A
CN116718883A CN202310451010.6A CN202310451010A CN116718883A CN 116718883 A CN116718883 A CN 116718883A CN 202310451010 A CN202310451010 A CN 202310451010A CN 116718883 A CN116718883 A CN 116718883A
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CN
China
Prior art keywords
surge
power device
unit
port
test
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Pending
Application number
CN202310451010.6A
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Chinese (zh)
Inventor
徐洋
王�华
汪剑华
雷洋
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Pn Junction Semiconductor Hangzhou Co ltd
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Pn Junction Semiconductor Hangzhou Co ltd
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Priority to CN202310451010.6A priority Critical patent/CN116718883A/en
Publication of CN116718883A publication Critical patent/CN116718883A/en
Pending legal-status Critical Current

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices
    • G01R31/2607—Circuits therefor
    • G01R31/2637—Circuits therefor for testing other individual devices
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/30—Structural combination of electric measuring instruments with basic electronic circuits, e.g. with amplifier
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/12—Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing
    • G01R31/1227—Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing of components, parts or materials
    • G01R31/1263—Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing of components, parts or materials of solid or fluid materials, e.g. insulation films, bulk material; of semiconductors or LV electronic components or parts; of cable, line or wire insulation
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/12—Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing
    • G01R31/1227—Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing of components, parts or materials
    • G01R31/1263—Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing of components, parts or materials of solid or fluid materials, e.g. insulation films, bulk material; of semiconductors or LV electronic components or parts; of cable, line or wire insulation
    • G01R31/129—Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing of components, parts or materials of solid or fluid materials, e.g. insulation films, bulk material; of semiconductors or LV electronic components or parts; of cable, line or wire insulation of components or parts made of semiconducting materials; of LV components or parts
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices
    • G01R31/2642—Testing semiconductor operation lifetime or reliability, e.g. by accelerated life tests
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Emergency Protection Circuit Devices (AREA)

Abstract

The invention relates to a testing technology of SiC power devices, and discloses a surge testing circuit based on the SiC power devices, which comprises an energy storage unit and a control sampling isolation unit; the device also comprises a surge executing unit and a surge control unit; the energy storage unit is used for providing pulse energy for surge test of the SiC power test device; the control sampling isolation unit is used for carrying out current sampling and surge test control on the SiC power test device; the surge control unit is used for controlling the surge test of the SiC power test device; the surge execution unit is used for carrying out different tests on the SiC power test device and feeding back test results to the control sampling isolation unit. The surge test circuit designed by the invention supports a single or repeated pulse surge current test scheme, and has reverse withstand voltage test, so that the minimum surge current which damages the device can be found.

Description

Surge testing circuit based on SiC power device
Technical Field
The invention relates to a testing technology of SiC power devices, in particular to a surge testing circuit based on the SiC power devices.
Background
The surge test is an important index of the reliability of the power device, and refers to the capability of the power device to bear surge current, when the power is turned on instantly or the circuit is abnormal, overload current far greater than rated current is generated, the surge stress is mainly borne by the body diode or the diode of the MOSFET, so the surge test is to test the maximum current which can be borne by the diode or the body diode, and the characteristics of the diode and the body diode are changed when the high current occurs. The testing methods and standards for Si devices cannot be fully followed for third generation semiconductor SiC body diodes and diode tests.
The SiC diode and the body diode are additionally tested for single pulse surge current of us grade, and the current is 8-10 times of rated current, and the test can examine the capability of the diode to bear surge current when the diode is initially powered up
The diode or the body diode mainly plays a role of follow current in actual use, and the received switching frequency level repeats current, so that the repeated surge test on the diode can inspect the electric stress received in the actual use process of the device, and the method can be used for evaluating the limit capability of the device in actual use.
As in prior art 1: CN115389900 mainly uses LC resonance to generate a sine waveform for surge test, and two devices under test are required to complete the test, and the devices under test are also required to be switched, which is complex to implement.
As in prior art 2: CN115166463 only performs surge test, but cannot realize leakage current detection (i.e. reverse withstand voltage test), and cannot accurately measure specific current values affecting static parameters of devices by surge test verification only by the technology.
Prior art 3: CN114325284 uses LC resonance to generate sine wave for surge testing and determines device failure by measuring the change in resistance between GD, GS, DS (additional equipment is required to test the resistance).
Prior art 4: CN110794278 utilizes LC resonance to generate sine wave for surge test, and determines device failure by measuring GS resistance change or comparing transfer characteristic curves (GS resistance and transfer characteristic curves need additional equipment for detection).
Disclosure of Invention
Aiming at the problems that a surge test design circuit is complex, operation is troublesome and reverse withstand voltage test cannot be performed in the prior art, the invention provides a surge test circuit based on a SiC power device.
In order to solve the technical problems, the invention is solved by the following technical scheme:
the surge testing circuit based on the SiC power device comprises an energy storage unit and a control sampling isolation unit; the device also comprises a surge executing unit and a surge control unit;
the energy storage unit is used for providing pulse energy for surge test of the SiC power test device;
the control sampling isolation unit is used for carrying out current sampling and surge test control on the SiC power test device;
the surge control unit is used for controlling the surge test of the SiC power test device;
the surge execution unit is used for carrying out different tests on the SiC power test device and feeding back test results to the control sampling isolation unit.
Preferably, the surge control unit includes a first power device Q1, a second power device Q2, a third power device Q3, and a fourth power device Q4;
the first port of the first power device Q1 is connected with the first port of the third power device Q34 and is connected with the control sampling isolation unit;
the first port of the second power device Q2 is connected with the first port of the fourth power device Q4 and is connected with the control sampling isolation unit;
the second port of the first power device Q1 and the second port of the second power device Q2 are connected with the input voltage positive electrode;
the third port of the third power device Q3 and the third port of the fourth power device Q4 are connected with the input voltage cathode;
the third port of the first power device Q1 is connected with the second port of the fourth power device Q4, and the third port of the second power device Q2 is connected with the second port of the third power device Q3;
the third port of the first power device Q1 is connected to the surge execution unit, and the second port of the third power device Q3 is connected to the other end of the surge execution unit.
Preferably, the surge execution unit comprises a SiC power test device, a surge execution unit control resistor R2 and a current sampling unit; one end of the SiC power testing device is connected with the surge execution unit control resistor R2, and the other end of the SiC power testing device is connected with the third port of the first power device Q1; the surge executing unit controls the other end of the resistor R2 and the current sampling unit; the other end of the current sampling unit is connected with a second port of the third power device and the control sampling isolation unit.
Preferably, the surge execution unit further includes a reverse test protection unit including a resistor R1 and a diode D1; the resistor R1 and the diode D1 are mutually connected in parallel, one end of the parallel connection is connected with the SiC power testing device, and the other end of the parallel connection is connected with the surge execution unit control resistor R2.
Preferably, the battery pack further comprises a charging unit; the charging unit comprises a current limiting resistor R3, a fifth effect device Q5 and a diode D2; one end of a current limiting resistor R3 is connected with the positive electrode of the power supply, the other end of the current limiting resistor R3 is connected with the second port of a fifth effect device Q5, the third port of the fifth effect device Q5 is connected with a diode D2, and the first port of the fifth effect device Q5 is connected with a control sampling isolation unit; the other end of the diode D2 is connected to the surge control unit.
Preferably, the device further comprises a discharge unit, wherein the discharge unit comprises a resistor R4 and a sixth effect tube Q6; one end of the resistor R4 is connected with the positive electrode of the power supply; the other end is connected with a second port of a sixth effect device Q6, and a third port of the sixth effect device Q6 is connected with the negative electrode of the power supply; the first port of the sixth effect device Q6 controls the sampling isolation cell connection.
Preferably, the energy storage unit comprises a capacitor C1 and a capacitor C2, the capacitor C1 and the capacitor C2 are connected in parallel, one end of the capacitor C1 is connected with the positive electrode of the power supply and the surge control unit after being connected in parallel, and the other end of the capacitor C1 is connected with the negative electrode of the power supply and the surge control unit.
Preferably, the first power device Q1, the second power device Q2, the third power device Q3, and the fourth power device Q4 are IGBTs or MOSFETs.
Preferably, the device further comprises an upper computer control and display unit, and the control sampling isolation unit is controlled and displayed through the upper computer control and display unit.
The invention has the remarkable technical effects due to the adoption of the technical scheme:
according to the test circuit designed by the invention, a forward surge pulse current is added to the DUT when the first power device Q1 and the third power device Q3 are conducted, a reverse withstand voltage is applied to the DUT when the second power device Q2 and the fourth power device Q4 are conducted, whether the leakage of the leakage device is changed or not is observed through current sampling, and the surge current test of single pulse and repeated pulse can be realized by reasonably controlling the conduction time of the first power device Q1, the third power device Q3, the second power device Q2 and the fourth power device Q4.
The surge test circuit designed by the invention supports a single or repeated pulse surge current test scheme, and has reverse withstand voltage test, so that the minimum surge current which damages the device can be found.
Drawings
FIG. 1 is a system diagram of embodiment 1 of the present invention.
Fig. 2 is a system diagram of embodiment 2 of the present invention.
Fig. 3 is a system diagram of embodiment 3 of the present invention.
Fig. 4 is a system diagram of embodiment 4 of the present invention.
Fig. 5 is a body diode test of the present invention.
Fig. 6 is a circuit diagram of a forward surge current surge test of the present invention.
FIG. 7 is a circuit diagram of the reverse withstand voltage test after the impact of the present invention.
Fig. 8 is a test waveform diagram of the present invention.
Fig. 9 is a single pulse test flow chart of the present invention.
Fig. 10 is a flow chart of a repetitive pulse test of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples.
Example 1
A surge testing circuit based on SiC power devices, in fig. 1, comprising an energy storage unit and a control sampling isolation unit; the device also comprises a surge executing unit and a surge control unit;
the energy storage unit is used for providing pulse energy for surge test of the SiC power test device;
the control sampling isolation unit is used for carrying out current sampling and surge test control on the SiC power test device;
the surge control unit is used for controlling the surge test of the SiC power test device;
the surge execution unit is used for carrying out different tests on the SiC power test device and feeding back test results to the control sampling isolation unit.
The first power device Q1, the second power device Q2, the third power device Q3 and the fourth power device Q4 are IGBT or MOSFET.
The surge control unit comprises a first power device Q1, a second power device Q2, a third power device Q3 and a fourth power device Q4;
the G port of the first power device Q1 is connected with the G port of the third power device Q34 and is connected with the control sampling isolation unit;
the G port of the second power device Q2 is connected with the G port of the fourth power device Q4 and is connected with the control sampling isolation unit;
the D port of the first power device Q1 and the D port of the second power device Q2 are connected with the input voltage positive electrode;
the S port of the third power device Q3 and the S port of the fourth power device Q4 are connected with the input voltage cathode;
the S port of the first power device Q1 is connected with the D port of the fourth power device Q4, and the S port of the second power device Q2 is connected with the D port of the third power device Q3;
the S port of the first power device Q1 is connected with the surge execution unit, and the D port of the third power device Q3 is connected with the other end of the surge execution unit.
The energy storage unit comprises a capacitor C1 and a capacitor C2, the capacitor C1 and the capacitor C2 are connected in parallel, one end of the capacitor C1 is connected with the positive electrode of the power supply and the surge control unit after being connected in parallel, and the other end of the capacitor C1 is connected with the negative electrode of the power supply and the surge control unit.
The surge execution unit comprises a SiC power test device, a surge execution unit control resistor R2 and a current sampling unit; one end of the SiC power testing device is connected with the surge execution unit control resistor R2, and the other end of the SiC power testing device is connected with the S port of the first power device Q1; the surge executing unit controls the other end of the resistor R2 and the current sampling unit; the other end of the current sampling unit is connected with a D port of the third power device and the control sampling isolation unit. The SiC power test device in this embodiment is a diode.
The surge execution unit further comprises a reverse test protection unit, wherein the reverse test protection unit comprises a resistor R1 and a diode D1; the resistor R1 and the diode D1 are mutually connected in parallel, one end of the parallel connection is connected with the SiC power testing device, and the other end of the parallel connection is connected with the surge execution unit control resistor R2.
Example 2
On the basis of embodiment 1, in fig. 2, the present embodiment further includes a charging unit; the charging unit comprises a current limiting resistor R3, a fifth effect device Q5 and a diode D2; one end of a current limiting resistor R3 is connected with the positive electrode of the power supply, the other end of the current limiting resistor R3 is connected with the D port of a fifth effect device Q5, the S port of the fifth effect device Q5 is connected with a diode D2, and the G port of the fifth effect device Q5 is connected with a control sampling isolation unit; the other end of the diode D2 is connected to the surge control unit.
Example 3
On the basis of the above embodiment, the present embodiment in fig. 3 further includes a discharge unit, where the discharge unit includes a resistor R4 and a sixth effector Q6; one end of the resistor R4 is connected with the positive electrode of the power supply; the other end is connected with a D port of a sixth effect device Q6, and an S port of the sixth effect device Q6 is connected with the negative electrode of the power supply; the G port of the sixth effect device Q6 controls the sampling isolation unit connection.
The energy storage unit comprises a capacitor C1 and a capacitor C2, the capacitor C1 and the capacitor C2 are connected in parallel, one end of the capacitor C1 is connected with the positive electrode of the power supply and the surge control unit after being connected in parallel, and the other end of the capacitor C1 is connected with the negative electrode of the power supply and the surge control unit.
Example 4
Based on the above embodiments, the embodiment in fig. 4 further includes an upper computer control and display unit, and the control sampling isolation unit is controlled and displayed by the upper computer control and display unit.
Example 5
On the basis of the above embodiment, the difference from the above embodiment is that the first power device Q1, the second power device Q2, the third power device Q3, the fourth power device Q4, the fifth power device Q5, and the sixth power device Q6 of the present embodiment are IGBTs.
Example 6
On the basis of the above embodiment, the difference from the above embodiment is that the first power device Q1, the second power device Q2, the third power device Q3, the fourth power device Q4, the fifth power device Q5, and the sixth power device Q6 of the present embodiment are MOSFETs.
Example 7
Based on the above embodiment, the SiC power test device of this embodiment in fig. 5 is a body diode.
Example 8
Based on the above embodiment, fig. 6 is a forward surge current surge test circuit, and fig. 7 is a test circuit for reverse withstand voltage test after surge; fig. 8 is a circuit operation timing sequence and a test waveform diagram, in the time T0-T1, the first power device Q1 and the third power device Q3 are controlled to be turned on, a forward surge current is provided for the device to be tested to test, the magnitude of the surge current can be detected through current sampling, in the time T3-T4, the second power device Q2 and the fourth power device Q4 are controlled to be turned on, at this time, a reverse voltage is provided for the device to be tested, the magnitude of the leakage current of the device can be detected through current sampling, and the device failure can be judged through the change of the leakage current. The reverse withstand voltage test mainly tests leakage current of a device; leakage current is a static parameter of a device, and the current value is typically within 100uA, when exceeding 100uA the device static parameter is considered to have changed the device to fail.
Example 9
Based on the above embodiment, fig. 9 is a single pulse test, where the steps of the single pulse test include:
s1, a fifth power device Q5 is conducted, an energy storage unit is charged, a capacitor C1 and a capacitor C2 are charged, and when a charging preset value is reached, the fifth power device Q5 is disconnected;
s2, controlling the first power device Q1 and the third power device Q3 to be conducted, wherein the conducting time is surge testing time, and a single pulse current is added to the SiC power testing power device for testing;
and S3, after the heat of the SiC power testing power device is dissipated, controlling the second power device Q2 and the fourth power device Q4 to be conducted, measuring leakage current, and if the leakage current exceeds a set leakage current set value, disabling the SiC power testing power device, otherwise, disabling the SiC power testing power device.
FIG. 10 is a repetitive pulse test; the step of repeating the pulse test includes: step 1, a fifth power device Q5 is conducted, an energy storage unit is charged, a capacitor C1 and a capacitor C2 are charged, and when a charging preset value is reached, the fifth power device Q5 is disconnected;
step 2, controlling the first power device Q1 and the third power device Q3 to be conducted, wherein the conducting time is surge testing time, and a single pulse current is added to the SiC power testing power device for testing;
step 3, after the SiC power testing power device dissipates heat, controlling the second power device Q2 and the fourth power device Q4 to be conducted, measuring leakage current, when the leakage current exceeds a set leakage current set value, conducting the sixth power device Q6, discharging the energy storage unit, and discharging the capacitor C1 and the capacitor C2; otherwise, returning to the step 1.

Claims (9)

1. The surge testing circuit based on the SiC power device comprises an energy storage unit and a control sampling isolation unit; the device is characterized by further comprising a surge executing unit and a surge control unit;
the energy storage unit is used for providing pulse energy for surge test of the SiC power test device;
the control sampling isolation unit is used for carrying out current sampling and surge test control on the SiC power test device;
the surge control unit is used for controlling the surge test of the SiC power test device;
the surge execution unit is used for carrying out different tests on the SiC power test device and feeding back test results to the control sampling isolation unit.
2. The SiC power device-based surge testing circuit of claim 1, wherein the surge control unit includes a first power device Q1, a second power device Q2, a third power device Q3, a fourth power device Q4;
the first port of the first power device Q1 is connected with the first port of the third power device Q34 and is connected with the control sampling isolation unit;
the first port of the second power device Q2 is connected with the first port of the fourth power device Q4 and is connected with the control sampling isolation unit;
the second port of the first power device Q1 and the second port of the second power device Q2 are connected with the input voltage positive electrode;
the third port of the third power device Q3 and the third port of the fourth power device Q4 are connected with the input voltage cathode;
the third port of the first power device Q1 is connected with the second port of the fourth power device Q4, and the third port of the second power device Q2 is connected with the second port of the third power device Q3;
the third port of the first power device Q1 is connected to the surge execution unit, and the second port of the third power device Q3 is connected to the other end of the surge execution unit.
3. The surge testing circuit based on the SiC power device according to claim 2, wherein the surge execution unit comprises the SiC power testing device, a surge execution unit control resistor R2 and a current sampling unit; one end of the SiC power testing device is connected with the surge execution unit control resistor R2, and the other end of the SiC power testing device is connected with the third port of the first power device Q1; the surge executing unit controls the other end of the resistor R2 and the current sampling unit; the other end of the current sampling unit is connected with a second port of the third power device and the control sampling isolation unit.
4. The SiC power device-based surge testing circuit of claim 3, wherein the surge execution unit further comprises a reverse test protection unit comprising a resistor R1 and a diode D1; the resistor R1 and the diode D1 are mutually connected in parallel, one end of the parallel connection is connected with the SiC power testing device, and the other end of the parallel connection is connected with the surge execution unit control resistor R2.
5. The SiC power device based surge testing circuit of claim 1, further comprising a charging unit; the charging unit comprises a current limiting resistor R3, a fifth effect device Q5 and a diode D2; one end of a current limiting resistor R3 is connected with the positive electrode of the power supply, the other end of the current limiting resistor R3 is connected with the second port of a fifth effect device Q5, the third port of the fifth effect device Q5 is connected with a diode D2, and the first port of the fifth effect device Q5 is connected with a control sampling isolation unit; the other end of the diode D2 is connected to the surge control unit.
6. The SiC power device based surge testing circuit of claim 1, further comprising a discharge unit comprising a resistor R4 and a sixth transistor Q6; one end of the resistor R4 is connected with the positive electrode of the power supply; the other end is connected with a second port of a sixth effect device Q6, and a third port of the sixth effect device Q6 is connected with the negative electrode of the power supply; the first port of the sixth effect device Q6 controls the sampling isolation cell connection.
7. The surge testing circuit based on the SiC power device according to claim 1, wherein the energy storage unit comprises a capacitor C1 and a capacitor C2, the capacitor C1 and the capacitor C2 are connected in parallel, one end of the capacitor C1 is connected with the positive electrode of the power supply and the surge control unit after being connected in parallel, and the other end of the capacitor C1 is connected with the negative electrode of the power supply and the surge control unit.
8. The SiC power device based surge testing circuit of claim 1, wherein the first power device Q1, the second power device Q2, the third power device Q3, and the fourth power device Q4 are IGBTs or MOSFETs.
9. The surge testing circuit based on the SiC power device according to claim 1, further comprising an upper computer control and display unit, wherein the control sampling isolation unit is controlled and displayed through the upper computer control and display unit.
CN202310451010.6A 2023-04-21 2023-04-21 Surge testing circuit based on SiC power device Pending CN116718883A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310451010.6A CN116718883A (en) 2023-04-21 2023-04-21 Surge testing circuit based on SiC power device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310451010.6A CN116718883A (en) 2023-04-21 2023-04-21 Surge testing circuit based on SiC power device

Publications (1)

Publication Number Publication Date
CN116718883A true CN116718883A (en) 2023-09-08

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Application Number Title Priority Date Filing Date
CN202310451010.6A Pending CN116718883A (en) 2023-04-21 2023-04-21 Surge testing circuit based on SiC power device

Country Status (1)

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CN (1) CN116718883A (en)

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Applicant after: Painjie Semiconductor (Zhejiang) Co.,Ltd.

Address before: Room D3204, 3rd Floor, Building 1 (North), No. 368 Liuhe Road, Puyan Street, Binjiang District, Hangzhou City, Zhejiang Province

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