CN116699200A - Inter-board connector testing device and testing method - Google Patents

Inter-board connector testing device and testing method Download PDF

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Publication number
CN116699200A
CN116699200A CN202310405912.6A CN202310405912A CN116699200A CN 116699200 A CN116699200 A CN 116699200A CN 202310405912 A CN202310405912 A CN 202310405912A CN 116699200 A CN116699200 A CN 116699200A
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China
Prior art keywords
test
pin
board
interface
inter
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CN202310405912.6A
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Chinese (zh)
Inventor
申鹏飞
罗雄科
杨磊
尤艳宏
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Xi'an Zequan Semiconductor Technology Co ltd
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Xi'an Zequan Semiconductor Technology Co ltd
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Priority to CN202310405912.6A priority Critical patent/CN116699200A/en
Publication of CN116699200A publication Critical patent/CN116699200A/en
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)

Abstract

The application discloses an inter-board connector testing device and a testing method. Wherein the board to be tested is provided with a first inter-board connector; the first test board is provided with a second inter-board connector which is matched and connected with the first inter-board connector, and the second inter-board connector comprises a plurality of test pins which are sequentially connected in series; the second test board is connected with the first test board, and the second test board includes the power of being connected with the head end test pin in a plurality of test pins and the indicating element of being connected with the tail end test pin in a plurality of test pins, and the second test board is used for testing a plurality of test pins. The application solves the problems that the traditional connector detection needs visual observation, microscope photographing and whether the connector on the PCB is well welded or not can only be judged by the test module.

Description

Inter-board connector testing device and testing method
Technical Field
The application relates to the technical field of testing devices, in particular to a testing device and a testing method for an inter-board connector.
Background
Along with the development of technology, the complexity of the test signal is higher and higher, and the precision of the test signal is more and more changed, so that higher requirements are also put on the detection of the test signal.
In the inspection of semiconductor driving chips, a B2B Connector (board Connector) is used to connect a load, such as a battery, a camera or a display screen, and if the B2B Connector on a PCB (printed circuit board) is not tested in a PCB packaging factory, bad products flow into the next assembly process, and testing in the next assembly process is performed to connect the load, which can increase testing and maintenance costs.
Based on this, a new solution is needed.
Disclosure of Invention
In view of the above, the embodiment of the application provides a testing device and a testing method for an inter-board connector.
The embodiment of the application provides the following technical scheme:
the device for testing the inter-board connector in the embodiment of the application comprises:
the device comprises a board to be tested, wherein a first inter-board connector is arranged on the board to be tested;
the first test board is provided with a second inter-board connector, the second inter-board connector is connected with the first inter-board connector in a matched manner, and the second inter-board connector comprises a plurality of test pins which are sequentially connected in series;
the second test board is connected with the first test board, the second test board comprises a power supply connected with the head end test pins of the test pins and an indicating element connected with the tail end test pins of the test pins, and the second test board is used for testing the test pins.
Further, the second test board further includes:
the test interface is connected with the tail end test pin;
and the microcontroller is connected with the test interface and the power supply and is used for detecting whether the test interface is in a high level or not.
Further, the second test board further includes:
the first pin of the optical coupler is connected with the microcontroller, the second pin of the optical coupler is grounded, and the fourth pin of the optical coupler is connected with one test pin;
the expansion chip is connected with the microcontroller and comprises at least two expansion interfaces for expanding the input/output interfaces of the microcontroller;
the analog switch is connected with the two expansion interfaces respectively and is connected with a third pin of the optocoupler;
the precise measurement unit is respectively connected with the power supply and the microcontroller, and a first output interface, a second output interface, a first induction interface and a second induction interface of the precise measurement unit are respectively connected with the analog switch, and the first output interface, the second output interface, the first induction interface and the second induction interface are used for being connected with a third pin of the optical coupler under the control of the analog switch.
Further, the first test board further includes:
the voltage drop elements are correspondingly connected with the test pins in series.
The method for testing the inter-board connector, which is provided by the embodiment of the application, is applied to the device for testing the inter-board connector, and comprises the following steps:
applying a voltage to the power supply;
acquiring indication information of an indication element;
and under the condition that the indication information is conduction information, judging that a plurality of test pins are normally used.
Further, under the condition that voltage is applied to the power supply, if the microcontroller detects that the test interface is at a high level, it is judged that a plurality of test pins are normally used.
Further, the method for testing the inter-board connector further comprises the following steps:
the microcontroller adjusts the first pin of the optocoupler to be in a high level so as to enable the first pin and the second pin of the optocoupler to be conducted, and enable the third pin and the fourth pin to be conducted;
the microcontroller adjusts two expansion interfaces of the expansion chip to be high level, so that the analog switch controls a third pin of the optical coupler to be connected with a first output interface, a second output interface, a first induction interface and a second induction interface of the precise measurement unit respectively;
applying current to the first output interface, and acquiring a first induced voltage of the first induced interface and a second induced voltage of the second induced interface;
and judging whether the test pin is normally used or not based on the first induced voltage and the second induced voltage.
Further, the determining whether the test pin is normally used based on the first induced voltage and the second induced voltage includes:
and under the condition that the first induced voltage is equal to the second induced voltage, judging that the test pin is open.
Further, the determining whether the test pin is normally used based on the first induced voltage and the second induced voltage includes:
and under the condition that the second induced voltage is at zero level, judging that the test pin is short-circuited.
Further, the determining whether the test pin is normally used based on the first induced voltage and the second induced voltage includes:
and under the condition that the second induced voltage is a preset voltage value, judging that the test pin is normally used.
Compared with the prior art, the beneficial effects achieved by the at least one technical scheme adopted by the embodiment of the application at least comprise:
according to the testing device and the testing method for the inter-board connector, the pins of the first inter-board connector to be tested are led out by using the first testing board, and the function test is carried out on the plurality of testing pins of the inter-board connector on the first testing board on the second testing board, so that the problems that naked eyes are needed to be observed in traditional connector detection, a microscope is used for photographing, and whether the connectors on the PCB are well welded or not can be judged only by the testing module are solved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of an inter-board connector testing apparatus according to an embodiment of the present application;
FIG. 2 is a schematic diagram illustrating the connection of a second board connector according to an embodiment of the present application;
FIG. 3 is a schematic diagram of an optical coupler according to an embodiment of the present application;
FIG. 4 is a schematic diagram of the connection of a microcontroller according to an embodiment of the present application;
fig. 5 is a schematic diagram illustrating connection of test pins of a second board connector according to an embodiment of the application.
The reference numerals of the present application are as follows:
10. a board to be measured; 11. a first board-to-board connector;
20. a first test plate; 21. a second board-to-board connector; 211. testing pins;
30. a second test plate; 31. a power supply; 32. an indicating element; 33. testing an interface; 34. a microcontroller; 35. an optical coupler; 36. expanding the chip; 37. an analog switch; 38. a precision measurement unit; 39. a pressure drop element.
Detailed Description
Embodiments of the present application will be described in detail below with reference to the accompanying drawings.
Other advantages and effects of the present application will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present application with reference to specific examples. It will be apparent that the described embodiments are only some, but not all, embodiments of the application. The application may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present application. It should be noted that the following embodiments and features in the embodiments may be combined with each other without conflict. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
It is noted that various aspects of the embodiments are described below within the scope of the following claims. It should be apparent that the aspects described herein may be embodied in a wide variety of forms and that any specific structure and/or function described herein is merely illustrative. Based on the present disclosure, one skilled in the art will appreciate that one aspect described herein may be implemented independently of any other aspect, and that two or more of these aspects may be combined in various ways. For example, apparatus may be implemented and/or methods practiced using any number and aspects set forth herein. In addition, such apparatus may be implemented and/or such methods practiced using other structure and/or functionality in addition to one or more of the aspects set forth herein.
It should also be noted that the illustrations provided in the following embodiments merely illustrate the basic concept of the present application by way of illustration, and only the components related to the present application are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complicated.
In addition, in the following description, specific details are provided in order to provide a thorough understanding of the examples. However, it will be understood by those skilled in the art that the present application may be practiced without these specific details.
The traditional connector detection needs to use naked eyes to observe the reliability of the test, or uses a microscope to take a photograph for detection, but the microscope can not judge the condition of the cold joint when taking a photograph, so that only the test module can be used for judging whether the connector on the PCB is well welded, for example, the mobile phone camera module is connected, and whether the connector connected with the mobile phone camera module is well welded can be judged.
Based on this, the embodiment of the application provides a processing scheme: as shown in fig. 1, the present application solves the problem that the conventional inspection method needs to be observed by naked eyes or by a microscope by using the second board-to-board connector 21 on the first test board 20 to draw out the interface of the first board-to-board connector 11 on the board 10 to be inspected and using the second test board 30 to draw out the interface on the first test board 20 to perform the functional test on the test pins 211 of the second board-to-board connector 21.
The following describes the technical scheme provided by each embodiment of the present application with reference to the accompanying drawings.
Example 1
As shown in fig. 1 to 2, an inter-board connector testing device according to an embodiment of the present application includes a board to be tested 10, a first test board 20, and a second test board 30. Wherein the board to be tested 10 is provided with a first inter-board connector 11; the first test board 20 is provided with a second inter-board connector 21, the second inter-board connector 21 is in matched connection with the first inter-board connector 11, and the second inter-board connector 21 comprises a plurality of test pins 211 which are sequentially connected in series; the second test board 30 is connected to the first test board 20, the second test board 30 includes a power supply 31 connected to a head test pin 211 of the plurality of test pins 211 and an indicating element 32 connected to a tail test pin 211 of the plurality of test pins 211, and the second test board 30 is used for testing the plurality of test pins 211.
Specifically, the power supply 31 and the indicating member 32 are both mounted on the second test board 30.
Wherein the first test board is an FPC board (Flexible Printed Circuit).
The second board-to-board connector 21 is used for leading out pins of the first board-to-board connector 11 so as to facilitate the second test board 30 to perform a test.
Wherein the second inter-board connector 21 is mounted on the first test board 20.
The test pins 211 of the second board-to-board connector 21 may be sequentially connected in series using metal wires.
For example, as shown in fig. 2, test_pin1 (Test pin 211), test_pin3, test_pin5, and test_pin2 on the second board connector 21 may be sequentially connected in series.
The power source 31 may be a power source 31 interface or an input power source 31.
In the case where the power supply 31 is an interface of the power supply 31, the power supply 31 may be connected to the external power supply 31.
The indication element 32 may be a light element, a sound element, an acousto-optic element, etc., for example, the indication element 32 may be an LED indicator light, a buzzer, etc.
The head end test pins 211 are pins positioned at the head end after a plurality of test pins 211 are connected in series; the tail test pins 211 are pins at the tail after the test pins 211 are connected in series.
Specifically, in the case that the power supply 31 applies a voltage to the head end test pins 211, since the plurality of test pins 211 are connected in series, the indication element 32 will send out the on information to indicate that the plurality of test pins 211 are used normally when all the test pins 211 can be used normally.
For example, as shown in fig. 2, when a voltage is applied to Test pin1, if the LED emits light, it is explained that the plurality of Test pins 211 can be used normally.
Wherein the indication element 32 is also grounded in case of connection with the tail test pin 211.
Further, the second test board 30 also includes a test interface 33 and a microcontroller 34. The test interface 33 is connected with the tail test pin 211; the microcontroller 34 is connected to the power supply 31 and the test interface 33, respectively, and the microcontroller 34 is configured to detect whether the test interface 33 is at a high level.
The test interface 33 is a GPIO interface, and is used to connect with an input/output port of the microcontroller 34.
The microcontroller 34 may be a control element such as a single chip microcomputer, raspberry group, MCU, etc.
Specifically, if the plurality of test pins 211 can be used normally when the voltage is applied to the power supply 31, the test interface 33 presents a high level, that is, the second board-to-board connector 21 can be used normally; in the event of an anomaly at least one of the several test pins 211, the microcontroller 34 detects a low level.
As shown in fig. 3 to 4, in the case that the microcontroller 34 detects that the test interface 33 is at a low level or the indication information sent by the indication element 32 is non-conductive, it is necessary to perform an independent test on the single test pin 211, where the second test board 30 further includes an optocoupler 35, an expansion chip 36, an analog switch 37 and a precision measurement unit 38. The first pin of the optocoupler 35 is connected with the microcontroller 34, the second pin of the optocoupler 35 is grounded, and the fourth pin of the optocoupler 35 is connected with a test pin 211; the expansion chip 36 is connected with the microcontroller 34, and the expansion chip 36 comprises at least two expansion interfaces for expanding the input/output interfaces of the microcontroller 34; the analog switch 37 is connected with the two expansion interfaces respectively and is connected with a third pin of the optical coupler 35; the precision measurement unit 38 is connected to the power source 31 and the microcontroller 34, and the first output interface, the second output interface, the first sensing interface, and the second sensing interface of the precision measurement unit 38 are connected to the analog switch 37, respectively, and the first output interface, the second output interface, the first sensing interface, and the second sensing interface are used for being connected to the third pin of the optocoupler 35 under the control of the analog switch 37.
Specifically, an optocoupler 35, an expansion chip 36, an analog switch 37, and a precision measurement unit 38 are all mounted on the second test board 30.
The optocoupler 35 is an optocoupler with a MOSFET photo-coupled LED, which has a long service life and is driven by a low current, and can transmit optical signals between two isolated circuits.
The second pin of the optocoupler 35 is grounded, or is grounded after being externally connected with a resistor.
The extension chip 36 is a GPIO extension chip.
Wherein one expansion interface of the expansion chip 36 controls two switches of the analog switch 37.
The analog switch 37 mainly completes the signal switching function in the link, and adopts a switching mode of a MOS transistor to realize the turn-off or turn-on of the signal link, and is an analog switch because the function is similar to a switch and is realized by the characteristics of an analog device.
The analog switch 37 is an analog switch in the prior art, and may be an ADG1412.
The precise measuring unit is a PMU, is a measuring unit with high performance, high integration and high precision, and can output current and voltage through programming and can also regulate the output voltage through programming.
Under the condition that the input/output port connected with the first pin of the optocoupler 35 is changed from low level to high level, the first pin and the second pin of the optocoupler 35 are conducted, the light emitting diode between the first pin and the second pin of the optocoupler 35 emits light, and the photoelectric conversion module and the MOS tube are disposed between the third pin and the fourth pin of the optocoupler 35, so that after the light emitting diode between the first pin and the second pin of the optocoupler 35 emits light for a certain time, the photoelectric conversion module can control the MOS tube to be conducted, and after the MOS tube is conducted, the third pin and the fourth pin of the optocoupler 35 are conducted, and then the test pin 211 connected with the third pin and the fourth pin is conducted.
After the third pin and the fourth pin are turned on, the microcontroller 34 adjusts the two expansion interfaces of the expansion chip 36 to be at high level, so that the analog switch 37 is closed, and the third pin of the optocoupler 35 is respectively communicated with the first output interface, the second output interface, the first sensing interface and the second sensing interface of the precision measurement unit 38.
A negative current is then provided to the first output interface of the precision measurement unit 38 and the voltage of the test pin 211 is measured using the second inductive interface.
Further, in the case that the voltage of the second sensing interface is at zero level, it is determined that the test pin 211 is shorted.
Further, when a negative current is provided to the first output interface of the precision measurement unit 38, and voltages of the first sensing interface and the second sensing interface are measured, then the voltage of the second sensing interface is set to be a clamping voltage, and when the voltage measured by the first sensing interface approaches to the voltage measured by the second sensing interface, it is determined that the test pin 211 has an open circuit problem, that is, the test pin 211 has a cold joint.
Further, the first test board 20 further includes:
a plurality of voltage drop elements 39, the plurality of voltage drop elements 39 being connected in series with a plurality of test pins 211, respectively.
In the case where the test pin 211 is connected in series with a voltage drop element 39, if a negative current is provided to the first output interface of the precision measurement unit 38, the voltage drop element 39 returns to the second sensing interface because the test pin 211 is connected to the voltage drop element 39.
The voltage drop element 39 may be a resistor or a diode.
In some of these embodiments, the power supply 31 supplies a voltage to the precision measurement unit 38 via a PMIC (integrated power management circuit).
In some of these embodiments, the power supply 31 supplies power to the precision measurement unit 38 and the microcontroller 34 via an LDO (low dropout linear regulator).
In some of these embodiments, the microcontroller 34 is connected to the precision measurement unit 38 via the SPI protocol (serial peripheral interface).
The embodiment of the application solves the problems that the reliability is low due to the fact that the traditional connector detection is carried out by naked eyes and the traditional connector detection is carried out by a microscope, and whether the virtual soldering is caused or not.
Example 2
The method for testing the inter-board connector according to the embodiment of the application is applied to the device for testing the inter-board connector according to the embodiment 1, and comprises the following steps:
step S102, applying voltage to a power supply;
step S104, obtaining indication information of the indication element;
step S106, judging that a plurality of test pins are normally used under the condition that the indication information is conduction information.
In step S102, the voltage applied to the power supply is the voltage converted by the LDO chip, so as to avoid the voltage applied to the power supply from fluctuating.
In steps S104 to S106, after the voltage is applied to the power supply, since the plurality of test pins are connected in series, when the plurality of test pins are all in a conductive state, the indication element sends indication information to be the conductive information, so that it is indicated that the plurality of test pins are welded normally, and no cold joint or short circuit exists.
And under the condition that the indication information is non-conduction information, indicating that at least one cold joint or short circuit exists in the plurality of test pins.
The indication information can be lamplight information, sound information or acousto-optic information.
Further, the indication information may be level information, and after the voltage is applied to the power supply, if the microcontroller detects that the test interface is at a high level, it is determined that the plurality of test pins are normally used.
Specifically, the microcontroller may read the state of the test interface, and if the test interface is at a high level, it indicates that the plurality of test pins are all in a conductive state, and if the test interface is at a low level, it indicates that at least one of the plurality of test pins is in a cold joint or short circuit.
In some of these embodiments, the microcontroller may send the test interface high or low to the computer, which determines, via software, whether or not there are cold joints in the number of test pins of the inter-board connector.
Specifically, under the condition that the microcontroller sends a high level to the computer, the test interface indicates that a plurality of test pins can be normally used; and under the condition that the microcontroller sends the test interface to the computer at a low level, indicating that at least one test pin in the plurality of test pins is in cold joint or short circuit.
Further, in the case of determining that there is a cold joint or a short circuit in the plurality of test pins, the method may further include detecting the single pin to determine whether there is a cold joint or a short circuit in the single pin, where:
step S202, the microcontroller adjusts the first pin of the optocoupler to be high level so as to conduct the first pin and the second pin of the optocoupler and conduct the third pin and the fourth pin of the optocoupler;
step S204, the microcontroller adjusts both expansion interfaces of the expansion chip to be high level, so that a third pin of the analog switch control optocoupler is respectively connected with a first output interface, a second output interface, a first induction interface and a second induction interface of the precise measurement unit;
step S206, applying current to the first output interface, and acquiring a first induced voltage of the first induced interface and a second induced voltage of the second induced interface;
step S208, judging whether the test pin is normally used or not based on the first induced voltage and the second induced voltage.
In step S202, when the microcontroller adjusts the input/output port connected to the first pin of the optocoupler to be at a high level, the first pin and the second pin of the optocoupler are turned on to enable the light emitting diode inside the first pin and the second pin of the optocoupler to emit light, and then the photoelectric conversion modules and the MOS tube inside the third pin and the fourth pin can be turned on after the light emitting diode emits light for a certain time, so that the third pin and the fourth pin of the optocoupler are turned on.
In step S204, in the case that an expansion interface of the expansion chip is adjusted to be high level, the analog switch can close the two switches to connect the third pin of the optocoupler to the two interfaces of the precision measurement unit.
Further, determining whether the test pin is normally used based on the first induced voltage and the second induced voltage includes:
and under the condition that the first induced voltage is equal to the second induced voltage, judging that the test pin is open.
Specifically, under the condition that the test pins of the inter-board connector are open-circuited, the first induction interface outputs a current, and as the test pins are open-circuited, the resistance of the resistor is infinite, the voltage approaches infinity according to ohm's law and damages the substrate, so that the precision measurement unit sets the second induction voltage as the clamping voltage, and under the condition that the first induction voltage is increased to be equal to the second induction voltage, the test pins are open-circuited.
Further, determining whether the test pin is normally used based on the first induced voltage and the second induced voltage includes:
and under the condition that the second induced voltage is at the zero level, judging that the test pin is short-circuited.
Specifically, when the test pin is shorted, the precision measurement unit outputs a current value, but since the test pin is shorted with GND, the second induced voltage is at zero level, which indicates that the test pin is shorted.
Further, determining whether the test pin is normally used based on the first induced voltage and the second induced voltage includes:
and under the condition that the second induced voltage is a preset voltage value, judging that the test pin is normally used.
Specifically, under the condition that the test pin is well welded, no short circuit exists in the whole channel, and at the moment, the voltage measured by the second induced voltage is the voltage drop voltage, namely the preset voltage value, due to the fact that the test pin is externally connected with the voltage drop element.
In some embodiments, the test data of the second sensing interface can be sent to the microcontroller through the SPI protocol, and then the microcontroller sends the test data to the computer, which determines whether the test pins have a cold joint through software.
The following is a specific implementation of the embodiment of the present application:
as shown in fig. 1 to 5, the workflow for testing whether B2B CONNECTOR (board-to-board CONNECTOR) soldering is good is as follows:
(1) PP3V3 is supplied from POWER of TEST BOARD (second TEST BOARD) after switching voltage through LDO chip;
(2) All test_pins of the B2B CONNECTOR are sequentially connected in series on a TEST FPC (first TEST board);
(3) Applying a voltage of 3.3V at the beginning end of the test_pin1, connecting an LED lamp (indicating element) on the test_pin2 and connecting GND in parallel, and if all the test_pins are well welded and have no cold joint, the LED lamp is lightened at the moment;
(4) If any one test_pin in the middle is not welded, a link of the LED lamp is disconnected, and the LED lamp is not lighted at the moment;
(5) The MCU (microcontroller) can read the state of GPIO1 (test interface), if the LED lamp is on, the GPIO is a high level, and if the LED lamp is not on, the GPIO1 is a low level;
(6) The MCU sends the data to the computer, and whether the B2B connector is welded well or not can be judged through software on the computer;
through the steps (1) - (6), whether the virtual soldering exists in the plurality of Test pins or not can be judged, if the virtual soldering does not exist, the inter-board connector is judged to be good and can be normally used, and if the virtual soldering exists, the single test_pin is tested through the following steps:
(7) Programming the MCU, and conducting PIN1 (first PIN) and PIN2 (second PIN) of a Relay (optocoupler) when the GPIO (input/output) of the MCU is changed from low level to high level, wherein a light emitting diode is arranged between the PIN1 and the PIN2, and the light emitting diode emits light after the PIN1 and the PIN2 are conducted;
(8) A photoelectric conversion module and an MOS tube are arranged between Pin3 (third Pin) and Pin4 (fourth Pin) of the Relay, when the light emitting diode emits light for a certain time, the photoelectric conversion module can control the MOS tube to be conducted, after the MOS tube is conducted, pin3 and Pin4 are conducted, and test_ch1 and test_pin1 are conducted;
(9) The MCU expands one GPIO of the MCU to 16I/O pins with internal 100K ohm pull-up resistors through an SPI protocol, so that each GPIO can be controlled, and the expanded GPIO is used for controlling the conduction of the analog switch and controlling the channel switching of the analog switch;
(10) When GPIO3 (expansion interface) is high, S1 and D1 of the analog switch are on, S2 and D2 are on, i.e., test_ch1 and pmu _force1 (first output interface) are on, test_ch1 and pmu _sense1 (first sense interface) are on, pmu _force1 and pmu _sense1 are on (S1 and D1, S2 and D2 are connected together);
(11) When GPIO4 (expansion interface) is high, S3 and D3 of analog switch are turned on, S4 and D4 are turned on, test_CH1 and pmu _force2 (second output interface) are turned on, test_CH1 and pmu _sense2 (second sense interface) are turned on, pmu _force2 and pmu _sense2 are turned on (S3, D3, S4, D4 are connected together);
(12) Using FIMV (Force current Measure voltage) functions of PMU (precision measurement unit), PMU _force1 provides a negative current, and using PMU _sense2 to test the voltage of test_pin1;
(13) When the Test pins are well welded, the whole channel is not broken, and at the moment, the test_pin of the B2B Connector is externally connected with a diode (voltage drop element) (fig. 2), so that the voltage drop is about-0.7V, and the pmu _sense2 returns to a tested value about-0.7V;
(14) When the test pin is welded and has an open circuit, since pmu_force1 outputs a current value, the resistance of the resistor will be infinite under the condition that the test pin is open circuit, and according to ohm's law, u=i×r, the voltage will approach infinity, and the substrate will be damaged. Therefore, the PMU sets a clamp voltage, and when PMU _sense1 approaches the clamp voltage, PMU _sense2 is forced to be the clamp voltage, wherein PMU _sense2 is the clamp voltage, and the clamp voltage can be set, and is generally set to 2-3V;
(15) When the test pin is in short circuit in welding, as PMU_force1 outputs a current value, but the test_pin of the B2B connector end is short-circuited with GND, the voltage of the PMU _sense2 test is about zero level;
(16) pmu _sense2 sends the tested data to the MCU through the SPI protocol, the MCU sends the tested data to the computer, and the computer software is used for rapidly judging whether the connector welding has a problem or not;
(17) The steps (7) - (16) just list one test_pin Test method, and other pins of the B2B connector can be tested by adopting a similar scheme.
The application can directly judge whether the connector has the cold joint through the LED lamp, has simple operation, can also judge whether the cold joint exists through computer software, and can be made into automatic test equipment to reduce manpower and test cost. In addition, the application can also test each pin of the inter-board connector through the test module, and accurately judge which pin has a problem so as to facilitate quick maintenance or replacement.
In this specification, identical and similar parts of the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, for the product embodiments described later, since they correspond to the methods, the description is relatively simple, and reference is made to the description of parts of the system embodiments.
The foregoing is merely illustrative of the present application, and the present application is not limited thereto, and any changes or substitutions easily contemplated by those skilled in the art within the scope of the present application should be included in the present application. Therefore, the protection scope of the application is subject to the protection scope of the claims.

Claims (10)

1. An inter-board connector testing apparatus, comprising:
the device comprises a board to be tested, wherein a first inter-board connector is arranged on the board to be tested;
the first test board is provided with a second inter-board connector, the second inter-board connector is connected with the first inter-board connector in a matched manner, and the second inter-board connector comprises a plurality of test pins which are sequentially connected in series;
the second test board is connected with the first test board, the second test board comprises a power supply connected with the head end test pins of the test pins and an indicating element connected with the tail end test pins of the test pins, and the second test board is used for testing the test pins.
2. The board-to-board connector test device of claim 1, wherein the second test board further comprises:
the test interface is connected with the tail end test pin;
and the microcontroller is connected with the test interface and the power supply and is used for detecting whether the test interface is in a high level or not.
3. The board-to-board connector test device of claim 2, wherein the second test board further comprises:
the first pin of the optical coupler is connected with the microcontroller, the second pin of the optical coupler is grounded, and the fourth pin of the optical coupler is connected with one test pin;
the expansion chip is connected with the microcontroller and comprises at least two expansion interfaces for expanding the input/output interfaces of the microcontroller;
the analog switch is connected with the two expansion interfaces respectively and is connected with a third pin of the optocoupler;
the precise measurement unit is respectively connected with the power supply and the microcontroller, and a first output interface, a second output interface, a first induction interface and a second induction interface of the precise measurement unit are respectively connected with the analog switch, and the first output interface, the second output interface, the first induction interface and the second induction interface are used for being connected with a third pin of the optical coupler under the control of the analog switch.
4. The board-to-board connector test device of claim 3, wherein the first test board further comprises:
the voltage drop elements are correspondingly connected with the test pins in series.
5. An inter-board connector testing method, characterized by being applied to the inter-board connector testing apparatus as claimed in any one of claims 1 to 4, comprising:
applying a voltage to the power supply;
acquiring indication information of an indication element;
and under the condition that the indication information is conduction information, judging that a plurality of test pins are normally used.
6. The method according to claim 5, wherein if the microcontroller detects that the test interface is at a high level in the case of applying a voltage to the power supply, it is determined that a plurality of the test pins are normally used.
7. The method for testing an inter-board connector according to claim 6, further comprising:
the microcontroller adjusts the first pin of the optocoupler to be in a high level so as to enable the first pin and the second pin of the optocoupler to be conducted, and enable the third pin and the fourth pin to be conducted;
the microcontroller adjusts two expansion interfaces of the expansion chip to be high level, so that the analog switch controls a third pin of the optical coupler to be connected with a first output interface, a second output interface, a first induction interface and a second induction interface of the precise measurement unit respectively;
applying current to the first output interface, and acquiring a first induced voltage of the first induced interface and a second induced voltage of the second induced interface;
and judging whether the test pin is normally used or not based on the first induced voltage and the second induced voltage.
8. The method of testing an inter-board connector according to claim 7, wherein the determining whether the test pin is normally used based on the first induced voltage and the second induced voltage comprises:
and under the condition that the first induced voltage is equal to the second induced voltage, judging that the test pin has an open circuit.
9. The method of testing an inter-board connector according to claim 7, wherein the determining whether the test pin is normally used based on the first induced voltage and the second induced voltage comprises:
and under the condition that the second induced voltage is at zero level, judging that the test pin is short-circuited.
10. The method of testing an inter-board connector according to claim 7, wherein the determining whether the test pin is normally used based on the first induced voltage and the second induced voltage comprises:
and under the condition that the second induced voltage is a preset voltage value, judging that the test pin is normally used.
CN202310405912.6A 2023-04-17 2023-04-17 Inter-board connector testing device and testing method Pending CN116699200A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116930722A (en) * 2023-09-12 2023-10-24 悦芯科技股份有限公司 Method and system for testing memory chip wafer

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116930722A (en) * 2023-09-12 2023-10-24 悦芯科技股份有限公司 Method and system for testing memory chip wafer
CN116930722B (en) * 2023-09-12 2024-01-05 悦芯科技股份有限公司 Method and system for testing memory chip wafer

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