CN116615092A - Phase change material, phase change memory chip, memory device and electronic device - Google Patents
Phase change material, phase change memory chip, memory device and electronic device Download PDFInfo
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Classifications
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- Semiconductor Memories (AREA)
Abstract
The application discloses a phase change material, a phase change memory chip, memory equipment and electronic equipment, and belongs to the technical field of semiconductor memory. The phase change material comprises Sb n X m The material, wherein n is more than or equal to 1:1; the difference between the atomic radius of the element X and the atomic radius of the element Sb meets a first threshold condition, so that the element X can form a weak polar bond with the element Sb; and the thermal stability parameter of element X satisfies a second threshold condition such that element X remains stable at the phase transition temperature of element Sb. When the phase-change material is used for the phase-change memory chip, the SET speed and the cycle life of the phase-change memory chip are improved, so that the phase-change memory chip can achieve the read-write speed and the cycle life required by memory data storage.
Description
The present disclosure claims priority from chinese patent application No. 202210114235.8 entitled "a phase change memory" filed on 30/01/2022, the entire contents of which are incorporated herein by reference.
Technical Field
The present disclosure relates to the field of semiconductor memory technologies, and in particular, to a phase change material, a phase change memory chip, a memory device, and an electronic device.
Background
Phase change materials exhibit low resistivity in the crystalline state and high resistivity in the amorphous state, and phase change memories (Phase change memory, PCM) enable storage and erasure of data based on the difference in resistance of the phase change material between the crystalline and amorphous states. The phase change material has important influence on the read-write speed and the cycle life of the phase change memory chip.
The related art adopts Sb 2 Te 3 Material as phase change material, however, based on Sb 2 Te 3 The phase change memory prepared from the material has to be improved in terms of read-write speed and cycle life.
Disclosure of Invention
In view of the above, the present disclosure provides a phase change material, a phase change memory chip, a memory device, and an electronic device, which can solve the above technical problems.
Specifically, the method comprises the following technical scheme:
in one aspect, a phase change material is provided, the phase change material comprising Sb n X m The material, wherein n is more than or equal to 1:1;
the difference between the atomic radius of the element X and the atomic radius of the element Sb meets a first threshold condition, so that the element X can form a weak polar bond with the element Sb; and the thermal stability parameter of the element X meets a second threshold condition, so that the element X is stable at the phase transition temperature of the element Sb.
In the embodiment of the disclosure, the atomic percentage of Sb with the content n of m being more than or equal to 1:1 is calculated n X m The material is used as a phase change material, so that the atomic percentage of the Sb element is larger than or equal to that of the doped element X, and the Sb element with higher SET speed and high fatigue property is used as a main material, and the doped element X is used as a supplementary material. Due to the atomic radius of the doping element X and Sb satisfies a first threshold condition, so that elements X and Sb form weak polar bonds, and due to the existence of the weak polar bonds, on one hand, aggregation among Sb-Sb is inhibited, and large grains are formed, so that Sb is prevented from forming large grains set-stuck, on the other hand, the capability of losing phase change of Sb due to excessively strong bonding is prevented, and the Sb is prevented from being subjected to phase change n X m The material can maintain the advantages of Sb element and avoid the disadvantages, and is characterized by higher SET speed and longer cycle life. And, element X is kept stable at the phase transition temperature of element Sb, thereby improving the Sb n X m The thermal stability of the material is also beneficial to improving Sb n X m Cycle life of the material. Therefore, when the phase-change material provided by the embodiment of the disclosure is used for the phase-change memory chip, the SET speed and the cycle life of the phase-change memory chip are improved, so that the phase-change memory chip can achieve the read-write speed and the cycle life required by memory data storage.
In some possible implementations, the first threshold condition includes the difference being less than or equal toThe atomic radii of the element X and the element Sb are made as close as possible so that a weak polar bond is formed between the two.
The second threshold condition includes a tolerance time of the element X at 400 ℃ of 30 minutes or more, ensuring that the element X has excellent thermal stability.
In some possible implementations, the element X includes at least one of Te, sn, se, ni, nb, zr, Y. Wherein X may be one, any two, any three, or more of Te, sn, se, ni, nb, zr, Y.
In some possible implementations, 1:0.2.gtoreq.n.gtoreq.m.gtoreq.1:1, the atomic ratio of Sb to X is within the above range, which not only ensures that the phase change memory cell has a higher SET speed and cycle life, but also ensures that the phase change memory cell has good thermal stability.
In some possible implementations, the Sb n X m The material is in the form of Sb-X alloy and Sb-In the form of an X binary compound or a mixture of simple substances of Sb and X.
In another aspect, there is provided a phase-change memory chip including: a plurality of phase change memory cells, each of the phase change memory cells having a phase change film, the phase change film comprising: alternately stacking phase change material layers and template layers;
The phase change material layer is formed by any one of the phase change materials;
the template layer is formed by a template material, and the template material is connected with the Sb n X m The lattice mismatch of the material satisfies a third threshold condition such that the template layer can act as a crystallization template for the phase change material layer.
The phase-change memory chip provided by the embodiment of the disclosure has the phase-change film which enables the phase-change material layer and the template layer to be alternately laminated, wherein the phase-change material layer is made of Sb n X m The material is formed. By selecting Sb with higher SET speed and high fatigue property (namely higher cycle life) as a main phase change material and doping the Sb with doping element X with high thermal stability, the phase change material layer shows higher SET speed and cycle life. By using template layer 102 to provide a crystallization template, it is advantageous to further increase the SET speed and cycle life of the phase change memory cell. It is known from the above that Sb-based alloy n X m The cooperation of the phase-change material layer 101 and the template layer 102 of the material is beneficial to remarkably improving the SET speed and the cycle life of the phase-change memory chip in the embodiment of the disclosure, so that the phase-change memory chip can achieve the read-write speed and the cycle life required by memory data storage.
In some possible implementations, the phase change material layer has a thickness of 1nm to 100nm;
The thickness of the template layer is 1 nm-10 nm.
In some possible implementations, the number of cycles that the phase change material layer and the template layer are alternately stacked is 1 to 100, for example, 2 to 100, 2 to 90, 2 to 80, 2 to 70, 2 to 60, 2 to 50, 2 to 40, etc.
In some possible implementations, the third threshold condition includesThe lattice mismatch is less than or equal to 10%, for example, the template material is less than or equal to Sb n X m The lattice mismatch of the material is less than or equal to 8%, further less than or equal to 5%, less than or equal to 4%, less than or equal to 3%, less than or equal to 2%, less than or equal to 1%, less than or equal to 0.5%, etc., so that the phase change material obtains a faster crystallization rate.
In some possible implementations, the template material includes TiTe 2 At least one of Ti-Sb-Te ternary compounds.
TiTe is selected for use 2 The Ti-Sb-Te ternary compound serving as a template material has at least the following advantages:
first, tiTe 2 And Ti-Sb-Te and Sb n X m The material has the advantage of high lattice matching degree, namely, the lattice matching degree is lower, and the smaller lattice constant difference between the lattice matching degree and the material can provide power for crystallization of the phase change material layer 101, so that the crystallization speed of the phase change material layer 101 and the stability of a crystalline structure formed during crystallization are improved.
Secondly, tiTe 2 And Ti-Sb-Te have higher thermal stability, and the template layer 102 based on the Ti-Sb-Te is stable and unchanged in the working process of the phase change material layer 101, so that the cycle life of the phase change memory cell is prolonged.
Thirdly, when Sb in the phase change material layer 101 diffuses in a high temperature environment, the Ti-Sb-Te based template layer 102 can spontaneously inhibit diffusion caused by Sb concentration difference, so that the phase change material layer 101 is more stable in the high temperature environment and exhibits higher high temperature resistance, which is also very advantageous for enhancing the cycle life of the phase change memory cell.
In some possible implementations, the phase change memory cell further includes: a substrate, a bottom electrode, a top electrode, and an insulating layer;
the bottom electrode is positioned on the surface of the substrate;
the phase change film is connected between the bottom electrode and the top electrode;
the insulating layer is coated on the side part of the phase-change film.
Among other things, the structure of the phase change memory cell includes, but is not limited to: a confinement type structure, a T type structure, etc.
In yet another aspect, embodiments of the present disclosure provide a memory device including a controller and any one of the phase-change memory chips described above, the controller being configured to store data to the phase-change memory chip.
Based on the use of the phase-change memory chip, the phase-change memory chip provided by the embodiment of the disclosure has at least the following advantages: high read-write speed, high stability, strong temperature resistance, long cycle life, high density multi-value storage and the like.
In yet another aspect, an embodiment of the present disclosure provides an electronic device, where the electronic device includes a processor and the storage device described above, and the processor is configured to store data generated by the electronic device to the storage device.
In some examples, the electronic device includes, but is not limited to: computers, cell phones, music playing devices, digital broadcasting devices, messaging devices, game control devices, medical devices, fitness devices, personal digital assistants, etc.
Drawings
FIG. 1 is a schematic diagram of an exemplary phase change film according to an embodiment of the present disclosure;
FIG. 2 is a schematic diagram of a phase change memory cell with an exemplary confinement structure according to an embodiment of the present disclosure;
FIG. 3 is a schematic diagram of a phase change memory cell of another exemplary confinement structure provided in an embodiment of the present disclosure;
FIG. 4 is a schematic diagram of an exemplary T-shaped phase change memory cell according to an embodiment of the present disclosure;
FIG. 5 is a schematic diagram of an exemplary phase change memory chip 1R according to an embodiment of the disclosure;
FIG. 6 is a schematic diagram of an exemplary phase change memory chip 1T1R according to an embodiment of the disclosure;
FIG. 7 is a schematic diagram of an exemplary phase change memory chip 1D1R according to an embodiment of the disclosure;
FIG. 8 is a schematic diagram of an application scenario of an exemplary phase change memory chip in an electronic device according to an embodiment of the present disclosure;
fig. 9 is a cycle life distribution diagram of a phase change memory array based on a phase change film according to an embodiment of the present disclosure.
Reference numerals denote:
a 100-phase-change memory cell,
1-phase change film, 101-phase change material layer, 102-template layer,
2-substrate, 31-bottom electrode, 32-top electrode,
4-insulating layer, 5-heating electrode,
201-word line, 202-bit line, 300-transistor, 400-diode.
Detailed Description
In order to make the technical scheme and advantages of the present disclosure more apparent, embodiments of the present disclosure will be described in further detail below with reference to the accompanying drawings.
The phase change memory (Phase change memory, PCM), also called a phase change memory chip, is a solid-state semiconductor nonvolatile memory, which uses a phase change material as a storage medium, the phase change material can be reversibly transformed between a crystalline state and an amorphous state, and the phase change memory further realizes the storage of data "0" and "1" by utilizing the corresponding high-resistivity and low-resistivity differences of the phase change material in the amorphous state and the crystalline state.
The phase change memory comprises the following working processes: a erase operation (SET) procedure and a write operation (RESET) procedure. The SET procedure refers to: and applying a wide and weak electric pulse to heat the phase-change material, so that the temperature of the phase-change material is increased to be between the crystallization temperature and the melting temperature, and the phase-change material is crystallized into an ordered state to form a crystalline state with low resistivity, thereby realizing the storage of data '0'. The RESET process refers to the application of a narrow and intense electrical pulse to heat the phase change material to a temperature above the melting temperature, melting into a disordered state, followed by a rapid quenching process (> 10) 9 K/s), the phase change material goes from the molten state directly into an amorphous state with higher resistivity to achieve dataStorage of "1".
Phase change materials have important effects on read and write speeds and cycle life of phase change memories, related art phase change materials, however, sb 2 Te 3 The material has the problems of not fast enough crystallization speed, poor temperature stability, low fatigue performance and the like, so that the material is based on Sb 2 Te 3 The phase change memory prepared from the phase change material has to be improved in terms of read-write speed and cycle life. Here, the cycle life referred to herein refers to the number of cycles that the phase change memory can perform before failure by performing repeated cycling operations with either a 0 or a 1 set.
The simple substance Sb can also be used as a phase-change material, however, although the simple substance Sb is expressed as a faster SET operation and a longer cycle life, the problems of SET-stuck and the like easily occur, wherein the SET-stuck refers to that the resistance value of the phase-change material is always kept in a low-resistance state and cannot be converted into a high-resistance state through any RESET operation.
Embodiments of the present disclosure provide a phase change material comprising Sb n X m The material, wherein n: m is more than or equal to 1:1, the difference value of the atomic radius of the element X and the atomic radius of the element Sb meets a first threshold condition, so that the element X can form a weak polar bond with the element Sb, and the thermal stability parameter of the element X meets a second threshold condition, so that the element X is stable at the phase transition temperature of the element Sb.
In the embodiment of the disclosure, the atomic percentage of Sb with the content n of m being more than or equal to 1:1 is calculated n X m The material is used as a phase change material, so that the atomic percentage of the Sb element is larger than or equal to that of the doped element X, and the Sb element with higher SET speed and high fatigue property is used as a main material, and the doped element X is used as a supplementary material. Because the difference value of the atomic radius of the doped element X and the atomic radius of the Sb meets a first threshold value condition, the element X and the Sb form a weak polar bond, and because of the existence of the weak polar bond, on one hand, aggregation among the Sb-Sb is inhibited and large grains are formed, so that the Sb is prevented from forming large grains set-stuck, and on the other hand, the bonding is prevented from being too strong, so that the Sb loses the phase change capability, and the Sb is prevented from n X m The material can be keptThe advantage of the Sb element, while avoiding the drawbacks thereof, is represented by a higher SET speed and cycle life. And, element X is kept stable at the phase transition temperature of element Sb, thereby improving the Sb n X m The thermal stability of the material is also beneficial to improving Sb n X m Cycle life of the material. Therefore, when the phase-change material provided by the embodiment of the disclosure is used for the phase-change memory chip, the SET speed and the cycle life of the phase-change memory chip are improved, so that the phase-change memory chip can achieve the read-write speed and the cycle life required by memory data storage.
Where reference herein is made to memory level data storage, it is meant that the phase change memory stores data, i.e. the read, write and erase operations of data are at a speed comparable to that of a dynamic random access memory (Dynamic Random Access Memory, DRAM).
The doping element X can avoid the formation of large-grain set-stuck of Sb, because for the simple-substance Sb material, nonpolar bonds are formed between Sb and Sb, and the nonpolar bonds enable the Sb and the Sb to be more easily aggregated, so that the large-grain set-stuck is caused. And Sb provided by the embodiment of the disclosure n X m In the material, the Sb material is doped with the X material, so that weak polar bonds are formed between Sb and X, and the weak polar bonds can avoid aggregation between Sb and Sb, thereby avoiding the main material Sb from forming large crystal grain set-stuck.
In some examples, the desired first threshold condition includes a difference value less than or equal toThat is, the difference between the atomic radius of the element X and the atomic radius of the element Sb satisfies less than or equal to +.>Further, less than or equal to->Less than or equal to->Less than or equal to->Etc. In this way, the atomic radii of the element X and the element Sb are made as close as possible, so that a weak polar bond is formed therebetween.
In some examples, the second threshold condition includes a tolerance time of element X at 400 ℃ of greater than or equal to 30 minutes, e.g., a tolerance time of element X at 400 ℃ of equal to 30 minutes, 40 minutes, 50 minutes, 60 minutes, 120 minutes, or more, etc., thus ensuring that element X has excellent thermal stability.
In some examples, some X satisfying the above conditions include at least one of Te (tellurium), sn (tin), se (selenium), ni (nickel), nb (niobium), zr (zirconium), Y (yttrium), i.e., X may be one, any two, any three, or more of Te, sn, se, ni, nb, zr, Y.
When X is two or more of Te, sn, se, ni, nb, zr, Y, the sum of the atomic percentages of the two or more elements X is taken as m, and the sum of the atomic percentages of the elements X and the atomic percentage of the element Sb may be 1 or less, and any atomic percentage, for example, 1:1 to 10, may be used between the two or more different elements X.
Te, sn, se, ni, nb, zr, Y is an element with an atomic radius close to that of an Sb atom and is easy to form a weak polar bond with the Sb element, and the doping elements can prevent the Sb material from forming a large crystal grain set-stuck and prevent the Sb material from losing the phase change capability due to too strong bond with the Sb element.
Sb n X m In the material, n is more than or equal to 1:1, namely the atomic ratio of the element Sb to the doping element X is more than or equal to 1:1, and the amount of the Sb is more than or equal to the amount of the doping element X so as to ensure that the phase change memory cell has higher SET speed and longer cycle life.
In some implementations, 1:0.2.gtoreq.n:m.gtoreq.1:1, for example, the values of n:m include, but are not limited to, the following: 1:0.2, 1:0.25, 1:0.28, 1:0.3, 1:0.32, 1:0.35, 1:0.37, 1:0.4, 1:0.43, 1:0.45, 1:0.48, 1:0.5, 1:0.51, 1:0.52, 1:0.53, 1:0.54, 1:0.55, 1:0.56, 1:0.58, 1:0.6, 1:0.65, 1:0.7, 1:0.75, 1:0.8, 1:0.85, 1:0.87, 1:0.9, etc.
In the embodiments of the present disclosure, a smaller doping amount of the element X is desired to ensure Sb n X m The material can keep the self advantage of Sb, and is expressed as higher SET speed and cycle life, of course, in some practical application scenes, the doping amount of the element X can be properly adjusted up in the atomic ratio range according to the ambient temperature, because the doping amount of the element X is increased to a certain extent, the Sb can be improved n X m The thermal stability of the material enables the phase change memory cell to have stronger adaptability to high temperature environment.
The atomic ratio of Sb to X is in the range, so that the phase-change memory cell has high SET speed and cycle life, and has good thermal stability.
In some implementations, sb n X m The material can be in the form of Sb-X alloy, sb-X binary compound, or a mixture of simple substances of Sb and simple substances of X.
In some examples, sb n X m The material is in the form of an Sb-X alloy, and in this case, an Sb-X alloy plate which is currently commercially available and meets the atomic ratio requirement can be used for preparing the phase change material layer.
In some examples, sb n X m The material being in the form of a mixture of elemental Sb and elemental X, in this case in accordance with Sb n X m And uniformly mixing the simple substances of Sb and the simple substances of X in the material according to the atomic ratio of Sb to X, and preparing the phase change material layer.
In another aspect, an embodiment of the present disclosure further provides a phase-change memory chip, including: a plurality of phase change memory cells, each having a phase change film 1, as shown in fig. 1, the phase change film 1 comprising: the phase change material layer 101 and the template layer 102 are alternately stacked.
Wherein the phase change material layer is formed by any one of the phase change materials; template layer 102 is formed of a template materialForming, template material and Sb n X m The lattice mismatch of the material satisfies a third threshold condition such that template layer 102 can act as a crystallization template for phase change material layer 101.
The phase change material layers 101 and the template layers 102 are alternately stacked, wherein the template layers 102 are used for providing a crystallization template for the phase change material layers 101, that is, providing a crystallization growth interface for the phase change material layers 101 so as to accelerate the erasing speed of the phase change memory cell. And, the phase change material layer 101 is restrained by the template layer 102, in a limited restraining space, sb in the phase change material layer 101 n X m Sb in the material is difficult to aggregate to form large grains, so that failure of forming large grains can be avoided, and the cycle life of the phase change memory unit is prolonged.
The phrase "the phase change material layers 101 are alternately stacked with the template layers 102" in the embodiments of the present disclosure refers to that one template layer 102 is provided between any two phase change material layers 101, or one phase change material layer 101 is provided between any two template layers 102. That is, the phase change film 1 is a periodic structure formed by alternately stacking the phase change material layer 101 and the template layer 102, and the phase change material layer 101 and the template layer 102 form a superlattice phase change material.
The phase-change memory chip provided by the embodiment of the disclosure has the phase-change film 1 formed by alternately laminating the phase-change material layer 101 and the template layer 102, wherein the phase-change material layer 101 is made of Sb n X m The material is formed. By selecting Sb with faster SET speed and high fatigue property (i.e. higher cycle life) as the main phase change material and doping Sb with a doping element X with high thermal stability, the phase change material layer 101 exhibits higher SET speed and cycle life. By using template layer 102 to provide a crystallization template, it is advantageous to further increase the SET speed and cycle life of the phase change memory cell. It is known from the above that Sb-based alloy n X m The cooperation of the phase-change material layer 101 and the template layer 102 of the material is beneficial to remarkably improving the SET speed and the cycle life of the phase-change memory chip in the embodiment of the disclosure, so that the phase-change memory chip can achieve the read-write speed and the cycle life required by memory data storage.
For the template layer 102, itFormed of a template material, the template layer 102 has stronger thermal stability, and the template material is bonded with Sb n X m The lattice mismatch of the material meets a third threshold condition, such that the template material is aligned with Sb n X m The structure of the contact crystal planes of the materials are the same or similar so that a higher degree of lattice matching is achieved between the two, ensuring that template layer 102 can act as a crystallization template for phase change material layer 101.
In embodiments of the present disclosure, the third threshold condition is made to include a lattice mismatch of less than or equal to 10%, i.e., the template material is aligned with Sb n X m The lattice mismatch of the material is less than or equal to 10%, for example, the template material and Sb n X m The lattice mismatch of the material is less than or equal to 8%, further less than or equal to 5%, less than or equal to 4%, less than or equal to 3%, less than or equal to 2%, less than or equal to 1%, less than or equal to 0.5%, etc., so that the phase change material obtains a faster crystallization rate.
In some implementations, the template material includes TiTe 2 At least one of Ti-Sb-Te ternary compound, wherein the Ti-Sb-Te ternary compound is also called Ti-Sb-Te alloy and has a chemical formula of Sb x Te y Ti 100-x-y Wherein, x is more than 0 and less than 80, and y is more than 0 and less than 100-x.
TiTe is selected for use 2 The Ti-Sb-Te ternary compound serving as a template material has at least the following advantages:
first, tiTe 2 And Ti-Sb-Te and Sb n X m The material has the advantage of high lattice matching degree, namely, the lattice matching degree is lower, and the smaller lattice constant difference between the lattice matching degree and the material can provide power for crystallization of the phase change material layer 101, so that the crystallization speed of the phase change material layer 101 and the stability of a crystalline structure formed during crystallization are improved.
Secondly, tiTe 2 And Ti-Sb-Te have higher thermal stability, and the template layer 102 based on the Ti-Sb-Te is stable and unchanged in the working process of the phase change material layer 101, so that the cycle life of the phase change memory cell is prolonged.
Thirdly, when Sb in the phase change material layer 101 diffuses in a high temperature environment, the Ti-Sb-Te based template layer 102 can spontaneously inhibit diffusion caused by Sb concentration difference, so that the phase change material layer 101 is more stable in the high temperature environment and exhibits higher high temperature resistance, which is also very advantageous for enhancing the cycle life of the phase change memory cell.
In some implementations, the thickness of the phase change material layer 101 involved in the phase change film 1 is in the range of 1nm to 100nm, for example 1nm, 2nm, 3nm, 4nm, 5nm, 6nm, 7nm, 8nm, 9nm, 10nm, 20nm, 30nm, 40nm, 50nm, 60nm, 70nm, 80nm, 90nm, 100nm, etc.
When the number of the phase change material layers 101 is plural (i.e., two or more), the thicknesses of the plural phase change material layers 101 may be all the same, or the thicknesses of part of the phase change material layers 101 may be the same, or the thicknesses of all the phase change material layers 101 may be different from each other.
The thickness of the phase change material layer 101 of any layer may be determined according to the magnitude of the corresponding operating voltage or operating current when the phase change occurs.
In some possible implementations, the template layer 102 involved in the phase change film 1 has a thickness ranging from 1nm to 10nm, for example, 1nm, 2nm, 3nm, 4nm, 5nm, 6nm, 7nm, 8nm, 9nm, 10nm, etc.
When the number of template layers 102 is multiple (i.e., two or more), the thicknesses of the multiple template layers 102 may all be the same, or the thicknesses of portions of the template layers 102 may be the same, or the thicknesses of all of the template layers 102 may be different from each other.
The thickness of the phase change material layer 101 and the thickness of the template layer 102 are in the above ranges, which is beneficial to the phase change memory cell to obtain a wider adjustment range.
In the embodiment of the present disclosure, the phase change material layers 101 and the template layers 102 are alternately stacked, and one phase change material layer 101 and one template layer 102 stacked therewith are used as one cycle number (also referred to as cycle number). The number of cycles in which the phase change material layer 101 and the template layer 102 are alternately stacked may be 1 to 100, for example, 2 to 100, 2 to 90, 2 to 80, 2 to 70, 2 to 60, 2 to 50, 2 to 40, etc., and for example, the number of cycles in which the phase change material layer 101 and the template layer 102 are alternately stacked may be 5, 10, 15, 20, 25, 30, 35, 40, 45, 50, 55, etc.
In some examples, the phase change material layer 101 is made to have two or more layers, so that the phase change film 1 can perform layered phase change, thereby achieving the capability of multi-level storage, which is beneficial to improving the data storage density of the phase change memory chip.
For example, with a cycle number of 5 in which the phase change material layers 101 and the template layers 102 are alternately stacked, the phase change film 1 may include a first phase change material layer 101/a first template layer 102/a second phase change material layer 101/a second template layer 102/a third phase change material layer 101/a third template layer 102/a fourth template layer 101/a fourth template layer 102/a fifth phase change material layer 101, and further optionally, a fifth template layer 102 stacked on the fifth phase change material layer 101.
In the phase-change film 1, sb used for each layer of the multi-layer phase-change material layer 101 n X m The types of the materials may be all the same, may be partially different, or may be all different.
The template materials used in the layers of the multilayer template layer 102 may be all the same, may be partially different, or may be all different. The type of the template layer 102 is selected according to the type of the phase change material layer 101 adjacent thereto, so as to ensure that the lattice mismatch between the template layer 102 and the phase change material layer 101 in the stacked relationship is less than or equal to 10%.
In some examples, embodiments of the present disclosure disclose a phase change film 1 comprising: the number of cycles in which the phase change material layers 101 and the template layers 102 are alternately stacked is 2 to 100.
Wherein the thickness of the phase change material layer 101 is 1 nm-50 nm; the thickness of the template layer 102 is 1nm to 10nm.
For the phase change material layer 101, it is made of Sb n X m Material formation, sb n X m The material is Sb 2 Te、SbTe、SbSn、Sb 2 Sn、Sb 3 Sn、SbSe、Sb 2 Se、Sb 3 Se、SbNi、Sb 2 Ni、Sb 3 Ni、SbNb、Sb 2 Nb、Sb 3 Nb、SbZr、Sb 2 Zr、Sb 3 Zr、SbY、Sb 2 Y、Sb 3 Y, etc. For the template layer 102, it is made of TiTe 2 Or Ti-Sb-Te ternary compound.
The phase change film 1 according to the embodiment of the present disclosure may be prepared by the following preparation method:
providing Sb n X m Materials and template materials; according to the lamination sequence of the phase change material layer 101 and the template layer 102 in the phase change film 1, sb is utilized n X m The phase change material layer 101 and the template layer 102 are alternately formed by a thin film deposition process.
The thin film deposition processes involved include, but are not limited to, the following: atomic layer deposition (atomic layer deposition, ALD), physical vapor deposition (Physical Vapour Deposition, PVD), chemical vapor deposition (Chemical Vapor Deposition, CVD), and the like.
Magnetron sputtering is a common physical vapor deposition process, which can be used to prepare the phase change film 1 in the embodiments of the present disclosure.
In some examples, some suitable magnetron sputtering parameters in preparing the phase change film 1 are as follows:
background vacuum degree of 10 -3 Pa～10 -5 Pa, e.g. 1X 10 -4 Pa～5×10 -4 Pa; sputtering air pressure is 0.3 Pa-0.8 Pa, etc.; the substrate temperature, i.e., the stage temperature, is from room temperature to 400 ℃, wherein the room temperature may be from 20 ℃ to 30 ℃, e.g., the stage temperature is 200 ℃, 250 ℃, 300 ℃, 350 ℃, 400 ℃, etc.; the sputtering power is 7W-50W, etc.; sputtering gases include, but are not limited to: at least one of argon, krypton, xenon, neon, and nitrogen, for example, argon Ar is selected as the sputtering gas. The magnetron sputtering mode can be direct current magnetron sputtering or radio frequency magnetron sputtering.
The phase-change memory chip provided by the embodiment of the disclosure is based on the use of any one of the phase-change films, so that the phase-change memory chip has at least the following advantages:
(1) Phase change materialLayer 101 is of Sb n X m The material, wherein n: m is more than or equal to 1:1, X comprises at least one of Te, sn, se, ni, nb, zr, Y, so that the phase change material layer 101 can keep the advantages of the Sb material, the advantages are represented by higher SET speed and longer cycle life, meanwhile, the problems of cluster aggregation failure, interface cavity, poor interface adhesion and the like, which are easily caused by Sb, can be solved, the formation of large crystal grain SET-stuck of Sb is avoided, the thermal stability of Sb is improved, and the service life of a phase change memory unit is further prolonged.
(2) In a specific atomic ratio range, the doping amount of the element X (Te, sn, se, ni, nb, Y and the like) to the element Sb is increased, so that the phase-change memory unit achieves higher time delay and fatigue resistance to a high-temperature application scene, and has stronger adaptability to a high-temperature environment.
(3) Template material and Sb n X m The lattice mismatch degree of the material is less than or equal to 10%, so that the template layer 102 provides a crystallization template, and thus, the phase change material layer 101 can be crystallized from the interface of the template layer 102 in an epitaxial growth mode, and the template layer 102 is used as a crystallization growth template, thereby being beneficial to remarkably reducing crystallization time, improving the phase change speed of the phase change material layer 101 and further improving the read-write speed of a phase change memory chip. In addition, when the phase change material layer 101 changes phase, the template layer 102 can maintain a stable crystal structure, effectively prevent the migration of elements of the phase change material in the electric field direction, and facilitate the improvement of the cycle life of the phase change material, thereby improving the cycle life of the phase change memory cell.
(4) The phase change material layer 101 can be designed into two or more layers, so that the phase change film 1 can perform layered phase change, and the multi-level storage capacity is obtained, so that the multi-value storage of the storage unit is realized, and the data storage density of the phase change storage chip is improved.
As shown in fig. 2 to fig. 4, the phase-change memory cell according to the embodiments of the present disclosure includes, in addition to the phase-change film 1, a substrate 2, a top electrode 32, a bottom electrode 31, and an insulating layer 4; wherein the bottom electrode 31 is located on the surface of the substrate 2; the phase change film 1 is connected between the bottom electrode 31 and the top electrode 32; the insulating layer 4 covers the side portion of the phase change film 1.
The presently disclosed embodiments define the direction closer to the substrate 2 as the bottom direction and the direction farther from the substrate 2 as the top direction.
The structure of the phase change memory cell includes, but is not limited to: a confinement type structure, a T type structure, etc., the constitution of the phase change memory cell of these two types of structures is exemplarily described below, respectively:
fig. 2 illustrates a phase change memory cell of a limited structure, in which a top electrode 32, a phase change film 1, a bottom electrode 31, and a substrate 2 are sequentially contacted in a top-to-bottom direction as shown in fig. 2, and an insulating layer 4 is coated on a side portion of the phase change film 1 and between the bottom electrode 31 and the top electrode 32.
In this implementation, the bottom layer of the phase change film 1 may be the phase change material layer 101 or the template layer 102, and the type of the bottom layer of the phase change film 1 is adaptively selected according to the specific type of the bottom electrode 31, for example, fig. 2 shows that the bottom layer of the phase change film 1 is the phase change material layer 101.
The topmost layer of the phase change film 1 may be the phase change material layer 101 or the template layer 102, and the type of the bottommost layer of the phase change film 1 is adaptively selected according to the specific type of the top electrode 32, for example, fig. 2 shows that the topmost layer of the phase change film 1 is the template layer 102.
For the phase change memory cell with the limiting structure, the number of the phase change material layers 101 generating the phase change can be changed by changing the operating voltage or the operating current, for example, only the bottom layer of the phase change material layer 101 can generate the phase change along the direction from the bottom to the top, or two layers of the phase change material layers 101 can generate the phase change, or three layers of the phase change material layers 101 can generate the phase change, so that the phase change memory cell achieves the effect of layered phase change and has the capability of multi-stage storage.
For the phase change memory cell with the limiting structure, the phase change memory cell can be prepared by the following method:
a cleaned substrate 2 is provided, and a bottom electrode 31 is formed on the surface of the substrate 2. An insulating layer 4 is formed on the surface of the bottom electrode 31, and the insulating layer 4 entirely covers the bottom electrode 31. The insulating layer 4 is etched, and in particular, a portion of the insulating layer 4 corresponding to the insulating hole is etched away and the bottom electrode 31 is exposed, so that the insulating hole can be formed in the insulating layer 4. The phase change film 1 is formed in the heat insulating hole of the heat insulating layer 4. And forming a top electrode 32 on the top surfaces of the phase-change film 1 and the insulating layer 4 to obtain the phase-change memory cell with the limited structure.
FIG. 3 illustrates another phase change memory cell of a confined structure, as shown in FIG. 3, comprising: the phase change film 1, the substrate 2, the top electrode 32, the bottom electrode 31, the insulating layer 4 and the heating electrode 5; the top electrode 32, the phase-change film 1, the heating electrode 5, the bottom electrode 31, and the substrate 2 are sequentially contacted from top to bottom, and the insulating layer 4 is coated on the sides of the phase-change film 1 and the heating electrode 5 and is positioned between the bottom electrode 31 and the top electrode 32.
In the phase change memory cell of the confinement structure, the heating electrode 5 is used instead of the bottom electrode 31 to be in contact with the bottom surface of the phase change film 1. The heating electrode 5 can enable the phase change material layer 101 to obtain higher heating efficiency, reduce heat dissipation and facilitate further improvement of the phase change speed.
For such a phase change memory cell with a limited structure of the heating electrode 5, it can be prepared by the following method:
a cleaned substrate 2 is provided, and a bottom electrode 31 is formed on the surface of the substrate 2. An insulating layer 4 is formed on the surface of the bottom electrode 31, and the insulating layer 4 entirely covers the bottom electrode 31. The insulating layer 4 is etched, and in particular, a portion of the insulating layer 4 corresponding to the insulating hole is etched away and the bottom electrode 31 is exposed, so that the insulating hole can be formed in the insulating layer 4. A heating electrode 5 is formed in the heat insulating hole. According to the method of manufacturing the phase change film 1, the phase change film 1 is continuously formed on the heating electrode 5. And forming a top electrode 32 on the top surfaces of the phase-change film 1 and the insulating layer 4 to obtain the phase-change memory cell with the limited structure.
Fig. 4 illustrates a phase change memory cell of a T-type structure, as shown in fig. 4, which includes: the phase change film 1, the substrate 2, the top electrode 32, the bottom electrode 31 and the insulating layer 4; wherein the substrate 2 is provided with a through hole, and the bottom electrode 31 is positioned in the through hole on the substrate 2; the top electrode 32, the phase-change film 1, and the substrate 2 are sequentially contacted, and the phase-change film 1 is also connected with the bottom electrode 31; the insulating layer 4 is coated on the periphery of the phase-change film 1.
In this implementation, the bottom layer of the phase-change film 1 may be the phase-change material layer 101 or the template layer 102, for example, fig. 4 shows that the bottom layer of the phase-change film 1 is the phase-change material layer 101; the topmost layer of the phase change film 1 may be the phase change material layer 101 or the template layer 102, for example, fig. 4 shows that the topmost layer of the phase change film 1 is the template layer 102.
For this type of structure, the number of phase change material layers 101 in which phase change occurs can be changed by changing the operating voltage or the operating current. For example, along the direction from the bottom to the top, only the phase change material layer 101 at the bottommost layer may be subjected to phase change, or two phase change material layers 101 may be subjected to phase change, or three phase change material layers 101 may be subjected to phase change, so that the phase change memory cell achieves the effect of layered phase change, and has the capability of multi-stage storage.
For the phase change memory cell with the T-shaped structure, the phase change memory cell can be prepared by the following method:
a via hole is formed on the substrate 2, then a bottom electrode 31 is formed in the via hole, and the top surfaces of the substrate 2 and the bottom electrode 31 are made flat. According to the method of manufacturing the phase change film 1, the phase change film 1 is formed on the top surfaces of the substrate 2 and the bottom electrode 31. The formation of the top electrode 32 on the top surface of the phase change film 1 is continued. The top electrode 32 and the side portions of the phase change film 1 are etched until the substrate 2 is exposed, forming an etching space. An insulating layer 4 is formed in the etched space until the insulating layer 4 completely covers the top electrode 32 and the phase-change film 1. The top of the insulating layer 4 is etched to expose the top electrode 32, resulting in a phase change memory cell of this T-shaped structure.
For the substrate 2, materials include, but are not limited to: silicon dioxide, silicon carbide, silicon wafer, sapphire, diamond, etc. In the case of preparing a phase change memory cell, the surface of the substrate 2 may be cleaned using an organic solvent such as ethanol and/or acetone to remove impurities from the surface. After the cleaning, the substrate 2 is placed in an oven and dried at 50-100 ℃.
For the top electrode 32 and the bottom electrode 31, materials include, but are not limited to: titanium Tungsten (TiW), tungsten (W), aluminum (Al), titanium nitride (TiN), titanium (Ti), tantalum (Ta), silver (Ag), platinum (Pt), carbon (C), copper (Cu), ruthenium (Ru), gold (Au), cobalt (Co), chromium (Cr), nickel (Ni), iridium (Ir), palladium (Pd), rhodium (Rh), and the like.
For the insulating layer 4, its roles include the following: firstly, the phase-change film 1 is limited in the heat-insulating hole on the phase-change film to reduce the heat required by phase change, thereby being beneficial to reducing the power consumption of the phase-change memory chip; secondly, the short circuit between the top electrode 32 and the bottom electrode 31 can be avoided.
Exemplary insulating materials used for insulating layer 4 include, but are not limited to: silicon nitride (Si) 3 N 4 ) Silicon dioxide (SiO) 2 ) Etc.
For the heating electrode 5, materials include, but are not limited to: titanium nitride (TiN), tungsten (W), titanium-heptatungsten (Ti) 3 W 7 ) Etc.
On the other hand, the embodiment of the disclosure also provides a method for preparing a phase-change memory chip, where the phase-change memory chip is as shown above, and the method for preparing the phase-change memory chip includes: phase change memory cells are prepared, which in turn comprises forming a phase change film 1.
The forming of the phase-change film 1 includes: providing Sb n X m Materials and template materials; according to the lamination sequence of the phase change material layer 101 and the template layer 102 in the phase change film 1, sb is utilized n X m The phase change material layer 101 and the template layer 102 are alternately formed by a thin film deposition process.
The thin film deposition processes used include, but are not limited to, the following: atomic layer deposition, physical vapor deposition, chemical vapor deposition, and the like. Magnetron sputtering is a physical vapor deposition process, which is used in the disclosed embodiments to produce the phase change film 1.
In some examples, some suitable magnetron sputtering parameters in preparing the phase change film 1 are as follows:
background vacuum degree of 10 -3 Pa～10 -5 Pa, e.g. 1X 10 -4 Pa～5×10 -4 Pa; sputtering air pressure is 0.3 Pa-0.8 Pa, etc.; the substrate temperature, i.e., the stage temperature, is from room temperature to 400 ℃, wherein the room temperature may be from 20 ℃ to 30 ℃, e.g., the stage temperature is 200 ℃, 250 ℃, 300 ℃, 350 ℃, 400 ℃, etc.; the sputtering power is 7W-50W, etc.; sputtering gases include, but are not limited to: at least one of argon, krypton, xenon, neon, and nitrogen, for example, argon Ar is selected as the sputtering gas. The magnetron sputtering mode can be direct current magnetron sputtering or radio frequency magnetron sputtering.
As can be seen from the above, the phase change memory cell provided in the embodiments of the present disclosure includes the substrate 2, the top electrode 32, the bottom electrode 31, the insulating layer 4, and the optional heating electrode 5 in addition to the phase change film 1.
The phase change memory cell may be a limited structure or a T-shaped structure, and the preparation method of the phase change memory cell with the limited structure or the T-shaped structure may refer to the preparation methods shown above, which are not described herein.
In some examples, after the phase-change film 1 is formed, the phase-change film 1 may also be polished to facilitate growth of the top electrode 32 on the phase-change film 1.
The phase change memory chip provided by the embodiment of the disclosure can be used as an independent memory or can be used as a hybrid memory together with a dynamic random access memory.
Based on the use of the phase-change memory cell, the phase-change memory chip provided by the embodiment of the disclosure has at least the following advantages: high read-write speed, high stability, strong temperature resistance, long cycle life, high density multi-value storage and the like.
As shown in fig. 5, the phase-change memory chip generally includes a plurality of phase-change memory cells 100 and read/write circuits (including word lines 201 and bit lines 202) to form a phase-change memory array, and further, as shown in fig. 6 or fig. 7, the phase-change memory chip may further include a transistor 300, a diode 400, etc. to cooperate with the phase-change memory cells 100 to form phase-change memory chips of different structures.
For example, the structures of the phase change memory chip according to the embodiments of the present disclosure include, but are not limited to: a 1R structure, a 1T1R structure, a 1D1R structure, or the like, respectively, are exemplified below:
fig. 5 shows a structure of 1R (One Resistor), as shown in fig. 5, in which an individual phase-change memory cell 100 is mated with a read-write circuit, wherein two electrodes of the phase-change memory cell 100 are connected to a word line 201 and a bit line 202 of the read-write circuit, respectively.
Fig. 6 shows a 1T1R (One Transistor One Resistor) structure, in which each phase change memory cell 100 is connected in series with a transistor 300, and is further connected to a word line 201 and a bit line 202 of a read/write circuit, as shown in fig. 6.
The transistors 300 play a role in gating and isolation, when the target phase-change memory cell 100 is operated, the corresponding transistor 300 is turned on, and the transistors 300 corresponding to other phase-change memory cells 100 are turned off, so that crosstalk and misoperation on surrounding phase-change memory cells 100 can be avoided, and an isolation effect is achieved.
Fig. 7 shows a 1D1R (One Diode One Resistor) structure, and as shown in fig. 7, each phase change memory cell 100 is connected in series with a rectifying diode 400, and is further connected to a word line 201 and a bit line 202 of a read/write circuit. The 1D1R structure adopts the diode 400 to select the phase change memory cell 100 to be operated, and due to the rectifying action of the diode 400, current can only flow through the corresponding phase change memory cell 100 from one direction, so that the crosstalk phenomenon in the phase change memory array is suppressed.
In yet another aspect, embodiments of the present disclosure further provide a memory device including a controller and any one of the phase-change memory chips described above, the controller being configured to store data to the phase-change memory chip. As shown in fig. 8, the controller reads and writes data stored in the storage device, and performs interactive communication with the external interface.
The storage device (also referred to as memory) may be configured to store various types of data, which may be contact data, phonebook data, messages, pictures, video, etc., as well as instructional data.
The storage devices to which embodiments of the present disclosure relate may be provided in various types, including, for example, but not limited to: memory, hard disk, magnetic disk, optical disk, etc.
In yet another aspect, an embodiment of the present disclosure further provides an electronic device, where the electronic device includes a processor and the storage device described above, and the processor is configured to store data generated by the electronic device to the storage device.
In some examples, the electronic device includes, but is not limited to: computers, cell phones, music playing devices, digital broadcasting devices, messaging devices, game control devices, medical devices, fitness devices, personal digital assistants, etc.
The present disclosure will be further described by way of more specific examples, although a few specific implementations are described below, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the examples set forth herein. The specific techniques or conditions not identified in the examples, the techniques or conditions described in the literature in this field or the instructions for the product, and the reagents or apparatus used, not identified to the manufacturer, may be conventional products available commercially.
Examples
The present embodiment provides a phase change memory cell with a limited structure, the phase change memory cell is structured as shown in fig. 2, in which the top electrode 32, the phase change film 1, the bottom electrode 31, and the substrate 2 are sequentially contacted, and the insulating layer 4 is coated on the side of the phase change film 1 and between the bottom electrode 31 and the top electrode 32.
Wherein the phase change film 1 comprises: the number of cycles in which the phase change material layers 101 and the template layers 102 are alternately stacked is 10. Wherein the phase change material layer 101 is made of Sb 2 Te material forming, dieThe slab 102 is made of TiTe 2 The material is formed.
The phase-change film 1 is prepared by adopting a radio frequency magnetron sputtering process, and the related magnetron sputtering parameters are as follows: background vacuum degree is 2×10 -4 Pa～3×10 -4 Pa; sputtering air pressure is 0.5Pa; the temperature of the sample stage is 250 ℃; the sputtering power is 30W; the sputtering gas was argon.
Based on the phase-change memory unit, a phase-change memory array is prepared, and the phase-change memory array is subjected to cycle life test as follows:
the phase change memory array was annealed at 370 c and then read and write operations were performed at a speed of 10ns to obtain its cycle life, and the cycle life profile obtained by the test is shown in fig. 9. As can be seen in FIG. 9, the maximum cycle life of the phase change memory array is greater than 1E9 (i.e., 10 9 ) Second, the median cycle life of the phase change memory array is greater than 1E8 (i.e., 10 8 ) Next, it can be seen that the phase-change memory array of the phase-change thin film 1 provided based on the embodiment of the present disclosure exhibits excellent cycle life.
Based on the same operation as above, when the phase change material layer 101 is made of Sb 2 Replacement of Te material with Sb 2 Sn、Sb 2 Se、Sb 2 Ni、Sb 3 Nb、Sb 3 Zr、Sb 2 The resulting phase change memory array also exhibits excellent cycle life at Y.
The foregoing is merely for facilitating understanding of the technical solutions of the present disclosure by those skilled in the art, and is not intended to limit the present disclosure. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present disclosure should be included in the protection scope of the present disclosure.
Claims (13)
1. A phase change material, characterized in that the phase change material comprises Sb n X m The material, wherein n is more than or equal to 1:1;
the difference between the atomic radius of the element X and the atomic radius of the element Sb meets a first threshold condition, so that the element X can form a weak polar bond with the element Sb; and the thermal stability parameter of the element X meets a second threshold condition, so that the element X is stable at the phase transition temperature of the element Sb.
2. The phase change material of claim 1, wherein the first threshold condition comprises the difference being less than or equal to
The second threshold condition includes a tolerance time of the element X at 400 ℃ of greater than or equal to 30 minutes.
3. The phase change material of claim 2, wherein the element X comprises at least one of Te, sn, se, ni, nb, zr, Y.
4. The phase change material of claim 1, wherein 1:0.2.gtoreq.n.m.gtoreq.1:1.
5. The phase change material according to any one of claims 1-4, wherein the Sb n X m The material is in the form of Sb-X alloy, sb-X binary compound or a mixture of Sb simple substance and X simple substance.
6. A phase change memory chip, the phase change memory chip comprising: a plurality of phase change memory cells, each phase change memory cell having a phase change film (1), the phase change film (1) comprising: phase change material layers (101) and template layers (102) alternately stacked;
-the phase change material layer (101) is formed of a phase change material according to any of claims 1-5;
the template layer (102) is formed of a template material, which is the same as the Sb n X m The lattice mismatch of the material satisfies a third threshold condition such that the template layer (102) can act as a crystallization template for the phase change material layer (101).
7. The phase-change memory chip according to claim 6, wherein the thickness of the phase-change material layer (101) is 1nm to 100nm;
the thickness of the template layer (102) is 1 nm-10 nm.
8. The phase-change memory chip according to claim 6, wherein the number of cycles in which the phase-change material layer (101) and the template layer (102) are alternately stacked is 1 to 100.
9. The phase-change memory chip of any one of claims 6-8, wherein the third threshold condition comprises the lattice mismatch degree being less than or equal to 10%.
10. The phase-change memory chip of claim 9, wherein the template material comprises TiTe 2 At least one of Ti-Sb-Te ternary compounds.
11. The phase-change memory chip according to any one of claims 6-10, wherein the phase-change memory cell further comprises: a substrate (2), a bottom electrode (31), a top electrode (32) and an insulating layer (4);
the bottom electrode (31) is positioned on the surface of the substrate (2);
the phase change film (1) is connected between the bottom electrode (31) and the top electrode (32);
the insulating layer (4) is coated on the side part of the phase change film (1).
12. A memory device comprising a controller and at least one phase change memory chip as claimed in any one of claims 6 to 11, the controller being arranged to store data to the phase change memory chip.
13. An electronic device comprising a processor and the storage device of claim 12, the processor configured to store data generated by the electronic device in the storage device.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202210578267.3A CN115101666A (en) | 2022-01-30 | 2022-03-17 | Phase change material, phase change memory chip, memory device and electronic device |
| PCT/CN2023/073739 WO2023143587A1 (en) | 2022-01-30 | 2023-01-29 | Phase-change material, phase-change storage chip, storage device and electronic device |
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| CN2022101142358 | 2022-01-30 | ||
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| CN202210578267.3A Division CN115101666A (en) | 2022-01-30 | 2022-03-17 | Phase change material, phase change memory chip, memory device and electronic device |
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