CN1163034A - AGC circuit for a digital receiven - Google Patents

AGC circuit for a digital receiven Download PDF

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CN1163034A
CN1163034A CN 95196122 CN95196122A CN1163034A CN 1163034 A CN1163034 A CN 1163034A CN 95196122 CN95196122 CN 95196122 CN 95196122 A CN95196122 A CN 95196122A CN 1163034 A CN1163034 A CN 1163034A
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circuit
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digital
symbol
receiver
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CN 95196122
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Chinese (zh)
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CN1110175C (en )
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理查德·W·西特塔
丹尼斯·M·马扎鲍
加里·J·斯格里尼李
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齐尼思电子公司
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    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G3/00Gain control in amplifiers or frequency changers without distortion of the input signal
    • H03G3/20Automatic control
    • H03G3/30Automatic control in amplifiers having semiconductor devices
    • H03G3/3052Automatic control in amplifiers having semiconductor devices in bandpass amplifiers (H.F. or I.F.) or in frequency-changers used in a (super)heterodyne receiver
    • H03G3/3068Circuits generating control signals for both R.F. and I.F. stages
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/02Amplitude-modulated carrier systems, e.g. using on-off keying; Single sideband or vestigial sideband modulation

Abstract

一种接收数字电视信号之类的数字接收机的AGC电路,它包含一个导频,且格式化成多个重复的数据段,每个数据段包含固定数目的以恒定码元速率出现的多级码元。 AGC circuit receiving a digital signal receiver of a digital television or the like, which comprises a pilot, and formatted into a plurality of repetitive data segments, each data segment containing a fixed number of the multilevel code symbol rate constant appears yuan. 多级码元被转换成相应的数据值,且导频(由DC偏移所代表)被从数据值中清除。 Multilevel symbols are converted into the corresponding data values, and a pilot (represented by the DC offset) is removed from the data values. 每隔三个码元被取样,且取样被累加和等分以便导出平均码元值。 Every three symbols is sampled, and the samples are aliquoted and accumulated to derive the average symbol values. 将平均码元值与参考平均码元值进行比较,此比较结果就是控制调谐器和IF增益的AGC电位。 The average symbol value is compared with the reference average symbol values, this comparison is a control potentiometer tuner and IF AGC gain. 对于有线信号,有线/地面输入改变取样方法以使补偿有线系统中的高电平扫描试验。 For signal cable, cable / terrestrial input method of changing the sample so that a high level scan test compensating cable system.

Description

用于数字接收机的自动增益控制电路 The automatic gain control circuit for a digital receiver

本发明一般涉及到数字数据接收机,更确切地说是涉及到数字电视接收机的自动增益控制(AGC)系统。 The present invention relates generally to digital data receivers, and more particularly, to an automatic gain control digital television receiver (AGC) system.

近来已提出了许多用来以数字形式发送和接收电视信号的系统。 Recently, many systems have been proposed to transmit in digital form and receive television signals. 电视信号可包含例如一种经压缩过的宽带HDTV信号或者一个或更多个经压缩过的NTSC信号。 For example, one may include a television signal via a compressed wideband HDTV signals or one or more compressed by the NTSC signal. 用来实现这种发送的二种最广泛地被提倡的调制技术是正交调幅(QAM)和残留边带调制(VSB)。 Used to implement the two most widely advocated Such modulation is transmitted quadrature amplitude modulation (QAM) and the vestigial sideband modulation (VSB). 美国专利5,087,975公开了一种用来以连续M级码元的形式在标准的6MHz电视频道上发送电视信号的VSB系统,它在频道的低边处带有相对小(低功率级)的导频。 U.S. Patent No. 5,087,975 discloses a method for the continuous form of M-ary symbols transmitted VSB system television signal on a standard 6MHz television channel, which has a relatively small (low power level) of the pilot channel at a low side . 虽然级数M(即表征码元等级的VSB模式)可以改变,但码元速率最好是固定的,例如68AH(大约每秒10.76兆码元),其中H是NTSC水平扫描频率。 Although the number of stages M (i.e., characterizing the level symbol VSB mode) can be changed, but the symbol rate is preferably fixed, e.g. 68AH (about 10.76 Mega symbols per second), where H is the NTSC horizontal scanning frequency. 用于任何特定安排中的码元级的数目很大程度是信噪比的函数,它表示码元级数较小的传输方法被用于信噪比低的情况即噪音环境中,对于提供有较良好环境的有线系统,适应16、8、4、2码元级的系统提供了满足大多数条件的灵活性。 The number of large extent for any particular arrangement of symbol level is a function of signal to noise ratio, which represents the symbol series of smaller transmission method is used for low SNR environment, i.e., the noise, there is provided for a more favorable environment for cable systems, to adapt 16,8,4,2 symbol-level system provides the flexibility to meet most of the criteria. 对于环境较差的地面或空间广播,8(即8级数字码元)的VSB模是恰当的。 For a poor terrestrial or space broadcast environment, 8 (i.e., eight digital symbols) of VSB mode is appropriate. 较低的M值以降低传输比特率为代价可改善信号噪音性能,这是可以理解的。 Lower values ​​of M to reduce the cost of the transmission bit rate can be improved signal to noise performance, which is understandable. 例如,假若速率为每秒10.76兆码元,则二级VSB信号(每码元1比特)提供的传输比特率为每秒10.76兆比特,而四级VSB信号(每码元2比特)提供的传输比特率为每秒21.52兆比特。 For example, if the rate is 10.76 megabytes per second symbols, the two VSB signal (1 bit per symbol) provides a transmission bit rate of 10.76 megabits per second, while the four VSB signal (2 bits per symbol) provides a per second transmission bit rate of 21.52 megabits.

电视接收机之类的数字接收机的恰当工作要求接收到的载波信号要较迅速地获得且接收机的RF和IF段的增益要适当调整。 Proper operation of the digital receiver is a television receiver of the received carrier signal required to obtain more quickly and an RF receiver IF band and the gain should be adjusted. 在QAM接收机中由于不存在任何种类的导频,故载波的获得相当困难。 QAM receiver in the absence of any kind due to the pilot frequency, so that the carrier is very difficult to obtain. 而在上述VSB系统中采用导频则使载波的获得大为方便,但由于导频的电平相当低,且用于这些接收机中的同步解调器的牵入同步范围(pull in range)有限,故仍遇到许多困难。 The use of a pilot carrier so as to obtain the above greatly facilitate VSB system, but the level of the pilot is very low, and for these receiver demodulator synchronization pull-in range (pull in range) limited, it still encountered many difficulties. 如在International Pubication第WO 95/8508和WO 95/8509中所示,我们已开发了一些系统,用来提高FPLL的牵入同步并处理同步解调器中的频率和相位锁定电路的双相稳定性。 As International Pubication of WO 95/8508 and WO 95/8509 shown, we have developed a number of systems to improve the pull-in and FPLL processing frequency and phase synchronous demodulator biphasic stable locking circuit sex. 本发明的目的在于一种用于数字电视接收机的新颖AGC系统,其中的信号包括一个导频。 Object of the present invention is a novel AGC system for a digital television receiver, wherein the signal comprises a pilot.

本发明的基本目的是提供一种数字数据接收机的新颖的AGC系统。 The basic object of the present invention is to provide a novel digital data receiver AGC system.

本发明的另一目的是提供一种数字数据接收机的自动增益控制系统,它对数据码元的等级进行取样。 Another object of the present invention to provide a digital data receiver automatic gain control system, it is the data symbol level is sampled.

结合附图阅读下列描述之后,将明了本发明的这些和其它的目的和优点,在这些附图中:图1是根据本发明构成的电视接收机的局部方框图;图2是根据本发明构成的另一种电视接收机的局部图。 After reading the following description in conjunction with, the present invention will be apparent DRAWINGS These and other objects and advantages, in the drawings: FIG. 1 is a partial block diagram of a configuration of a television receiver of the present invention; Figure 2 is constructed according to the present invention another partial view of a television receiver.

如上所述,发射的VSB信号最好在6MHz电视频道的低端处包括一个小导频,并可包含2、4、8或16级码元(或它们的组合)。 As described above, the VSB signal transmission preferably comprises a small pilot at the low end of the 6MHz television channel, and may comprise 4, 8 or 16 order symbol (or combination thereof). 这些码元最好安排成连续数据域,每域包含313个数据段。 These symbols are preferably arranged in successive data fields, each data field contains 313 segments. 每个数据段由包含四个代表数据段同步的二级码元在内的832个码元组成,且各域的第一数据段包含一系列代表帧同步码的二级码元。 Each data segment comprises a four element data representing two yards segment synchronization is composed of 832 symbols, and the first segment of each data field representative of the frame synchronization code comprises a series of secondary symbols. 在最佳实施例中,此数据码元为8级,虽然根据本发明也可用不同级的码元。 In the preferred embodiment, this data symbol is eight, although the present invention may also be used according to the different stages of symbols.

借助于将偏移(即恒定DC电平)引入到码元值,可在发射机中方便地产生导频。 By means of the offset (i.e., a constant DC level) into a symbol value, can easily generate the pilot in the transmitter. 在接收机中,此偏移产生一个用作载波恢复的恒定DC。 In the receiver, this offset is used as a carrier recovery generates a constant DC.

参照图1,接收到的RF信号被调谐器10转换成IF信号。 Referring to FIG 1, the received RF signal is converted into an IF signal tuner 10. 对地面信号,RF信号可经由天线12接收,而对有线信号可经由电缆输入端14接收。 It may be received via antenna 12 to the ground signal, the RF signal, but may receive a cable signal input terminal 14 via a cable. 可以理解,接收机的各种元件通常处于微处理器的控制之下,但为简化起见没有示出它来。 It will be appreciated, the various elements of the receiver under the control of a microprocessor is usually, but not illustrated for simplicity to it. 调谐器10的IF输出被馈至IF SAW滤波器16,并进而到IF放大器18。 IF output of the tuner 10 is fed to the IF SAW filter 16, and thus the IF amplifier 18. IF放大器18的输出被馈至同步解调器20,它继而将一个模拟量供给模数(A/D)转换器22,接收到的码元的幅度在其中被转换成相应的数字值。 IF output of amplifier 18 is fed to a synchronous demodulator 20 which is in turn supplied to an analog analog to digital (A / D) converter 22, the amplitude of the received symbols where it is converted into a corresponding digital value. A/D 22供给数据恢复电路24(数据码元在其中被恢复)、码元时钟恢复电路26(根据同步信息在其中产生时间信号)以及诸如后置梳齿形滤波器之类的线性滤波器或DC清除电路28(DC在其中被清除)。 A / D 22 supplied to the data recovery circuit 24 (in which the data symbols to be restored), the symbol clock recovery circuit 26 (in which the synchronization information generation time signal) and the linear filter, such as a post-comb filter or the like clear circuit or DC 28 (DC cleared therein). 我们记得,DC代表导频且以偏移的形式均匀地影响所有的码元值。 We recall that, DC, and in the form of the representative pilot offset uniformly affect all symbol values. DC清除电路28的输出被馈至绝对值电路30,它提供一个代表码元幅度的输出。 Clear DC output circuit 28 is fed to an absolute value circuit 30 which provides an output representative of the amplitude of the symbols. 绝对值电路30被用来校正接收到的码元的值,因为这些码元值可能是负的也可能是正的级。 The value of the absolute value circuit 30 is used to correct the received symbols, since these symbols may be negative values ​​may also be positive level. 例如,VSB模式8的级可能包含-7、-5、-3、-1、+1、+3、+5和+7。 For example, the VSB mode stage 8 may include -7, -5, -3, -1, +1, +3, +5 and +7. 绝对值电路30将其输出馈至受四次分频计数器34控制的取样器32。 An absolute value circuit 30 whose output is fed to a sampler frequency counter 34 by four control points 32. 码元时钟恢复电路26将时间信号提供给A/D转换器22、四次分频计数器34以及配备有取样电路32的输出的累加器和除法器电路36。 Symbol clock recovery circuit 26 provides a time signal to the A / D converter 22, four frequency division counter 34 and an accumulator 36 and is provided with a divider circuit output of the sampling circuit 32. 时间信号最好包含一个码元速率的时钟信号。 Time signal preferably comprises a symbol rate clock signal. 为了将要描述的目的,对累加器和除法器电路36提供了有线/地面控制输入。 For purposes to be described, of the accumulator and the divider circuit 36 ​​provides a cable / terrestrial control input. 累加器和除法器电路36的输出包含被取样的数据码元在预定时间内的平均值,且被馈至加法器38的正输入端。 And the output of the accumulator circuit 36 ​​comprises divider sampled data symbols averaged over a predetermined time, and is fed to the positive input of the adder 38. 加法器38的负输入端由施加代表码元已知平均值的参考信号的参考源40馈电。 The adder 38 is applied to the negative input end is the representative symbols of a known reference signal source 40 with reference to the average feed. 这是基于码元是随机的以及关于码元级的了解即VSB模式。 This is based on random symbols and understanding about the level of symbols that is VSB mode. 对于VSB=8,若校正过的码元级为+1、+3、+5、+7(且导频已被电路28清除了),则平均码元值=4。 For VSB = 8, if the corrected symbol level is +1, +3, + 5, + 7 (and a pilot circuit 28 has been cleared), the average symbol value = 4. 参考平均码元值被从确定的平均码元值中减去,而差值代表实际数据级在参考值之上或之下究竟相距多少。 The average value of the reference symbol is subtracted from the average value of the determined symbol, the difference represents the actual data level above or below the reference value exactly how much distance. 此输出即比较的结果被馈至AGC逻辑电路42,它继而又控制调谐器10和IF放大器18的AGC。 I.e., the output of this comparison result is fed to the AGC logic circuit 42, which in turn controls the tuner 10 and IF AGC amplifier 18.

在运行的起始阶段,AGC逻辑电路42使调谐器和IF电路工作于最大增益。 In the initial phase of operation, AGC logic circuit 42 causes the tuner and IF circuit operating at maximum gain. 由于在信号中牵涉到的导频电平低,故这有助于载波获取。 Since involved in the pilot signal level is low, so that it contributes to carrier acquisition. 取样电路32每隔(N-1)个码元进行取样,且将其值馈至累加器和除法器电路36。 Every sampling circuit 32 (N-1) th symbol is sampled and its value fed to the accumulator 36 and the divider circuit. 我们记得,码元值已被绝对值电路30校正,而且导频(DC偏移)已被电路28清除。 We recall that the symbol value has been corrected absolute value circuit 30, and a pilot (DC offset) circuit 28 has been cleared. 电路36对固定数量Y的取样码元的码元值进行累加,而且用固定数量Y除此值,以产生接收到的数据码元推导平均值。 Symbol value circuit 36 ​​Y fixed number of symbols to accumulate samples, and with a fixed number of values ​​Y In addition, to generate the received data symbols to derive an average value. 将此平均数据码元值与参考平均值进行比较,并根据这一比较来调节AGC,以便使调谐器和IF的增益从最大值下降。 This average data symbol value is compared with the reference average value, and the AGC is adjusted in accordance with this comparison, so that the tuner and IF gain reduction from the maximum value. 实际上,对于地面信号,N=4,且被累加的码元数(Y)覆盖码元的7个数据段。 In fact, the ground signal, N = 4, and the number of symbols (Y) covered seven symbol data segments are accumulated. 对于为测试目的而可能承受高电平扫描信号的有线信号,取样以不同的周期进行以使这一高电平扫描信号的影响减至最小。 For wired signal for testing purposes may be subjected to a high level scan signal, samples were taken at different periods to minimize the effects of the high-level scan signal is minimized. 因此,对于有线输入,累加和除法比率将不相同,而这是由对累加器和除法器36的有线/地面控制输入所控制的。 Thus, for a cable input, and the division ratio will not accumulate the same, which is controlled by the input of the divider 36 and the accumulator cable / terrestrial controlled.

图1中的电路28被确定为一个线性滤波器或一个DC清除电路。 1 circuit in FIG 28 is determined to be a linear filter or remove a DC circuit. 电路28的主要功能是DC清除,亦即消除导频对被确定的码元值的影响。 The main function of circuit 28 is a DC clearance, i.e. to eliminate the influence of the pilot symbol value is determined. 在美国专利5,086,340和5,087,975中,描述了在同频道NTSC信号附近运行数字电视接收机的影响。 In US Patent 5,086,340 and 5,087,975, describe the influence of co-channel NTSC signal is operating near a digital television receiver. 具体地说,线性滤波器(后置梳形电路)被选择性地插入在接收到的数据流中以便从NTSC同频道信号中消去大部分干扰。 Specifically, a linear filter (post-comb circuit) is selectively inserted in the received data stream in order to eliminate most of the co-channel interference from an NTSC signal. 线性滤波器具有同时清除任何DC的功能,因而本发明可方便地用来恢复来自线性滤波器输出的数字数据码元,这就可能免去对分立的DC清除电路的需要。 Clearing any linear filter having the function of DC, and thus the present invention may conveniently be used to recover the digital data from the linear filter output symbols, which may require clearance eliminating the separate DC circuit.

在图2中,除在A/D 22和码元时钟恢复电路26之间增加了一个同步滤波器23和一个同步相关滤波器25之外,基本上与图1的电路安排相同。 In FIG. 2, in addition to an increase of a filter 23 and a synchronous synchronization correlation filters than 25, the circuit arrangement of FIG. 1 is substantially the same as between 26 restore A / D 22 and a symbol clock circuit. 在美国专利5,416,524中,描述了借助于一对滤波器(其特性被恰当地修整成一个滤波器响应发射信号的同步字符而产生鉴频器特性曲线,而另一滤波器响应同步字符而产生峰值特性)而恢复同步的安排。 In U.S. Patent No. 5,416,524, there is described by means of a pair of filters (which characteristic is appropriately trimmed to a synchronization character transmit filter response signal generated discriminator curve, and the other filter response synchronization character generates the peak characteristics) and synchronization recovery arrangements. 在这些安排中,同步相关滤波器25具有同时消除DC的特性。 In these arrangements, the synchronization correlation filter 25 having characteristics while eliminating the DC. 因此,用这种滤波器安排可以自动补偿掉导频信号偏移。 Thus, with such a filter arrangement may be automatically compensated for pilot signal offsets. 在这种安排中(图2),绝对值电路30连接于同步相关滤波器25的输出。 In this arrangement (FIG. 2), the absolute value circuit 30 is connected to the output of the synchronization correlation filter 25. 在其它各方面则如表示相似元件的相似参考号所示,图2与图1是相同的。 In other aspects are similar to that shown as reference numerals represent like elements, FIG. 1 and FIG. 2 are the same. 图2电路的工作与图1电路完全一样。 2 with the circuit of Figure 1 work exactly the same as the circuit of FIG.

所描述的是一种包括导频的新颖的数字电视信号技术。 It is described a novel digital television signal includes a pilot technology. 应该承认,对本技术领域熟练人员来说,本发明所述实施例的各种改变是显而易见的,且本发明只受权利要求的限制。 It should be recognized, for the person skilled in the art, various modifications of the embodiments will be apparent to embodiments of the present invention, and the present invention is limited only by the claims.

Claims (15)

  1. 1.一种运行数字数据接收机以接收包括一个导频和多个以恒定码元速率出现的多级码元的数字信号的方法,此方法包括下列步骤:将接收到的码元转换成相应的数字值,消除上述导频对上述数字值的影响,对上述码元作预定时间的取样以确定平均码元值,将所确定的平均码元值与参考平均码元值进行比较,以及按照比较的结果而调节上述接收机的增益。 1. A method of operating a digital data receiver for receiving comprises a method of conducting a plurality of digital signal and a multi-stage pilot symbols to the symbol rate constant of occurrence, the method comprising the steps of: the received symbols into a corresponding digital value to eliminate the influence of the digital values ​​of the pilot, the above symbols for sampling a predetermined time to determine the average symbol value, an average symbol value determined is compared with the reference average symbol values ​​and in accordance with result of the comparison to adjust the gain of the receiver.
  2. 2.权利要求1的方法,其中所述的取样每隔(N-1)个码元执行一次,而其中所述的平均在Y个取样上进行。 2. The method of claim 1, wherein said sampling interval (N-1) th symbol is performed once, and wherein said average is performed on the Y samples.
  3. 3.权利要求1或2的方法包括对上述数字值进行校正。 3. The method of claim 1 or claim 2 comprising correcting the digital values.
  4. 4.权利要求2的接收机,其中所述的数字信号被格式化成固定数目码元的重复的段,且其中的Y覆盖多个上述的段。 4. The receiver as claimed in claim 2, wherein said digital signal is formatted into duplicate sections fixed number of symbols, and wherein the plurality of segments Y covering.
  5. 5.权利要求4的方法,其中的接收机带有一个有线信号输入端和一个地面信号输入端,且其中的Y对接收到的各有线信号是不同的。 The method of claim 4, wherein the cable receiver has a signal input terminal and a ground signal input terminal, and wherein each of the Y cable signal received is different.
  6. 6.权利要求4的方法,其中所述的导频由一个DC分量代表,且其中的消除步骤将上述DC分量清除掉。 The method of claim 4, wherein the pilot by a representative of a DC component, and wherein the step of eliminating the DC component is removed above.
  7. 7.权利要求4的方法,其中所述的接收机包括一个用来清除同频道干扰的线性滤波器,上述线性滤波器具有零DC响应,且其中的消除步骤包含在上述线性滤波器的输出处对上述码元进行取样。 The method of claim 4, wherein said receiver comprises a linear filter for removing co-channel interference, said filter having a zero DC linear response, and wherein the removal step comprises at the output of said linear filter the above symbols are sampled.
  8. 8.一种数据接收机的自动增益控制(AGC)电路,此数据接收机接收包含一个导频和多个以恒定码元速率出现的多级码元的数字电视信号,上述电路包括一个用来将上述接收到的码元变成数字值的转换器(22)、一个用来清除上述导频对上述数字值的影响的DC清除电路(28)、一个安排来接收上述码元的取样器(32)、用来借助于使上述取样器(32)工作一个预定时间而确定上述接收到的码元的平均接收码元值的码元值平均电路装置(36)、用来将上述所确定的平均码元值与参考平均码元值进行比较的比较电路装置(38)、以及用来根据上述比较而调节上述接收机的增益的控制电路装置。 A data receiver automatic gain control (AGC) circuit, comprising a receiver receives the data and pilot symbols a plurality of multi-stage occurs at a constant symbol rate digital television signal, said circuit comprising a for the said received symbols into a digital value converter (22), for a clear impact on the digital values ​​of the DC clear pilot circuit (28), the sampler receives the symbol to an arrangement ( 32), so that the sampler is used by means (32) a predetermined working time identification code to the received symbol values ​​of the average received symbols symbol values ​​averaging circuit means (36) for the above-identified comparator circuit means (38) the average symbol value to be compared with the reference average symbol values, based on the comparison and means for adjusting the gain of the control circuit of the receiver means.
  9. 9.权利要求8的AGC电路,其中每隔(N-1)个码元被取样,且其中所述的预定时间覆盖Y个码元。 9. AGC circuit as claimed in claim 8, wherein every (N-1) th symbol is sampled a predetermined time and wherein said cover Y symbols.
  10. 10.权利要求8的AGC电路,其中所述的数字信号被格式化成固定数目码元的重复的段,且其中的Y覆盖多个上述的段。 10. AGC circuit as claimed in claim 8, wherein said digital signal is formatted into duplicate sections fixed number of symbols, and wherein the plurality of segments Y covering.
  11. 11.权利要求9或10的AGC电路,其中所述的接收机带有一个有线信号输入端和一个地面信号输入端,且其中的Y对接收到的各有线信号是不同的。 11. AGC circuit as claimed in claim 9 or 10, wherein said receiver having a wired signal input terminal and a ground signal input terminal, and wherein each of the Y cable signal received is different.
  12. 12.权利要求8、9或10的AGC电路包括用来校正上述数字值的较正电路装置(30)。 8, 9 or 12. AGC circuit 10 includes a more positive circuit means (30) for correcting the digital values ​​claims.
  13. 13.权利要求8、9或10的AGC电路包括一个增益可控制的级(10,18),所述的控制装置(42)在数字信号的起始接收过程中能够以最大值运行上述增益可控制的级(10,18)。 8, 9 or 13. AGC circuit 10 includes a level (10, 18) a controllable gain claim, the control means (42), wherein the gain may be capable of operating at the maximum initial reception digital signal control stages (10, 18).
  14. 14.权利要求8、9或10的AGC的电路,其中所述的导频由DC分量代表,且其中所述的DC清除电路(28)阻挡上述DC分量。 14. The AGC circuit of claim 8, 9 or 10, wherein the pilot by the DC component represents, and wherein said clearing circuit DC (28) blocking said DC component.
  15. 15.权利要求8、9或10的AGC电路包括一个用来清除同频道干扰的线性滤波器(28),上述线性滤波器(28)具有零DC响应,且其中所述的取样器(32)连接于上述线性滤波器(28)的输出。 8, 9 or 15. AGC circuit 10 comprises a linear filter for removing (28) said linear filter (28) having a zero co-channel interference of claim DC response, and wherein said sampler (32) connected to the linear filter (28) output.
CN 95196122 1994-11-08 1995-10-26 AGC circuit and method for digital TV receiver CN1110175C (en)

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US5565932A (en) 1996-10-15 grant
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WO1996014700A2 (en) 1996-05-17 application
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