CN115668449A - 贴合晶圆用支撑基板 - Google Patents

贴合晶圆用支撑基板 Download PDF

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CN115668449A
CN115668449A CN202180039914.7A CN202180039914A CN115668449A CN 115668449 A CN115668449 A CN 115668449A CN 202180039914 A CN202180039914 A CN 202180039914A CN 115668449 A CN115668449 A CN 115668449A
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support substrate
polysilicon layer
bonded wafer
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涩谷正太
稗田大辅
石崎宽章
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Abstract

本发明提供一种贴合晶圆用支撑基板,其为用于将活性层用基板(13)与支撑基板(23)隔着绝缘膜(11)贴合而成的贴合晶圆(30)的支撑基板(23),具备支撑基板主体(20)和堆积在支撑基板主体(20)的贴合面侧的多晶硅层(22),多晶硅层(22)的晶粒尺寸为0.419μm以下。

Description

贴合晶圆用支撑基板
技术领域
本发明涉及一种贴合晶圆用支撑基板,其用于将活性层用基板与支撑基板贴合而成的贴合晶圆。
背景技术
以往,作为高频(RF:Radio Frequency:射频)器件用基板,使用SOI(Silicon OnInsulator:绝缘体上硅)晶圆。SOI晶圆具有在支撑基板(例如,单晶硅晶圆)上依次形成有氧化硅(SiO2)等绝缘膜及活性层(例如,单晶硅)的结构。
作为制造SOI晶圆的方法的代表性方法之一,有贴合法。该贴合法是如下方法:在支撑基板及活性层用基板中的至少一方形成绝缘膜,接着,在将这些基板隔着绝缘膜贴合之后,在1200℃左右的高温下实施热处理,由此制造SOI晶圆(以下,将通过贴合法制造的SOI晶圆称为“贴合晶圆”。)。
在上述贴合晶圆中,通过支撑基板的高电阻化(例如,电阻率为3000Ω·cm以上)来应对RF。然而,为了应对器件的进一步高速化,要求应对更高的频率,仅通过支撑基板的高电阻化是无法应对的。
因此,提出如下方案:在支撑基板的表面上,形成用于捕获并消除在高频下的动作中产生的载流子的多晶硅层作为载流子捕获层(例如,参考专利文献1)。为了防止硅在支撑基板的单晶硅上外延生长,在支撑基板上形成极薄氧化膜,在其上形成多晶硅。然后,形成有多晶硅的表面被研磨,进一步与形成在活性层侧的绝缘膜贴合。
并且,在专利文献1中记载了如下方法:为了防止因多晶硅层的厚度而贴合晶圆的翘曲增大、或因生长温度变高导致极薄氧化膜局部消失而外延生长,使多晶硅层以两个阶段生长。在该方法中,多晶硅层的堆积以两个阶段进行,即,使第1多晶硅层生长的第1生长、以及使比第1多晶硅层更厚的第2多晶硅层生长的第2生长。
现有技术文献
专利文献
专利文献1:日本特开2015-211061号公报。
发明内容
发明所要解决的技术问题
然而,若使用光学显微镜等观察通过以上方法制造的贴合晶圆的表面,则在晶圆的一部分经常看到表面像水泡一样隆起的直径为几十μm~几mm大小的微小突起。这被称为起泡缺陷,是由于在贴合界面上因晶圆彼此未良好地贴合而形成的缺陷。当在存在该缺陷的部分形成有器件时,起泡缺陷引起产生器件不良、在器件工序中位于缺陷上的活性层部分有可能剥离而成为发尘源等各种问题。
作为在贴合界面上晶圆彼此未良好地贴合的原因,可以考虑支撑基板的翘曲、或多晶硅层表面的表面粗糙度,但在专利文献1中记载的方法中形成了多晶硅层的情况下,由于抑制支撑基板的翘曲,因此认为起泡缺陷起因于表面研磨后的表面粗糙度。
因此,本发明的目的在于提供一种贴合晶圆用支撑基板,其在制造贴合晶圆时,能够抑制起泡缺陷的产生。
用于解决技术问题的方案
本发明的贴合晶圆用支撑基板为用于将活性层用基板与支撑基板隔着绝缘膜贴合而成的贴合晶圆的支撑基板,其特征在于,具备:支撑基板主体;及多晶硅层,堆积在所述支撑基板主体的贴合面侧,所述多晶硅层的晶粒尺寸为0.419μm以下。
在上述贴合晶圆用支撑基板中,可以是在经研磨的所述多晶硅层的10μm×10μm的面积区域中测定的均方根粗糙度Rq为0.364nm以下。
在上述贴合晶圆用支撑基板中,可以是所述多晶硅层被研磨,表示从所述支撑基板的中心基准面到所述支撑基板的中点上的中心面的位移量的BOW-bf为+16μm以下。
在上述贴合晶圆用支撑基板中,可以是所述多晶硅层由如下多晶硅层组成:第1多晶硅层,堆积在所述支撑基板主体的贴合面侧;及第2多晶硅层,堆积在所述第1多晶硅层上,所述晶粒尺寸为所述第2多晶硅层的晶粒尺寸。
所述支撑基板主体可以是单晶硅晶圆。
根据上述结构,当制造贴合晶圆时,能够抑制起泡缺陷的产生。
附图说明
图1是用于说明制造本发明的实施方式的贴合晶圆的工序的流程图。
图2是表示本发明的实施方式的贴合晶圆的制造方法的工序剖视图。
图3是表示多晶硅层的生长温度与起泡缺陷面积的关系的图表。
图4是表示晶粒尺寸与均方根粗糙度的关系的图表。
具体实施方式
以下,参考附图,对本发明的优选实施方式进行详细说明。本发明的贴合晶圆用支撑基板例如是用于与形成在活性层用基板上的绝缘膜贴合而成的SOI晶圆等贴合晶圆的支撑基板。
本发明的发明人等对能够抑制产生起泡缺陷的贴合晶圆用支撑基板反复进行了深入研究。其结果,关于可以抑制产生起泡缺陷的多晶硅层的表面粗糙度(均方根粗糙度Rq、RMS)的范围得到了见解。并且,发现在表面粗糙度与多晶硅层的晶粒尺寸之间具有相关关系,并完成了本发明。
图1是用于说明制造本实施方式的贴合晶圆的工序的流程图。图2是表示贴合晶圆的制造方法的工序剖视图。
如图1及图2所示,贴合晶圆的制造方法具有:工序S11~S14,制造活性层用基板;工序S21~S25,与制造活性层用基板的工序分开制造支撑基板;及工序S31~S33,使活性层用基板与支撑基板贴合而制造贴合晶圆。
制造活性层用基板的工序具有活性层用基板主体准备工序S11、绝缘膜生长工序S12、离子注入层形成工序S13及贴合前清洗工序S14。
在活性层用基板主体准备工序S11中,准备作为单晶硅晶圆的活性层用基板主体10。
在绝缘膜生长工序S12中,例如,通过热氧化或CVD等,在活性层用基板主体10的周围,使绝缘膜11(氧化膜)生长。
在离子注入层形成工序S13中,从绝缘膜11的上方,由离子注入机注入氢离子或稀有气体离子,从而在活性层用基板主体10内形成离子注入层12。
在贴合前清洗工序S14中,为了去除活性层用基板主体10的贴合面的粒子,进行贴合前清洗。
通过以上工序,制造贴合晶圆用活性层用基板13。
制造支撑基板的工序具有支撑基板主体准备工序S21、氧化膜形成工序S22、多晶硅层堆积工序S23、研磨工序S24及贴合前清洗工序S25。
在支撑基板主体准备工序S21中,准备由单晶硅晶圆组成的支撑基板主体20。单晶硅晶圆能够使用将通过切克劳斯基法(CZ法)或悬浮区熔法(FZ法)培育的单晶硅锭由线锯等切片而成的单晶硅晶圆。
在氧化膜形成工序S22中,在支撑基板主体20上形成氧化膜21(基底氧化膜)。氧化膜21的厚度例如优选设为0.3nm以上且10nm以下的厚度。通过减薄氧化膜21的厚度,能够减少因氧化膜21介于支撑基板主体20与多晶硅层22之间而对RF器件特性的影响。
氧化膜21例如能够通过碱清洗(SC1清洗)、酸清洗(SC2清洗)等湿式清洗来形成。氧化膜21的形成方法并不限定于此,能够通过氧化性气氛下的热氧化、使用了快速加热/快速冷却装置的氧化热处理等来形成。
在多晶硅层堆积工序S23中,使多晶硅层22堆积在氧化膜21上。多晶硅层22的堆积以两个阶段进行,即,使第1多晶硅层22A生长的第1生长、以及使比第1多晶硅层22A更厚的第2多晶硅层22B生长的第2生长。
首先进行的第1生长中的生长温度(第1温度)为890℃以上且900℃以下。第1生长中的生长温度优选为895℃。
在第1生长之后进行的第2生长中的生长温度(第2温度)优选为1000℃以上且1075℃以下,更优选为1050℃以上且1075℃以下。
通过在支撑基板主体20的表面与多晶硅层22之间预先形成有氧化膜21,并将随后进行的第1生长的第1温度设为890℃以上且900℃以下,能够防止由氧化膜21的一部分消失引起的多晶硅层22的单晶化。并且,也能够减少研磨后的翘曲。
在第2生长中,通过将第2温度设为1000℃以上且1075℃以下,并堆积比第1生长厚的第2多晶硅层22B,能够将多晶硅层22高速且有效地堆积成充分的厚度,同时能够减少支撑基板23的翘曲量。并且,通过将第2温度设为1050℃以上,能够进一步减少支撑基板23的翘曲量。
本实施方式中的翘曲量是使用研磨后的BOW(翘曲的朝向、大小)来评价的。BOW是表现晶圆整体的翘曲的指标之一,由从晶圆(支撑基板23)的中心基准面到晶圆的中点上的中心面的位移量来表示。本申请的中心基准面是根据最佳拟合(BOW-bf)基准来制作的。因此,在BOW-bf值中,由加号(+)表示的值具有凸型翘曲,由减号(-)表示的值具有凹型翘曲。例如,能够使用光学传感器型平坦度测定器(LapmasterSFT公司制的Wafercom)等测定翘曲量。
在研磨工序S24中,将堆积在支撑基板主体20上的多晶硅层22(第2多晶硅层22B)的表面进行研磨而平坦化。
在贴合前清洗工序S25中,去除经研磨的多晶硅层22的表面的粒子。
通过以上工序,制造贴合晶圆用支撑基板23。另外,能够并行进行工序S11~S14和工序S21~S25。
接着,对将活性层用基板13与支撑基板23贴合而制造贴合晶圆30的工序进行说明。
制造贴合晶圆的工序具有贴合工序S31、剥离热处理工序S32及结合热处理工序S33。
在贴合工序S31中,隔着绝缘膜11贴合支撑基板23的多晶硅层22的研磨面与活性层用基板13。此时,活性层用基板13的注入面以朝向多晶硅层22的方式贴合。
在剥离热处理工序S32中,对离子注入层12实施产生微小气泡层的热处理(剥离热处理),利用所产生的微小气泡层使其剥离。由此,制造在活性层用基板13上形成有绝缘膜11和活性层31的贴合晶圆30。另外,此时,形成具有剥离面41的剥离晶圆40。
在结合热处理工序S33中,对贴合晶圆30实施结合热处理,以使贴合界面的结合强度增加。
如上所述,能够制造贴合晶圆30。
在上述贴合晶圆的制造方法中使用的支撑基板23具备堆积在支撑基板主体20的贴合面侧的第1多晶硅层22A、以及堆积在第1多晶硅层22A上的第2多晶硅层22B。并且,通过将第2多晶硅层22B的生长温度即第2温度设为1000℃以上且1075℃以下,多晶硅层22的晶粒尺寸成为0.419μm以下。并且,在经研磨的多晶硅层22的10μm×10μm的面积区域中测定的均方根粗糙度Rq为0.364nm以下。并且,贴合晶圆30的BOW-bf成为+16μm以下。上述晶粒尺寸是第2多晶硅层22B的晶粒尺寸。
并且,由于支撑基板23满足上述规格,因此使用该支撑基板23制造的贴合晶圆30抑制了起泡缺陷的产生。
实施例
当决定使多晶硅层22堆积时的生长温度时,发明人等在以下实施例、比较例及参考例所示的生长温度下制造了贴合晶圆30。以下,例举在实施例、比较例及参考例中通用的条件。
支撑基板直径:200mm
支撑基板晶向:<100>
支撑基板电阻率:12060Ω•cm
支撑基板氧浓度:2.99×1017atoms/cm3
基底氧化膜形成:SC1清洗 氧化膜厚约为1nm
BOX氧化:1050℃ 氧化膜厚400nm
氢离子注入:105keV
剥离热处理:500℃ 30分钟 100%Ar气氛
结合热处理:900℃热解氧化+1100℃120分钟的Ar退火。
首先,关于第1生长的生长温度(第1温度),在如表1所示的参考例1~参考例3所示的生长温度下制造仅具有第1多晶硅层22A的支撑基板23,在对支撑基板23及使用该支撑基板23制造的贴合晶圆30进行了评价的基础上决定。即,在多晶硅层堆积工序S23中,制造仅实施了使第1多晶硅层22A生长的第1生长的一个阶段的支撑基板23并进行了评价。另外,在参考例3中,表面成为单晶且未进行研磨,因此未测定研磨后的BOW-bf。
Figure 149410DEST_PATH_IMAGE002
评价的结果,在第1温度为850℃时,支撑基板23的BOW变大,并且,在950℃时,支撑基板23表面的氧化膜21的一部分消失,导致在该部分单晶化。根据该结果,将第1生长的生长温度设为895℃。并且,确认到第1温度在890℃以上且900℃以下的范围内也没有问题。
接着,关于第2生长的生长温度(第2温度),在如表2所示的实施例1~4及比较例1~3所示的生长温度下制造支撑基板23,并对支撑基板23及使用该支撑基板23制造的贴合晶圆30进行了评价的基础上决定。
Figure 800972DEST_PATH_IMAGE003
(实施例1)
使用在图1及图2中说明的制造方法制造了支撑基板23及贴合晶圆30。此时,在如表2所示的第1温度及第2温度,即第1温度:895℃,第2温度:1000℃的生长温度下,使多晶硅层22生长。
测定出所制造的支撑基板23的多晶硅层研磨后的表面粗糙度、晶粒尺寸、BOW-bf。
并且,测定出使用支撑基板23制造的贴合晶圆30的起泡缺陷产生面积。此外,对有无产生作为沿着硅结晶面的缺陷的滑移进行了判定。
关于表面粗糙度,使用原子力显微镜(AFM:Atomic Force Microscope)在经研磨的多晶硅层22的10μm×10μm的面积区域中进行测定,算出均方根粗糙度Rq。
关于晶粒尺寸,在研磨之后,使用扫描电子显微镜(SEM)所附带的EBSD(ElectronBack Scatter Diffraction Patterns:电子背散射衍射图案)测定器进行了测定。EBSD法是应用了电子通道图样(ECP)法原理的晶体分析方法,能够进行更微小亚微米区域的晶体分析。晶粒尺寸根据电子照射时得到的图案来计算。
起泡缺陷面积在贴合之后由光学显微镜测定。
(实施例2~实施例4)
以与实施例1相同的方式制造了支撑基板23及贴合晶圆30。然而,第1温度及第2温度设为如表2所示的温度,并使多晶硅层22生长。
(比较例1~3)
以与实施例1~4相同的方式制造了支撑基板23及贴合晶圆30。然而,第1温度及第2温度设为如表2所示的温度,并使多晶硅层22生长。
图3是以横轴为实施例、比较例及参考例(生长温度条件),以纵轴为起泡缺陷面积,并示出生长温度与起泡缺陷面积的关系的图表。由表1及图3可知,起泡缺陷与第2温度有相关关系,在实施例1~实施例4中,未产生起泡缺陷,在第2温度为1080℃以上的比较例1~3中产生了起泡缺陷。若着眼于比较例1~3,则可知第2温度越高,起泡缺陷面积越大。
根据该结果可知,抑制起泡缺陷的生长温度条件为第1温度:895℃,第2温度:1000℃以上且1075℃以下。
在此,作为产生起泡缺陷的原因,可以考虑支撑基板23的BOW-bf及多晶硅层22的均方根粗糙度Rq,但关于BOW-bf,由于所有实施例和所有比较例均为BOW-bf的容许值+35.0μm以下,因此认为产生起泡缺陷的原因是均方根粗糙度Rq。因此,根据表2,能够制造通过将均方根粗糙度Rq设为0.364nm以下而抑制了起泡缺陷的贴合晶圆30。
图4是以横轴为晶粒尺寸,以纵轴为均方根粗糙度Rq,并示出实施例、比较例及参考例的晶粒尺寸与均方根粗糙度Rq的关系的图表。并且,在图4中,由单点划线L1表示均方根粗糙度Rq的起泡缺陷产生阈值(0.364nm)。
由图4可知,均方根粗糙度Rq与晶粒尺寸之间具有相关关系。具体而言,能够标绘实施例、比较例及参考例的结果,并通过最小二乘法求出回归直线。若晶粒尺寸为x,均方根粗糙度Rq为y,则回归直线能够由以下数式(1)表示。并且,在图4中,由直线表示回归直线。另外,回归直线的决定系数为R2=0.9092。
y=0.8205x+0.0228…(1)。
由该相关关系可知,通过将晶粒尺寸设为0.419μm以下,也能够抑制起泡缺陷。在图4中,由单点划线L2表示晶粒尺寸的起泡缺陷产生阈值(0.419μm)。
并且,关于有无产生滑移,在第2温度为1080℃以上的情况下(比较例1~3)不合格。在多晶硅层22的生长温度为高温的情况下,认为是滑移产生要因。
关于研磨工序后的BOW-bf,得出第2温度越高则越小的结果。在实施例1~4中进行比较,第2温度为1000℃时成为最大值(15.6μm),但由于未产生起泡缺陷,因此认为BOW-bf为+16μm以下就没有问题。并且,通过将第2温度设为1050℃以上,能够进一步减小贴合晶圆的BOW-bf。
由以上可知,在具有多晶硅层22的贴合晶圆用支撑基板23中,通过将多晶硅层22的晶粒尺寸设为0.419μm以下,能够抑制起泡缺陷的产生。
同样可知,通过将研磨后的多晶硅层22的均方根粗糙度Rq设为0.364nm以下,能够抑制起泡缺陷的产生。
并且可知,通过以两个阶段进行多晶硅层堆积工序S23,能够将贴合晶圆30的BOW-bf设为+16μm以下。
此外可知,在贴合晶圆用支撑基板的制造方法中,通过将第2温度设为1000℃以上且1075℃以下,能够抑制起泡缺陷的产生。
附图标记说明
10-活性层用基板主体,11-绝缘膜,12-离子注入层,13-活性层用基板,20-支撑基板主体,21-氧化膜,22-多晶硅层,22A-第1多晶硅层,22B-第2多晶硅层,23-支撑基板,30-贴合晶圆,31-活性层,40-剥离晶圆,41-剥离面。

Claims (5)

1. 一种贴合晶圆用支撑基板,其为用于将活性层用基板与支撑基板隔着绝缘膜贴合而成的贴合晶圆的支撑基板,具备:
支撑基板主体;及
多晶硅层,堆积在所述支撑基板主体的贴合面侧,
所述多晶硅层的晶粒尺寸为0.419μm以下。
2.根据权利要求1所述的贴合晶圆用支撑基板,其中,
在经研磨的所述多晶硅层的10μm×10μm的面积区域中测定的均方根粗糙度Rq为0.364nm以下。
3.根据权利要求1或2所述的贴合晶圆用支撑基板,其中,
所述多晶硅层被研磨,表示从所述支撑基板的中心基准面到所述支撑基板的中点上的中心面的位移量的BOW-bf为+16μm以下。
4.根据权利要求1至3中任一项所述的贴合晶圆用支撑基板,其中,
所述多晶硅层由如下多晶硅层组成:
第1多晶硅层,堆积在所述支撑基板主体的贴合面侧;及
第2多晶硅层,堆积在所述第1多晶硅层上,
所述晶粒尺寸为所述第2多晶硅层的晶粒尺寸。
5.根据权利要求1至4中任一项所述的贴合晶圆用支撑基板,其中,
所述支撑基板主体是单晶硅晶圆。
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