CN115665538A

CN115665538A - Image processing method, circuit and electronic equipment

Info

Publication number: CN115665538A
Application number: CN202211106108.XA
Authority: CN
Inventors: 单昌鹏
Original assignee: Vivo Mobile Communication Co Ltd
Current assignee: Vivo Mobile Communication Co Ltd
Priority date: 2022-09-09
Filing date: 2022-09-09
Publication date: 2023-01-31

Abstract

The embodiment of the application provides an image processing method, an image processing circuit and electronic equipment, and belongs to the technical field of image processing. The image processing method is applied to an image processing device, the image processing device comprises a camera module, an image processing chip, a main control chip and a display screen, the image processing chip is respectively connected with the camera module, the main control chip and the display screen, and the method comprises the following steps: under the condition that the image processing chip receives first image data sent by the camera module, controlling the image processing chip to perform image processing on the first image data to obtain second image data; controlling the image processing chip to send the second image data to the main control chip; the main control chip performs superposition processing on the second image data and the user interface data to obtain third image data; and the main control chip sends the third image data to the display screen for display through the image processing chip.

Description

Image processing method, circuit and electronic equipment

Technical Field

The present application belongs to the field of image processing technologies, and in particular, to an image processing method, circuit, and electronic device.

Background

With the development of electronic technology, more and more users use electronic devices to take pictures. The electronic device usually contains a main control chip, a Pre-Image Signal Processor (Pre-ISP) chip, and a Post-Image Signal Processor (Post-ISP) chip, wherein the main control chip is also called an Application Processor (AP), and the three chips are used to perform Image processing on an Image captured by the camera to obtain a processed Image or video.

Disclosure of Invention

An object of the embodiments of the present application is to provide an image processing method, a circuit, and an electronic device, which can reduce power consumption of a main control chip.

In a first aspect, an embodiment of the present application provides an image processing method, which is applied to an image processing apparatus, where the image processing apparatus includes a camera module, an image processing chip, a main control chip, and a display screen, the image processing chip is connected to the camera module, the main control chip, and the display screen respectively, and the method includes:

under the condition that the image processing chip receives first image data sent by the camera module, controlling the image processing chip to perform image processing on the first image data to obtain second image data;

controlling the image processing chip to send the second image data to the main control chip;

the main control chip performs superposition processing on the second image data and user interface data to obtain third image data;

and the main control chip sends the third image data to the display screen for displaying through the image processing chip.

In a second aspect, an embodiment of the present application provides an image processing circuit, where the circuit includes a main control chip and an image processing chip, where the main control chip is connected to the image processing chip;

the image processing chip is used for carrying out image processing on first image data to obtain second image data under the condition of receiving the first image data sent by the camera module;

the image processing chip is also used for sending the second image data to the main control chip;

the main control chip is used for overlapping the second image data and the user interface data to obtain third image data;

the main control chip is also used for sending the third image data to a display screen for displaying through the image processing chip.

In a third aspect, an embodiment of the present application provides an image processing circuit, where the circuit includes a main control chip and an image processing chip, the main control chip includes a first interface and a second interface, and the image processing chip includes a third interface, a fourth interface, a fifth interface, a sixth interface, a first image processing module, and a second image processing module; the first interface is connected with the third interface, the second interface is connected with the fourth interface, the first image processing module is respectively connected with the fifth interface and the second image processing module, and the second image processing module is respectively connected with the third interface, the fourth interface and the sixth interface;

the fifth interface is used for receiving first image data output by the camera module;

the first image processing module and the second image processing module are used for carrying out image processing on the first image data to obtain second image data;

the fourth interface is used for sending the second image data to the main control chip;

In a fourth aspect, an embodiment of the present application provides an electronic device, which includes a camera module, a display screen, and an image processing circuit, where the image processing circuit is connected to the camera module and the display screen, respectively, and the image processing circuit is configured as the image processing circuit described in the second aspect above, or configured as the image processing circuit described in the third aspect above.

In a fifth aspect, the present embodiments provide a readable storage medium, on which a program or instructions are stored, which when executed by a processor implement the steps of the method according to the first aspect.

In a sixth aspect, embodiments of the present application provide a computer program product, stored on a storage medium, for execution by at least one processor to implement the method according to the first aspect.

In the embodiment of the application, under the condition that the image processing chip receives first image data sent by the camera module, the image processing chip is controlled to perform image processing on the first image data to obtain second image data; controlling the image processing chip to send the second image data to the main control chip; the main control chip carries out superposition processing on the second image data and the user interface data to obtain third image data; and the main control chip sends the third image data to the display screen for display through the image processing chip. In the image processing process, the image data only needs to be transmitted twice between the image processing chip and the main control chip, and the image processing chip and the main control chip can process the image data, so that the transmission path and the processing time of the image data in the image processing process are reduced, the power consumption of the main control chip is further reduced, and the delay existing in the image processing process can be reduced.

Drawings

FIG. 1 is a flowchart of an image processing method provided in an embodiment of the present application;

FIG. 2 is a flowchart of an application of an image processing method provided in an embodiment of the present application;

fig. 3 is a second flowchart of an application of the image processing method according to the embodiment of the present application;

FIG. 4 is a schematic structural diagram of an image processing circuit provided in an embodiment of the present application;

FIG. 5 is a block diagram of an electronic device provided in an embodiment of the present application;

fig. 6 is a hardware structure diagram of an electronic device according to an embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be described below clearly with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some, but not all, embodiments of the present application. All other embodiments that can be derived by one of ordinary skill in the art from the embodiments given herein are intended to be within the scope of the present disclosure.

The terms first, second and the like in the description and in the claims of the present application are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It will be appreciated that the data so used may be interchanged under appropriate circumstances such that embodiments of the application are capable of operation in sequences other than those illustrated or described herein, and that the terms "first," "second," etc. are generally used in a generic sense and do not limit the number of terms, e.g., a first term can be one or more than one. In addition, "and/or" in the specification and claims means at least one of connected objects, a character "/" generally means that a preceding and succeeding related objects are in an "or" relationship.

The image processing method provided by the embodiment of the present application is described in detail below with reference to the accompanying drawings through specific embodiments and application scenarios thereof.

In the related art, the process of image processing on image data is generally: sending the image data to a Pre-ISP chip, and performing front-end image signal processing on the image data by using the Pre-ISP chip; the image data after the front-end image processing is sent to a main control chip, the image data is sent to a Post-ISP chip through the main control chip to be subjected to rear-end image signal processing, the image data after the rear-end image processing is sent to the main control chip, the main control chip stores the image data, and then the image data is sent to a display screen to be displayed.

In the process of image processing, image data needs to be transmitted among the main control chip, the Pre-ISP chip and the Post-ISP chip for multiple times, which increases the time length of image processing, causes higher power consumption of the main control chip, and causes higher delay in the process of image processing.

In order to solve the above-mentioned technical problem, an embodiment of the present application provides an image processing method, please refer to fig. 1, and fig. 1 is a flowchart of the image processing method according to the embodiment of the present application. The image processing method provided by the embodiment of the application is applied to an image processing device, the image processing device comprises a camera module, an image processing chip, a main control chip and a display screen, the image processing chip is respectively connected with the camera module, the main control chip and the display screen, and the method comprises the following steps:

s101, under the condition that an image processing chip receives first image data sent by a camera module, the image processing chip is controlled to perform image processing on the first image data to obtain second image data.

The first image data is image data sent by the camera module, optionally, the first image data is an image captured by the camera module, in this case, the data format of the first image data is RAW.

In this step, the camera module sends the first image data to the image processing chip, and the main control chip controls the image processing chip to perform image processing on the first image data to obtain second image data. The image processing includes front-end image signal processing and back-end image signal processing.

And S102, controlling the image processing chip to send the second image data to a main control chip.

In this step, after the second image data is obtained, the image processing chip sends the second image data to the main control chip.

And S103, the main control chip performs superposition processing on the second image data and the user interface data to obtain third image data.

The user interface data is also referred to as UI interaction data, and the user interface data includes, but is not limited to, layer data such as an application interface, a status bar, or a navigation bar included in an interface layer.

In this step, the main control chip performs superposition processing on the second image data and the user interface data to obtain third image data.

And S104, the main control chip sends the third image data to a display screen for displaying through the image processing chip.

In this step, after the third image data is obtained, the third image data is sent to the image processing chip, and the image processing chip executes Analog bypass (Analog bypass) operation, directly sends the third image data to the display screen, and displays the third image data on the display screen.

In the embodiment of the application, under the condition that the image processing chip receives first image data sent by the camera module, the image processing chip is controlled to perform image processing on the first image data to obtain second image data; controlling the image processing chip to send the second image data to the main control chip; the main control chip carries out superposition processing on the second image data and the user interface data to obtain third image data; and the main control chip sends the third image data to the display screen for display through the image processing chip. In the image processing process, the image data only needs to be transmitted between the image processing chip and the main control chip twice, and the image processing chip and the main control chip can process the image data, so that the transmission path and the processing time of the image data in the image processing process are reduced, the power consumption of the main control chip is further reduced, and the delay existing in the image processing process can be reduced.

Optionally, the controlling the image processing chip to perform image processing on the first image data to obtain second image data includes:

controlling the image processing chip to perform front-end image signal processing on the first image data to obtain image data to be enhanced;

controlling the image processing chip to perform super-resolution processing on the image data to be enhanced under the condition that the resolution of the image data to be enhanced is smaller than a first preset resolution to obtain second image data;

controlling the image processing chip to perform frame interpolation processing on the image data to be enhanced under the condition that the frame rate of the image data to be enhanced is smaller than a first preset frame rate to obtain second image data;

and controlling the image processing chip to perform high dynamic range processing on the image data to be enhanced under the condition that the image data to be enhanced is a high dynamic range video source to obtain second image data.

In this embodiment, after receiving the first image data, the image processing chip performs front-end image signal processing on the first image data to obtain image data to be enhanced, and please refer to the subsequent embodiments for a specific implementation process of front-end image signal processing.

After the image data to be enhanced are obtained, the main control chip controls the image processing chip to perform back-end image signal processing on the image data to be enhanced. It should be understood that the main control chip may send related instructions to the image processing chip to control the image processing chip to perform corresponding operations.

The following specifically explains the process of performing back-end image signal processing on image data to be enhanced:

the main control chip controls the image processing chip to obtain the resolution of the image data to be enhanced, and when the resolution of the image data to be enhanced is smaller than a first preset resolution, the main control chip indicates that the resolution of the image data to be enhanced is low, and then the image data to be enhanced is subjected to super-resolution processing, so that the resolution of the image data to be enhanced is improved, and second image data is obtained. The image super-resolution processing refers to an image processing technology for processing a low-resolution image to obtain a high-resolution image.

The main control chip controls the image processing chip to obtain a frame rate of image data to be enhanced, and under the condition that the frame rate of the image data to be enhanced is smaller than a first preset frame rate, the frame rate of the image data to be enhanced is low, frame interpolation processing is conducted on the image data to be enhanced, the frame rate of the image data to be enhanced is improved, and second image data are obtained. The frame interpolation processing refers to increasing the frame rate of image data, so that the image is clearer.

The main control chip controls the image processing chip to judge whether the image data to be enhanced is a high dynamic range video source or not through metadata information (metadata information) of the image data to be enhanced, and under the condition that the image data to be enhanced is the high dynamic range video source, the image data to be enhanced is subjected to high dynamic range processing to obtain second image data. It should be understood that in the case where the image data to be enhanced is not a high dynamic range video source, then no high dynamic range processing is performed on the image data to be enhanced. The high dynamic range processing is a scene image fusion technology which generates high-quality vivid effects and can provide more dynamic range and image details for images.

In this embodiment, the image processing chip is controlled to perform front-end image signal processing and back-end image signal processing on the first image data, so as to obtain second image data with higher image quality.

The following specifically describes a process of performing front-end image signal processing on the first image data:

optionally, the controlling the image processing chip to perform front-end image signal processing on the first image data to obtain image data to be enhanced includes:

controlling the image processing chip to perform automatic focusing, automatic exposure and automatic white balance on the first image data to obtain image data to be processed;

controlling the image processing chip to demosaic the image data to be processed to obtain image data to be denoised;

and controlling the image processing chip to perform noise reduction processing on the image data to be subjected to noise reduction to obtain the image data to be enhanced.

In this embodiment, the main control chip controls the image processing chip to perform 3A processing on the first image data to obtain image data to be processed. The 3A processing comprises automatic focusing, automatic exposure and automatic white balance, and the condition of overexposure or underexposure of the main shot object is improved through the 3A processing, so that the chromatic aberration of the image under different light irradiation is compensated.

After the image data to be processed is obtained, the main control chip controls the image processing chip to perform demosaicing processing on the image data to be processed, and image data to be denoised are obtained. Alternatively, demosaicing may be performed using image processing software, such as PS (Photoshop); or demosaicing using a filter.

After the image data to be denoised is obtained, the main control chip controls the image processing chip to denoise the image data to be denoised to obtain the image data to be enhanced. Alternatively, the median filter may be used to perform noise reduction on the image data to be noise reduced, or the markov random field model may be used to perform noise reduction on the image data to be noise reduced, or other methods may be used to perform noise reduction, which is not limited herein.

In this embodiment, the image processing chip is controlled to perform auto focus, auto exposure, auto white balance, demosaic processing, and noise reduction on the first image data, so as to implement front-end image processing on the first image data, and obtain image data to be enhanced with higher image quality.

Optionally, after obtaining the third image data, the method further includes:

and the main control chip stores the third image data based on the received storage instruction.

In this embodiment, when the main control chip receives the third image data, if a storage instruction sent by a user is received, the third image data is stored in the local memory.

In other embodiments, when the main control chip receives the third image data, if a storage instruction sent by a user is not received, the third image data is not stored.

In this embodiment, after receiving the third image data, the main control chip stores the third image data, which is convenient for a user to query the third image data at any time.

For easy understanding of the overall solution, please refer to fig. 2. As shown in fig. 2, the camera module acquires first image data, and sends the first image data to the image processing chip, and the main control chip controls the image processing chip to perform front-end image signal processing on the first image data, so as to obtain image data to be enhanced. The main control chip controls the image processing chip to judge whether the image to be enhanced is subjected to super-resolution processing, frame insertion processing and high dynamic range processing. And under the condition that the hyper-resolution processing, the frame interpolation processing and the high dynamic range processing are required, controlling the image processing chip to perform the hyper-resolution processing, the frame interpolation processing and the high dynamic range processing on the image data to be enhanced to obtain second image data. And determining the first image data as second image data when the super-resolution processing, the frame interpolation processing and the high dynamic range processing are not required. And sending the second image data to a main control chip, and performing superposition processing on the second image data and the user interface data by the main control chip to obtain third image data. And the main control chip sends the third image data to a display screen for display. In addition, the main control chip judges whether the third image data needs to be stored, and under the condition that a storage instruction is received, the main control chip locally stores the third image data; and under the condition that the storage instruction is received, the main control chip does not locally store the third image data.

In other embodiments, the image processing method provided in this embodiment may further process fourth image data, and it should be understood that the fourth image data is video data generated by playing a video, or picture data generated by browsing a picture, or related data generated by using an application program, such as game image data or game video data generated during starting a game program.

Optionally, when the image processing chip receives fourth image data sent by the main control chip, the image processing chip is controlled to perform over-division processing on the fourth image data to obtain fifth image data when the resolution of the fourth image data is smaller than a second preset resolution;

controlling the image processing chip to perform frame interpolation processing on the third image data under the condition that the frame rate of the fourth image data is smaller than a second preset frame rate to obtain fifth image data;

and under the condition of receiving a high dynamic range processing instruction, controlling the image processing chip to perform high dynamic range processing on the fourth image data to obtain fifth image data.

In this embodiment, the main control chip controls the image processing chip to perform back-end image signal processing on the fourth image data.

The main control chip controls the image processing chip to obtain the resolution of the fourth image data, and if the resolution of the fourth image data is smaller than a second preset resolution, the fourth image data is subjected to super-resolution processing, the resolution of the fourth image data is improved, and fifth image data is obtained. The second preset resolution may be the same as or different from the first preset resolution, and is not specifically limited herein.

The main control chip controls the image processing chip to obtain a frame rate of the fourth image data, and under the condition that the frame rate of the fourth image data is smaller than a second preset frame rate, the frame rate of the fourth image data is low, frame interpolation processing is performed on the fourth image data, the frame rate of the fourth image data is improved, and fifth image data is obtained. The second preset frame rate may be the same as or different from the first preset frame rate, and is not limited herein.

And the master control chip performs high dynamic range processing on the fourth image data to obtain fifth image data under the condition of receiving a high dynamic range processing instruction sent by a user. An optional implementation scenario is that when the user uses the application program, a high dynamic range processing instruction is sent to the master control chip.

In this embodiment, the image processing chip is controlled to perform back-end image signal processing on the fourth image data, so as to implement image processing on the fourth image data sent by the main control chip, and obtain fifth image data with higher image quality.

Specifically, referring to fig. 3, as shown in fig. 3, the main control chip sends fourth image data to the image processing chip, and the image processing chip determines whether the fourth image data is subjected to super-resolution processing, frame interpolation processing, and high dynamic range processing. Under the condition that the fourth image data needs to be subjected to super-resolution processing, frame interpolation processing and high dynamic range processing, carrying out super-resolution processing, frame interpolation processing and high dynamic range processing on the fourth image data to obtain fifth image data; in the case where the fourth image data does not require the super-resolution processing, the frame interpolation processing, the high dynamic range processing, the fourth image data is determined as the fifth image data. Further, the main control chip controls the image processing chip to send the fifth image data to the display screen, and the display screen displays the fifth image data.

The embodiment of the present application further provides an image processing circuit, which is described in detail below with reference to the accompanying drawings through specific embodiments and application scenarios thereof.

As shown in fig. 4, the image processing circuit provided in the embodiment of the present application includes a main control chip 10 and an image processing chip 20, where the main control chip 10 is connected to the image processing chip 20;

the image processing chip 20 is configured to, in a case that first image data sent by the camera module 30 is received, perform image processing on the first image data to obtain second image data;

the image processing chip 20 is further configured to send the second image data to the main control chip 10;

the main control chip 10 is configured to perform superposition processing on the second image data and user interface data to obtain third image data;

the main control chip 10 is further configured to send the third image data to the display screen 40 through the image processing chip 20 for displaying.

It should be understood that the dotted line in fig. 4, i.e., the simulated wrap-around operation performed by the image processing chip 20, directly transmits the third image data to the display screen 40, and does not perform image processing on the third image data.

In the embodiment of the application, under the condition that the image processing chip receives first image data sent by the camera module, the image processing chip is controlled to perform image processing on the first image data to obtain second image data; controlling the image processing chip to send the second image data to the main control chip; the main control chip performs superposition processing on the second image data and the user interface data to obtain third image data; and the main control chip sends the third image data to the display screen for display through the image processing chip. In the image processing process, the image data only needs to be transmitted between the image processing chip and the main control chip twice, and the image processing chip and the main control chip can process the image data, so that the transmission path and the processing time of the image data in the image processing process are reduced, the power consumption of the main control chip is further reduced, and the delay existing in the image processing process can be reduced.

Optionally, the image processing chip 20 is further configured to perform front-end image signal processing on the first image data to obtain image data to be enhanced;

the image processing chip 20 is further configured to perform a super-resolution processing on the image data to be enhanced to obtain second image data when the resolution of the image data to be enhanced is smaller than a first preset resolution;

the image processing chip 20 is further configured to perform frame interpolation processing on the image data to be enhanced to obtain second image data when the frame rate of the image data to be enhanced is less than a first preset frame rate;

the image processing chip 20 is further configured to perform high dynamic range processing on the image data to be enhanced to obtain the second image data when the image data to be enhanced is a high dynamic range video source.

In this embodiment, the image processing chip 20 is controlled to perform front-end image signal processing and back-end image signal processing on the first image data, so as to obtain second image data with higher image quality.

Optionally, the image processing chip 20 is further configured to perform auto focusing, auto exposure, and auto white balance on the first image data to obtain image data to be processed;

the image processing chip 20 is further configured to perform demosaicing processing on the image data to be processed to obtain image data to be denoised;

the image processing chip 20 is further configured to perform noise reduction processing on the image data to be noise reduced to obtain the image data to be enhanced.

In this embodiment, the image processing chip 20 is controlled to perform auto focus, auto exposure, auto white balance, demosaic processing, and noise reduction on the first image data, so as to implement front-end image processing on the first image data, and obtain image data to be enhanced with higher image quality.

Optionally, the image processing circuit further includes a memory, the memory is connected to the main control chip 10, and the memory is configured to store the third image data.

In this embodiment, after receiving the third image data, the main control chip 10 stores the third image data, so that a user can conveniently query the third image data at any time.

As shown in fig. 4, the image processing circuit provided in the embodiment of the present application includes a main control chip 10 and an image processing chip 20, where the main control chip 10 includes a first interface K1 and a second interface K2, and the image processing chip 20 includes a third interface K3, a fourth interface K4, a fifth interface K5, a sixth interface K6, a first image processing module 21, and a second image processing module 22;

the first interface K1 is connected to the third interface K3, the second interface K2 is connected to the fourth interface K4, the first image processing module 21 is respectively connected to the fifth interface K5 and the second image processing module 22, and the second image processing module 22 is respectively connected to the third interface K3, the fourth interface K4 and the sixth interface K6;

the fifth interface K5 is configured to receive first image data output by the camera module 30;

the first image processing module 21 and the second image processing module 22 are configured to perform image processing on the first image data to obtain second image data;

the fourth interface K4 is configured to send the second image data to the main control chip 10;

The first image processing module 21 has a function of a Pre-ISP chip, and the second image processing module 22 has a function of a Post-ISP chip. The first Interface K1 is a Display Serial Interface (DSI) transmission Interface; the second Interface K2 is a Camera Serial Interface (CSI) receiving Interface; the third interface K3 is a DSI receiving interface; the fourth interface K4 is a CSI transmission interface; the fifth interface K5 is a CSI receiving interface; the sixth interface K6 is a DSI transmission interface.

Optionally, as shown in fig. 4, the camera module 30 includes a seventh interface K7, the camera module 30 is connected to the image processing chip 20 through the seventh interface K7, and the seventh interface K7 is a CSI transmission interface.

Optionally, as shown in fig. 4, the display screen 40 includes an eighth interface K8, the display screen 40 is connected to the image processing chip 20 through the eighth interface K8, and the eighth interface K8 is a DSI receiving interface.

In the embodiment of the present application, when the image processing chip 20 receives the first image data sent by the camera module 30, the image processing chip 20 is controlled to perform image processing on the first image data to obtain second image data; controlling the image processing chip 20 to transmit the second image data to the main control chip 10; the main control chip 10 performs superposition processing on the second image data and the user interface data to obtain third image data; the main control chip 10 sends the third image data to the display screen 40 through the image processing chip 20 for displaying. In the process of image processing, the image data only needs to be transmitted between the image processing chip 20 and the main control chip 10 twice, and the image processing chip 20 and the main control chip 10 can process the image data, so that the transmission path and the processing time of the image data in the process of image processing are reduced, the power consumption of the main control chip 10 is further reduced, and the delay existing in the process of image processing can be further reduced.

Optionally, the first image processing module 21 is further configured to perform front-end image signal processing on the first image data to obtain image data to be enhanced;

the second image processing module 22 is further configured to perform a super-resolution processing on the image data to be enhanced to obtain second image data when the resolution of the image data to be enhanced is smaller than a first preset resolution;

the second image processing module 22 is further configured to perform frame interpolation processing on the image data to be enhanced to obtain second image data when the frame rate of the image data to be enhanced is less than a first preset frame rate;

the second image processing module 22 is further configured to, when the image data to be enhanced is a high dynamic range video source, perform high dynamic range processing on the image data to be enhanced to obtain the second image data.

In this embodiment, the first image processing module 21 is configured to perform front-end image signal processing on image data, and the second image processing module 22 is configured to perform back-end image signal processing on image data.

In this embodiment, the first image processing module 21 is controlled to perform front-end image signal processing on the first image data, and the second image processing module 22 is controlled to perform back-end image signal processing on the image data to be enhanced, so as to obtain second image data with higher image quality.

In addition, the first image processing module 21 provided by the embodiment has the function of a Pro-ISP chip, and the second image processing module 22 has the function of a Post-ISP chip, and the functions of the Pro-ISP chip and the Post-ISP chip are integrated on one chip, so that the cost of the chip is reduced, and the occupied wiring space of the circuit board is reduced.

Optionally, the first image processing module 21 is further configured to perform automatic focusing, automatic exposure, and automatic white balance on the first image data to obtain image data to be processed;

the first image processing module 21 is further configured to perform demosaicing processing on the image data to be processed to obtain image data to be denoised;

the first image processing module 21 is further configured to perform noise reduction processing on the image data to be subjected to noise reduction processing, so as to obtain the image data to be enhanced.

In this embodiment, the first image processing module 21 is controlled to perform auto focus, auto exposure, auto white balance, demosaic processing, and noise reduction on the first image data, so as to implement front-end image processing on the first image data, and obtain image data to be enhanced with higher image quality.

Optionally, as shown in fig. 5, an electronic device 500 is further provided in an embodiment of the present application, and includes a camera module 501, a display screen 502, and an image processing circuit 503, where the image processing circuit 503 is connected to the camera module 501 and the display screen 502, respectively, and the image processing circuit 503 is configured as the image processing circuit described above. Moreover, the electronic device can implement each process of the embodiment of the image processing method, and can achieve the same technical effect, and in order to avoid repetition, the details are not repeated here.

The electronic Device may be, for example, a Mobile phone, a tablet computer, a notebook computer, a palm top computer, a vehicle-mounted electronic Device, a Mobile Internet Device (MID), an Augmented Reality (AR)/Virtual Reality (VR) Device, a robot, a wearable Device, an ultra-Mobile personal computer (UMPC), a netbook or a Personal Digital Assistant (PDA), and the like, and may also be a server, a Network Attached Storage (Network Attached Storage, NAS), a personal computer (NAS), a Television (TV), a teller machine, a self-service machine, and the like, and the embodiments of the present application are not limited in particular.

Fig. 6 is a schematic diagram of a hardware structure of an electronic device implementing an embodiment of the present application.

The electronic device 600 includes, but is not limited to: radio frequency unit 601, network module 602, audio output unit 603, input unit 604, sensor 605, display unit 606, user input unit 607, interface unit 608, memory 609, and processor 610. The processor 610 may be a main control chip, and the electronic device 600 further includes an image processing chip, where the main control chip is in communication connection with the image processing chip.

Those skilled in the art will appreciate that the electronic device 600 may further comprise a power source (e.g., a battery) for supplying power to the various components, and the power source may be logically connected to the processor 610 through a power management system, so as to implement functions of managing charging, discharging, and power consumption through the power management system. The electronic device structure shown in fig. 6 does not constitute a limitation of the electronic device, and the electronic device may include more or less components than those shown, or combine some components, or arrange different components, and thus, the description is omitted here.

The processor 610 is configured to, when the image processing chip receives first image data sent by the camera module, control the image processing chip to perform image processing on the first image data to obtain second image data;

overlapping the second image data with user interface data to obtain third image data;

and sending the third image data to the display screen for displaying through the image processing chip.

The processor 610 is further configured to control the image processing chip to perform front-end image signal processing on the first image data to obtain image data to be enhanced;

and controlling the image processing chip to perform high dynamic range processing on the image data to be enhanced under the condition that the image data to be enhanced is a high dynamic range video source to obtain the second image data.

The processor 610 is further configured to control the image processing chip to perform auto focus, auto exposure, and auto white balance on the first image data to obtain image data to be processed;

controlling the image processing chip to perform demosaicing processing on the image data to be processed to obtain image data to be denoised;

and controlling the image processing chip to perform noise reduction processing on the image data to be subjected to noise reduction processing to obtain the image data to be enhanced.

Wherein the processor 610 is further configured to store the third image data based on the received storage instruction.

It is to be understood that, in the embodiment of the present application, the input Unit 604 may include a Graphics Processing Unit (GPU) 6041 and a microphone 6042, and the Graphics Processing Unit 6041 processes image data of a still picture or a video obtained by an image capturing apparatus (such as a camera) in a video capturing mode or an image capturing mode. The display unit 606 may include a display panel 6061, and the display panel 6061 may be configured in the form of a liquid crystal display, an organic light emitting diode, or the like. The user input unit 606 includes at least one of a touch panel 6061 and other input devices 6062. A touch panel 6061 also referred to as a touch screen. The touch panel 6061 may include two portions of a touch detection device and a touch controller. Other input devices 6062 may include, but are not limited to, a physical keyboard, function keys (e.g., volume control keys, switch keys, etc.), a trackball, a mouse, and a joystick, which are not described in detail herein.

The memory 609 may be used to store software programs as well as various data. The memory 609 may mainly include a first storage area storing a program or an instruction and a second storage area storing data, wherein the first storage area may store an operating system, an application program or an instruction (such as a sound playing function, an image playing function, etc.) required for at least one function, and the like. Further, the memory 609 may include volatile memory or nonvolatile memory, or the memory 609 may include both volatile and nonvolatile memory. The non-volatile Memory may be a Read-Only Memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an Electrically Erasable PROM (EEPROM), or a flash Memory. The volatile Memory may be a Random Access Memory (RAM), a Static Random Access Memory (Static RAM, SRAM), a Dynamic Random Access Memory (Dynamic RAM, DRAM), a Synchronous Dynamic Random Access Memory (Synchronous DRAM, SDRAM), a Double Data Rate Synchronous Dynamic Random Access Memory (Double Data Rate SDRAM, ddr SDRAM), an Enhanced Synchronous SDRAM (ESDRAM), a Synchronous Link DRAM (SLDRAM), and a Direct Memory bus RAM (DRRAM). The memory 609 in the embodiments of the subject application include, but are not limited to, these and any other suitable types of memory.

Processor 610 may include one or more processing units; optionally, the processor 610 integrates an application processor, which primarily handles operations involving the operating system, user interface, and applications, and a modem processor, which primarily handles wireless communication signals, such as a baseband processor. It will be appreciated that the modem processor described above may not be integrated into the processor 610.

The embodiments of the present application further provide a readable storage medium, where a program or an instruction is stored, and when the program or the instruction is executed by a processor, the program or the instruction implements the processes of the embodiment of the image processing method, and can achieve the same technical effect, and in order to avoid repetition, details are not repeated here.

The processor is the processor in the electronic device described in the above embodiment. The readable storage medium includes a computer readable storage medium, such as a computer Read Only Memory (ROM), a Random Access Memory (RAM), a magnetic or optical disk, and the like.

The present application provides a computer program product, where the program product is stored in a storage medium, and the program product is executed by at least one processor to implement the processes of the foregoing image processing method embodiment, and can achieve the same technical effects, and in order to avoid repetition, details are not repeated here.

It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrases "comprising a component of' 8230; \8230;" does not exclude the presence of another like element in a process, method, article, or apparatus that comprises the element. Further, it should be noted that the scope of the methods and apparatus of the embodiments of the present application is not limited to performing the functions in the order illustrated or discussed, but may include performing the functions in a substantially simultaneous manner or in a reverse order based on the functions involved, e.g., the methods described may be performed in an order different than that described, and various steps may be added, omitted, or combined. In addition, features described with reference to certain examples may be combined in other examples.

Through the description of the foregoing embodiments, it is clear to those skilled in the art that the method of the foregoing embodiments may be implemented by software plus a necessary general hardware platform, and certainly may also be implemented by hardware, but in many cases, the former is a better implementation. Based on such understanding, the technical solutions of the present application may be embodied in the form of a computer software product, which is stored in a storage medium (such as ROM/RAM, magnetic disk, optical disk) and includes instructions for enabling a terminal (such as a mobile phone, a computer, a server, or a network device) to execute the method according to the embodiments of the present application.

While the present embodiments have been described with reference to the accompanying drawings, it is to be understood that the invention is not limited to the precise embodiments described above, which are meant to be illustrative and not restrictive, and that various changes may be made therein by those skilled in the art without departing from the spirit and scope of the invention as defined by the appended claims.

Claims

1. An image processing method is applied to an image processing device, and is characterized in that the image processing device comprises a camera module, an image processing chip, a main control chip and a display screen, wherein the image processing chip is respectively connected with the camera module, the main control chip and the display screen, and the method comprises the following steps:

2. The method according to claim 1, wherein said controlling the image processing chip to perform image processing on the first image data to obtain second image data comprises:

3. The method according to claim 2, wherein said controlling the image processing chip to perform front-end image signal processing on the first image data to obtain image data to be enhanced comprises:

4. The method of any of claims 1-3, wherein after obtaining the third image data, the method further comprises:

5. The image processing circuit is characterized by comprising a main control chip and an image processing chip, wherein the main control chip is connected with the image processing chip;

6. The image processing circuit of claim 5, wherein the image processing chip is further configured to perform front-end image signal processing on the first image data to obtain image data to be enhanced;

the image processing chip is further used for performing super-resolution processing on the image data to be enhanced under the condition that the resolution of the image data to be enhanced is smaller than a first preset resolution to obtain second image data;

the image processing chip is further used for performing frame interpolation processing on the image data to be enhanced under the condition that the frame rate of the image data to be enhanced is smaller than a first preset frame rate to obtain second image data;

the image processing chip is further configured to perform high dynamic range processing on the image data to be enhanced to obtain the second image data when the image data to be enhanced is a high dynamic range video source.

7. The image processing circuit of claim 6, wherein the image processing chip is further configured to perform auto focus, auto exposure, and auto white balance on the first image data to obtain image data to be processed;

the image processing chip is also used for demosaicing the image data to be processed to obtain image data to be denoised;

the image processing chip is further used for carrying out noise reduction processing on the image data to be subjected to noise reduction processing to obtain the image data to be enhanced.

8. The image processing circuit according to any of claims 5-7, further comprising a memory, the memory being connected to the master control chip, the memory being configured to store the third image data.

9. An image processing circuit is characterized by comprising a main control chip and an image processing chip, wherein the main control chip comprises a first interface and a second interface, and the image processing chip comprises a third interface, a fourth interface, a fifth interface, a sixth interface, a first image processing module and a second image processing module;

the first interface is connected with the third interface, the second interface is connected with the fourth interface, the first image processing module is respectively connected with the fifth interface and the second image processing module, and the second image processing module is respectively connected with the third interface, the fourth interface and the sixth interface;

the main control chip is used for performing superposition processing on the second image data and user interface data to obtain third image data;

10. The image processing circuit of claim 9, wherein the first image processing module is further configured to perform front-end image signal processing on the first image data to obtain image data to be enhanced;

the second image processing module is further configured to perform a super-resolution processing on the image data to be enhanced to obtain second image data when the resolution of the image data to be enhanced is smaller than a first preset resolution;

the second image processing module is further configured to perform frame interpolation processing on the image data to be enhanced to obtain second image data when the frame rate of the image data to be enhanced is less than a first preset frame rate;

the second image processing module is further configured to perform high dynamic range processing on the image data to be enhanced to obtain the second image data when the image data to be enhanced is a high dynamic range video source.

11. The image processing circuit of claim 10, wherein the first image processing module is further configured to perform auto-focusing, auto-exposure, and auto-white balance on the first image data to obtain image data to be processed;

the first image processing module is further configured to perform demosaicing processing on the image data to be processed to obtain image data to be denoised;

the first image processing module is further configured to perform noise reduction processing on the image data to be noise reduced to obtain the image data to be enhanced.

12. The image processing circuit according to any of claims 9-11, further comprising a memory, the memory being connected to the master control chip, the memory being configured to store the third image data.

13. An electronic device comprising a camera module, a display screen and an image processing circuit, the image processing circuit being connected to the camera module and the display screen, respectively, the image processing circuit being configured as the image processing circuit of any one of claims 5-8 or as the image processing circuit of any one of claims 9-12.