CN115454792A - Method and system for analyzing performance bottleneck on embedded operating system - Google Patents
Method and system for analyzing performance bottleneck on embedded operating system Download PDFInfo
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- CN115454792A CN115454792A CN202211000067.6A CN202211000067A CN115454792A CN 115454792 A CN115454792 A CN 115454792A CN 202211000067 A CN202211000067 A CN 202211000067A CN 115454792 A CN115454792 A CN 115454792A
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Abstract
The invention provides a method and a system for analyzing performance bottleneck on an embedded operating system, comprising the following steps: acquiring specified software and hardware events in an embedded system architecture through software to obtain the hit times of the embedded system on the specified events and context information during hit; displaying the relation between the times of event generation and the context information at the target terminal according to the statistical data, and reflecting the position and the reason of a performance bottleneck in the embedded operating system; the target machine transmits the statistical data to the host machine through a transmission medium; and graphically displaying the relation between the times of event generation and the context information in the upper computer according to the statistical data, and visually reflecting the position and reason of the performance bottleneck in the embedded operating system so as to enable developers to conveniently optimize the performance of the system. The invention reflects the dynamic behavior and design defects of the software program by analyzing the performance event characteristics provided by the software and hardware system architecture when the application program runs.
Description
Technical Field
The invention relates to the field of system performance testing, in particular to a method and a system for analyzing performance bottleneck on an embedded operating system.
Background
For an embedded operating system, performance indexes are of great importance, particularly performance bottleneck problems, and the response speed and performance of the system can be effectively improved under the condition that resources are not changed. Bottleneck analysis usually needs to record a large amount of data, and in order to improve efficiency, a performance bottleneck analysis tool is developed through a combination of software and hardware. Most of the current integrated development environments analyze the performance of the application program through a pile insertion mode. However, this method causes significant interference to the execution of the program itself, and thus the overhead is large. In a multi-core processor system, different CPU cores are related to various factors such as system scheduling, critical areas, interruption and the like, so that the current state is difficult to reflect in real time in load monitoring on the multi-core processor.
In summary, in the prior art, an effective means is not available for the embedded operating system and the application developer to locate the performance bottleneck problem during the development and debugging stage.
Patent document CN108521353A (application number: 201810281859.2) discloses a processing method, an apparatus and a readable storage medium for locating a performance bottleneck, which includes: executing a full-link pressure test task in a system to be tested, and acquiring log information of subsystems related to the pressure test task in the system to be tested in the pressure test task execution process; after the pressure testing task is finished, calculating the request average response time of each subsystem in the system to be tested based on the collected log information of each subsystem; generating a pressure test result report of the system to be tested so as to position the performance bottleneck of the system to be tested based on the pressure test result report; the pressure test result report contains the calling relation among the subsystems and the request average response time of each subsystem. However, the invention does not reflect the dynamic behavior and design defects of the software program by analyzing the performance event characteristics provided by the software and hardware architecture when the application program runs.
Patent document CN108874613B (application number: 201710325195.0) discloses a performance bottleneck positioning and quantifying method, device and embedded IO system, where the embedded IO system includes at least one CPU and hardware IO, and the CPU and the hardware IO share a memory and a timer through a system bus, and the performance bottleneck positioning and quantifying method includes: acquiring CPU time and IO time in a timer through firmware to obtain time-consuming statistical data of the whole embedded IO system within a period of time; and obtaining the time axis relation between the CPU time and the IO time in the upper computer according to the time-consuming statistical data, and visually reflecting the position and the reason of the performance bottleneck of the embedded IO system through the time axis relation to optimize the performance of the embedded IO system. However, the invention does not reflect the dynamic behavior and design defects of the software program by analyzing the performance event characteristics provided by the software and hardware architecture when the application program runs.
Disclosure of Invention
Aiming at the defects in the prior art, the invention aims to provide a method and a system for analyzing performance bottleneck on an embedded operating system.
The invention provides a method for analyzing performance bottleneck on an embedded operating system, which comprises the following steps:
step S1: acquiring specified software and hardware events in an embedded system architecture through software to obtain the hit times of the embedded system on the specified events and context information during hit;
step S2: displaying the relation between the times of event generation and the context information at the target terminal according to the statistical data, and reflecting the position and the reason of a performance bottleneck in the embedded operating system;
and step S3: the target machine transmits the statistical data to the host machine through a transmission medium;
and step S4: and graphically displaying the relation between the times of event generation and the context information in the upper computer according to the statistical data, and reflecting the position and the reason of the performance bottleneck in the embedded operating system.
Preferably, in the step S1:
step S1.1: enabling an event, wherein the event information comprises a statistical type and a statistical CPU core;
step S1.2: and after detecting that the event is triggered, saving the current context information into a storage medium.
Step S1.3: the event is re-enabled.
Preferably, in the step S2:
step S2.1: inputting a command to trigger data display on a target machine terminal;
step S2.2: and the target machine software reads the data on the storage medium, counts and displays the data on the terminal.
Preferably, in the step S3:
step S3.1: periodically reading the statistical information of the event by the target machine software;
step S3.2: and the target machine software sends the periodically read statistical information to the upper computer.
Step S3.3: and after receiving the statistical information, the upper computer software stores the statistical information into a storage medium of the upper computer.
Preferably, in the step S4:
step S4.1: periodically reading the statistical information of the events in the storage medium by the upper computer software;
step S4.2: and the upper computer software displays the statistical information to the terminal.
The invention provides a performance bottleneck analysis system on an embedded operating system, which comprises:
a module M1: acquiring specified software and hardware events in an embedded system architecture through software to obtain the hit times of the embedded system on the specified events and context information during hit;
a module M2: displaying the relation between the times of event generation and context information at the target machine terminal according to the statistical data, and reflecting the position and reason of a performance bottleneck in the embedded operating system;
a module M3: the target machine transmits the statistical data to the host machine through a transmission medium;
a module M4: and graphically displaying the relation between the times of event generation and the context information in the upper computer according to the statistical data, and reflecting the position and the reason of the performance bottleneck in the embedded operating system.
Preferably, in said module M1:
module M1.1: enabling an event, wherein the event information comprises a statistical type and a statistical CPU core;
module M1.2: and after detecting that the event is triggered, saving the current context information into a storage medium.
Module M1.3: the event is re-enabled.
Preferably, in said module M2:
module M2.1: inputting a command to trigger data display on a target machine terminal;
module M2.2: and the target machine software reads the data on the storage medium, counts and displays the data on the terminal.
Preferably, in said module M3:
module M3.1: periodically reading the statistical information of the event by the target machine software;
module M3.2: and the target machine software sends the periodically read statistical information to the upper computer.
Module M3.3: and after receiving the statistical information, the upper computer software stores the statistical information into a storage medium of the upper computer.
Preferably, in said module M4:
module M4.1: periodically reading statistical information of events in the storage medium by the software of the upper computer;
module M4.2: and the upper computer software displays the statistical information to the terminal.
Compared with the prior art, the invention has the following beneficial effects:
1. the invention reflects the dynamic behavior and design defects of the software program by analyzing the performance event characteristics provided by the software and hardware system architecture when the application program runs;
2. the method solves the problems of performance reduction and other additional expenses caused by a pile inserting mode and difficulty in accurate quantitative evaluation of multi-core performance load.
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Other features, objects and advantages of the invention will become more apparent upon reading of the detailed description of non-limiting embodiments with reference to the following drawings:
FIG. 1 is a block diagram of an apparatus;
fig. 2 is a schematic diagram of data acquisition information.
Detailed Description
The present invention will be described in detail with reference to specific examples. The following examples will assist those skilled in the art in further understanding the invention, but are not intended to limit the invention in any way. It should be noted that it would be obvious to those skilled in the art that various changes and modifications can be made without departing from the spirit of the invention. All falling within the scope of the present invention.
Example 1:
the present invention relates to a performance bottleneck analysis method on an embedded operating system, as shown in fig. 1-2, which analyzes a performance bottleneck in an embedded software system by collecting a specific event.
The method comprises the following steps:
step 1: acquiring the hit times of the whole embedded system on an event and context information (such as a program stack, a PC pointer, a current execution function name, a current thread, a CPU (central processing unit) in the hit time) by acquiring specified software and hardware events in an embedded system architecture through software;
step 2: displaying the relation between the times of event generation and context information at the target machine terminal according to the statistical data, and visually reflecting the position and reason of a performance bottleneck in the embedded operating system;
and 3, step 3: the target machine transmits the statistical data to the host machine through a transmission medium;
and 4, step 4: graphically displaying the relationship between the times of event generation and context information in the upper computer according to the statistical data, and visually reflecting the position and reason of a performance bottleneck in the embedded operating system so as to enable developers to conveniently optimize the performance of the system;
wherein, step 1 includes the following steps:
step 1.1: enabling events (event information contains the type of statistics, such as timer, CPU cycle, bus cycle, etc., and also contains the counted CPU core);
step 1.2: after detecting that the event is triggered, saving the current context information (such as program stack, PC pointer, current execution function name, current thread, etc.) into the storage medium.
Step 1.3: the event is re-enabled.
The step 2 comprises the following steps:
step 2.1: inputting a command to trigger data display on a target machine terminal;
step 2.2: and the target machine software counts and displays the data on the terminal by reading the data on the storage medium.
The step 3 comprises the following steps:
step 3.1: periodically reading the statistical information of the event by the target machine software;
step 3.2: and the target machine software sends the periodically read statistical information to the upper computer.
Step 3.3: and after receiving the statistical information, the upper computer software stores the statistical information into a storage medium of the upper computer.
The step 4 comprises the following steps:
step 4.1: periodically reading the statistical information of the events in the storage medium by the upper computer software;
step 4.2: and the upper computer software displays the statistical information to the terminal.
Example 2:
example 2 is a preferred example of example 1, and the present invention will be described in more detail.
Collecting timer events, analyzing system performance bottlenecks from a time perspective
Step 1: specifying the collection, and context information (e.g., program stack, PC pointer, current execution function name, current thread, CPU in which it is located, etc.) at the time of hit;
step 2: displaying the relation between the times of event generation and context information at the target machine terminal according to the statistical data, and visually reflecting the position and reason of a performance bottleneck in the embedded operating system;
and step 3: the target machine transmits the statistical data to the host machine through a transmission medium;
and 4, step 4: graphically displaying the relationship between the times of event generation and context information in the upper computer according to the statistical data, and visually reflecting the position and reason of a performance bottleneck in the embedded operating system so as to enable developers to conveniently optimize the performance of the system;
wherein, step 1 includes the following steps:
step 1.1: enabling a timer event;
step 1.2: after detecting that the event is triggered, saving the current context information (such as program stack, PC pointer, current execution function name, current thread, etc.) into the storage medium.
Step 1.3: the event is re-enabled.
The step 2 comprises the following steps:
step 2.1: inputting a command to trigger data display on a target machine terminal;
step 2.2: and the target machine software counts and displays the data on the terminal by reading the data on the storage medium.
The step 3 comprises the following steps:
step 3.1: periodically reading the statistical information of the event by the target machine software;
step 3.2: and the target machine software sends the periodically read statistical information to the upper computer.
Step 3.3: and after receiving the statistical information, the upper computer software stores the statistical information into a storage medium of the upper computer.
The step 4 comprises the following steps:
step 4.1: periodically reading the statistical information of the events in the storage medium by the upper computer software;
step 4.2: and the upper computer software displays the statistical information to the terminal.
Example 3:
example 3 is a preferred example of example 1, and the present invention will be described in more detail.
Collecting processor instruction cycle events, analyzing system performance bottlenecks from a system perspective
Step 1: specifying the collection, and context information (such as program stack, PC pointer, current execution function name, current thread, CPU in which it is located, etc.) at the time of hit;
step 2: displaying the relation between the times of event generation and context information at the target machine terminal according to the statistical data, and visually reflecting the position and reason of a performance bottleneck in the embedded operating system;
and step 3: the target machine transmits the statistical data to the host machine through a transmission medium;
and 4, step 4: graphically displaying the relationship between the times of event generation and context information in the upper computer according to the statistical data, and visually reflecting the position and reason of a performance bottleneck in the embedded operating system so as to enable developers to conveniently optimize the performance of the system;
wherein, step 1 includes the following steps:
step 1.1: enabling a processor instruction cycle event;
step 1.2: after detecting that the event is triggered, saving the current context information (such as program stack, PC pointer, current execution function name, current thread, etc.) into the storage medium.
Step 1.3: the event is re-enabled.
The step 2 comprises the following steps:
step 2.1: inputting a command to trigger data display on a target machine terminal;
step 2.2: and the target machine software reads the data on the storage medium, counts and displays the data on the terminal.
The step 3 comprises the following steps:
step 3.1: periodically reading the statistical information of the event by the target machine software;
step 3.2: and the target machine software sends the periodically read statistical information to the upper computer.
Step 3.3: and after receiving the statistical information, the upper computer software stores the statistical information into a storage medium of the upper computer.
The step 4 comprises the following steps:
step 4.1: periodically reading statistical information of events in the storage medium by the software of the upper computer;
step 4.2: and the upper computer software displays the statistical information to the terminal.
Example 4:
example 4 is a preferred example of example 1, and the present invention will be described in more detail.
Collecting branch prediction failure events, analyzing system performance bottlenecks from a system perspective
Step 1: specifying the collection, and context information (such as program stack, PC pointer, current execution function name, current thread, CPU in which it is located, etc.) at the time of hit;
and 2, step: displaying the relation between the times of event generation and context information at the target machine terminal according to the statistical data, and visually reflecting the position and reason of a performance bottleneck in the embedded operating system;
and 3, step 3: the target machine transmits the statistical data to the host machine through a transmission medium;
and 4, step 4: graphically displaying the relationship between the times of event generation and context information in the upper computer according to the statistical data, and visually reflecting the position and reason of a performance bottleneck in the embedded operating system so as to enable developers to conveniently optimize the performance of the system;
wherein, step 1 includes the following steps:
step 1.1: enabling a branch prediction failure event;
step 1.2: after detecting that the event is triggered, saving the current context information (such as program stack, PC pointer, current execution function name, current thread, etc.) into the storage medium.
Step 1.3: the event is re-enabled.
The step 2 comprises the following steps:
step 2.1: inputting a command to trigger data display on a target machine terminal;
step 2.2: and the target machine software reads the data on the storage medium, counts and displays the data on the terminal.
The step 3 comprises the following steps:
step 3.1: periodically reading the statistical information of the event by the target machine software;
step 3.2: and the target machine software sends the periodically read statistical information to the upper computer.
Step 3.3: and after receiving the statistical information, the upper computer software stores the statistical information into a storage medium of the upper computer.
The step 4 comprises the following steps:
step 4.1: periodically reading the statistical information of the events in the storage medium by the upper computer software;
step 4.2: and the upper computer software displays the statistical information to the terminal.
It is known to those skilled in the art that, in addition to implementing the system, apparatus and its various modules provided by the present invention in pure computer readable program code, the system, apparatus and its various modules provided by the present invention can be implemented in the form of logic gates, switches, application specific integrated circuits, programmable logic controllers, embedded microcontrollers and the like by completely programming the method steps. Therefore, the system, the apparatus, and the modules thereof provided by the present invention may be considered as a hardware component, and the modules included in the system, the apparatus, and the modules for implementing various programs may also be considered as structures in the hardware component; modules for performing various functions may also be considered to be both software programs for performing the methods and structures within hardware components.
The foregoing description of specific embodiments of the present invention has been presented. It is to be understood that the present invention is not limited to the specific embodiments described above, and that various changes or modifications may be made by one skilled in the art within the scope of the appended claims without departing from the spirit of the invention. The embodiments and features of the embodiments of the present application may be combined with each other arbitrarily without conflict.
Claims (10)
1. A performance bottleneck analysis method on an embedded operating system is characterized by comprising the following steps:
step S1: acquiring specified software and hardware events in an embedded system architecture through software to obtain the hit times of the embedded system on the specified events and context information during hit;
step S2: displaying the relation between the times of event generation and context information at the target machine terminal according to the statistical data, and reflecting the position and reason of a performance bottleneck in the embedded operating system;
and step S3: the target machine transmits the statistical data to the host machine through a transmission medium;
and step S4: and graphically displaying the relation between the times of event generation and the context information in the upper computer according to the statistical data, and reflecting the position and the reason of the performance bottleneck in the embedded operating system.
2. The method for analyzing performance bottleneck on embedded operating system according to claim 1, wherein in the step S1:
step S1.1: enabling an event, wherein the event information comprises a statistical type and a statistical CPU core;
step S1.2: and after detecting that the event is triggered, saving the current context information into a storage medium.
Step S1.3: the event is re-enabled.
3. The method for analyzing performance bottleneck on embedded operating system according to claim 1, wherein in the step S2:
step S2.1: inputting a command to trigger data display on a target machine terminal;
step S2.2: and the target machine software reads the data on the storage medium, counts and displays the data on the terminal.
4. The method for analyzing performance bottleneck on embedded operating system according to claim 1, wherein in the step S3:
step S3.1: periodically reading the statistical information of the event by the target machine software;
step S3.2: and the target machine software sends the periodically read statistical information to the upper computer.
Step S3.3: and after receiving the statistical information, the upper computer software stores the statistical information into a storage medium of the upper computer.
5. The method for analyzing performance bottleneck on embedded operating system according to claim 1, wherein in the step S4:
step S4.1: periodically reading statistical information of events in the storage medium by the software of the upper computer;
step S4.2: and the upper computer software displays the statistical information to the terminal.
6. A system for analyzing performance bottlenecks on an embedded operating system, comprising:
a module M1: acquiring specified software and hardware events in an embedded system architecture through software to obtain the hit times of the embedded system on the specified events and context information during hit;
a module M2: displaying the relation between the times of event generation and context information at the target machine terminal according to the statistical data, and reflecting the position and reason of a performance bottleneck in the embedded operating system;
a module M3: the target machine transmits the statistical data to the host machine through a transmission medium;
a module M4: and graphically displaying the relation between the times of event generation and the context information in the upper computer according to the statistical data, and reflecting the position and the reason of the performance bottleneck in the embedded operating system.
7. The system according to claim 6, wherein in the module M1:
module M1.1: enabling an event, wherein the event information comprises a statistical type and a statistical CPU core;
module M1.2: and after detecting that the event is triggered, saving the current context information into a storage medium.
Module M1.3: the event is re-enabled.
8. The system according to claim 6, wherein in the module M2:
module M2.1: inputting a command to trigger data display on a target machine terminal;
module M2.2: and the target machine software reads the data on the storage medium, counts and displays the data on the terminal.
9. The system according to claim 6, wherein in the module M3:
module M3.1: periodically reading the statistical information of the event by the target machine software;
module M3.2: and the target machine software sends the periodically read statistical information to the upper computer.
Module M3.3: and after receiving the statistical information, the upper computer software stores the statistical information into a storage medium of the upper computer.
10. The system according to claim 6, wherein in the module M4:
module M4.1: periodically reading statistical information of events in the storage medium by the software of the upper computer;
module M4.2: and the upper computer software displays the statistical information to the terminal.
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