CN115437167A - Phase shifter structure, phase shifter and traveling wave electrode modulator thereof - Google Patents
Phase shifter structure, phase shifter and traveling wave electrode modulator thereof Download PDFInfo
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- CN115437167A CN115437167A CN202211394944.2A CN202211394944A CN115437167A CN 115437167 A CN115437167 A CN 115437167A CN 202211394944 A CN202211394944 A CN 202211394944A CN 115437167 A CN115437167 A CN 115437167A
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 14
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- 239000010703 silicon Substances 0.000 description 14
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/015—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on semiconductor elements having potential barriers, e.g. having a PN or PIN junction
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Abstract
The application discloses a phase shifter structure, a phase shifter and a traveling wave electrode modulator thereof. The phase shifter structure includes a base layer, a semiconductor element, and a bias element. The semiconductor unit comprises a semiconductor substrate, two heavily doped parts and at least one lightly doped part, wherein the semiconductor substrate is paved on the base layer, the lightly doped parts and the heavily doped parts are arranged on the base layer along the propagation direction of light, the two heavily doped parts are arranged at intervals along the propagation direction of light, and the two heavily doped parts arranged at intervals are electrically connected with the semiconductor substrate through the lightly doped parts. The bias unit comprises two signal electrodes and two bias electrodes, the two bias electrodes are electrically connected to the two heavily doped parts correspondingly along the propagation direction of light, and the two signal electrodes are electrically connected to two ends of the semiconductor substrate at intervals. The invention can reduce the plane area of the vertical projection of the heavy doping part on the base layer, can reduce the parasitic capacitance formed between the heavy doping part and the base layer, and improves the intrinsic bandwidth of the phase shifter.
Description
Technical Field
The invention relates to the technical field of silicon-based optoelectronic integrated chips, in particular to a phase shifter structure, a phase shifter and a traveling wave electrode modulator thereof.
Background
In a silicon-based integrated optoelectronic system, the traveling wave electrode modulator is widely applied due to the characteristics of higher extinction ratio and easier integration, and the traveling wave electrode modulator is generally manufactured into a silicon-based electro-optical modulator based on an SOI (silicon on insulator) process. The traveling wave electrode modulator based on SOI technology is generally composed of an optical waveguide load and a traveling wave electrode, electromagnetic waves are transmitted between the traveling wave electrodes, and optical carriers are transmitted in the load optical waveguide. In the transmission process of the optical carrier wave and the electromagnetic wave, the interaction between the electromagnetic wave and the optical carrier wave changes the phase of the optical carrier wave, thereby completing the modulation from the electric signal to the optical signal. In the traveling wave electrode modulator, the main performance evaluation indexes are the electro-optical bandwidth and the impedance.
Traveling wave electrode modulators modulate the phase of light primarily by means of phase shifters, which are known in english under the name "phase shifter". The phase shifter includes a silicon substrate, an insulating layer, an optical waveguide, and a structure for changing a refractive index of the optical waveguide. The existing phase shifter adopts a direct current bias structure to enable a PN junction or a PIN junction to be in a reverse bias state, so that the refractive index of an optical waveguide is changed. As shown in fig. 1A, the doped region 900 in the conventional PN junction or PIN junction phase shifter is directly laid on the silicon substrate, and a plurality of doped regions 900 are laid side by side on the silicon substrate 800 in a direction perpendicular to the propagation direction of light in the optical waveguide, and such a direct laying manner may result in a large parasitic capacitance structure formed by the doped region, the silicon substrate and the insulating layer, and the parasitic capacitance may affect the intrinsic bandwidth of the phase shifter.
Disclosure of Invention
One advantage of the present invention is to provide a phase shifter structure, in which two heavily doped portions are disposed at intervals on two sides of a semiconductor substrate along a propagation direction of light, so that a planar area of the heavily doped portions vertically projected on a base layer can be reduced, thereby reducing a parasitic capacitance formed between the heavily doped portions and the base layer and improving an intrinsic bandwidth of the phase shifter.
An advantage of the present invention is to provide a phase shifter structure, in which a heavily doped portion and a lightly doped portion are electrically connected to each other and then electrically connected to a side surface of a semiconductor substrate, so that a planar area of the lightly doped portion vertically projected on a base layer can be reduced, and formation of a parasitic capacitor can be further reduced, thereby further improving an intrinsic bandwidth of the phase shifter.
It is an advantage of the present invention to provide a phase shifter structure comprising:
a base layer;
a semiconductor unit, the semiconductor unit comprising a semiconductor substrate, two heavily doped portions and at least one lightly doped portion, the semiconductor substrate being tiled on the base layer, the semiconductor substrate being configured to be penetrated by light, both ends of the semiconductor substrate through which the light passes being respectively defined as a first end and a second end, both side portions of the semiconductor substrate in a direction perpendicular to a propagation direction of the light in the semiconductor substrate being respectively defined as a first side end portion and a second side end portion, wherein two of the heavily doped portions are arranged at intervals along the propagation direction of the light and are respectively correspondingly arranged at the first end and the second end of the semiconductor substrate, the two of the heavily doped portions arranged at intervals are electrically connected with the semiconductor substrate through the lightly doped portions, and the lightly doped portions and the two of the heavily doped portions are arranged on the base layer along the propagation direction of the light; and
and the bias unit comprises two signal electrodes and two bias electrodes, the two bias electrodes are correspondingly arranged on the two heavily doped parts along the propagation direction of the light and are electrically connected to the two heavily doped parts, the two signal electrodes are electrically connected to the upper parts of the first side end part and the second side end part of the semiconductor substrate at intervals, the signal electrodes are used for loading high-speed electric signals, and the bias electrodes are used for loading bias voltages, so that when the signal electrodes are loaded with the high-speed electric signals and the bias electrodes are loaded with the bias voltages, the refractive index of the semiconductor substrate is changed, and the phase of the light transmitted through the semiconductor substrate can be changed.
According to an embodiment of the present invention, the number of the lightly doped portions is implemented as one, one of the lightly doped portions is disposed at a middle portion of the semiconductor substrate along a propagation direction of light, and both ends of the lightly doped portion electrically connect two of the heavily doped portions correspondingly.
According to an embodiment of the present invention, the number of the lightly doped portions is two, two of the lightly doped portions are disposed at an interval at the first end and the second end of the semiconductor substrate along the propagation direction of light, two of the heavily doped portions are electrically connected to a side of the two lightly doped portions facing away from each other, and each of the heavily doped portions is electrically connected to the semiconductor substrate through one of the lightly doped portions.
According to an embodiment of the invention, the semiconductor unit is implemented as a PN junction, the heavily doped portion is implemented as an N + + heavily doped portion;
the semiconductor substrate comprises at least two P-type regions and at least one N-type region, the at least two P-type regions and the at least one N-type region are distributed on the top of the base layer side by side along the direction perpendicular to the light propagation direction in the semiconductor substrate, the N-type region is arranged between the P-type regions, and the extension directions of the P-type regions and the N-type region are parallel to the light propagation direction.
According to an embodiment of the present invention, the number of the P-type regions and the number of the N-type regions are both implemented as two, the number of the lightly doped regions is implemented as one, the lightly doped regions are disposed between the two N-type regions, and the extension direction of the lightly doped regions is parallel to the propagation direction of light.
According to an embodiment of the present invention, the number of the P-type regions is implemented as two, the number of the N-type regions is implemented as one, the number of the lightly doped regions is implemented as two, one of the N-type regions is disposed between the two P-type regions, and the lightly doped regions are disposed at both ends of the N-type region at intervals along a propagation direction of light.
According to an embodiment of the present invention, the heavily doped portion and/or the lightly doped portion are provided with a through hole along a vertical direction.
According to an embodiment of the invention, the semiconductor unit is implemented as a PIN junction or SOH.
To achieve at least one of the above advantages of the present invention, the present invention provides a phase shifter, including an insulating layer; and the phase shifter structure according to any one of the above embodiments, wherein the insulating layer is laid on top of the base layer, and the insulating layer covers the semiconductor unit and the bias unit.
To achieve at least one of the above advantages, the present invention provides a traveling wave electrode modulator comprising:
a beam splitter disposed at one end of the semiconductor unit;
the optical beam combiner is arranged at the other end of the semiconductor unit;
as in the phase shifter of the previous embodiments, the phase shifter is configured to couple the optical splitter and the optical combiner.
Drawings
Fig. 1A shows a schematic diagram of a conventional phase shifter structure.
Fig. 1B shows a schematic lateral cross-section of a prior art phase shifter structure.
Fig. 2 shows a schematic structure of the phase shifter structure according to the present invention.
Fig. 3 shows a lateral cross-section of a semiconductor unit of the phase shifter structure according to the present invention implemented as a PN junction.
Fig. 4 is a schematic structural diagram of a phase shifter structure according to another embodiment of the present invention.
Fig. 5 shows a lateral cross-sectional view of a semiconductor unit of a phase shifter according to another embodiment of the present invention implemented as a PN junction.
Fig. 6 shows a lateral cross-sectional view of a semiconductor unit of the phase shifter according to the present invention implemented as a PIN junction.
Detailed Description
The following description is presented to disclose the invention so as to enable any person skilled in the art to practice the invention. The preferred embodiments in the following description are given by way of example only, and other obvious variations will occur to those skilled in the art. The basic principles of the invention, as defined in the following description, may be applied to other embodiments, variations, modifications, equivalents, and other technical solutions without departing from the spirit and scope of the invention.
It will be understood by those skilled in the art that in the present disclosure, the terms "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like are used in an orientation or positional relationship indicated in the drawings for ease of description and simplicity of description, and do not indicate or imply that the referenced devices or components must be in a particular orientation, constructed and operated in a particular orientation, and thus the above terms are not to be construed as limiting the present invention.
It is understood that the terms "a" and "an" should be interpreted as meaning that a number of one element or element is one in one embodiment, while a number of other elements is one in another embodiment, and the terms "a" and "an" should not be interpreted as limiting the number.
Referring to fig. 1A and 1B, a perspective view and a lateral cross-sectional view, respectively, of a conventional phase shifter structure in which a plurality of doped regions 900 are laid side by side in a direction perpendicular to a propagation direction of light on a silicon substrate 800 are illustrated. The planar area of the doped region 900 vertically projected from top to bottom onto the silicon substrate 800 is the bottom planar area of the doped region 900, which results in a larger area of the doped region 900 vertically projected onto the silicon substrate 800 according to the manner shown in fig. 1A, and thus a larger parasitic capacitance is generated between the doped region 900 and the silicon substrate 800.
Referring to fig. 2 to 6, a phase shifter structure according to a preferred embodiment of the present invention will be described in detail below. The phase shifter structure can reduce the plane area of the vertical projection of the doped part on the base layer, reduce the generation of parasitic capacitance and improve the intrinsic bandwidth of the phase shifter. The phase shifter structure includes a base layer 10, a semiconductor element 20, and a bias element 30.
The semiconductor unit 20 comprises a semiconductor body 21, two heavily doped portions 22 and at least one lightly doped portion 23, the semiconductor body 21 being tiled on the base layer 10, the semiconductor body 21 being configured to be penetrated by light.
Further, both ends of the semiconductor body 21 through which light passes are defined as a first end 2101 and a second end 2102, respectively. Two side portions of the semiconductor base 21 perpendicular to the propagation direction of light in the semiconductor base 21 are defined as a first side end portion 2103 and a second side end portion 2104, respectively. Two heavily doped portions 22 are disposed at intervals along the propagation direction of light, and the two heavily doped portions 22 are disposed at the first end 2101 and the second end 2102 of the semiconductor base 21, respectively. In addition, the two heavily doped portions 22 disposed at intervals are electrically connected to the semiconductor body 21 through the lightly doped portion 23, and the lightly doped portion 23 and the two heavily doped portions 22 are disposed on the base layer 10 in the propagation direction of light.
The bias unit 30 includes two bias electrodes 31 and two signal electrodes 32. The two bias electrodes 31 are disposed correspondingly to the two heavily doped portions 22 in the propagation direction of light, and are electrically connected to the two heavily doped portions 22.
The two signal electrodes 32 are electrically connected to the upper portion of the first side end portion 2103 and the upper portion of the second side end portion 2104 of the semiconductor base body 21 at an interval in a direction perpendicular to a propagation direction of light in the semiconductor base body 21.
It will be understood by those skilled in the art that the signal electrode 32 is used for applying a high-speed electrical signal, and the bias electrode 31 is used for applying a bias voltage. When a high-speed electric signal is applied to the signal electrode 32 and a bias voltage is applied to the bias electrode 31, the refractive index of the semiconductor base body 21 changes, and the phase of light transmitted through the semiconductor base body 21 can be changed.
Compared with the prior art in which the doped region 900 is laid on the silicon substrate 800, the present invention changes the position of the heavily doped portion 22 relative to the semiconductor base body 21, two heavily doped portions 22 are disposed at the first end 2101 and the second end 2102 of the semiconductor base body 21 along the direction parallel to the propagation direction of light in the semiconductor base body 21, and two heavily doped portions 22 are disposed at intervals at the semiconductor base body 21. Therefore, the semiconductor substrate 21 can receive stable bias voltage, and the area of the plane of the heavily doped part 22 vertically projected on the base layer 10 can be reduced, so that the parasitic capacitance formed between the heavily doped part 22 and the base layer 10 is reduced, and the influence of the parasitic capacitance on the intrinsic bandwidth of the phase shifter is reduced.
In other words, the arrangement position of the two heavily doped portions 22 relative to the semiconductor base 21 is changed, but the length of the semiconductor base 21 is not changed, so that the parasitic capacitance between the heavily doped portions 22 and the base layer 10 can be reduced without affecting the ability of the semiconductor base 21 to change the optical phase.
As shown in fig. 2 and 3, in one embodiment of the present invention, the number of the lightly doped portions 23 is implemented as one, one of the lightly doped portions 23 is disposed in the middle of the semiconductor base 21 along the propagation direction of light, and both ends of the lightly doped portion 23 electrically connect the two heavily doped portions 22. The two bias electrodes 31 transmit a bias voltage to the semiconductor body 21 through the two heavily doped portions 22 and the one lightly doped portion 23.
In this way, the two heavily doped portions 22 are electrically connected to the first end 2101 and the second end 2102 of the semiconductor substrate 21 at intervals, so that the planar area of the heavily doped portion 22 vertically projected on the base layer 10 can be reduced, the parasitic capacitance between the heavily doped portion 22 and the base layer 10 can be reduced, and the intrinsic bandwidth of the phase shifter can be improved.
As shown in fig. 4 and 5, in another embodiment of the present invention, the number of the lightly doped regions 23 is two, and two lightly doped regions 23 are disposed at the first end 2101 and the second end 2102 of the semiconductor substrate 21 at an interval along the propagation direction of light. The two heavily doped portions 22 are correspondingly and electrically connected to the sides of the two lightly doped portions 23, which face away from each other, and each heavily doped portion 22 is electrically connected to the semiconductor substrate 21 through one lightly doped portion 23.
It is understood that two of the heavily doped portions 22 are disposed at intervals between the semiconductor base 21, and two of the lightly doped portions 23 are also disposed at intervals between the semiconductor base 21. In addition, one of the heavily doped portions 22 and one of the lightly doped portions 23 are electrically connected to the first end 2101 of the semiconductor substrate 21, and the other of the heavily doped portions 22 and the other of the lightly doped portions 23 are electrically connected to the second end 2102 of the semiconductor substrate 21.
In other words, in the invention, the heavily doped part 22 and the lightly doped part 23 are arranged in a direction parallel to the light propagation direction in the semiconductor base 21. Since the parasitic capacitance is also generated between the lightly doped portion 23 and the base layer 10, the area of the plane of the lightly doped portion 23 vertically projected on the base layer 10 can be reduced by disposing the lightly doped portion 23 on the base layer 10 at intervals, so as to achieve the purpose of further reducing the parasitic capacitance between the lightly doped portion 23 and the base layer 10, and accordingly, the parasitic capacitance generated between the semiconductor unit 20 and the base layer 10 is also further reduced, so as to further improve the intrinsic bandwidth of the phase shifter.
In one embodiment, the semiconductor body 21 of the semiconductor unit 20 is implemented as a PN junction.
Specifically, the semiconductor body 21 includes at least two P-type regions 211 and at least one N-type region 212, at least two P-type regions 211 and at least one N-type region 212 are arranged side by side on the base layer 10 along a direction perpendicular to the light propagation direction in the semiconductor body 21, wherein the N-type region 212 is located between the two P-type regions 211, and the extension directions of the P-type regions 211 and the N-type regions 212 are parallel to the light propagation direction. The two ends of the P-type region 211 and the N-type region 212, which are transparent to light, are flush and collectively define the first end 2101 and the second end 2102. The two P-type regions 211 correspond to the first side end 2103 and the second side end 2104 of the semiconductor body 21.
As shown in fig. 2, specifically, the number of P-type regions 211 is implemented as two, and the number of N-type regions 212 is implemented as two. Two of the N-type regions 212 are disposed between two of the P-type regions 211.
In a case where the number of the lightly doped portions 23 is implemented as one, the lightly doped portion 23 is disposed between two of the N-type regions 212, and an extending direction of the lightly doped portion 23 is parallel to a propagation direction of light. At this time, the two heavily doped portions 22 are electrically connected to the two N-type regions 212 through one lightly doped portion 23, and the two heavily doped portions 22 are correspondingly electrically connected to both ends of the lightly doped portion 23, so that the bias voltage of the bias electrode 31 can be transferred to the N-type regions 212.
As shown in fig. 4, in the case where the number of the lightly doped portions 23 is implemented as two, the number of the N-type regions 212 may also be implemented as one. One of the N-type regions 212 is disposed between two of the P-type regions 211. The two lightly doped portions 23 are disposed at two ends of the N-type region 212 at intervals along the propagation direction of light. At this time, each of the heavily doped portions 22 is electrically connected to one of the N-type regions 212 through one of the lightly doped portions 23, so that the bias voltage in the bias electrode 31 is conducted from the heavily doped portion 22 to the lightly doped portion 23 and finally to the N-type region 212.
The contact side of the P-type region 211 and the N-type region 212 is upwardly convex, and the P-type region 211 and the N-type region 212 are contacted with each other to form an optical waveguide. The refractive index of the optical signal between the P-type region 211 and the N-type region 212 is affected by the electrical signals of the bias electrode 31 and the signal electrode 32, so that when the optical signal passes through the region between the P-type region 211 and the N-type region 212, the phase of the optical signal can be changed by the change of the electrical signal in the bias electrode 31 or the signal electrode 32. The semiconductor unit 20 is transversely cut open, and as shown in fig. 3, the P-type region 211, the N-type region 212, the lightly doped portion 23, the N-type region 212 and the P-type region 211 are sequentially formed in a left-to-right direction with respect to a cross section of the base layer 10.
Specifically, the P-type region 211 includes a P-type portion, a P + lightly doped portion, and a P + + heavily doped portion, wherein the P-type portion contacts the N-type region 212 to form an optical waveguide capable of changing a refractive index, and the P + + heavily doped portion is electrically connected to the signal electrode 32.
The N + lightly doped portion and the N + + heavily doped portion are electrically connected to each other and then disposed at two ends of the N-type region 212, and axial center lines of the N + lightly doped portion and the N + + heavily doped portion are collinear, so that the bias voltage of the bias electrode 31 can be transmitted to the N-type region 212. The N + lightly doped portion and the N + + heavily doped portion are arranged in this way, so that the area of the plane where the N + lightly doped portion and the N + + heavily doped portion are perpendicularly projected on the base layer 10 can be reduced, the parasitic capacitance formed between the heavily doped portion 22 and the lightly doped portion 23 and the base layer 10 can be reduced, the phase of the semiconductor unit 20 to light can be stably changed, and the intrinsic bandwidth of the phase shifter can be improved.
As shown in fig. 5, when the N + lightly doped portion and the N + + heavily doped portion are electrically connected and then located at two ends of the N-type region 212, the semiconductor unit 20 is subjected to a transverse cross-section, which sequentially includes the P-type region 211, the N-type region 212, and the P-type region 211 from left to right.
The base layer 10 includes a silicon dioxide layer 11 and a substrate 12. The silicon dioxide layer 11 is disposed over the substrate 12. Specifically, the P-type region 211 and the N-type region 212 are both laid on top of the silicon dioxide layer 11. The substrate 12 is implemented as a silicon substrate.
The shapes of the heavily doped portion 22 and the lightly doped portion 23 may be arbitrarily changed, and the shapes of the heavily doped portion 22 and the lightly doped portion 23 are not limited as long as the heavily doped portion 22 and the lightly doped portion 23 can normally transmit an electrical signal. In the case that the heavily doped portion 22 can normally transmit an electrical signal, all ways to reduce the area of the heavily doped portion 22 vertically projected on the plane of the base layer 10 are within the protection scope of the present invention. Specifically, it is within the scope of the present invention to change the shape of the heavily doped portion 22 and the lightly doped portion 23, for example, to dig a through hole in the vertical direction on the heavily doped portion 22 and/or the lightly doped portion 23 to reduce the planar area of the vertically projected heavily doped portion 22 and the lightly doped portion 23 on the base layer 10, or to set the heavily doped portion 22 and the lightly doped portion 23 in a curved line to reduce the planar area of the vertically projected heavily doped portion 22 and the lightly doped portion 23 on the base layer 10.
In another embodiment of the present invention, the semiconductor body 21 of the semiconductor unit 20 may also be implemented as a PIN junction, and correspondingly, the semiconductor body 21 includes at least two N-type regions and at least one P-type region, wherein two of the heavily doped portions 22 are implemented as P + + heavily doped portions, the lightly doped portions 23 are implemented as P + lightly doped portions, and the number of the lightly doped portions 23 may be implemented as one. The P + lightly doped portions are disposed in the P-type region along a propagation direction of light, and the two P + + heavily doped portions are electrically connected to the P-type region through one of the P + lightly doped portions. The two P + + heavily doped portions are arranged at two ends of the P-type region at intervals, so that the area of the plane of the P + + heavily doped portion, which is perpendicularly projected on the substrate 10, can be reduced, the formation of parasitic capacitance is reduced, and the intrinsic bandwidth of the phase shifter is improved.
The number of the lightly doped portions 23 may be implemented as two. The two P + lightly doped parts are arranged at two ends of the P-type region at intervals along the propagation direction of light. Two P + + heavily doped portions are electrically connected with the P type region through two P + lightly doped portions, two P + + heavily doped portions are correspondingly electrically connected on one sides where the two P + lightly doped portions deviate from each other, and each P + + heavily doped portion is electrically connected with the P type region through one P + lightly doped portion, so that the plane area of the P + + heavily doped portion and the P + lightly doped portion vertically projected on the base layer 10 can be reduced simultaneously, and the parasitic capacitance formed between the P + + heavily doped portion and the P + lightly doped portion and the base layer 10 can be reduced.
Fig. 6 shows a lateral cross-section of the semiconductor unit 20, in order from left to right, of the N-type region, the P-type region and the N-type region.
The semiconductor unit 20 may also be implemented as a Silicon-Organic Hybrid, also known as SOH.
As will be described in detail below, the phase shifter according to a preferred embodiment of the present invention includes an insulating layer 40 and the above-mentioned phase shifter structure, the insulating layer 40 is laid on top of the base layer 10, and the insulating layer 40 covers the semiconductor unit 20 and the bias unit 30.
A traveling-wave electrode modulator according to a preferred embodiment of the present invention will be described in detail below, and includes an optical beam splitter, an optical beam combiner, and the phase shifter described above. The optical splitter is disposed at one end of the semiconductor unit 20. The optical beam combiner is disposed at the other end of the semiconductor unit 20, and the phase shifter is disposed between the optical beam splitter and the optical beam combiner, and is configured to connect the optical beam splitter and the optical beam combiner and change a phase of an optical signal passing through the phase shifter.
It will be appreciated by persons skilled in the art that the embodiments of the invention described above and shown in the drawings are given by way of example only and are not limiting of the invention. The advantages of the present invention have been fully and effectively realized. The functional and structural principles of the present invention have been shown and described in the examples, and any variations or modifications of the embodiments of the present invention may be made without departing from the principles.
Claims (10)
1. Phase shifter structure, characterized in that the phase shifter structure comprises:
a base layer;
a semiconductor unit, which comprises a semiconductor substrate, two heavily doped portions and at least one lightly doped portion, wherein the semiconductor substrate is laid on the base layer, the semiconductor substrate is configured to be penetrated by light, two ends of the semiconductor substrate through which the light passes are respectively defined as a first end and a second end, two sides of the semiconductor substrate and a direction perpendicular to a propagation direction of the light in the semiconductor substrate are respectively defined as a first side end and a second side end, two of the heavily doped portions are arranged at intervals along the propagation direction of the light, two of the heavily doped portions are respectively and correspondingly arranged at the first end and the second end of the semiconductor substrate, the two of the heavily doped portions arranged at intervals are electrically connected with the semiconductor substrate through the lightly doped portions, and the lightly doped portions and the two of the heavily doped portions are arranged at the base layer along the propagation direction of the light; and
and the bias unit comprises two signal electrodes and two bias electrodes, the two bias electrodes are correspondingly arranged on the two heavily doped parts along the propagation direction of the light and are electrically connected to the two heavily doped parts, the two signal electrodes are electrically connected to the upper parts of the first side end part and the second side end part of the semiconductor substrate at intervals, the signal electrodes are used for loading high-speed electric signals, and the bias electrodes are used for loading bias voltages, so that when the signal electrodes are loaded with the high-speed electric signals and the bias electrodes are loaded with the bias voltages, the refractive index of the semiconductor substrate is changed, and the phase of the light transmitted through the semiconductor substrate can be changed.
2. The phase shifter structure according to claim 1, wherein the number of the lightly doped portions is implemented as one, one of the lightly doped portions is disposed at a middle portion of the semiconductor substrate in a propagation direction of light, and both ends of the lightly doped portion electrically connect two of the heavily doped portions, respectively.
3. The phase shifter structure according to claim 1, wherein the number of the lightly doped portions is implemented as two, two of the lightly doped portions are disposed at intervals at the first end and the second end of the semiconductor body in a propagation direction of light, two of the heavily doped portions are electrically connected correspondingly at sides of the two lightly doped portions facing away from each other, and each of the heavily doped portions is electrically connected to the semiconductor body through one of the lightly doped portions.
4. Phase shifter structure according to claim 2 or 3, characterized in that the semiconductor units are implemented as PN junctions, the heavily doped portions being implemented as N + + heavily doped portions;
the semiconductor substrate comprises at least two P-type regions and at least one N-type region, the at least two P-type regions and the at least one N-type region are distributed on the top of the base layer side by side along the direction perpendicular to the light propagation direction in the semiconductor substrate, the N-type region is arranged between the P-type regions, and the extension directions of the P-type regions and the N-type regions are parallel to the light propagation direction.
5. Phase shifter structure according to claim 4, characterized in that the number of P-type regions and N-type regions is implemented as two, the number of lightly doped portions is implemented as one, the lightly doped portions are arranged between two of the N-type regions, and the extension direction of the lightly doped portions is parallel to the propagation direction of light.
6. The phase shifter structure of claim 4, wherein the number of P-type regions is implemented as two, the number of N-type regions is implemented as one, the number of lightly doped regions is implemented as two, one of the N-type regions is disposed between two of the P-type regions, and the lightly doped regions are disposed at both ends of the N-type regions at intervals along a propagation direction of light.
7. The phase shifter structure of claim 5, wherein the heavily doped portion and/or the lightly doped portion are vertically perforated with through holes.
8. Phase shifter structure according to claim 3, characterized in that the semiconductor unit is implemented as a PIN junction or SOH.
9. A phase shifter, wherein said phase shifter comprises an insulating layer; and
the phase shifter structure of any one of claims 1 to 8, wherein the insulating layer is laid on top of the base layer, and the insulating layer encapsulates the semiconductor unit and the bias unit.
10. A traveling wave electrode modulator, characterized in that the traveling wave electrode modulator comprises:
a beam splitter disposed at one end of the semiconductor unit;
the optical beam combiner is arranged at the other end of the semiconductor unit;
the phase shifter of claim 9, the phase shifter configured to couple the optical splitter and the optical combiner.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104885003A (en) * | 2012-12-27 | 2015-09-02 | 株式会社藤仓 | Optical waveguide element and optical modulator |
| US20160291350A1 (en) * | 2013-03-26 | 2016-10-06 | Nec Corporation | Silicon-based electro-optic modulator |
| CN110955066A (en) * | 2018-09-27 | 2020-04-03 | 上海新微技术研发中心有限公司 | Phase shifter and silicon-based electro-optical modulator |
| CN112068335A (en) * | 2019-12-30 | 2020-12-11 | 杭州芯耘光电科技有限公司 | Doped structure array and optical modulator |
| CN112666728A (en) * | 2019-10-15 | 2021-04-16 | 苏州旭创科技有限公司 | Electro-optical modulator |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104885003A (en) * | 2012-12-27 | 2015-09-02 | 株式会社藤仓 | Optical waveguide element and optical modulator |
| US20160291350A1 (en) * | 2013-03-26 | 2016-10-06 | Nec Corporation | Silicon-based electro-optic modulator |
| CN110955066A (en) * | 2018-09-27 | 2020-04-03 | 上海新微技术研发中心有限公司 | Phase shifter and silicon-based electro-optical modulator |
| CN112666728A (en) * | 2019-10-15 | 2021-04-16 | 苏州旭创科技有限公司 | Electro-optical modulator |
| CN112068335A (en) * | 2019-12-30 | 2020-12-11 | 杭州芯耘光电科技有限公司 | Doped structure array and optical modulator |
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