CN115102914A - Data exchange system, method and storage medium - Google Patents

Data exchange system, method and storage medium Download PDF

Info

Publication number
CN115102914A
CN115102914A CN202110244742.9A CN202110244742A CN115102914A CN 115102914 A CN115102914 A CN 115102914A CN 202110244742 A CN202110244742 A CN 202110244742A CN 115102914 A CN115102914 A CN 115102914A
Authority
CN
China
Prior art keywords
switching
switching node
data
input
node
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202110244742.9A
Other languages
Chinese (zh)
Inventor
胡韬
赵刚
柯楚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ZTE Corp
Original Assignee
ZTE Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ZTE Corp filed Critical ZTE Corp
Priority to CN202110244742.9A priority Critical patent/CN115102914A/en
Priority to PCT/CN2021/133216 priority patent/WO2022183789A1/en
Publication of CN115102914A publication Critical patent/CN115102914A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/10Packet switching elements characterised by the switching fabric construction
    • H04L49/101Packet switching elements characterised by the switching fabric construction using crossbar or matrix
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4022Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

The application provides a data exchange system, a method and a storage medium. The system comprises: the data exchange network is connected with the control module; the control module is used for configuring the state value of the corresponding switching node according to the validity indication signal of the input port associated with each switching node in the data switching network, wherein at least one switching node is associated with a plurality of input ports; and the data switching network is used for transmitting the input data of each input port to the corresponding destination output port step by step according to the state value of each switching node. In the technical scheme, the working state of one switching node can be determined according to the validity indication signals of the input ports, and the working state of one switching node can control the switching link paths of the input data of the input ports, so that data switching can be realized by using fewer switching nodes and comparators, the cost of a data switching network is reduced, and the resource use efficiency is improved.

Description

Data exchange system, method and storage medium
Technical Field
The present application relates to data switching networks, and, for example, to a data switching system, method, and storage medium.
Background
In communication products, especially in communication products in the communication fields such as Software Defined Networking (SDN), communication chips, parallel computing, etc., there are a lot of data exchange processes, and usually, a Crossbar (Crossbar) is used to form a data exchange Network. Input data enter the cross-bar switch matrix through the input port, the input data are controlled to be transmitted in the cross-bar switch matrix according to a specific path by controlling the working state of each switching node in the cross-bar switch matrix, and finally the input data are arranged and output from the output port to complete data exchange.
In the crossbar matrix structure, the working state of each switching node is determined according to a corresponding input port and an output port, that is, the total number of internal wires and the number of used comparators are the product of the number of input ports and the number of output ports, and under the condition that the number of input ports and output ports is large, the total number of internal wires and the number of comparators in the crossbar matrix structure are large, so that excessive resources are occupied, and the cost of a data switching network is high.
Disclosure of Invention
The application provides a data exchange system, a data exchange method and a storage medium, which are used for reducing the cost of a data exchange network and improving the resource utilization efficiency.
An embodiment of the present application provides a data exchange system, including:
the data exchange network is connected with the control module;
the control module is used for configuring a state value of a corresponding switching node according to an effectiveness indication signal of an input port associated with each switching node in the data switching network, wherein at least one switching node is associated with a plurality of input ports;
and the data switching network is used for transmitting the input data of the input ports to the corresponding target output ports step by step according to the state value of each switching node.
An embodiment of the present application further provides a data exchange method, including:
configuring a state value of a corresponding switching node according to a validity indication signal of an input port associated with each switching node in a data switching network, wherein at least one switching node is associated with a plurality of input ports;
and transmitting the input data of each input port to a corresponding destination output port through each switching node according to the state value of each switching node.
The embodiment of the application also provides a computer readable storage medium, and a computer program is stored on the computer readable storage medium, and when the program is executed by a processor, the program realizes the data exchange method.
The embodiment of the application provides a data exchange system, a data exchange method and a storage medium. The system comprises: the data exchange network is connected with the control module; the control module is used for configuring the state value of a corresponding switching node according to the validity indication signal of the input port associated with each switching node in the data switching network, wherein at least one switching node is associated with a plurality of input ports; and the data switching network is used for transmitting the input data of each input port to the corresponding destination output port step by step according to the state value of each switching node. The working state of one switching node is determined according to the validity indication signals of the input ports, and the working state of one switching node can control the switching link paths of the input data of the input ports, so that data switching can be realized by using fewer switching nodes and comparators, the cost of a data switching network is reduced, and the resource use efficiency is improved.
Drawings
Fig. 1 is a schematic structural diagram of a data exchange system according to an embodiment;
FIG. 2 is a diagram illustrating an implementation of a data exchange according to an embodiment;
fig. 3 is a schematic structural diagram of a data switching network according to an embodiment;
fig. 4 is a schematic structural diagram of an 8 × 8 data switching network according to an embodiment;
fig. 5 is a flowchart of a data exchange method according to an embodiment.
Detailed Description
The present application will be described with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the application and are not limiting of the application. It should be noted that the embodiments and features of the embodiments in the present application may be arbitrarily combined with each other without conflict. It should be further noted that, for ease of description, only some of the structures associated with this application, but not all of them, are shown in the drawings.
In a data switching network (i.e., a crossbar architecture), switching nodes can be implemented using comparators, and the operating states of the switching nodes are two types: cross (Cross) state and straight-through (Bar) state. Each switching node has two inputs and two outputs. When a switching node is in a through state, the switching node realizes the functions that data input by a first input end is transmitted to a first output end, and data input by a second input end is transmitted to a second output end; when a switching node is in a cross state, the switching node performs the function that data input from the first input terminal is transmitted to the second output terminal, and data input from the second input terminal is transmitted to the first output terminal.
For a data switching network having N input ports to M output ports, in the prior art, the operating state of each switching node depends on its associated one input port and one output port. Therefore, in order to realize the switching of any path from N input ports to M output ports, the total number of internal connections needs to reach N × M, and the number of switching nodes also reaches N × M. When the number of the input ports and/or the output ports is large, the total number of the connecting lines and the number of the comparators inside the data switching network are huge, excessive resources are occupied, the resource utilization efficiency is low, and the hardware cost of the data switching network is high.
The embodiment of the application provides a data switching system, wherein at least one switching node is associated with a plurality of input ports of a data switching network, that is, the working state of each switching node is determined according to the validity indication signal of at least one input port associated with the switching node, and on this basis, the working state configured for one switching node can control the switching link path of input data of one or more input ports, so that the switching of any path of data from N input ports to M output ports can be realized by using fewer connecting lines and comparators, the cost of the data switching network is reduced, and the resource use efficiency is improved.
Fig. 1 is a flowchart of a data exchange method according to an embodiment, and as shown in fig. 1, the system according to the embodiment includes: a control module 110 and a data switching network 120, the data switching network 120 being connected to the control module 110. The control module 110 is configured to configure a state value of a corresponding switching node according to a validity indication signal of an input port associated with each switching node in the data switching network 120, where at least one switching node is associated with a plurality of input ports; the data switching network 120 is configured to transmit input data of each input port to a corresponding destination output port step by step according to the state value of each switching node.
In this embodiment, the control module 110 configures the working state of each switching node in the data switching network 120 through a compiler, and further completes configuration of the switching link path of the input data of each input port. For each switching node, the control module 110 calculates, according to the association relationship between the switching node and the input port, the validity indication signal of the input data of the input port associated with the switching node through software configuration or a hardware circuit, and configures the operating state of the switching node. On this basis, the data switching network 120 transfers the input data of each input port to the final destination output port step by step according to the configuration result of the control module 110, and outputs the data through the destination output port on this basis.
In this embodiment, there is at least one switching node associated with a plurality of input ports. For example, for the switching nodes in the same stage, the working state of the first switching node depends on the first input port; the operating state of the second switching node depends on the first to third input ports; the operating state of the third switching node depends on the first to fifth input ports … …, and so on, and the operating state of the last switching node depends on the first to penultimate input ports. In addition, each stage of switching nodes may be further divided into a plurality of groups, or an association relationship with each input port may be established for each group of switching nodes.
In an embodiment, the control module 110 includes an effectiveness calculating unit configured to calculate a status value of each switching node according to an effectiveness indication signal of an input port associated with each switching node in the data switching network 120, and an operating status configuring unit configured to configure an operating status of each switching node according to the status value of each switching node.
In one embodiment, a data switching network includes N input ports, M output ports, and L-stage switching nodes, where M and N are integers greater than 2; the adjacent two stages of exchange nodes are connected in a reverse uniform shuffling mode, and the reverse uniform shuffling mode meets the following requirements: the binary address of the input port of the next stage switching node is the result of the cyclic right shift by one bit of the binary address of the output port of the previous stage switching node connected thereto.
In this embodiment, the switching nodes in the data switching network 120 are divided into L stages, and input data of the input port is transmitted to the destination output port step by step through the first stage switching node and the second stage switching node … …, where the first stage switching node is a switching node connected to the N input ports, the second stage switching node is a switching node used to connect the first stage switching node and the third stage switching node, and so on, the L-th stage switching node is used as the last stage switching node in the data switching network 120, and data from the L-1 stage switching node can be output through the output port, thereby implementing data switching. The adjacent two stages of switching nodes are connected in an inverse uniform shuffling mode. Inverse uniform shuffling is an interconnection function, which means that the input port of the next stage of switching node is divided into two parts, the input port of the first part is sequentially connected with the output ports at intervals of the previous stage of switching node, and the input port of the second part is sequentially connected with the rest output ports of the previous stage of switching node.
For example, each stage of switching node has eight input ports and eight output ports, and in two adjacent stages of switching nodes, the switching node at the next stage is divided into two parts, each part has four input ports, and the inverse uniform shuffle connection means that:
a first input port of the first part is connected with a first output port of a previous stage switching node;
the second input port of the first part is connected with the third output port of the previous stage of switching node;
the third input port of the first part is connected with the fifth output port of the previous stage of switching node;
the fourth input port of the first part is connected with the seventh output port of the previous stage of switching node;
after the connection mode of the first part is determined, the remaining output ports of the previous stage of switching node are the second, fourth, sixth, and eight output ports, so that:
the first input port of the second part is connected with the second output port of the previous stage of switching node;
a second input port of the second part is connected with a fourth output port of the previous stage of switching node;
a third input port of the second part is connected with a sixth output port of the previous stage of switching node;
the fourth input port of the second part is connected with the eighth output port of the previous stage switching node.
More specifically, eight input ports of the next-stage switching node are respectively recorded as input ports 0-7, eight output ports of the previous-stage switching node are respectively recorded as output ports 0-7, and then:
the input port 0 (binary address 000) of the next stage is connected with the output port 0 (binary address 000) of the previous stage;
the input port 1 (binary address is 001) of the next stage is connected with the output port 2 (binary address is 010) of the previous stage;
the input port 2 (binary address is 010) of the next stage is connected with the output port 4 (binary address is 100) of the previous stage;
the input port 3 (binary address is 011) of the next stage is connected with the output port 6 (binary address is 110) of the previous stage;
the input port 4 (binary address 100) of the next stage is connected with the output port 1 (binary address 001) of the previous stage;
the input port 5 (binary address 101) of the next stage is connected with the output port 3 (binary address 011) of the previous stage;
the input port 6 (binary address is 110) of the next stage is connected with the output port 5 (binary address is 101) of the previous stage;
the input port 7 (binary address 111) of the subsequent stage is connected to the output port 7 (binary address 111) of the previous stage.
Therefore, for the connection mode of reverse even shuffling, the binary address of the previous stage of switching node is circularly shifted to the right by one bit to obtain the corresponding binary address of the next stage of switching node.
Fig. 2 is a schematic diagram of an implementation of data exchange according to an embodiment. As shown in fig. 2, the control module 110 calculates the operating status of each switching node in the data switching network 120, so as to configure a status value for each switching node, for example, a status value of "1" indicates that the switching node is in a cross state, and a status value of "0" indicates that the switching node is in a pass-through state, so as to control the switching link path of the input data in the entire data switching network 120, and ensure that the input data can be correctly switched to the destination output port. In the data switching network 120, data is transmitted stage by stage through a plurality of stages of switching nodes, in which an output of each stage is used as intermediate data, and between each two stages of the data switching network 120, an output of a previous stage is used as an input of a next stage. In addition, the validity indication signal output by the previous stage switching node is also input to the control module 110, so that the control module 110 can calculate the working state of the next stage switching node.
Fig. 3 is a schematic structural diagram of a data switching network according to an embodiment. As shown in fig. 3, input data enters each stage of switching nodes 123 through N input ports 121, and the validity indication signal of the input data of each input port 121 determines the operating state of the switching node associated therewith, so that the input data is transmitted in each stage of switching nodes 123 step by step, the valid input data is transmitted to a destination output port through corresponding switching link paths, and finally, all the input data is sequentially output from M output ports 122.
In one embodiment, each stage of switching nodes comprises P switching nodes; when N is power of 2 and N is more than or equal to M, L is log 2 (N),P=N/2;
In the case where M is a power of 2 and N < M, L is log 2 (M),P=M/2;
When N is not a power of 2 and N' is not less than M, L is log 2 (N’),P=N’/2;
In the case where M is a power of a power other than 2 and N < M', L is log 2 (M’),P=M’/2;
Wherein N' is a value with the minimum value in the values which are larger than N and satisfy the power of 2; m' is the smallest value among values that are larger than M and satisfy the power of 2.
In this embodiment, for a data switching network having N input ports and M output ports, if N is greater than or equal to M and is a power of 2, each stage of switching nodes includes N/2 switching nodes, and the number of switching nodes in the data switching network is N/2 × log 2 (N), the total number of connecting lines from the N input ports to the L-th stage switching node is N multiplied by log 2 (N); in the case of N < M, each stage of switching nodes comprises M/2 switching nodes, and the number of the switching nodes in the data switching network is M/2 × log 2 (M); the total number of connecting lines from the N input ports to the L-th stage switching node is M multiplied by log 2 (M)。
Under the condition that the value of N is not the power of 2 and N' is more than or equal to M, N can be regarded as the minimum value of the numerical values which are more than N and satisfy the power of 2, and the level number and the number of the switching nodes are calculated according to the minimum value, so that the level number and the number of the switching nodes in the system are ensured to be enough to realize data exchange from N input ports to M output ports in any path. For example, if N is 7, L is 3, P is 4, calculated from N '8 (N' ≧ M); when N is 10, L is 4 and P is 8, calculated from N '16 (N' ≧ M). Similarly, when M is a value other than the power of 2 and N < M', M may be regarded as the smallest one of the values that is larger than M and satisfies the power of 2, and the number of stages and the number of switching nodes may be calculated accordingly. For example, if M is 7, then L is 3, P is 4, calculated from M '8 (N < M'); when M is 10, L is 4 and P is 8, calculated from M 'is 16(N < M').
In the case where N ≧ M, the data switching network can also be understood as a data bubble network, i.e., a network that switches more input data from an input port to fewer (or equal) output ports. Therefore, compared with the case that each switching node is associated with one input port (the total number of internal connecting lines is N × M, and the number of switching nodes is also N × M), the data switching network of the embodiment uses fewer connecting lines and comparators, so that data switching can be realized, and the hardware cost is reduced.
In one embodiment, the class I switching nodes are divided into X l Group X l =2 l-1 (ii) a The y-th switching node in each group is associated with 2y-1 input ports of the l-th stage switching node,
Figure BDA0002963675910000051
1≤l≤L。
in this embodiment, the first-stage switching nodes are a group as a whole, and in the first-stage switching nodes:
the 1 st switching node is associated with 1 input port;
the 2 nd switching node is associated with 3 input ports (e.g., 1 st to 3 rd input ports);
the 3 rd switching node is associated with 5 input ports (e.g., 1 st to 5 th input ports);
… …, and so on, the y-th switching node is associated with 2y-1 input ports (e.g., 1 st to 2y-1 th input ports).
For the second level switching nodes, the division into two groups, in the first group, the 1 st switching node is associated with 1 input port, the 2 nd switching node is associated with 3 input ports, the 3 rd switching node is associated with 5 input ports … …, and so on, the y th switching node is associated with 2y-1 input ports; similarly, in the second group, the 1 st switch node is associated with 1 input port, the 2 nd switch node is associated with 3 input ports, the 3 rd switch node is associated with 5 input ports … …, and so on, the y-th switch node is associated with 2y-1 input ports.
Similarly, the third level switching nodes may be divided into four groups, the fourth level switching nodes may be divided into eight groups … …, and so on, the l-th level switching nodes are divided into X l Groups, in each group, the y-th switching node is associated with 2y-1 input ports.
On this basis, the operating state configured for a switching node may control the switched link path of incoming data for one or more input ports.
In one embodiment, the input ports of the stage I switching node are divided into X l Group (iv); the y-th switching node in each group is associated with the 1 st to 2y-1 st input ports of the respective group, wherein the input ports are arranged in order of port numbers.
For example, the first stage switching nodes are collectively a group, and in the first stage switching nodes:
the 1 st switching node is associated with the 1 st input port (input port 0);
the 2 nd switching node is associated with the 1 st to 3 rd input ports (input port 0 to input port 2);
the 3 rd switching node is associated with the 1 st to 5 th input ports (input port 0 to input port 3);
… …, and so on, the y-th switching node is associated with the 1 st to 2y-1 st input ports (input port 0 to input port 2 y-1).
The second-level switching nodes are divided into two groups, the input ports of the second-level switching nodes are also divided into two groups, and each group of switching nodes is respectively associated with one group of input ports. For example, the first set of switch nodes is associated with the first set of input ports, wherein the 1 st switch node in the first set of switch nodes is associated with the 1 st input port in the first set of input ports, the 2 nd switch node in the first set of switch nodes is associated with the 1 st through 3 rd input port in the first set of input ports, the 3 rd switch node in the first set of switch nodes is associated with the 1 st through 5 th input ports … … of the first stage in the first set of input ports, and so on, the y th switch node in the first set of switch nodes is associated with the 1 st through 2y-1 th input port in the first set of input ports; similarly, the second set of switching nodes is associated with the second set of input ports, wherein the 1 st switching node in the second set of switching nodes is associated with the 1 st input port in the second set of input ports, the 2 nd switching node in the second set of switching nodes is associated with the 1 st to 3 rd input ports in the second set of input ports, the 3 rd switching node in the second set of switching nodes is associated with the 1 st to 5 th input ports … … of the first stage in the second set of input ports, and so on, the y-th switching node in the second set of switching nodes is associated with the 1 st to 2y-1 th input ports in the second set of input ports.
Similarly, the third level switching nodes may be divided into four groups, the fourth level switching nodes may be divided into eight groups … …, and so on, the l-th level switching nodes are divided into X l Groups, in each group, the y-th switching node is associated with the 1 st to 2y-1 st of the input ports of the respective group.
On this basis, the working state configured for one switching node can control the switching link path of the input data of the 1 st to 2y-1 st input ports associated with the switching node.
In one embodiment, the class I switching node and the class I +1 switching node are equally divided into X l The first-level exchange node is connected with the corresponding part of the first + 1-level exchange node in a reverse uniform shuffling way, and L is more than or equal to 1 and less than or equal to L-1;
the reverse uniform shuffling mode meets the following requirements: and in the part of the l-th stage switching node corresponding to the l + 1-th stage switching node, the binary address of the input port of the next stage switching node is the result of circularly shifting the binary address of the output port of the previous stage switching node connected with the next stage switching node by one bit to the right.
In this embodiment, in order to further improve the uniformity and randomness of the connection, the l-th-stage switching node is equally divided into X l In part, the l +1 stage switching node is also equally divided into X l And the first part of the l-level switching node is connected with the first part of the l + 1-level switching node in an inverse uniform shuffling manner, the second part of the l-level switching node is connected with the second part of the l + 1-level switching node in an inverse uniform shuffling manner … …, and so on, the Xth part of the l-level switching node l Xth of partial and l +1 stage switching node l The parts are connected in a reverse uniform shuffling mode. On the basis, the distribution of each switching node in the data switching network is more uniform, and the switching path of data among different switching nodes is more flexible.
Fig. 4 is a schematic structural diagram of an 8 × 8 data switching network according to an embodiment. As shown in fig. 4, the first level switching nodes include switching nodes 0-3, the second level switching nodes include switching nodes 4-7, and the third level switching nodes include switching nodes 8-11. The first-stage switching node and the second-stage switching node are connected in a reverse and uniform shuffling manner; the second-stage switching node and the third-stage switching node are equally divided into two parts, and the two parts are respectively connected in a reverse and uniform shuffling manner, namely the switching nodes 4 and 5 are connected with the switching nodes 8 and 9 in a reverse and uniform shuffling manner, and the switching nodes 6 and 7 are connected with the switching nodes 10 and 11 in a reverse and uniform shuffling manner; the third-stage switching node and the fourth-stage switching node are equally divided into four parts, and the four parts are respectively connected in a reverse and uniform shuffling manner; by analogy, the nodes are equally divided into X between the L-1 level switching node and the L level switching node L-1 Each part is internally connected with a reverse uniform shuffle.
In one embodiment, a control module is configured to: for a first switching node in the xth group of switching nodes of the l level, carrying out negation operation on the value of the validity indication signal of an input port associated with the switching node to obtain the state value of the switching node; for the y-th switching node in the x-th group of switching nodes of the l-th stageCarrying out exclusive OR operation on the values of the validity indication signals of 2y-1 input ports associated with the switching node to obtain a state value of the switching node; wherein X is more than or equal to 1 and less than or equal to X l
Figure BDA0002963675910000071
In this embodiment, for the first-stage switching node, the state value of the first switching node is a value of an validity indication signal input to an input port associated with the first switching node, and is negated; the state value of the second switching node is the exclusive or nor operation on the values of the validity indication signals input by the first to third input ports which are associated with the second switching node; the state value of the third switching node is subjected to exclusive nor operation … … on the values of the validity indication signals input to the first to fifth input ports associated with the third switching node, and so on until the state value of the last switching node is subjected to exclusive nor operation on the values of the validity indication signals input to all the input ports except the last input port.
The second-stage switching nodes are divided into two groups, and the input ports of the second-stage switching nodes are also divided into two groups, wherein the state value of the first switching node in the first group of switching nodes is the value of the validity indication signal input to the first input port (namely, the first input port in the first group of input ports) associated with the group, and the state value of the first switching node in the second group of switching nodes is the value of the validity indication signal input to the first input port (namely, the first input port in the second group of input ports) associated with the group;
the state value of a second switching node in the first group of switching nodes is subjected to exclusive-nor operation on the values of the validity indication signals input to the first to third input ports (namely, the 1 st to 3 rd input ports in the first group of input ports) related to the group, and the state value of the second switching node in the second group of switching nodes is subjected to exclusive-nor operation on the values of the validity indication signals input to the first to third input ports (namely, the 1 st to 3 rd input ports in the second group of input ports) related to the group;
… …, and so on, until the state value of the last switching node in the first group of switching nodes is the exclusive or operation on the values of the validity indication signals input by all the other input ports (i.e. the first to the second last input ports in the first group of input ports) except the last input port of the group association, and the state value of the last switching node in the second group of switching nodes is the exclusive or operation on the values of the validity indication signals input by all the other input ports (i.e. the first to the second last input ports in the second group of input ports) except the last input port of the group association.
Similarly, the above grouping and operation are also performed on the switching nodes and input ports of the third stage and thereafter, each switching node of the last stage is a group independently, and each input port is a group independently. For the last stage of switching nodes, negating the state value of the first group of switching nodes (namely, the first switching node) for the value of the validity indication signal input to the first input port (namely, the first input port) associated with the switching node; the state value of the second group of switching nodes (namely the second switching node) is the value of the validity indication signal input to the first input port (namely the 2 nd input port) associated with the switching node, and is subjected to negation operation; the state value of the third group (namely, the third switching node) is the value of the validity indication signal input to the first input port (namely, the 3 rd input port) associated with the switching node, and is subjected to negation operation; and in analogy, negating the value of the validity indication signal input by the first input port (namely the last input port) associated with the switching node by using the state value of the last group of switching nodes (namely the last switching node). Finally, the state value of each switching node in the data switching network is calculated.
In one embodiment, the data exchange system further comprises: the data receiving module is used for receiving output data of the data switching network; the data receiving module comprises M receiving ports; each receiving port is connected with one corresponding output port, and binary numbers of the port numbers of the connected output ports and the receiving ports meet the flip relation.
In this embodiment, the data connection between the data switching network 120 and the data receiving module adopts the following connection manner: for the data switching network 120 with N input ports, the port number of the receiving port of the data receiving module is the result of flipping the binary number corresponding to the port number of the output port in the data switching network 120 from left to right.
For example, output port 0 (binary number 000) of the data switching network 120 is connected to receive port 0 (binary number 000) of the data receiving module;
an output port 1 (binary number is 001) of the data switching network 120 is connected to a receiving port 4 (binary number is 100) of the data receiving module;
an output port 2 (binary number 010) of the data switching network 120 is connected with a receiving port 2 (binary number 010) of the data receiving module;
an output port 3 (binary number is 011) of the data switching network 120 is connected to a receive port 6 (binary number is 110) of the data receiving module;
an output port 4 (binary number 100) of the data switching network 120 is connected to a receiving port 1 (binary number 001) of the data receiving module;
an output port 5 (binary number is 101) of the data switching network 120 is connected with a receiving port 5 (binary number is 101) of the data receiving module;
an output port 6 (binary number 110) of the data switching network 120 is connected with a receiving port 3 (binary number 011) of the data receiving module;
output port 7 (binary 111) of data switching network 120 is connected to receive port 7 (binary 111) of the data receive module.
The output port of the data switching network 120 and the receiving port of the data receiving module are cross-connected, in this case, the port numbers of the receiving ports can be ensured to be arranged in the order from small to large according to the above connection manner (as shown in fig. 4), which is convenient for subsequent processing of data.
In one embodiment, the data receiving module is configured to: when the validity indication signal of the data sent by the output port is valid, the input data is received through the connected receiving port, and the data with the invalid validity indication signal is discarded. The following takes an 8 × 8 data exchange network as an example to illustrate the data exchange process. As shown in FIG. 4, the validity indication signals of the input data of 8 input ports (from top to bottom) are denoted as vld1[0:7], where the validity indication signal of input port 0 is vld [0], the validity indication signal of input port 1 is vld [1] … …, and so on, and the validity indication signal of input port 7 is vld [7 ]; and recording the four switching nodes of the first stage as switching nodes 0-3 respectively. For the switching node 0, the state value ctrl [0] is negation operation on vld1[0 ]; for the switching node 1, the state value ctrl [1] is the exclusive nor operation on vld1[0], vld1[1] and vld1[2 ]; for the switching node 2, the state value ctrl [2] is the exclusive OR operation performed on vld1[0] to vld1[4 ]; for the switching node 3, the state value ctrl [3] is obtained by performing an exclusive-nor operation on vld1[0] to vld1[6 ]. After the state values of the first-stage switching nodes are calculated, the control module 110 assigns each state value to the first-stage switching node in the data switching network 120, and the input data is used as the input of the second-stage switching node according to the switching link path generated by the state values.
For the second stage switching node, the validity indication signals of the input data of 8 input ports (from top to bottom) are recorded as vld2[0:7], and the four switching nodes of the second stage are respectively recorded as switching nodes 4-7. For the switching node 4, the state value ctrl [4] is negation operation on vld2[0 ]; for the exchange node 6, the state value ctrl [6] is that vld2[4] is negated; for the switching node 5, the state value ctrl [5] is the exclusive nor operation performed on vld2[0] to vld2[2 ]; for the switching node 7, the state value ctrl [7] is obtained by performing an XOR or NOR operation on vld2[4] to vld2[6 ]. After the state values of the second-stage switching nodes are calculated, the control module 110 assigns the state values to the second-stage switching nodes in the data switching network 120, and the input data is used as the input of the third-stage switching nodes according to the switching link paths generated by the state values.
For the third-stage switching node, validity indication signals of input data of 8 input ports (from top to bottom) are respectively recorded as vld3[0:7], and four switching nodes of the third stage are respectively recorded as switching nodes 8-11. The state value ctrl [8] of the switching node 8 is negation operation on vld3[0 ]; the state value ctrl [9] of the switching node 9 is negation operation on vld3[2 ]; the state value ctrl [10] of the switching node 10 is negation operation on vld3[4 ]; the state value ctrl [11] of switching node 11 negates vld3[6 ]. After the state values of the third-stage switching nodes are calculated, the control module 110 assigns each state value to a third-stage switching node in the data switching network 120, and the input data is output through a corresponding destination output port according to a switching link path generated by the state values.
In addition, the output port of the data switching network 120 and the receiving port of the data receiving module are cross-connected, and may specifically be connected as follows: the port number of the receiving port of the data receiving module is a result of binary number inversion corresponding to the port number of the output port, that is: the output port 0 is connected with the receiving port 0; the output port 1 is connected with the receiving port 4; the output port 2 is connected with the receiving port 2; the output port 3 is connected with the receiving port 6; the output port 4 is connected with the receiving port 1; the output port 5 is connected with the receiving port 5; the output port 6 is connected with the receiving port 3; the output port 7 is connected to the receiving port 7. On the basis, the port numbers of the receiving ports can be arranged in the sequence from small to large, the data transmission standard is met, and the data can be conveniently processed in the follow-up process.
In the data switching system of the embodiment, the switching nodes and the input ports are classified and grouped, and for the switching nodes associated with the plurality of input ports in each group, the working state configured for one switching node can control the switching link paths of the input data of the plurality of input ports associated with the switching node, so that the cost of a data switching network is reduced, and the resource utilization efficiency is improved.
Furthermore, the link distribution formed between the switching nodes in the data switching network is more uniform by connecting the adjacent two stages of switching nodes in a reverse uniform shuffling mode or connecting the corresponding parts of the adjacent two stages of switching nodes, and the switching link paths of the data between different switching nodes are more flexible and more comprehensive.
Further, when the number of the input ports or the output ports does not satisfy the power of 2, the number of stages and the number of the switching nodes are calculated by using a numerical value which is larger than the number of the input ports or the output ports and satisfies the power of 2, so that enough switching nodes are ensured to realize data switching of any path from the input ports to the output ports.
Furthermore, for the switching nodes associated with one input port and a plurality of input ports, different types of operations are respectively adopted to determine the working state of the switching nodes, and the correctness of data transmission in each switching link path is ensured.
Furthermore, the output port of the data switching network is connected with the receiving port of the data receiving module according to the binary number turning relationship, so that the port numbers of the receiving ports are arranged in the sequence from small to large, the data transmission specification is met, and the data can be conveniently processed in the follow-up process.
In the embodiment of the present application, a data exchange method is further provided, where the method may be applied to a control module in a data exchange system, and the control module may be a centralized control node, a data processing chip, or a network management device.
Fig. 5 is a flowchart of a data exchange method according to an embodiment, and as shown in fig. 5, the method according to the embodiment includes step 210 and step 220.
In step 210, a status value of a corresponding switching node is configured according to a validity indication signal of an input port associated with each switching node in the data switching network, wherein at least one switching node is associated with a plurality of input ports.
In step 220, the input data of each input port is transmitted to the corresponding destination output port step by step according to the state value of each switching node.
In this embodiment, the state values of the switching nodes of the data switching network are obtained through hardware circuit or software operation, and then the state values are assigned to the corresponding switching nodes to instruct the switching nodes to adjust the working state (cross or through state), so as to control the switching link path of the input data in the data switching network, and implement data switching from the input data of different input ports to the output port. In the process, input data are transmitted stage by stage in the data exchange network, and each output port of the data exchange network is respectively used as a target output port corresponding to the input data of one input port.
The method of the embodiment determines the state value of each switching node according to the validity indication signal of at least one input port associated with each switching node, and on the basis, the working state configured for one switching node can control the switching link path of input data of one or more input ports, so that the switching of any path from N input ports to M output ports can be realized by using fewer connecting lines and comparators, the cost of a data switching network is reduced, and the resource use efficiency is improved.
In an embodiment, the method further comprises:
step 200: and determining the association relationship between each switching node and the input port according to the connection mode of the switching nodes in the data switching network.
In this embodiment, the switching nodes in the data switching network have a certain connection mode, and on this basis, the switching nodes at each level in the data switching network have a certain connection relationship. For example, adjacent two stages of switching nodes are connected in an inverse uniform shuffling mode; or, the l-th stage switching node and the l + 1-th stage switching node are respectively equally divided into X l The inside of the part corresponding to the l +1 stage exchange node is connected in a reverse and uniform shuffling mode; or, the binary address of the l-th stage switching node is circularly shifted by one bit to the right, namely, the binary address corresponding to the next stage switching node, and the like. Based on the determination of the association relationship between the switching node and the input port, the state value of the switching node can be determined according to the associated input end in the data exchange process, and a reliable switching link path is provided for the input data of the input port.
In one embodiment, the connection mode includes: adjacent two stages of switching nodes in the data switching network are connected in a reverse uniform shuffling mode, and the reverse uniform shuffling mode meets the following requirements: the binary address of the input port of the next stage switching node is the result of the cyclic right shift by one bit of the binary address of the output port of the previous stage switching node connected thereto. On the basis, the distribution of each switching node in the data switching network is more uniform, and the switching path of data among different switching nodes is more flexible.
In an embodiment, the association relationship includes:
the y-th switching node in the x-th group of switching nodes of the l-th stage is associated with 2y-1 input ports of the switching node of the l-th stage;
wherein L is more than or equal to 1 and less than or equal to L,
Figure BDA0002963675910000101
1≤x≤X l l is the total number of stages of switching nodes in the data switching network, and the L-th stage of switching nodes is divided into X l Group X l =2 l-1
In this embodiment, the switching nodes are divided into multiple stages and multiple groups, the state value of each switching node can be obtained through operation according to the validity indication signal of at least one input port associated with the switching node, and the state value configured for one switching node can affect the switching link path of input data of one or more input ports, so that the number of connecting lines and comparators used is reduced, the cost of a data switching network is reduced, and the resource use efficiency is improved.
In one embodiment, step 210 includes:
for a first switching node in the xth group of switching nodes of the l level, carrying out negation operation on the value of the validity indication signal of an input port associated with the switching node to obtain the state value of the switching node;
for the y-th switching node in the x-th group of switching nodes of the l-th level, carrying out exclusive OR operation on the values of the validity indication signals of 2y-1 input ports associated with the switching node to obtain the value of the switching nodeThe status value is a value that indicates, among other things,
Figure BDA0002963675910000111
the embodiment can distinguish the switching nodes associated with one or more input ports to perform different operations, improves the reliability of the state values of the switching nodes, further realizes the switching of any path from the N input ports to the M output ports, and improves the resource utilization efficiency.
The data exchange method proposed by this embodiment and the data exchange system proposed by the above embodiment belong to the same inventive concept, and the technical details that are not described in detail in this embodiment can be referred to any of the above embodiments, and this embodiment has the same beneficial effects as the data exchange method is performed.
The embodiments of the present application further provide a storage medium, where a computer program is stored, and when the computer program is executed by a processor, the data exchange method in any of the embodiments of the present application is implemented. The method comprises the following steps: configuring a state value of a corresponding switching node according to a validity indication signal of an input port associated with each switching node in a data switching network, wherein at least one switching node is associated with a plurality of input ports; and transmitting the input data of each input port to a corresponding destination output port through each switching node according to the state value of each switching node.
The computer storage media of the embodiments of the present application may take any combination of one or more computer-readable media. The computer readable medium may be a computer readable signal medium or a computer readable storage medium. The computer-readable storage medium may be, for example, but is not limited to: an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples (a non-exhaustive list) of the computer readable storage medium would include the following: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a Read Only Memory (ROM), an Erasable Programmable Read Only Memory (EPROM), a flash Memory, an optical fiber, a portable CD-ROM, an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. A computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
A computer readable signal medium may include a propagated data signal with computer readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated data signal may take a variety of forms, including, but not limited to: an electromagnetic signal, an optical signal, or any suitable combination of the foregoing. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.
Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to: wireless, wire, fiber optic cable, Radio Frequency (RF), etc., or any suitable combination of the foregoing.
Computer program code for carrying out operations for aspects of the present application may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, Smalltalk, C + +, or a conventional procedural programming language such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet service provider).
The above description is only exemplary embodiments of the present application, and is not intended to limit the scope of the present application.
It will be clear to a person skilled in the art that the term user terminal covers any suitable type of wireless user equipment, such as a mobile phone, a portable data processing device, a portable web browser or a car mounted mobile station.
In general, the various embodiments of the application may be implemented in hardware or special purpose circuits, software, logic or any combination thereof. For example, some aspects may be implemented in hardware, while other aspects may be implemented in firmware or software which may be executed by a controller, microprocessor or other computing device, although the application is not limited thereto.
Embodiments of the application may be implemented by a data processor of a mobile device executing computer program instructions, for example in a processor entity, or by hardware, or by a combination of software and hardware. The computer program instructions may be assembly instructions, Instruction Set Architecture (ISA) instructions, machine-related instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages.
The block diagrams of any logic flows in the figures of this application may represent program steps, or may represent interconnected logic circuits, modules, and functions, or may represent a combination of program steps and logic circuits, modules, and functions. The computer program may be stored on a memory. The memory may be of any type suitable to the local technical environment and may be implemented using any suitable data storage technology, such as, but not limited to, Read-Only Memory (ROM), Random Access Memory (RAM), optical storage devices and systems (Digital versatile disks (DVD), Compact Disks (CD)), etc., computer readable media may comprise non-transitory storage media, data processors may be of any type suitable to the local technical environment, such as, but not limited to, general purpose computers, special purpose computers, microprocessors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Programmable logic devices (FGPAs), and processors based on a multi-core processor architecture.
The foregoing has provided by way of exemplary and non-limiting examples a detailed description of exemplary embodiments of the present application. Various modifications and adaptations to the foregoing embodiments may become apparent to those skilled in the relevant arts in view of the accompanying drawings and the appended claims, without departing from the scope of the application. Accordingly, the proper scope of the application is to be determined according to the claims.

Claims (15)

1. A data exchange system, comprising: the data exchange network is connected with the control module;
the control module is used for configuring a state value of a corresponding switching node according to an effectiveness indication signal of an input port associated with each switching node in the data switching network, wherein at least one switching node is associated with a plurality of input ports;
and the data switching network is used for transmitting the input data of the input ports to the corresponding target output ports step by step according to the state value of each switching node.
2. The system of claim 1, wherein the data switching network includes N input ports, M output ports, and L stages of switching nodes, M and N each being an integer greater than 2; the adjacent two stages of switching nodes are connected in an inverse uniform shuffling mode, and the inverse uniform shuffling mode meets the following requirements: the binary address of the input port of the next stage switching node is the result of the cyclic right shift by one bit of the binary address of the output port of the previous stage switching node connected thereto.
3. The system of claim 2, wherein each stage of switching nodes comprises P switching nodes;
when N is a power of 2 and N is greater than or equal to M, L is log 2 (N),P=N/2;
In the case where M is a power of 2 and N < M, L is log 2 (M),P=M/2;
When N is not a power of 2 and N' is not less than M, L is log 2 (N’),P=N’/2;
In the case where M is a power of a power other than 2 and N < M', L is log 2 (M’),P=M’/2;
Wherein N' is a value with the minimum value in the values which are larger than N and satisfy the power of 2;
m' is the smallest value among values that are larger than M and satisfy the power of 2.
4. The system of claim 2, wherein the class I switching node is divided into X l Group X l =2 l-1
The y-th switching node in each group is associated with 2y-1 input ports of the l-th stage switching node,
Figure FDA0002963675900000011
1≤l≤L。
5. system according to claim 4, characterized in that the input ports of the stage I switching nodes are divided into X l Group (d);
the y-th switching node in each group is associated with the 1 st to 2y-1 st input ports of the corresponding group of the l-th stage switching nodes, wherein the input ports are arranged in the order of port numbers.
6. The system of claim 4, wherein the class I switching nodes and the class I +1 switching nodes are equally divided by X l The first-level exchange node and the part corresponding to the (L + 1) -level exchange node are connected by a reverse uniform shuffling mode, and L is more than or equal to 1 and less than or equal to L-1; the reverse uniform shuffling mode meets the following requirements: corresponding to the l +1 st level exchange node at the l level exchange nodeInside part, the binary address of the input port of the next stage switching node is the result of the cyclic right shift of the binary address of the output port of the previous stage switching node connected to it by one bit.
7. The system of claim 4, wherein the control module is configured to:
for a first switching node in the xth group of switching nodes of the l level, carrying out negation operation on the value of the validity indication signal of an input port associated with the switching node to obtain the state value of the switching node;
for the y-th switching node in the x-th group of switching nodes of the l-th level, carrying out exclusive OR operation on the values of the validity indication signals of 2y-1 input ports associated with the switching node to obtain the state value of the switching node;
wherein X is more than or equal to 1 and less than or equal to X l
Figure FDA0002963675900000012
8. The system of claim 2, further comprising:
the data receiving module is used for receiving output data of the data switching network;
the data receiving module comprises M receiving ports, each receiving port is connected with one corresponding output port, and binary numbers of port numbers of the connected output ports and the receiving ports meet the overturning relation.
9. The system of claim 8, wherein the data receiving module is configured to:
and under the condition that the validity indication signal of the data sent by the output port is valid, receiving the input data through the connected receiving port, and discarding the data with the invalid validity indication signal.
10. A method of data exchange, comprising:
configuring a state value of a corresponding switching node according to a validity indication signal of an input port associated with each switching node in a data switching network, wherein at least one switching node is associated with a plurality of input ports;
and transmitting the input data of each input port to a corresponding destination output port through each switching node according to the state value of each switching node.
11. The method of claim 10, further comprising:
and determining the association relationship between each switching node and the input port according to the connection mode of the switching nodes in the data switching network.
12. The method of claim 11, wherein the connecting means comprises:
the adjacent two stages of switching nodes in the data switching network are connected in a reverse uniform shuffling mode, and the reverse uniform shuffling mode meets the following requirements: the binary address of the input port of the next stage switching node is the result of the cyclic right shift by one bit of the binary address of the output port of the previous stage switching node connected thereto.
13. The method of claim 11, wherein the associating comprises:
the y-th switching node in the x-th group of switching nodes of the l-th stage is associated with 2y-1 input ports of the switching node of the l-th stage;
wherein L is more than or equal to 1 and less than or equal to L,
Figure FDA0002963675900000021
1≤x≤X l l is the total number of stages of switching nodes in the data switching network, and the L-th stage of switching nodes is divided into X l Group X l =2 l-1
14. The method of claim 13, wherein configuring the status value of each switching node in the data switching network based on the validity indication signal of the input port associated with the corresponding switching node comprises:
for a first switching node in the xth group of switching nodes of the l level, carrying out negation operation on the value of the validity indication signal of an input port associated with the switching node to obtain the state value of the switching node;
for the y-th switching node in the x-th group of switching nodes of the l-th level, carrying out exclusive-nor operation on the values of the validity indication signals of 2y-1 input ports associated with the switching node to obtain the state value of the switching node,
Figure FDA0002963675900000022
15. a computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the data exchange method according to any one of claims 10 to 14.
CN202110244742.9A 2021-03-05 2021-03-05 Data exchange system, method and storage medium Pending CN115102914A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN202110244742.9A CN115102914A (en) 2021-03-05 2021-03-05 Data exchange system, method and storage medium
PCT/CN2021/133216 WO2022183789A1 (en) 2021-03-05 2021-11-25 Data exchange system and method, and storage medium

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110244742.9A CN115102914A (en) 2021-03-05 2021-03-05 Data exchange system, method and storage medium

Publications (1)

Publication Number Publication Date
CN115102914A true CN115102914A (en) 2022-09-23

Family

ID=83154928

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110244742.9A Pending CN115102914A (en) 2021-03-05 2021-03-05 Data exchange system, method and storage medium

Country Status (2)

Country Link
CN (1) CN115102914A (en)
WO (1) WO2022183789A1 (en)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7609695B2 (en) * 2001-06-15 2009-10-27 Industrial Technology Research Institute Optimizing switching element for minimal latency
US7505458B2 (en) * 2001-11-27 2009-03-17 Tellabs San Jose, Inc. Apparatus and method for a fault-tolerant scalable switch fabric with quality-of-service (QOS) support
CN100514933C (en) * 2005-01-25 2009-07-15 南开大学 Communicating network exchanging system and controlling method based on parallel buffer structure
WO2010045732A1 (en) * 2008-10-20 2010-04-29 Tadeusz Szymanski Crossbar switch and recursive scheduling
CN105099565B (en) * 2014-04-16 2018-04-10 华为技术有限公司 A kind of light emission system and launching technique, optic switching device and control method

Also Published As

Publication number Publication date
WO2022183789A1 (en) 2022-09-09

Similar Documents

Publication Publication Date Title
CN113630347A (en) Data transmission method, system, storage medium and equipment
CN105187050A (en) Configurable five-input look-up-table circuit
WO2022199459A1 (en) Reconfigurable processor and configuration method
US10476492B2 (en) Structures and operations of integrated circuits having network of configurable switches
CN109687877B (en) Method and device for reducing cascade stage number of multistage cyclic shift network
CN109144472B (en) Scalar multiplication of binary extended field elliptic curve and implementation circuit thereof
CN115102914A (en) Data exchange system, method and storage medium
CN115145639B (en) Data shifting method, system, computer equipment and readable storage medium
JP2015503785A (en) FFT / DFT reverse sorting system, method, and operation system thereof
CN108243113B (en) Random load balancing method and device
CN102130744A (en) Method and device for computing Cyclic Redundancy Check (CRC) code
CN103488611B (en) Fft processor based on IEEE802.11.ad agreement
CN113342719B (en) Operation acceleration unit and operation method thereof
CN113900713B (en) Coarse-grained reconfigurable array parallel instruction configuration device and processor
CN114006862B (en) Message forwarding method, device and equipment and computer storage medium
Shahida et al. Fast Zerox algorithm for routing in optical Multistage interconnection networks
CN110633574B (en) Elliptic curve cryptography ECC (error correction code) encryption module for power system safety transmission
Bistouni et al. Reliability analysis of fault-tolerant bus-based interconnection networks
CN113504892A (en) Method, system, equipment and medium for designing multiplier lookup table
CN114510217A (en) Method, device and equipment for processing data
CN102064836B (en) Special comparing unit and low density parity check (LDPC) code check node arithmetic circuit
WO2021258954A1 (en) Data processing apparatus and data processing method
Francalanci et al. High-performance self-routing algorithm for multiprocessor systems with shuffle interconnections
WO2021110056A1 (en) Data processing method, apparatus and device and storage medium
WO2021022441A1 (en) Data transmission method and device, electronic device and readable storage medium

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination