CN114975401A - Packaging structure and electronic equipment - Google Patents

Packaging structure and electronic equipment Download PDF

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Publication number
CN114975401A
CN114975401A CN202210411506.6A CN202210411506A CN114975401A CN 114975401 A CN114975401 A CN 114975401A CN 202210411506 A CN202210411506 A CN 202210411506A CN 114975401 A CN114975401 A CN 114975401A
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China
Prior art keywords
substrate
chip
module
package structure
packaging
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CN202210411506.6A
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Chinese (zh)
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徐芳菲
薛建瑞
廖小景
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Huawei Digital Power Technologies Co Ltd
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Huawei Digital Power Technologies Co Ltd
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Priority to CN202210411506.6A priority Critical patent/CN114975401A/en
Publication of CN114975401A publication Critical patent/CN114975401A/en
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00Arrangements for thermal protection or thermal control
    • H10W40/20Arrangements for cooling
    • H10W40/22Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

本申请涉及电子设备技术领域,公开了一种封装结构及电子设备,以减小封装结构的体积,解决封装结构在电子设备内部占板面积过大的问题。封装结构包括第一模块、第二模块、导电件以及封装胶,第一模块包括第一基板和第一芯片,第一芯片设置于第一基板;第二模块包括第二基板、第二芯片,第二基板与第一基板相对且相间隔设置,第二芯片设置于第二基板,引脚的第一端与第二基板朝向第一基板的一面电连接;导电件设置于第一基板与第二基板之间,导电件用于将第一模块与第二模块电连接;封装胶至少填充于第一基板与第二基板之间,引脚的第二端延伸至封装胶的外部。

Figure 202210411506

The present application relates to the technical field of electronic equipment, and discloses a package structure and electronic equipment, so as to reduce the volume of the package structure and solve the problem that the package structure occupies an excessively large board area inside the electronic equipment. The packaging structure includes a first module, a second module, a conductive member and a packaging glue, the first module includes a first substrate and a first chip, the first chip is arranged on the first substrate; the second module includes a second substrate and a second chip, The second substrate is opposite to and spaced apart from the first substrate, the second chip is arranged on the second substrate, the first ends of the pins are electrically connected to the side of the second substrate facing the first substrate; the conductive member is arranged on the first substrate and the first substrate. Between the two substrates, the conductive member is used to electrically connect the first module and the second module; the encapsulation glue is filled at least between the first substrate and the second substrate, and the second ends of the pins extend to the outside of the encapsulation glue.

Figure 202210411506

Description

Packaging structure and electronic equipment
Technical Field
The present application relates to the field of electronic devices, and in particular, to a package structure and an electronic device.
Background
In order to reduce the complexity of the internal module structure of the electronic device, some electronic devices often integrate two or more functional modules into the same package structure during design, for example, a common package structure integrates two modules, namely a power module and a driving module, the power module and the driving module are interconnected, and the driving module can be used to control the power module, so as to realize the intellectualization of the module, and therefore, the package structure is also called as an intelligent module. Among the current intelligent module of industry, drive module and power module are mostly planar layout, also arrange on same circuit board drive module and power module, lead to packaging structure at the inside board area that accounts for of electronic equipment too big, are unfavorable for electronic equipment's miniaturized design.
Disclosure of Invention
The application provides a packaging structure and electronic equipment to reduce packaging structure's volume, solve packaging structure and account for the too big problem of face area inside electronic equipment.
In a first aspect, the present application provides a package structure, which may include a first module, a second module, a conductive member, and a package adhesive. The first module can comprise a first substrate and a first chip, wherein the first chip is arranged on the first substrate; the second module can comprise a second substrate, a second chip and pins, wherein the second substrate is arranged opposite to the first substrate and spaced from the first substrate, the second chip is arranged on the second substrate, and the first ends of the pins are electrically connected with one surface of the second substrate facing the first substrate; the conductive piece can be arranged between the first substrate and the second substrate and used for electrically connecting the first module and the second module; the packaging adhesive can be at least filled between the first substrate and the second substrate and wraps the conductive piece, so that the electric connection reliability of the first module and the second module is ensured. The second ends of the pins can extend to the outside of the packaging adhesive so as to connect the second module with a circuit outside the packaging structure.
In the above scheme, through piling up the encapsulation with first module and second module, can effectively reduce packaging structure's volume to can reduce packaging structure's tiling area, and then solve packaging structure at the inside too big problem of occupation of area of electronic equipment.
In some possible embodiments, the conductive member may be made of metal. Based on the high heat conduction characteristic of metal, the conductive piece can transfer heat between the first module and the second module, so that the heat of the module which generates heat seriously relatively is transferred to the other module, the other module also bears partial heat dissipation function of the packaging structure, and the packaging structure realizes the effect of double-sided heat dissipation.
In some possible embodiments, the package structure may further include a heat sink, and the heat sink may be disposed on a surface of the second substrate facing away from the first substrate to dissipate heat of the second module, so as to improve heat dissipation performance of the package structure.
In some possible embodiments, the first chip may be disposed on a side of the first substrate facing the second substrate. At this time, the first chip can be wrapped by the packaging adhesive, so that the first chip is protected.
Illustratively, the first chip may be disposed on the first substrate by a die attach or surface mount technology.
In other possible embodiments, the first chip may be embedded in the first substrate. In a specific implementation, before the sub-boards of the first substrate are bonded, the first chip may be disposed in the opening disposed in a middle layer or some layers of sub-boards.
In some possible embodiments, the second chip may be disposed on a side of the second substrate facing the first substrate. At this moment, the packaging structure can wrap the second chip inside at the same time, so that the protection effect on the second chip is realized.
Illustratively, the second chip may be electrically interconnected to the second substrate by a wire bonding process.
In some possible embodiments, the conductive member may be a metal pillar. The cross-sectional area of the metal column is relatively large, so that the heat conduction efficiency is high, and the heat dissipation performance of the packaging structure is favorably improved.
When the conductive member is a metal column, a first pad may be disposed on a surface of the first substrate facing the second substrate, a second pad may be disposed on a surface of the second substrate facing the first substrate, and two ends of the conductive member may be electrically connected to the first pad and the second pad, respectively, so that an electrical connection is established between the first module and the second module.
In other possible embodiments, the conductive member may also be a metal strip or a metal wire. At this time, a first bonding pad may be disposed on a surface of the first substrate facing the second substrate, a signal port may be disposed on the second chip, and two ends of the conductive member may be electrically connected to the first bonding pad and the signal port, respectively, so as to electrically connect the first module and the second module.
In some possible embodiments, the first chip may be a driving chip, and the second chip may be a power chip. At this moment, through the electric connection effect of the conductive piece, when the second module is abnormal, such as overload or even short circuit, or overheating temperature, the first module can adjust the output parameter of the second module, or control the second module to be switched off, thereby improving the electric working stability of the second module.
In some possible embodiments, the encapsulation adhesive may wrap at least a portion of the first substrate, and a side of the first substrate facing away from the second substrate may be exposed outside the encapsulation adhesive, so as to electrically connect the first substrate with a circuit outside the package structure.
Similarly, the encapsulation adhesive may also wrap at least a portion of the second substrate, and a side of the second substrate facing away from the first substrate may be exposed outside the encapsulation adhesive. Therefore, when the package structure further comprises the radiator, the heat transfer efficiency between the second substrate and the radiator can be improved, and the heat radiation performance of the package structure is improved.
In a second aspect, the present application further provides a method for manufacturing a package structure, where the method includes:
arranging a first chip on a first substrate to form a first module;
arranging a second chip on a second substrate, and electrically connecting the first ends of the pins with the second substrate to form a second module;
electrically connecting a conductive piece with the first module and the second module respectively, wherein the conductive piece is arranged between the first substrate and the second substrate which are opposite in position;
and filling packaging glue between the first substrate and the second substrate, and extending the second ends of the pins to the outside of the packaging glue.
The packaging structure manufactured by the method can effectively reduce the volume of the packaging structure by stacking and packaging the first module and the second module, so that the board distribution area of the packaging structure can be reduced, and the problem that the board occupied area of the packaging structure in the electronic equipment is too large is solved.
In some possible embodiments, disposing the first chip on the first substrate may specifically include:
the first chip is arranged on one side of the first substrate, and the side, provided with the first chip, of the first substrate faces the second substrate.
In some other possible embodiments, disposing the first chip on the first substrate may specifically include:
the first chip is embedded in the first substrate.
In a third aspect, the present application further provides an electronic device, where the electronic device may include a circuit board and the package structure in the foregoing embodiment, the circuit board may be provided with a third pad, and the second end of the pin may be electrically connected to the third pad, and then connected to another device through the third pad and a trace on the circuit board in sequence, so as to implement connection between the second module and the external circuit. The packaging structure occupies a relatively small area on the surface inside the electronic equipment, so that the electronic equipment is favorably miniaturized.
Drawings
Fig. 1 is a schematic structural diagram of a package structure according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of another package structure provided in the embodiment of the present application;
fig. 3 is a schematic structural diagram of another package structure provided in the embodiment of the present application;
fig. 4 is a schematic structural diagram of another package structure provided in the embodiment of the present application;
fig. 5 is a flowchart illustrating a manufacturing process of a package structure according to an embodiment of the present disclosure;
fig. 6 is a flowchart illustrating a manufacturing process of another package structure according to an embodiment of the present disclosure;
fig. 7 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Reference numerals:
1-packaging the structure; 100-a first module; 110-a first substrate; 120-a first chip; 111-a first pad;
200-a second module; 210-a second substrate; 211-second pads; 220-a second chip; 230-pin;
231-first ends of pins; 232-second end of pin; 300-a conductive member; 400-packaging glue; 500-a heat sink;
510-a fin; 600-thermally conductive interface material; 2-circuit board.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more clear, the present application will be further described in detail with reference to the accompanying drawings. It should be noted that, in the description of the present application, the terms "first", "second", and the like are used for distinguishing between descriptions and are not intended to indicate or imply relative importance nor order to indicate or imply order. Reference throughout this specification to "one embodiment" or "some embodiments," or the like, means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the present application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," or the like, in various places throughout this specification are not necessarily all referring to the same embodiment, but rather "one or more but not all embodiments" unless specifically stated otherwise. The terms "comprising," "including," "having," and variations thereof mean "including, but not limited to," unless expressly specified otherwise.
At present, in some electronic devices, two or more functional modules are often integrated in the same package structure, so as to improve the integration level of the modules, and simultaneously facilitate the internal structure of the electronic device to reduce the structural complexity. A common package structure integrates a power module and a driving module, the power module and the driving module are interconnected, and the driving module can be used to control the power module, so as to realize the intelligentization of the module, and therefore, the package structure is also called as an intelligent module. In the intelligent module, when the power module has abnormal working conditions such as overlarge current or voltage, the driving module can control the power module to reduce output current or voltage or control the power module to stop working so as to ensure the electrical stability of the power module and improve the common working reliability of the electronic equipment.
Among the current intelligent module of industry, drive module and power module are mostly planar layout, also both arrange on same circuit board promptly, can cause on the one hand like this to account for the face area too big, are unfavorable for realizing electronic equipment's miniaturized design, and on the other hand, although intelligent module can be more compact structurally, nevertheless the part generates heat seriously, and the problem of failure by generating heat and lead to has become the bottleneck of intelligent module development.
In view of this, an embodiment of the present application provides a package structure and an electronic device using the package structure, where the package structure stacks and packages two functional modules to achieve the purpose of reducing a size, and further solve the problem that the area occupied by the package structure in the electronic device is too large. In addition, the package structure can realize double-sided heat dissipation by stacking the packages, thereby being beneficial to improving the heat dissipation performance of the package structure. The following describes a package structure provided in an embodiment of the present application in detail with reference to the accompanying drawings.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a package structure according to an embodiment of the present disclosure. In the embodiment of the present application, the package structure 1 may include a first module 100, a second module 200, and a conductive member 300, and the conductive member 300 may be used to electrically connect the first module 100 and the second module 200. The first module 100 may include a first substrate 110 and a first chip 120, where the first substrate 110 serves as a package carrier of the first chip 120 and may provide electrical connection, protection, support, heat dissipation, assembly, and the like for the first chip 120. Similarly, the second module 200 may include a second substrate 210 and a second chip 220, and the second substrate 210 serves as a package carrier of the second chip 220 and may provide electrical connection, protection, support, heat dissipation, assembly, and the like for the second chip 220. Illustratively, the first chip 120 may be a driving chip, and the second chip 220 may be a power chip. In this case, the first module 100 and the second module 200 are a driving module and a power module, respectively. Through the electrical connection function of the conductive member 300, when the power module is abnormal, for example, an overload or even a short circuit occurs, or the temperature is too hot, the driving module may adjust the output parameter of the power module, or control the power module to turn off, thereby improving the electrical operation stability of the power module.
In addition, the second module 200 may further include a pin 230, and a first end 231 of the pin 230 may be electrically connected to the second substrate 210 and further electrically connected to the second chip 220 through a circuit disposed on the second substrate 210; the second ends 232 of the pins 230 may extend to the outside of the second substrate 210, and the second ends 232 of the pins 230 may be electrically connected to an external circuit of the package structure 1, so as to electrically connect the second chip 220 to the external circuit.
It should be noted that, when the second chip 220 is a power chip, in consideration of the high requirement of the power chip for heat dissipation, in a specific implementation, the second substrate 210 may adopt a copper-clad ceramic substrate (DBC) so as to utilize the excellent heat conductivity of the DBC to dissipate heat generated by the second chip 220 during operation to the outside as soon as possible. Of course, when the power of the second chip 220 is relatively small and the generated heat is relatively limited, or the second chip 220 is other chips with relatively low requirement for heat dissipation, the second substrate 210 may also be a common circuit board, and in this case, the second substrate 210 may be a hard circuit board, a flexible circuit board, or a rigid-flex circuit board. The second substrate 210 may be an FR-4 dielectric board, a Rogers (Rogers) dielectric board, a hybrid FR-4 and Rogers dielectric board, or the like.
Similarly, the first substrate 110 may be a rigid circuit board, a flexible circuit board, or a rigid-flex circuit board. The first substrate 110 may be an FR-4 dielectric board, a Rogers (Rogers) dielectric board, a hybrid FR-4 and Rogers dielectric board, or the like.
Referring to fig. 1, in the present embodiment, the first substrate 110 and the second substrate 210 may be disposed opposite to each other, and the first substrate 110 and the second substrate 210 may be spaced apart from each other. When the first module 100 and the second module 200 are electrically connected, the conductive member 300 may be disposed between the first substrate 110 and the second substrate 210. At this time, the first substrate 110 and the second substrate 210 may be further filled with a packaging adhesive 400, on one hand, the packaging adhesive 400 may wrap the conductive member 300 to ensure the electrical connection reliability between the conductive member 300 and the first module 100 and the second module 200, on the other hand, the first substrate 110 and the second substrate 210 may be supported, and the relative position between the first substrate 110 and the second substrate 210 is fixed, so that the first module 100 and the second module 200 are formed into a whole, and the stack packaging of the first module 100 and the second module 200 is realized, so that the tiled area of the package structure 1 may be reduced, and the problem that the occupied area of the package structure 1 in the electronic device is too large is solved. It is verified that the board layout area of the package structure 1 provided in this embodiment can be reduced by more than 15% compared to the conventional scheme of planar layout of two modules.
It should be noted that, when the first substrate 110 and the second substrate 210 are disposed oppositely, the surface of the second substrate 210 connected to the first ends 231 of the pins 230 may be specifically made to face the first substrate 110, which is not only helpful for reducing the overall volume of the package structure 1, but also helps to wrap the first ends 231 of the pins 230 in the package adhesive 400, so as to improve the reliability of the electrical connection between the pins 230 and the second substrate 210.
In addition, the encapsulation adhesive 400 may also wrap or partially wrap the first substrate 110 to protect the circuit on the surface of the first substrate 110 and other components. Similarly, the encapsulation adhesive 400 may also wrap or partially wrap the second substrate 210 to protect the circuits on the surface of the second substrate 210 and other components disposed thereon.
In some embodiments, the first chip 120 may be disposed on a side surface of the first substrate 110 facing the second substrate 210. At this time, the first chip 120 may be fixed on the first substrate 110 by Die Bonding (DB), and the particular die bonding method includes, but is not limited to, resin bonding, eutectic soldering, lead-tin alloy soldering, and the like. Alternatively, the first chip 120 may be disposed on the first substrate 110 through Surface Mount Technology (SMT). The arrangement manner of the first chip 120 on the surface of the first substrate 110 is not specifically limited in the present application, and in practical applications, an appropriate manner may be selected according to the packaging requirements for implementation, which is not described herein again.
The second chip 220 may also be disposed on a side surface of the second substrate 210 facing the first substrate 110. Illustratively, the second chip 220 may be electrically interconnected with the second substrate 210 through a Wire Bonding (WB) process. When electrically connecting the second chip 220 to the second substrate 210, in some embodiments, one end of a metal wire (not shown in the figure) may be electrically connected to a signal port on the second chip 220, and the other end of the metal wire may be electrically connected to a pad on the second substrate 210, which in turn may be electrically connected to the first end 231 of the pin 230 through a trace on the second substrate 210, so as to interconnect the second chip 220 with an external circuit through the pin 230.
In some other embodiments, the second module may further include a lead frame, and the lead frame may be disposed on a side surface of the second substrate facing the first substrate, so that a receiving cavity may be formed between the lead frame and the second substrate, and the second chip may be disposed in the receiving cavity. At this time, the pin can be embedded on the lead frame, the first end of the pin is exposed at the inner side of the accommodating cavity, one end of the metal wire is electrically connected with the signal port on the second chip, and the other end of the metal wire can be directly electrically connected with the first end of the pin.
Referring to fig. 2, fig. 2 is a schematic structural diagram of another package structure according to an embodiment of the present disclosure. In this embodiment, the first chip 120 may also be embedded in the first substrate 110. In a specific implementation, the first substrate 110 may be a multi-layer board, an opening may be disposed on one or more middle layers of the first substrate 110, the first chip 120 is disposed in the opening in advance before the sub-boards of the first substrate 110 are laminated, during the laminating process, the inter-layer semi-cured resin flows into the opening after melting, and the gap between the first chip 120 and the opening is filled, so that the first chip 120 is fixed in the first substrate 110. At this time, the first chip 120 may be electrically connected to both side surfaces of the first substrate 110 through the via hole formed on the first substrate 110, so as to connect the first chip 120 with the external circuit of the first module 100.
In the embodiment of the present application, when the conductive elements 300 are specifically disposed, the number of the conductive elements 300 may be one or more, which is not limited in the present application, and is specifically designed according to the communication requirement between the first module 100 and the second module 200. The conductive member 300 may be made of a metal material having good conductivity, such as, but not limited to, copper or aluminum. It can be understood that, based on the high thermal conductivity of metal, the conductive member 300 may transfer heat between the first module 100 and the second module 200, in addition to electrically connecting the first module 100 and the second module 200, so as to transfer heat of the relatively serious module to the other module, and enable the other module to also take part in the heat dissipation function of the package structure 1. For example, in this embodiment, when the first chip 120 is a driving chip and the second chip 220 is a power chip, the heat generated by the second chip 220 during operation is much greater than the heat generated by the first chip 120 during operation, so that the temperature of the second module 200 is higher than the temperature of the first module 100, and at this time, a part of the heat of the second module 200 can be dissipated to the outside through the second substrate 210, and another part of the heat can be transferred to the first module 100 through the conductive member 300 and dissipated to the outside through the first module 100, thereby achieving the effect of double-sided heat dissipation. Compared with the design of two module plane layouts in the prior art, the package-on-package manner in the embodiment can increase the heat dissipation path of the package module, thereby being beneficial to improving the heat dissipation performance of the package module.
Referring to fig. 2 again, in some embodiments, the conductive member 300 may be a metal pillar. At this time, when the first module 100 and the second module 200 are electrically connected by using the conductive members 300, a first pad 111 may be disposed on a surface of the first substrate 110 facing the second substrate 210, and the first pad 111 may be electrically connected to the first chip 120 by a trace disposed on the first substrate 110; a side of the second substrate 210 facing the first substrate 110 may be provided with second pads 211, and the second pads 211 may be electrically connected to the second chip 220 through traces arranged on the second substrate 210. One end of the conductive member 300 is electrically connected to the first pad 111 and the other end is electrically connected to the second pad 211, thereby establishing an electrical connection relationship between the first module 100 and the second module 200 so that they can communicate with each other.
Referring to fig. 3, fig. 3 is a schematic structural diagram of another package structure according to an embodiment of the disclosure. In this embodiment, the conductive member 300 may also be a metal strip, and in this case, the first module 100 and the second module 200 may be electrically connected by a strip bond (CB). In practical implementation, one end of the conductive member 300 may be electrically connected to the first pad 111 on the first substrate 110, and electrically connected to the first chip 120 through a trace connected between the first pad 111 and the first chip 120, and the other end of the conductive member 300 may be directly electrically connected to a signal port on the second chip 220, so as to electrically connect the first module 100 and the second module 200.
Of course, in other embodiments, the conductive member 300 may also be a metal wire. Similar to the metal strip, when the conductive member 300 is a metal wire, the first module 100 and the second module 200 may be electrically connected by wire bonding, that is, one end of the conductive member 300 may be electrically connected to the first pad 111 on the first substrate 110, and the other end may be electrically connected to the signal port on the second chip 220, so as to electrically connect the first module 100 and the second module 200.
Referring to fig. 4, fig. 4 is a schematic structural diagram of another package structure according to an embodiment of the present disclosure. In this embodiment, the package structure 1 may further include a heat sink 500, where the heat sink 500 may be disposed on a surface of the second substrate 210 away from the first substrate 110, and after heat generated by the second chip 220 during operation is transferred to the second substrate 210, the heat may be further transferred to the heat sink 500 from the second substrate 210 and dissipated to the outside by the heat sink 500, so as to achieve heat dissipation and temperature reduction of the second chip 220. It should be noted that, in order to improve the heat transfer efficiency between the second substrate 210 and the heat sink 500, a surface of the second substrate 210 facing away from the first substrate 110 may be exposed outside the package adhesive 400, so as to prevent the package adhesive 400 from increasing the heat transfer resistance between the second substrate 210 and the heat sink 500.
In specific implementation, the heat sink 500 may be made of metal materials with good thermal conductivity, such as copper and aluminum, so as to improve the heat dissipation effect of the heat sink 500. In addition, a fin 510 may be further disposed on a side of the heat sink 500 away from the second substrate 210, so that an outer surface area of the heat sink 500 may be effectively increased, and thus a heat exchange efficiency between the heat sink 500 and the outside air is improved, and a heat dissipation effect of the heat sink 500 is further improved.
It can be understood that, in some other embodiments, the heat sink 500 may also be a water-cooling heat sink or an air-cooling heat sink with other structures, which is not limited in this application and may be specifically selected according to the heat dissipation requirement of the second chip 220, and redundant description is not repeated here.
With reference to fig. 4, in this embodiment, a thermal interface material 600 may be further disposed between a surface of the second substrate 210 away from the first substrate 110 and the heat sink 500, and the thermal interface material 600 may fill up a micro gap generated by surface unevenness when the second substrate 210 contacts the heat sink 500, so as to further reduce thermal resistance for heat transfer and improve a heat dissipation effect of the second chip 220.
The embodiment of the application also provides a manufacturing method of the packaging structure, which comprises the following steps:
arranging a first chip on a first substrate to form a first module;
arranging a second chip on a second substrate, and electrically connecting the first ends of the pins with the second substrate to form a second module;
electrically connecting a conductive piece with the first module and the second module respectively, wherein the conductive piece is arranged between the first substrate and the second substrate which are opposite in position;
and filling packaging glue between the first substrate and the second substrate, and extending the second ends of the pins to the outside of the packaging glue.
The packaging structure manufactured by the method can effectively reduce the volume of the packaging structure by stacking and packaging the first module and the second module, so that the board distribution area of the packaging structure can be reduced, and the problem that the board occupied area of the packaging structure in the electronic equipment is too large is solved.
In addition, the conductive member in this embodiment may be made of a metal material, and based on the high heat conductivity of metal, the conductive member may transfer heat between the first module and the second module, so as to transfer heat of a module that generates relatively severe heat to another module, so that the other module also takes part of the heat dissipation function of the package structure, and further, the package structure achieves the effect of double-sided heat dissipation.
In the above manufacturing method, when the first chip is disposed on the first substrate, the first chip may be fixedly connected to the first substrate in various ways according to different positions of the first chip on the first substrate, and two manufacturing methods of the package structure will be described in detail below by taking two packaging methods of the first chip as examples.
Referring to fig. 5, a method for manufacturing a package structure according to an embodiment of the present application includes the following steps:
the method comprises the following steps: the first chip 120 is disposed on the surface of the first substrate 110 to form the first module 100.
For example, the first chip 120 may be disposed on the first substrate 110 by chip mounting, or may also be disposed on the first substrate 110 by surface mount technology, chip packaging technology, solder ball array packaging technology, or grid array packaging technology, which is not limited in this application.
Step two: the second chip 220 is disposed on the surface of the second substrate 210, and the first ends 231 of the leads 230 are electrically connected to the surface of the second substrate 210 on which the second chip 220 is disposed, so as to form a second module.
Illustratively, the second chip 220 may be electrically interconnected with the second substrate 210 through a wire bonding process. Alternatively, the second chip 220 may be disposed on the second substrate 210 by a chip packaging technique, a solder ball array packaging technique, or a grid array packaging technique. The pins 230 may be used to electrically connect with an external circuit of the package structure, thereby electrically connecting the second chip 220 with the external circuit.
Step three: one end of the conductive member 300 is electrically connected to the second module 200, then the side of the first substrate 110 on which the first chip 120 is disposed toward the side of the second substrate 210 on which the second chip 220 is disposed, and finally the other end of the conductive member 300 is electrically connected to the first module 100.
In some embodiments, the conductive member 300 may be a metal pillar, in which case, a first pad 111 may be disposed on a surface of the first substrate 110 facing the second substrate 210, a second pad 211 may be disposed on a surface of the second substrate 210 facing the first substrate 110, and two ends of the conductive member 300 may be electrically connected to the first pad 111 and the second pad 211, respectively.
In other embodiments, the conductive member 300 may also be a metal strip or a metal wire, and in this case, one end of the conductive member 300 may be electrically connected to the signal port of the second chip 220, and the other end may be electrically connected to the first pad 111.
Step four: the packaging adhesive 400 is filled between the first substrate 110 and the second substrate 210, the second ends 232 of the pins 230 extend to the outside of the packaging adhesive, and after the packaging adhesive 400 is cured, the pins 230 are bent, so as to facilitate subsequent circuit connection with the outside of the packaging structure. The package adhesive 400 may encapsulate the first chip 120, the second chip 220, the conductive member 300, and the first end 231 of the pin 230 therein, thereby implementing the stacked package of the first module 100 and the second module 200, improving the structural reliability of the whole package structure formed by the first module 100 and the second module 200, and improving the electrical connection reliability between the first module 100 and the second module 200.
Referring to fig. 6, a method for manufacturing another package structure provided in the embodiment of the present application includes the following steps:
the method comprises the following steps: the first chip 120 is embedded in the first substrate 110 to form the first module 100.
In a specific implementation, the first substrate 110 may be a multi-layer board, an opening may be disposed on one or more layers of the first substrate 110, the first chip 120 may be disposed in the opening in advance, and then the sub-layers are bonded together. In the pressing process, the interlayer semi-cured resin flows into the opening after melting, and fills the gap between the first chip 120 and the opening, so as to fix the first chip 120 in the first substrate 110. The first chip 120 may be electrically connected to both side surfaces of the first substrate 110 through a via hole on the first substrate 110, so as to connect the first chip 120 with a circuit outside the first module 100.
Step two: the second chip 220 is disposed on the surface of the second substrate 210, and the first ends 231 of the leads 230 are electrically connected to the surface of the second substrate 210 on which the second chip 220 is disposed, so as to form a second module.
The method for disposing the second chip on the second substrate can refer to the foregoing manufacturing method, and details are not repeated here.
Step three: one end of the conductive member 300 is electrically connected to the second module 200, then the side of the first substrate 110 on which the first chip 120 is disposed toward the side of the second substrate 210 on which the second chip 220 is disposed, and finally the other end of the conductive member 300 is electrically connected to the first module 100.
The conductive member 300 may be a metal pillar, a metal strip or a metal wire, and the specific electrical connection manner between the conductive member 300 and the first module 100 and the second module 200 may refer to the foregoing manufacturing method.
Step four: the packaging adhesive 400 is filled between the first substrate 110 and the second substrate 210, the second ends 232 of the pins 230 extend to the outside of the packaging adhesive, and after the packaging adhesive 400 is cured, the pins 230 are bent, so as to facilitate subsequent circuit connection with the outside of the packaging structure. The package adhesive 400 may encapsulate the second chip 220, the conductive member 300, and the first ends 231 of the pins 230 therein, thereby implementing stacked package of the first module 100 and the second module 200, improving the structural reliability of the whole package structure formed by the first module 100 and the second module 200, and improving the electrical connection reliability between the first module 100 and the second module 200.
Referring to fig. 7, an embodiment of the present application further provides an electronic device, where the electronic device may be a high-power supply applied in multiple fields such as a power system, a data center, an electric vehicle, or a new energy source, for example, an inverter, a vehicle-mounted charger, and the like. The electronic device may include a circuit board 2 and the package structure 1 in any of the embodiments, where the package structure 1 is disposed on the circuit board 2. The area of the circuit board 2 that avoids the package structure 1 may be provided with a third pad 21, and the second end 232 of the pin 230 of the first module 100 may be electrically connected to the third pad 21, and further connected to other devices through the third pad 21 and the traces on the circuit board 2 in sequence, so as to implement the connection between the second module 200 and the external circuit.
In some embodiments, when the package structure 1 is disposed on the circuit board 2, the first module 100 may be located on a side close to the circuit board 2, and the second module 200 is located on a side of the first module 100 away from the circuit board 2, where the first substrate 110 of the first module 100 is fixedly connected to the circuit board 2. In specific implementation, a surface of the first substrate 110 away from the second substrate 210 may be exposed outside the package adhesive 400, a surface of the first substrate 110 away from the second substrate 210 may be provided with a fourth pad (not shown in the figure), and correspondingly, a position of the circuit board 2 corresponding to the fourth pad may be provided with a fifth pad (not shown in the figure), when the first substrate 110 is disposed on the circuit board 2, the fourth pad is electrically connected to the fifth pad, so that the first module 100 can be electrically connected to the circuit board 2, and further, the first module can be connected to other devices through traces on the circuit board 2.
In the above embodiment, when the package structure 1 works, a part of heat generated by the second chip 220 may be transmitted to the heat sink 500 through the second substrate 210, and is dissipated to the outside through the heat sink 500, and another part of heat may be transmitted to the first module 100 through the conductive member 300, and is further transmitted to the circuit board 2 from the first module 100, and is dissipated to the outside through the circuit board 2. That is to say, the circuit board 2 and the heat sink 500 may jointly form a double-sided heat dissipation structure, so that a better heat dissipation effect can be achieved for the package structure 1, and the package structure 1 meets the heat dissipation requirement under high power consumption.
It can be understood that, in some other embodiments, when the package structure is disposed on the circuit board, the second module may be located on a side close to the circuit board, and the first module is located on a side of the second module away from the circuit board. This kind of setting mode is applicable to the power of second chip and is less relatively, perhaps the second chip is the condition of the chip that requires relatively less to the heat dissipation, and at this moment, the second chip during operation produced heat transfer after the second base plate, further can transmit the circuit board by the second base plate, gives off to the external world through the circuit board to this realization is to the cooling of second chip.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (16)

1. A kind of encapsulated structure, characterized by, including the first module, second module, conductive part and packaging glue, wherein:
the first module comprises a first substrate and a first chip, and the first chip is arranged on the first substrate;
the second module comprises a second substrate, a second chip and pins, the second substrate is opposite to the first substrate and is arranged at intervals, the second chip is arranged on the second substrate, and the first ends of the pins are electrically connected with one surface of the second substrate, which faces the first substrate;
the conductive piece is arranged between the first substrate and the second substrate, and is used for electrically connecting the first module and the second module;
the packaging glue is at least filled between the first substrate and the second substrate, and the second ends of the pins extend to the outside of the packaging glue.
2. The package structure of claim 1, wherein the conductive member is made of metal.
3. The package structure of claim 1 or 2, further comprising a heat spreader disposed on a side of the second substrate facing away from the first substrate.
4. The package structure according to any one of claims 1 to 3, wherein the first chip is disposed on a surface of the first substrate facing the second substrate.
5. The package structure according to any one of claims 1 to 3, wherein the first chip is embedded in the first substrate.
6. The package structure according to any one of claims 1 to 5, wherein the second chip is disposed on a surface of the second substrate facing the first substrate.
7. The package structure according to any one of claims 1 to 6, wherein the conductive member is a metal pillar.
8. The package structure of claim 7, wherein a side of the first substrate facing the second substrate is provided with first pads, and a side of the second substrate facing the first substrate is provided with second pads;
and two ends of the conductive piece are respectively and electrically connected with the first bonding pad and the second bonding pad.
9. The package structure according to any one of claims 1 to 6, wherein the conductive member is a metal strip or a metal wire.
10. The package structure according to claim 9, wherein a side of the first substrate facing the second substrate is provided with first pads, and the second chip has signal ports;
and two ends of the conductive piece are respectively electrically connected with the first bonding pad and the signal port.
11. The package structure according to any one of claims 1 to 10, wherein the first chip is a driver chip and the second chip is a power chip.
12. The package structure according to any one of claims 1 to 11, wherein the encapsulation adhesive covers at least a portion of the first substrate, and a surface of the first substrate facing away from the second substrate is exposed to an outside of the encapsulation adhesive; and/or the presence of a gas in the gas,
the packaging adhesive at least wraps part of the second substrate, and one surface of the second substrate, which is far away from the first substrate, is exposed to the outside of the packaging adhesive.
13. A method for manufacturing a package structure includes:
arranging a first chip on a first substrate to form a first module;
arranging a second chip on a second substrate, and electrically connecting a first end of a pin with the second substrate to form a second module;
electrically connecting conductive members with the first module and the second module respectively, wherein the conductive members are arranged between the first substrate and the second substrate which are oppositely arranged;
and filling packaging glue between the first substrate and the second substrate, and extending the second ends of the pins to the outside of the packaging glue.
14. The method according to claim 13, wherein the disposing the first chip on the first substrate specifically comprises:
and arranging the first chip on one surface of the first substrate, wherein the surface of the first substrate provided with the first chip faces the second substrate.
15. The method according to claim 13, wherein the disposing the first chip on the first substrate specifically comprises:
the first chip is embedded in the first substrate.
16. An electronic device, comprising a circuit board and the package structure of any one of claims 1 to 12, wherein the package structure is disposed on the circuit board, the circuit board is provided with a third pad, and the second end of the pin is electrically connected to the third pad.
CN202210411506.6A 2022-04-19 2022-04-19 Packaging structure and electronic equipment Pending CN114975401A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114664810A (en) * 2022-03-18 2022-06-24 西安交通大学 Wide bandgap power semiconductor module based on bypass copper column heat dissipation
CN119153613A (en) * 2024-11-20 2024-12-17 苏州科阳半导体有限公司 LED packaging structure and LED packaging method

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050133897A1 (en) * 2003-12-17 2005-06-23 Baek Joong-Hyun Stack package with improved heat radiation and module having the stack package mounted thereon
US20130009290A1 (en) * 2011-07-04 2013-01-10 Samsung Electro-Mechanics Co., Ltd. Power module package and method for manufacturing the same
US20130069213A1 (en) * 2011-09-16 2013-03-21 Samsung Electro-Mechanics Co., Ltd. Power module package
WO2021244304A1 (en) * 2020-05-30 2021-12-09 华为技术有限公司 Chip encapsulation structure and electronic device
WO2022056679A1 (en) * 2020-09-15 2022-03-24 华为技术有限公司 Power module and manufacturing method therefor, converter, and electronic device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050133897A1 (en) * 2003-12-17 2005-06-23 Baek Joong-Hyun Stack package with improved heat radiation and module having the stack package mounted thereon
US20130009290A1 (en) * 2011-07-04 2013-01-10 Samsung Electro-Mechanics Co., Ltd. Power module package and method for manufacturing the same
US20130069213A1 (en) * 2011-09-16 2013-03-21 Samsung Electro-Mechanics Co., Ltd. Power module package
WO2021244304A1 (en) * 2020-05-30 2021-12-09 华为技术有限公司 Chip encapsulation structure and electronic device
WO2022056679A1 (en) * 2020-09-15 2022-03-24 华为技术有限公司 Power module and manufacturing method therefor, converter, and electronic device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114664810A (en) * 2022-03-18 2022-06-24 西安交通大学 Wide bandgap power semiconductor module based on bypass copper column heat dissipation
CN119153613A (en) * 2024-11-20 2024-12-17 苏州科阳半导体有限公司 LED packaging structure and LED packaging method

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