CN1147928C - 具有亚芯片规模封装构造的半导体器件制造方法 - Google Patents

具有亚芯片规模封装构造的半导体器件制造方法

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Publication number
CN1147928C
CN1147928C CNB981228127A CN98122812A CN1147928C CN 1147928 C CN1147928 C CN 1147928C CN B981228127 A CNB981228127 A CN B981228127A CN 98122812 A CN98122812 A CN 98122812A CN 1147928 C CN1147928 C CN 1147928C
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China
Prior art keywords
substrate
semiconductor element
semiconductor
outside dimensions
semiconductor device
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CNB981228127A
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English (en)
Chinese (zh)
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CN1219763A (zh
Inventor
������¡�M�����
里奥·M·海金斯三世
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP USA Inc
Original Assignee
Motorola Inc
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Application filed by Motorola Inc filed Critical Motorola Inc
Publication of CN1219763A publication Critical patent/CN1219763A/zh
Application granted granted Critical
Publication of CN1147928C publication Critical patent/CN1147928C/zh
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
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    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
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    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
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    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
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    • H01L2924/15184Fan-in arrangement of the internal vias in different layers of the multilayer substrate
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    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
  • Dicing (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
CNB981228127A 1997-12-01 1998-11-26 具有亚芯片规模封装构造的半导体器件制造方法 Expired - Lifetime CN1147928C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US980783 1997-12-01
US08/980,783 US6064114A (en) 1997-12-01 1997-12-01 Semiconductor device having a sub-chip-scale package structure and method for forming same

Publications (2)

Publication Number Publication Date
CN1219763A CN1219763A (zh) 1999-06-16
CN1147928C true CN1147928C (zh) 2004-04-28

Family

ID=25527845

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB981228127A Expired - Lifetime CN1147928C (zh) 1997-12-01 1998-11-26 具有亚芯片规模封装构造的半导体器件制造方法

Country Status (7)

Country Link
US (2) US6064114A (ja)
JP (1) JP4343296B2 (ja)
KR (1) KR100572813B1 (ja)
CN (1) CN1147928C (ja)
HK (1) HK1019819A1 (ja)
MY (1) MY123187A (ja)
TW (1) TW423120B (ja)

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JP4343296B2 (ja) 2009-10-14
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