CN114623855A - Encoder testing method and servo turntable control system - Google Patents

Encoder testing method and servo turntable control system Download PDF

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Publication number
CN114623855A
CN114623855A CN202111228825.5A CN202111228825A CN114623855A CN 114623855 A CN114623855 A CN 114623855A CN 202111228825 A CN202111228825 A CN 202111228825A CN 114623855 A CN114623855 A CN 114623855A
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encoder
pin
control module
servo
tested
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李勇
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Hangzhou Xinyang Wind Power Technology Co ltd
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Hangzhou Xinyang Wind Power Technology Co ltd
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
    • G01D18/00—Testing or calibrating apparatus or arrangements provided for in groups G01D1/00 - G01D15/00
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Program-control systems
    • G05B19/02—Program-control systems electric
    • G05B19/04—Program control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042—Program control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • G05B19/0423—Input/output

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Abstract

本发明公开了一种编码器测试方法及伺服转台控制系统，所述编码器测试方法包括以下步骤：S1：将被测编码器安装到编码器测试伺服控制台上；S2：上电并打开控制台上位机；S3：在上位机上设定电机测试指令，微电脑控制模块接收到测试指令后对伺服控制模块进行初始化，控制伺服电机运行并记录被测编码器的运行状态，微电脑控制模块根据记录被测编码器的运行状态进行计算得到相关数据；S4：在上位机上显示S3中计算得到的相关数据。本发明的测试方法结合本发明的控制系统，实现了人机交互功能，使得本发明在进行编码器测试时操作简单，效率更高。

Figure 202111228825

The invention discloses an encoder testing method and a servo turntable control system. The encoder testing method includes the following steps: S1: installing the tested encoder on the encoder testing servo console; S2: powering on and turning on the control Host computer; S3: Set the motor test command on the host computer. After the microcomputer control module receives the test command, it initializes the servo control module, controls the operation of the servo motor and records the running state of the encoder under test. Calculate the running state of the encoder to obtain relevant data; S4: Display the relevant data calculated in S3 on the host computer. The test method of the present invention combines the control system of the present invention to realize the function of human-computer interaction, so that the present invention has simple operation and higher efficiency when testing the encoder.

Figure 202111228825

Description

Encoder testing method and servo turntable control system
Technical Field
The invention relates to the field of encoder testing, in particular to an encoder testing method and a servo turntable control system.
Background
At present, a plurality of encoder testing devices or systems only have single calibration system functions, and have single functions and unmanned aerial vehicle interaction functions. For example, a test bed of "single motor and multiple encoders" disclosed in chinese patent document, whose publication No. CN202522256U includes a base plate, a motor and an encoder, wherein the motor is fixed on the base plate, an output shaft thereof is connected with a shaft through a coupling, and the shaft is fixedly connected with a plurality of encoders through a mounting plate. Although single many encoders of motor testboard has that equipment is simple, easily installation and dismantlement, work safe and reliable utilizes resilient coupling's stability, has realized the extension of motor shaft to make a plurality of encoders connect simultaneously on a motor, have very big using value, saved advantages such as research and development cost, but do not solve this testboard and only have single calibration system function, the function singleness, and the defect of the mutual function of unmanned aerial vehicle.
Disclosure of Invention
The invention provides a coder testing method and a servo turntable control system, aiming at overcoming the problems that the prior art only has a single calibration system function, has a single function and has an unmanned aerial vehicle interaction function.
In order to achieve the purpose, the invention adopts the following technical scheme:
an encoder testing method, comprising the steps of: s1: mounting the encoder to be tested on an encoder test servo console; s2: powering on and turning on an upper computer of the console; s3: setting a motor test instruction on the upper computer, initializing the servo control module after the microcomputer control module receives the test instruction, controlling the servo motor to operate and recording the operation state of the tested encoder, and calculating by the microcomputer control module according to the recorded operation state of the tested encoder to obtain related data; s4: and displaying the related data obtained by calculation in the S3 on the upper computer. The testing method of the invention is combined with the control system of the invention, thereby realizing the human-computer interaction function, and leading the invention to have simple operation and higher efficiency when testing the encoder.
As a preferable scheme of the present invention, the motor test command in S3 includes a single-turn test command, a multi-turn test command, and a high-speed test command. The invention realizes the system test related to multiple encoders with single circle, multiple circles, high speed and the like by a group of test boards, realizes various command control and result feedback by the function interaction between the upper computer of the PC and the microcomputer system, and has various functions.
As a preferred embodiment of the present invention, in S3, the specific steps when the single-turn test instruction is set on the upper computer are as follows: and setting a motor single-coil test instruction on the upper computer, initializing the servo control module after the microcomputer control module receives the upper computer instruction, then stopping the rotation of the servo motor after one circle, recording the number of pulses output by the tested encoder, and calculating the pulse deviation value of the tested encoder according to the number of pulses output by the tested encoder and the number of pulses of the high-precision encoder to obtain the deviation rate.
As a preferred embodiment of the present invention, in S3, the specific steps when setting the multi-turn test command on the upper computer are as follows: the method comprises the steps that a motor multi-turn test instruction is set on an upper computer, after the microcomputer control module receives the instruction of the upper computer, the servo control module is initialized, then the servo motor stops after running for corresponding turns in an S-shaped acceleration and deceleration curve, the number of pulses output by a tested encoder is recorded, and a pulse deviation value of the tested encoder is calculated according to the number of pulses output by the tested encoder, the number of pulses of a high-precision encoder and the running turns of the servo motor to obtain a deviation rate.
As a preferred embodiment of the present invention, in S3, the specific steps when the high-speed test instruction is set on the upper computer are as follows: the method comprises the steps that a high-speed motor test instruction is set on an upper computer, the maximum running speed of a servo motor is set, the servo control module is initialized after the microcomputer control module receives the instruction of the upper computer, then the servo motor runs to the maximum speed in an S-shaped acceleration and deceleration curve and then decelerates and stops, the number of pulses output by a tested encoder is recorded, meanwhile, a circle value is obtained by combining the number of pulses of a high-precision encoder, a pulse deviation value of the tested encoder is calculated according to the number of pulses output by the tested encoder and the running circle number of the servo motor, and a deviation rate is obtained. The microcomputer control module controls the servo system to operate correspondingly according to a test instruction sent by the upper computer, detects the pulse number of the high-precision calibration encoder and the pulse number of the encoder to be tested, comprehensively analyzes the performance of the encoder to be tested by judging the difference between the pulse number and the state of the encoder to be tested, and sends a test result to the upper computer for display. Greatly reducing the working pressure and efficiency of the tester
As a preferred scheme of the invention, the servo turntable control system comprises a microcomputer control module, the microcomputer control module is respectively connected with an upper computer control display module, a servo control module, a coder to be tested and a high-precision coder, the servo control module comprises a high-precision rack turntable, and the high-precision rack turntable, the high-precision coder and the coder to be tested are connected in series through a rotating shaft.
As a preferred scheme of the invention, the microcomputer control module comprises an encoder signal conditioning circuit, a main control circuit and a power supply processing circuit, wherein the main control circuit is respectively connected with the encoder signal conditioning circuit and the power supply processing circuit.
As a preferred scheme of the invention, the upper computer controls the display module to send a test instruction to the microcomputer control module, and the microcomputer control module controls the servo control module to operate.
Therefore, the invention has the following beneficial effects: the invention realizes that a group of test boards realize the comprehensive test function, realizes the system test related to a plurality of encoders with single circle, multiple circles, high speed and the like, and realizes various command control and result feedback by the functional interaction between the upper computer of the PC and the microcomputer system; the microcomputer controls the servo system to operate correspondingly according to a test instruction sent by the upper computer, detects the pulse number of the high-precision calibration encoder and the pulse number of the encoder to be tested, comprehensively analyzes the performance of the encoder to be tested by judging the difference between the pulse number of the high-precision calibration encoder and the pulse number of the encoder to be tested and the state of the encoder to be tested, and sends a test result to the upper computer for display. The working pressure and the efficiency of testing personnel are greatly reduced.
Drawings
FIG. 1 is a flow chart of an encoder testing method of the present invention;
FIG. 2 is a schematic diagram of the control system of the encoder test servo turntable of the present invention;
FIG. 3 is a first partial circuit schematic of the encoder signal conditioning circuit of the present invention;
FIG. 4 is a second partial circuit schematic of the encoder signal conditioning circuit of the present invention;
FIG. 5 is a third circuit schematic of the encoder signal conditioning circuit of the present invention;
FIG. 6 is a fourth partial circuit schematic of the encoder signal conditioning circuit of the present invention;
FIG. 7 is a first partial circuit schematic of the master control circuit of the present invention;
FIG. 8 is a second partial circuit schematic of the master control circuit of the present invention;
fig. 9 is a circuit schematic of the power supply processing circuit of the present invention.
Detailed Description
The invention is further described with reference to the following detailed description and accompanying drawings.
As shown in fig. 1, an encoder testing method includes the following steps: s1: mounting the encoder to be tested on an encoder test servo console; s2: powering on and turning on an upper computer of the console; s3: setting a motor test instruction on the upper computer, initializing the servo control module after the microcomputer control module receives the test instruction, controlling the servo motor to operate and recording the operation state of the tested encoder, and calculating by the microcomputer control module according to the recorded operation state of the tested encoder to obtain related data; s4: and displaying the related data obtained by calculation in the S3 on the upper computer. The testing method of the invention combines the control system of the invention to realize the human-computer interaction function, so that the invention has simple operation and higher efficiency when testing the encoder
The motor test instruction in the S3 comprises a single-circle test instruction, a multi-circle test instruction and a high-speed test instruction. The invention realizes the system test related to multiple encoders with single circle, multiple circles, high speed and the like by a group of test boards, realizes various command control and result feedback by the function interaction between the upper computer of the PC and the microcomputer system, and has various functions.
In S3, the specific steps when a single-turn test instruction is set on the upper computer are as follows: and setting a motor single-coil test instruction on the upper computer, initializing the servo control module after the microcomputer control module receives the upper computer instruction, then stopping the rotation of the servo motor after one circle, recording the number of pulses output by the tested encoder, and calculating the pulse deviation value of the tested encoder according to the number of pulses output by the tested encoder and the number of pulses of the high-precision encoder to obtain the deviation rate.
In S3, the specific steps when the upper computer sets the multi-turn test instruction are as follows: the method comprises the steps that a motor multi-turn test instruction is set on an upper computer, a microcomputer control module initializes a servo control module after receiving the upper computer instruction, then the servo motor stops after running for corresponding turns in an S-shaped acceleration and deceleration curve, the number of pulses output by a tested encoder is recorded, and a pulse deviation value of the tested encoder is calculated according to the number of pulses output by the tested encoder, the number of pulses of a high-precision encoder and the number of running turns of the servo motor to obtain a deviation rate.
In S3, the specific steps when the high-speed test instruction is set on the upper computer are as follows: the method comprises the steps that a high-speed motor test instruction is set on an upper computer, the maximum running speed of a servo motor is set, the servo control module is initialized after the microcomputer control module receives the instruction of the upper computer, then the servo motor runs to the maximum speed in an S-shaped acceleration and deceleration curve and then decelerates and stops, the number of pulses output by a tested encoder is recorded, meanwhile, a circle value is obtained by combining the number of pulses of a high-precision encoder, a pulse deviation value of the tested encoder is calculated according to the number of pulses output by the tested encoder and the running circle number of the servo motor, and a deviation rate is obtained. The microcomputer control module controls the servo system to operate correspondingly according to a test instruction sent by the upper computer, detects the pulse number of the high-precision calibration encoder and the pulse number of the encoder to be tested, comprehensively analyzes the performance of the encoder to be tested by judging the difference between the pulse number and the state of the encoder to be tested, and sends a test result to the upper computer for display. Greatly reducing the working pressure and efficiency of the tester
As shown in fig. 2, the servo turntable control system comprises a microcomputer control module, the microcomputer control module is respectively connected with the upper computer control display module, the servo control module, the encoder to be detected and the high-precision encoder, the servo control module comprises a high-precision rack turntable, and the high-precision rack turntable, the high-precision encoder and the encoder to be detected are connected in series through a rotating shaft. The microcomputer control module comprises an encoder signal conditioning circuit, a main control circuit and a power supply processing circuit, wherein the main control circuit is respectively connected with the encoder signal conditioning circuit and the power supply processing circuit. The upper computer controls the display module to send a test instruction to the microcomputer control module, and the microcomputer control module controls the servo control module to operate.
The output of the encoder to be tested is an incremental encoder, the output signal is ABN orthogonal pulses, and the high-level timer is configured into an orthogonal decoding mode through the microcontroller, wherein the mode is a counting function specially aiming at the orthogonal pulses, and the accuracy is high.
The output signal of the encoder to be tested is a differential signal of HTL, and the signal received by the microcontroller is a TTL single-ended signal. In the circuit, the HTL is converted into the TTL differential circuit through an optical coupler, and then the TTL differential circuit is converted into a single end through the AM26C32 differential circuit, and then signals are input into the microcontroller. So that the number of pulses of the encoder to be tested can be read.
In one embodiment, as shown in fig. 3, 4, 5, 6, the encoder signal conditioning circuit includes a resistor R, a capacitor C, a, Capacitor C, TVS tube Z, TVS tube P, pin bank P, ball L, magnetic ball L, analog-to-digital conversion chip U, level conversion chip U, four-way differential circuit receiver U, one end of resistor R connected to the first pulse encoder A, and the other end of the differential circuit input terminal of the four-way differential circuit receiver, one end of a resistor R4 is connected with the second pulse output end of the encoder A, the other end of the resistor R4 is connected with the first inverting differential input pin of the four-way differential line receiver U1, one end of a capacitor C3 is grounded, the other end of a capacitor C3 is connected with the first inverting differential input pin of the four-way differential line receiver U1, one end of the capacitor C4 is connected with the first inverting differential input pin of the four-way differential line receiver U1, the other end of the capacitor C4 is connected with the first inverting differential input pin of the four-way differential line receiver U1, one end of a capacitor C5 is connected with the first inverting differential input pin of the four-way differential line receiver U1, the other end of the capacitor C5 is grounded, one end of a TVS tube Z3 is connected with the first pulse output end of the encoder A, the other end of a TVS tube Z3 is grounded, one end of the TVS tube Z4 is connected with the second pulse output end of the encoder A, the other end of the TVS tube Z4 is grounded, one end of a resistor R13 is connected with a first pulse output end of the encoder B, the other end of a resistor R13 is connected with a second in-phase differential input pin of a four-way differential line receiver U1, one end of a resistor R15 is connected with a second pulse output end of the encoder B, the other end of a resistor R15 is connected with a second inversion differential input pin of a four-way differential line receiver U1, one end of a capacitor C12 is grounded, the other end of a capacitor C12 is connected with a second in-phase differential input pin of a four-way differential line receiver U1, one end of a capacitor C15 is connected with a second in-phase differential input pin of a four-way differential line receiver U1, the other end of a capacitor C15 is connected with a second inversion differential input pin of a four-way differential line receiver U1, one end of a capacitor C16 is connected with a second inversion differential input pin of a four-way differential line receiver U1, the other end of a capacitor C16 is grounded, one end of a TVS tube Z9 is connected with a first pulse output end of the encoder B, the other end of the TVS tube Z9 is grounded, one end of the TVS tube Z10 is connected to the second pulse output end of the encoder B, the other end of the TVS tube Z10 is grounded, one end of the resistor R20 is connected to the first pulse output end of the encoder Z, the other end of the resistor R20 is connected to the third in-phase differential input pin of the four-way differential line receiver U1, one end of the resistor R21 is connected to the third pulse output end of the encoder B, the other end of the resistor R21 is connected to the third inverting differential input pin of the four-way differential line receiver U1, one end of the capacitor C19 is grounded, the other end of the capacitor C19 is connected to the third in-phase differential input pin of the four-way differential line receiver U1, one end of the capacitor C20 is connected to the third in-phase differential input pin of the four-way differential line receiver U1, the other end of the capacitor C20 is connected to the third inverting differential input pin of the four-way differential line receiver U1, one end of the capacitor C23 is connected to the third inverting differential input pin of the four-way differential line receiver U1, the other end of the capacitor C23 is grounded, one end of the TVS tube Z13 is connected to the first pulse output end of the encoder C, the other end of the TVS tube Z13 is grounded, one end of the TVS tube Z14 is connected to the second pulse output end of the encoder C, the other end of the TVS tube Z14 is grounded, the ground pin of the four-way differential line receiver U1 is grounded, the power pin of the four-way differential line receiver U1 is connected to the 5V power supply, the active high selection pin and the active low selection pin of the four-way differential line receiver U1 are both connected to the 5V power supply, the first logic level output pin of the four-way differential line receiver U1 is connected to the first reference input pin of the level conversion chip U2 through the resistor R12, one end of the resistor R12 is connected to the first logic level output pin of the four-way differential line receiver U1, the other end of the resistor R12 is connected to the I/O pin PB6 of the main control chip U4 in the main control circuit through the resistor R7, and the second logic level output pin of the four-way differential line receiver U5 is connected to the level conversion chip 2 through the resistor R2 The second reference input pin of the four-way differential line receiver U1, one end of the resistor R14 is connected to the second logic level output pin of the four-way differential line receiver U1, the other end of the resistor R14 is connected to the I/O pin PB7 of the main control chip U4 in the main control circuit via the resistor R10, the third logic level output pin of the four-way differential line receiver U1 is connected to the third reference input pin of the level shifter chip U2 via the resistor R16, one end of the resistor R16 is connected to the third logic level output pin of the four-way differential line receiver U1, the other end of the resistor R16 is connected to the I/O pin PB8 of the main control chip U4 in the main control circuit via the resistor R11, the reference input voltage of the level shifter chip U2 is connected to the 5V power supply, the reference output voltage of the level shifter chip U2 is connected to the 3.3V power supply, the ground pin of the level shifter chip U2 is grounded, the tri-state output mode of the level shifter chip U2 enables the 3.3V power supply via the resistor R19, a first reference output pin of a level conversion chip U2 is connected with an I/O pin PB6 of a main control chip U4 in a main control circuit, a second reference output pin of the level conversion chip U2 is connected with an I/O pin PB7 of a main control chip U4 in the main control circuit, a third reference output pin of the level conversion chip U2 is connected with an I/O pin PB8 of the main control chip U4 in the main control circuit, one end of a capacitor C6 is grounded, the other end of the capacitor C6 is connected with a 5V power supply, a capacitor C7 is connected with a capacitor C6 in parallel, one end of the capacitor C8 is grounded, the other end of a capacitor C8 is connected with the 5V power supply, one end of the capacitor C9 is grounded, the other end of the capacitor C9 is connected with a 3.3V power supply, one end of the capacitor C1 is grounded, the other end of the capacitor C1 is connected with one end of a resistor R1, a ninth analog input pin of the analog-to-digital conversion chip U3, and the other end of the resistor R1 is connected with a first pin P3 of a pin P3, One end of a TVS tube Z1 is connected, the other end of the TVS tube Z1 is grounded, one end of a capacitor C10 is grounded, the other end of a capacitor C10 is respectively connected with one end of a resistor R5 and an eighth analog input pin of an analog-to-digital conversion chip U3, the other end of a resistor R5 is respectively connected with a third pin of a pin header P3 and one end of a TVS tube Z5, the other end of a TVS tube Z5 is grounded, one end of a capacitor C13 is grounded, the other end of a capacitor C13 is respectively connected with one end of a resistor R8 and a seventh analog input pin of an analog-to-digital conversion chip U3, the other end of a resistor R8 is respectively connected with a fifth pin of a pin header P3 and one end of a TVS tube Z7, the other end of a TVS tube Z7 is grounded, one end of a capacitor C6 is grounded, the other end of a capacitor C C17 is respectively connected with one end of a resistor R17 and a sixth analog input pin of an analog-to a sixth analog conversion chip U3, the other end of a resistor R17 is respectively connected with a seventh analog input pin header P6474 and a pin 11 of a pin header P2, the other end of the TVS tube Z11 is grounded, one end of the capacitor C2 is grounded, the other end of the capacitor C2 is respectively connected to one end of the resistor R2 and the fifth analog input pin of the analog-to-digital conversion chip U3, the other end of the resistor R2 is respectively connected to the ninth pin of the pin header P3 and one end of the TVS tube Z2, the other end of the TVS tube Z2 is grounded, one end of the capacitor C11 is grounded, the other end of the capacitor C11 is respectively connected to one end of the resistor R6 and the fourth analog input pin of the analog-to-digital conversion chip U3, the other end of the resistor R6 is respectively connected to the eleventh pin of the pin header P3 and one end of the TVS tube Z6, the other end of the TVS tube Z6 is grounded, one end of the capacitor C14 is grounded, the other end of the capacitor C936 is respectively connected to one end of the resistor R9 and the third analog input pin of the analog-to the TVS tube Z464, the other end of the TVS tube Z3875 and TVS tube Z8, one end of a capacitor C18 is grounded, the other end of a capacitor C18 is respectively connected with one end of a resistor R18 and a second analog input pin of an analog-digital conversion chip U3, the other end of the resistor R18 is respectively connected with a fifteenth pin of a pin bank P3 and one end of a TVS tube Z12, the other end of the TVS tube Z12 is grounded, the second, fourth, sixth, eighth, tenth, twelfth, fourteen and sixteen pins of the pin bank P3 are all connected with a 5V power supply, the seventeenth, eighteenth, nineteen, twenty-one, twenty-two, twenty-three and twenty-four pins of the pin bank P3 are all grounded, one end of a capacitor C29 is connected with the 5V power supply, the other end of the capacitor C29 is grounded, the capacitor C30, the capacitor C31, the capacitor C32 and the capacitor C30 are all connected in parallel, the first pin of the pin bank P1 is connected with the 5V power supply, the second pin of the pin P1 is connected with the 3.3V power supply, the pin of the bank P1 is connected with a third pin, the pin P1 is connected with a serial port of a master control circuit U4, the sixth pin of pin header P1 is connected to the receiving pin of the second serial port of main control chip U4 in the main control circuit, one end of TVS tube Z15 is connected to the fifth pin of pin header P1, the other end of TVS tube Z15 is grounded, one end of TVS tube Z16 is connected to the sixth pin of pin header P1, the other end of TVS tube Z16 is grounded, the first pin of pin header P2 is connected to I/O pin PB0 of main control chip U4 in the main control circuit, the second pin of pin header P2 is connected to I/O pin 38pc 46 of main control chip U4 in the main control circuit, the third pin of pin header P2 is connected to I/O pin PC4 of main control chip U4 in the main control circuit, the fourth pin of pin header P2 is connected to I/O pin PA1 of main control chip U4 in the main control circuit, the fifth pin of pin header P2 is connected to I/O pin PC4 of main control chip U4 in the main control circuit, and the sixth pin header P4 is connected to I/O pin P4 in the main control chip P4, a seventh pin of the pin header P2 is connected to an I/O pin PC2 of a main control chip U4 in the main control circuit, an eighth pin of the pin header P2 is connected to a transmission pin of a third serial port of a main control chip U4 in the main control circuit, a ninth pin of the pin header P2 is connected to a reception pin of a third serial port of a main control chip U4 in the main control circuit, a tenth pin of the pin header P2 is connected to a 5V power supply, an eleventh pin of the pin header P2 is connected to a 3.3V power supply, a twelfth pin of the pin header P2 is grounded, one end of a TVS tube Z17 is connected to a first pin of a pin header P2, the other end of the TVS tube Z17 is grounded, one end of the TVS tube Z18 is connected to a second pin of the pin header P2, the other end of the TVS tube Z18 is grounded, one end of the TVS tube Z19 is connected to a third pin of a pin header P2, the other end of the TVS tube Z19 is connected to a ground, one end of the TVS tube Z2, one end of the TVS tube Z pin of the TVS tube Z466 is connected to a fourth pin of the pin header P2, the other end of TVS tube Z21 is grounded, one end of TVS tube Z22 is connected to the sixth pin of pin bank P2, the other end of TVS tube Z22 is grounded, one end of TVS tube Z23 is connected to the seventh pin of pin bank P2, the other end of TVS tube Z23 is grounded, one end of TVS tube Z24 is connected to the eighth pin of pin bank P2, the other end of TVS tube Z24 is grounded, one end of TVS tube Z25 is connected to the ninth pin of pin bank P2, the other end of TVS tube Z25 is grounded, the first pin of pin bank P4 is connected to the first pulse output terminal of encoder A, the third pin of pin bank P4 is connected to the second pulse output terminal of encoder A, the fifth pin of pin bank P4 is connected to the first pulse output terminal of encoder B, the seventh pin of pin bank P4 is connected to the second pulse output terminal of encoder B, the second pin of pin bank P4 is connected to the second pin bank Z4, the fourth pin of encoder Z4 is connected to the second pulse output terminal of encoder B, a sixth pin of a pin bank P4 is connected with a 5V power supply, an eighth pin of a pin bank P4 is connected with the ground, one end of a capacitor C28 is connected with the 5V power supply, the other end of the capacitor C28 is connected with the ground, one end of a capacitor C21 is respectively connected with one end of a magnetic bead L1 and a positive analog power supply pin of an analog-to-digital conversion chip U3, the other end of a capacitor C21 is connected with the ground, the other end of a magnetic bead L1 is connected with the 5V power supply, a capacitor C22 is connected with a capacitor C21 in parallel, one end of a resistor R28 is connected with the 5V power supply, the other end of the resistor R28 is connected with a digital power supply pin of the analog-to-digital conversion chip U3, one end of the resistor R31 is connected with the 3.3V power supply, the other end of the resistor R31 is connected with a digital power supply pin of the analog-to an analog-to-digital conversion chip U3, one end of the capacitor C24 is connected with a digital power supply pin of the analog-to-digital conversion chip U3, the other end of the capacitor C24, a zeroth analog-to-analog conversion chip U3 is connected with a first analog input pin of the analog-to-digital conversion chip U3, one end of a resistor R38 is connected with a 2.5V reference voltage, the other end of a resistor R38 is respectively connected with one end of an analog common input pin and one end of a resistor R39 of an analog-to-digital conversion chip U3, the other end of a resistor R39 is grounded, one end of a capacitor C26 is connected with the 2.5V reference voltage, the other end of a capacitor C26 is grounded, a reference output pin of the analog-to-digital conversion chip U3 is connected with one end of a capacitor C26, a region bypass pin of the analog-to-digital conversion chip U3 is grounded through a capacitor C27, a start conversion control pin of the analog-to-digital conversion chip U3 is grounded through a resistor R29, one end of a resistor R30 is connected with a turn-off pin of an analog-to-digital conversion chip U3, the other end of a resistor R30 is respectively connected with one end of a resistor R22, a resistor R23 and a resistor R32, the other end of a resistor R22 is connected with a 3.3V power supply, the other end of the resistor R49742 is connected with an analog-to-digital conversion chip U3, and a reset pin of the analog-to-digital conversion chip U3, the other end of the resistor R33 is connected with one end of the resistor R24 and an I/O pin PA5 of a main control chip U4 in the main control circuit, the other end of the resistor R24 is connected with a 5V power supply, one end of the resistor R34 is connected with a serial interface data input pin of an analog-to-digital conversion chip U3, the other end of the resistor R34 is connected with one end of the resistor R25 and an I/O pin PA7 of a main control chip U4 in the main control circuit, the other end of the resistor R25 is connected with a 5V power supply, one end of the resistor R35 is connected with a serial interface data output pin of an analog-to-digital conversion chip U3, the other end of the resistor R35 is connected with one end of the resistor R26 and an I/O pin PA6 of the main control chip U4 in the main control circuit, the other end of the resistor R26 is connected with a 5V power supply, one end of the resistor R35 is connected with a serial interface data output pin of the analog-to an analog-to-digital conversion chip U3 serial interface data output pin, and the other end of the resistor R35 is connected with one end of the resistor R26, An I/O pin PA6 of a main control chip U4 in the main control circuit is connected, the other end of a resistor R26 is connected with a 5V power supply, one end of a resistor R36 is connected with a serial interface data selection pin of an analog-to-digital conversion chip U3, the other end of a resistor R36 is respectively connected with one end of the resistor R27 and an I/O pin PA4 of the main control chip U4 in the main control circuit, the other end of the resistor R27 is connected with the 5V power supply, an internal oscillator pin of the analog-to-digital conversion chip U3 is grounded through a resistor R37, one end of a capacitor C25 is connected with a PGA output P pin of the analog-to-digital conversion chip U3, the other end of a capacitor C25 is connected with a PGA output N pin of the analog-to-digital conversion chip U3, a digital ground pin of the analog-to analog-digital conversion chip U3, an analog-to-ground pin of the analog-digital conversion chip U3 is grounded through L2, and a ground pin of the analog-to ground to the analog-digital conversion chip U3.
As shown in fig. 7 and 8, the main control circuit includes a main control chip U4, a resistor R40, a resistor R41, a resistor R42, a resistor R43, a resistor R44, a resistor R45, a resistor R46, a resistor R47, a resistor R48, a capacitor C33, a capacitor C34, a capacitor C35, a capacitor C36, a capacitor C37, a capacitor C38, a capacitor C39, a capacitor C40, a diode D40, a crystal oscillator X40, a pin header P40 and a memory chip U40, wherein a cathode terminal of the diode D40 is connected to the I/O pin PC 40 of the main control chip U40, a cathode terminal of the diode D40 is connected to the 3.3V power supply via the resistor R40, a cathode terminal of the diode D40 is connected to the I/O pin PC 40 of the main control chip 40, a ground terminal of the memory chip U40, a ground terminal of the memory chip is connected to the input terminal of the power supply terminal of the memory chip U40, and a ground terminal of the memory chip is connected to the input terminal of the memory chip U40 via the input terminal of the diode D40, and the input terminal of the memory chip U40, the serial clock terminal of the memory chip U5 is connected to the I/O pin PA8 of the main control chip U4, the write protection terminal of the memory chip U5 is grounded through a resistor R48, the power supply terminal of the memory chip U5 is connected to a 3.3V power supply, one terminal of the capacitor C42 is connected to a 3.3V power supply, the other terminal of the capacitor C42 is grounded, one terminal of the resistor R44 is connected to a 3.3V power supply, the other terminal of the resistor R44 is connected to the I/O pin PC9 of the main control chip U4, one terminal of the resistor R45 is connected to a 3.3V power supply, the other terminal of the resistor R45 is connected to the I/O pin PA8 of the main control chip U4, the first terminal of the crystal oscillator X8 is connected to the I/O pin PH 8 of the main control chip U8, the second terminal of the crystal oscillator X8 is connected to the I/O pin PH 8 of the main control chip 8, one terminal of the resistor R8 is connected to the first terminal of the crystal X8, the second terminal of the crystal oscillator X8 is connected to the second terminal of the second terminal 8, and the capacitor C8, the other end of the capacitor C35 is connected to the third terminal of the crystal oscillator X1, one end of the capacitor C44 is grounded, the other end of the capacitor C44 is connected to the second terminal of the crystal oscillator X1, the third terminal of the crystal oscillator X1 is grounded, one end of the resistor R46 is connected to the 3.3V power supply, the other end of the resistor R46 is connected to the asynchronous reset pin of the main control chip U4, one end of the capacitor C43 is grounded, the other end of the capacitor C43 is connected to the asynchronous reset pin of the main control chip U4, one end of the capacitor C36 is grounded, the other end of the capacitor C36 is connected to the 3.3V power supply, the capacitors C36, C36 and C36 are all connected in parallel with the capacitor C36, the first pin of the pin P36 is connected to the 3V power supply, the fourth pin of the pin P36 is grounded, the second pin of the pin P36 is connected to the I/O pin of the main control chip PA 36, the pin P36 is connected to the power supply pin of the main control chip U36, and the pin P6853V pin of the main control chip U36 is connected to the pin P36, the ground pin of the main control chip U4 is grounded, the I/O pin PB2 of the main control chip U4 is grounded through a resistor R43, the first external capacitor pin of the main control chip U4 is grounded through a capacitor C34, the second external capacitor pin of the main control chip U4 is grounded through a capacitor C33, and the first memory selection pin of the main control chip U4 is grounded through a resistor R42.
As shown in fig. 9, the power supply processing circuit includes a resistor R54, a resistor R55, a capacitor C55, a TVS tube Z55, a diode D55, a magnetic bead L55, an inductor L55, a magnetic bead L55, a fuse F55, a pin P55, a switch P55, a linear voltage regulator U55, a power supply voltage regulator and a pin F55, wherein the other terminal of the power supply pin of the first row of the power supply is connected to the ground pin of the first row of the first and the second row of the power supply pin of the second row of the power supply pin F55, the power supply pin is connected to the second row of the first row of the power supply pin F55, the power supply pin, the second row of the power supply pin P55, the power supply pin is connected to the second row of the power supply pin F55, the power supply pin of the second row of the power supply pin P55, the power supply pin of the second row of the first row of the second pin is connected to the second row of the power supply pin F55, the second row of the second pin of the power supply pin of the second row of the second row of the power supply pin is connected to the power supply pin of the second row of the circuit, a capacitor C46 is connected in parallel with a resistor R46, one end of an inductor L46 is connected to the first pin of the pin header P46 through a fuse F46, the other end of the inductor L46 is connected to the second pin of the pin header P46 through a TVS tube Z46, the resistor R46 is connected in parallel with the inductor L46, the capacitor C46 is connected in parallel with the TVS tube Z46, the positive terminal of the capacitor C46 is connected to the positive terminal of the diode D46, the negative terminal of the capacitor C46 is grounded, the positive terminal of the diode D46 is connected to the other end of the inductor L46, the negative terminal of the diode D46 is connected to the second pin of the pin header P46 through the TVS tube Z46, one end of the capacitor C46 is connected to the positive terminal of the diode D46, the other end of the capacitor C46 is connected to the negative terminal of the diode D46, one end of the L46 is connected to the cathode terminal of the diode D46, the other end of the direct current magnetic bead is connected to the direct current magnetic bead, the magnetic bead is connected to the pin of the pin header L46, the magnetic bead is connected to the pin header L46, and the second pin of the pin header L46, the diode L46 is connected to the second pin of the diode L46, an inductor L5 is connected in parallel with a magnetic bead L6, one end of a capacitor C49 is connected with the other end of a magnetic bead L4, the other end of a capacitor C49 is grounded, a capacitor C50 is connected in parallel with a capacitor C49, one end of a capacitor C54 is connected with a direct current power supply terminal, the other end of a capacitor C54 is grounded, a capacitor C55 is connected in parallel with a capacitor C54, a power supply input pin of a power supply chip U7 is connected with the direct current power supply terminal, one end of a resistor R57 is connected with a power supply input pin of the power supply chip U57, the other end of the resistor R57 is grounded through a resistor R57, an enable pin of the power supply chip U57 is connected with the other end of the resistor R57, a timing sequence input pin of the power supply chip U57 is grounded through a resistor R57, an open drain output pin of the power supply chip U57 is respectively connected with one end of the capacitor C57 and one end of the capacitor C57, the other end of the capacitor C57 is grounded through the resistor R57, the other end of the capacitor C57, the other end of the capacitor C57 is grounded through a resistor 57, the other end of the capacitor C57, the other end of the ground, the gate drive voltage of the power supply chip U57 is connected with the inductor L57, the other end of the inductor L7 is connected with a 5V power supply, the cathode end of the diode D5 is connected with a switch output pin of the power supply chip U7, the anode end of the diode D5 is grounded, a gate drive voltage pin of the power supply chip U7 is connected with the switch output pin of the power supply chip U7 through a capacitor C51, one end of a resistor R59 is connected with the 5V power supply, the other end of a resistor R59 is connected with a feedback input pin of the power supply chip U7, one end of a resistor R63 is connected with a feedback input pin of the power supply chip U7, the other end of a resistor R63 is grounded, one end of a capacitor C57 is connected with the 5V power supply, the other end of a capacitor C57 is grounded, the capacitor C58 is connected with a capacitor C57 in parallel, the anode end of the capacitor C59 is connected with the 5V power supply, the cathode end of the capacitor C59 is grounded, one end of the resistor R60 is connected with the 5V power supply, the other end of the resistor R60 is connected with the anode end of the diode D6, the cathode end of the diode D6 is grounded, and the cathode end of the low-voltage difference linear regulator U8 is connected with the low-voltage regulator. An enabling pin of the low dropout linear regulator U8 is connected with a 5V power supply through a resistor R58, one end of a capacitor C52 is connected with the 5V power supply, the other end of the capacitor C52 is grounded, an output pin of the low dropout linear regulator U8 is connected with a 3.3V power supply, a grounding pin of the low dropout linear regulator U8 is grounded, one end of the capacitor C53 is connected with the 3.3V power supply, the other end of the capacitor C53 is grounded, a first terminal of a switching regulator P7 is connected with a direct current power supply end, a second terminal of the switching regulator P7 is grounded, and a third section of the switching regulator P7 is connected with the 5V power supply. And the system power supply processing part uses various protection means to ensure that the system can stably supply power and provides voltages with different voltage grades, such as 5V, 3.3V and the like for the system.
In one embodiment, a high-precision rack rotary table, a high-precision servo control module and a high-precision high-resolution calibration encoder are adopted, the components are connected in series through a shaft, then servo control, encoder value reading and encoder value reading to be tested are realized through a microcontroller, a group of test tables are realized to realize comprehensive test functions, encoder related system test is realized, and functional interaction is carried out between an upper computer of a PC (personal computer) and a microcomputer module to realize various command control and result feedback. After the signal input end of the encoder signal conditioning circuit uses a TVS protective tube and RC filtering, the signal is input into the four-way differential line receiver, and then the signal is subjected to level conversion through a level conversion chip and is input into a main control chip of the main control circuit for adoption. The main control circuit adopts an STM32F405 main control chip which has strong performance and quick dynamic response, wherein two paths of timers are used for capturing encoder signals, one path of serial port USART2 is used for communicating with a servo control system and used for servo control, and the other path of serial port USART1 is used for communicating with a computer and used for man-machine interaction, and mainly used for displaying instructions and states of a test mode, calibration and the like. The upper computer controls the display module to send a test instruction to the microcomputer control module, and the microcomputer control module controls the servo control module to operate. The test instructions include single-turn instructions, multi-turn instructions, and high-speed rotation instructions. The invention realizes the comprehensive test function of a group of test boards, realizes the calibration of the encoder and the related system test of a plurality of encoders with single circle, multi-circle, high speed and the like, and realizes various command control and result feedback by the functional interaction between the upper computer of the PC and the microcomputer control module.
The above description is only for the specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto, and any changes or substitutions that are not thought of through the inventive work should be covered within the protection scope of the present invention.

Claims (8)

1. An encoder testing method is characterized by comprising the following steps:
s1: mounting the encoder to be tested on an encoder test servo console;
s2: powering on and turning on an upper computer of the console;
s3: setting a motor test instruction on the upper computer, initializing the servo control module after the microcomputer control module receives the test instruction, controlling the servo motor to operate and recording the operation state of the tested encoder, and calculating by the microcomputer control module according to the recorded operation state of the tested encoder to obtain related data;
s4: and displaying the related data obtained by calculation in the S3 and the qualified condition of the encoder to be detected on the upper computer.
2. The encoder test method of claim 1, wherein the motor test commands in S3 include a single-turn test command, a multi-turn test command, and a high-speed test command.
3. The encoder testing method of claim 2, wherein in S3, the specific testing steps when the single-turn test command is set on the upper computer are as follows: and setting a motor single-coil test instruction on the upper computer, initializing the servo control module after the microcomputer control module receives the upper computer instruction, then stopping the rotation of the servo motor after one circle, recording the number of pulses output by the tested encoder, and calculating the pulse deviation value of the tested encoder according to the number of pulses output by the tested encoder and the number of pulses of the high-precision encoder to obtain the deviation rate.
4. The encoder testing method according to claim 2, wherein in the step S3, the specific testing steps when the multi-turn testing instruction is set on the upper computer are as follows: the method comprises the steps that a motor multi-turn test instruction is set on an upper computer, a microcomputer control module initializes a servo control module after receiving the upper computer instruction, then the servo motor stops after running for corresponding turns in an S-shaped acceleration and deceleration curve, the number of pulses output by a tested encoder is recorded, and a pulse deviation value of the tested encoder is calculated according to the number of pulses output by the tested encoder, the number of pulses of a high-precision encoder and the number of running turns of the servo motor to obtain a deviation rate.
5. The encoder testing method as claimed in claim 1, wherein in S3, the specific steps when the high speed test command is set on the upper computer are: the method comprises the steps that a high-speed motor test instruction is set on an upper computer, the maximum running speed of a servo motor is set, the servo control module is initialized after the microcomputer control module receives the instruction of the upper computer, then the servo motor stops running to the maximum speed in an S-shaped acceleration and deceleration curve, the number of pulses output by a tested encoder is recorded, meanwhile, a circle number value is obtained by combining the number of pulses of a high-precision encoder, a pulse deviation value of the tested encoder is calculated according to the number of pulses output by the tested encoder and the number of running circles of the servo motor, and a deviation rate is obtained.
6. The servo turntable control system is suitable for the encoder testing method of claim 1, and is characterized by comprising a microcomputer control module, wherein the microcomputer control module is respectively connected with an upper computer control display module, a servo control module, an encoder to be tested and a high-precision encoder, the servo control module comprises a high-precision rack turntable, and the high-precision rack turntable, the high-precision encoder and the encoder to be tested are connected in series through a rotating shaft.
7. The encoder test servo turntable control system as claimed in claim 6, wherein the microcomputer control module comprises an encoder signal conditioning circuit, a main control circuit and a power supply processing circuit, and the main control circuit is connected with the encoder signal conditioning circuit and the power supply processing circuit respectively.
8. The encoder test servo turntable control system as claimed in claim 6, wherein the upper computer control display module sends a test command to the microcomputer control module, and the microcomputer control module controls the servo control module to operate.
CN202111228825.5A 2021-10-21 2021-10-21 Encoder testing method and servo turntable control system Pending CN114623855A (en)

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CN118818273A (en) * 2024-09-19 2024-10-22 临海市新睿电子科技股份有限公司 Single-turn magnetic encoder automated test fixture

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CN207881736U (en) * 2018-02-12 2018-09-18 长春莫尔电子有限公司 A kind of encoder test platform
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CN209230653U (en) * 2018-07-09 2019-08-09 尔智自动化科技(上海)有限公司 A kind of encoder test platform
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JPS63214812A (en) * 1987-03-04 1988-09-07 Hitachi Ltd Servo motor positioning control device
CN103175568A (en) * 2013-03-19 2013-06-26 上海大学 Testing device for high-speed encoder
CN104197978A (en) * 2014-09-25 2014-12-10 南京埃斯顿自动化股份有限公司 Data detecting device of angle rotation control equipment
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CN118818273A (en) * 2024-09-19 2024-10-22 临海市新睿电子科技股份有限公司 Single-turn magnetic encoder automated test fixture
CN118818273B (en) * 2024-09-19 2024-11-26 临海市新睿电子科技股份有限公司 Automatic test fixture for single-coil magnetic encoder

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Application publication date: 20220614