CN114415811A - A high-compatibility computer motherboard - Google Patents

Abstract

The invention discloses a high-compatibility computer mainboard, which comprises a mainboard body; the main board body is provided with a main board control unit, an electrifying control FPGA unit, a first rectification transformation unit, a switching expansion unit, a logic selection switch, a plurality of first external interface units and a plurality of second external interface units; the main board body is also provided with a plurality of mounting structures for mounting the computer main board on the case; the power-on control FPGA unit is respectively connected with the logic selection switch and the starting button switch; the first rectification transformation unit is respectively connected with the power-on control FPGA unit and the mainboard control unit; the main board control unit is respectively connected with the switching expansion unit, each first external interface unit and each second external interface unit; the switching expansion unit is respectively connected with the network interface of each first external interface unit and the network interface of each second external interface unit. The invention realizes high compatibility of the computer mainboard.

Description

A high-compatibility computer motherboard

technical field

The invention belongs to the technical field of computer motherboards, in particular to a computer motherboard with high compatibility.

Background technique

Existing computer motherboards usually have only one fixed installation position when assembled with the chassis. Nowadays, users have more and more needs for multiple installation positions of computer motherboards. Multiple installation positions means that the computer motherboard can be installed in multiple different positions of the chassis, and the corresponding computer motherboard should be provided with multiple sets of external interfaces at different positions. Especially in the military field, the application scenarios of computers in this field are complex and changeable, and the application conditions are also very strict. The need for computer motherboards that are compatible with multiple mounting locations is even more pronounced. In addition, in the military field, the computer is used as a necessary communication transmission device. When a military computer is used in an unattended communication link, it must be powered on directly. When used in a manned communication link, you can choose to press the power button to turn on the power or directly power on. power on. However, the existing computer motherboard adopts a single power-on method of pressing the computer power-on key switch to power on, so it is not suitable for the military field. Therefore, it is necessary to develop a computer motherboard that is compatible with multiple installation locations and multiple power-on modes.

SUMMARY OF THE INVENTION

The purpose of the present invention is to overcome one or more deficiencies of the prior art and provide a computer motherboard with high compatibility.

The purpose of this invention is to realize through the following technical solutions:

A computer motherboard with high compatibility, the computer motherboard is respectively used for connecting with a switching power supply and a power-on button switch of a computer, and the computer motherboard includes a motherboard body; the motherboard body is provided with a motherboard control unit, a power-on control FPGA unit, a first rectification and transformation unit, a switching extension unit, a logic selection switch, a plurality of first external interface units and a plurality of second external interface units;

The motherboard body is also provided with a plurality of mounting structures for mounting the computer motherboard on the chassis;

the logic selection switch is used to output the first logic level or the second logic level;

The power-on control FPGA unit is respectively connected with the logic selection switch and the power-on key switch, and is used to detect the first logic level, the second logic level and the turn-on level of the power-on key switch, and generating a power-on control signal when the first logic level is detected, and generating a power-on control signal when the second logic level is detected and an on-level of a power-on key switch is detected;

The power-on control FPGA unit is also used for connecting with the switching power supply;

the first rectifier and transformer unit is used for connecting with the switching power supply;

The first rectifier and transformer unit is also connected to the power-on control FPGA unit and the motherboard control unit, respectively, and the first rectifier and transformer unit receives the power-on control signal and generates a first voltage signal, and the The mainboard control unit receives the first voltage signal and executes the computer booting action;

The mainboard control unit is respectively connected with the switching extension unit, each of the first external interface units and each of the second external interface units;

The switching expansion unit is respectively connected with the network interface of each of the first external interface units and the network interface of each of the second external interface units; the switching expansion unit is used to connect or disconnect the first external interface unit. The connection between the network interface and the mainboard control unit, and the connection between the network interface for connecting or disconnecting the second external interface unit and the mainboard control unit.

Further improved, the power-on control FPGA unit has a power supply terminal, a first level detection terminal, a second level detection terminal, a third level detection terminal and an enable control terminal, and the power-on control FPGA unit power supply The terminal is used to connect to the output terminal of the switching power supply, the first level detection terminal is used to connect to the power-on key switch, and the second level detection terminal is connected to the first level of the logic selection switch. The output terminal is connected, the third level detection terminal is connected to the second level output terminal of the logic selection switch, and the enable control terminal of the power-on control FPGA unit is connected to the enable control terminal of the first rectifier and transformer unit. connected to the power terminal, the enabling control terminal of the power-on control FPGA unit is used to output the power-on control signal, the power terminal of the first rectifier and transformer unit is connected to the output terminal of the switching power supply, the first The output end of a rectifier and transformer unit is connected to the power end of the mainboard control unit.

Further improved, the logic selection switch includes a first switch and a second switch; the second level detection terminal is connected to the first terminal of the first switch, and the third level detection terminal is connected to the first switch. The first ends of the two switches are connected; the first end of the first switch is connected to the power supply end of the power-on control FPGA unit through a first resistor, and the first end of the second switch is connected to the power source through a second resistor The power supply terminal of the power-on control FPGA unit is connected, and the second terminal of the first switch and the second terminal of the second switch are both grounded.

Further improved, the power supply terminal of the power-on control FPGA unit is connected to the output terminal of the switching power supply through the second rectification and transformation unit; the power supply terminal of the second rectification and transformation unit is connected to the output terminal of the switching power supply. connection, the enable terminal of the second rectifier and transformer unit is connected to the output terminal of the switching power supply through the third resistor, and the power terminal of the power-on control FPGA unit is connected to the output terminal of the second rectifier and transformer unit. connect.

In a further improvement, one end of the power-on key switch is grounded, and the first level detection terminal is connected to the non-ground terminal of the power-on key switch.

Further improved, the network interface of the first external interface unit adopts an IEEE802.3 interface connector.

Further improved, the network interface of the second external interface unit adopts a VPX interface connector.

Further improved, the mainboard control unit includes a network port isolation transformer; the switching expansion unit is connected to the network port isolation transformer; the switching expansion unit is used to connect or disconnect the network interface of the first external interface unit The connection with the isolation transformer of the network port, and the connection between the network interface of the second external interface unit and the isolation transformer of the network port for connecting or disconnecting.

In a further improvement, the mounting structure includes a plurality of mounting holes.

The beneficial effects of the present invention are:

(1), through the logic selection switch output direct power-on mode (the computer's power cord and external mains power supply can be connected to realize the computer boot) and the power-on mode by pressing the power button switch (the computer's power cord and external mains power supply) After the power is turned on, you need to press the power-on button switch to turn on) the logic level required for the two power-on and start-up methods. When the power-on control FPGA unit detects that the levels output by the second level detection terminal and the third level detection terminal constitute a logic level for direct power-on and power-on, the power-on control signal is directly generated. When the power-on control FPGA unit detects that the level output by the second level detection terminal and the third level detection terminal constitutes the logic level of power-on by pressing the power-on button switch, the first level of the power-on control FPGA unit is also required. The power-on control signal is generated only after the detection terminal detects the turn-on level of the power-on key switch. Therefore, the user selects different logic level outputs through the logic selection switch, and realizes the independent selection of various power-on and startup modes. At the same time, by arranging a plurality of first external interface units and a plurality of second external interface units in the limited board area of the main board body, and cooperating with the plurality of installation structures set on the main board body, the computer main board can be installed in multiple cases of the chassis. different positions, so that the computer motherboard achieves compatibility with multiple installation positions.

To sum up, the present invention realizes a computer motherboard that is compatible with multiple installation positions and multiple power-on modes, thereby obtaining a computer motherboard with high compatibility and meeting the diversified use requirements in the military field.

(2), further set the network interface of the first external interface unit to the interface connector of the IEEE802.3 standard, and set the network interface of the second external interface unit to the interface connector of the VPX standard, further realizing the computer motherboard The compatibility of multi-standard interfaces increases the applicability of computer motherboards in different application scenarios. At the same time, because of the necessity of VPX standard interfaces in the military field, computer motherboards are more suitable for military applications.

Description of drawings

1 is a schematic diagram of a computer motherboard;

Figure 2 is a logic block diagram of a computer motherboard;

Fig. 3 is the circuit connection schematic diagram of the logic selection switch;

Fig. 4 is the first part of the schematic diagram of switching expansion unit;

Fig. 5 is the second part of the schematic diagram of the switching expansion unit;

Fig. 6 is the third part of the schematic diagram of the switching expansion unit;

FIG. 7 is the fourth part of the schematic diagram of the switching extension unit.

In the figure, 1, the first external interface unit; 2, the second external interface unit; 3, the switching expansion unit; 4, the logic selection switch.

Detailed ways

The technical solutions of the present invention will be clearly and completely described below with reference to the embodiments. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative efforts shall fall within the protection scope of the present invention.

As shown in FIG. 1 to FIG. 2 , this embodiment provides a computer motherboard with high compatibility. The main board of the computer is respectively used for connecting with the switching power supply of the computer and the power-on key switch of the computer. The computer motherboard includes a motherboard body, a motherboard control unit, a power-on control FPGA unit, a first rectifier and transformer unit, a switching expansion unit 3, a logic selection switch 4, a plurality of first external interface units 1 and a plurality of second external interface units 2 . The mainboard control unit, the power-on control FPGA unit, the first rectifier and transformer unit, the switching expansion unit 3, the logic selection switch 4, the plurality of first external interface units 1 and the plurality of second external interface units 2 are all located on the mainboard body.

The main board body is also provided with a plurality of installation structures for installing the computer main board on the chassis. Through the installation structures, the computer main board can be installed in multiple different positions of the chassis. The mounting structure includes a plurality of mounting holes.

The logic selection switch 4 is used to output the first logic level or the second logic level.

The power-on control FPGA unit is respectively connected with the logic selection switch 4 and the power-on key switch, and is used to detect the first logic level, the second logic level and the turn-on level of the power-on key switch, and generate the power when the first logic level is detected. a power-on control signal, and the power-on control signal is generated when the second logic level is detected and the on-level of the power-on key switch is detected.

The power-on control FPGA unit is also used to connect with the switching power supply.

The first rectifying and transforming unit is used for connecting with the switching power supply.

The first rectifier and transformer unit is also connected to the power-on control FPGA unit and the mainboard control unit, respectively. The first rectifier and transformer unit receives the power-on control signal and generates a first voltage signal, and the motherboard control unit receives the first voltage signal and executes computer startup. action.

The mainboard control unit is respectively connected with the switching extension unit 3 , each of the first external interface units 1 and each of the second external interface units 2 .

The switching extension unit 3 is respectively connected with the network interface of each first external interface unit 1 and the network interface of each second external interface unit 2 . The switching extension unit 3 is used for connecting or disconnecting the network interface of the first external interface unit 1 and the mainboard control unit, and for connecting or disconnecting the network interface of the second external interface unit 2 and the mainboard control unit the connection between.

Specifically, in this embodiment, the network interface of the first external interface unit 1 adopts an IEEE802.3 interface connector, and the number of the first external interface unit 1 is one, which is located on the right side of the computer motherboard. The network interface of the second external interface unit 2 adopts a VPX interface connector, and the number of the second external interface unit 2 is one, which is located on the left side of the computer motherboard. The power-on control FPGA unit is provided with a power supply terminal, a first level detection terminal, a second level detection terminal, a third level detection terminal and an enable control terminal. The power supply terminal of the power-on control FPGA unit is used to connect with the output terminal of the switching power supply, the first level detection terminal is used to connect to the power-on button switch, and the second level detection terminal is connected to the first level output terminal of the logic selection switch 4 connection, the third level detection terminal is connected with the second level output terminal of the logic selection switch 4, the enable control terminal of the power-on control FPGA unit is connected with the enable terminal of the first rectifier and transformer unit, and the power-on control FPGA unit The enabling control terminal of the first rectifier and transformer unit outputs a power-on control signal, the power terminal of the first rectifier and transformer unit is connected to the output terminal of the switching power supply, and the output terminal of the first rectifier transformer unit is connected to the power terminal of the mainboard control unit. Specifically, in this embodiment, the first rectifier and transformer unit includes three rectifier and transformer chips whose model is IS6608, two rectifier and transformer chips whose model is IS6605, and one rectifier and transformer chip whose model is SGM6010YTD10G/TR. The enable terminals of the rectifier and transformer chips are respectively connected with the six enable control terminals of the power-on control FPGA unit in one-to-one correspondence. The power terminals of the six rectifier and transformer chips are connected to the output terminals of the switching power supply. The output terminals of the chip are respectively connected with the six power terminals of the mainboard control unit.

Preferably, as shown in FIG. 3 , the model used for the logic selection switch 4 is CDM-02, and the logic selection switch 4 includes two switches, namely a first switch and a second switch. The second level detection terminal of the power-on control FPGA unit is connected to the first terminal of the first switch, and the third level detection terminal is connected to the first terminal of the second switch. The first end of the first switch is connected to the power end of the power-on control FPGA unit through the first resistor R212, the first end of the second switch is connected to the power end of the power-on control FPGA unit through the second resistor R214, and the first end of the first switch is connected to the power end of the power-on control FPGA unit. Both the second terminal and the second terminal of the second switch are grounded. In this embodiment, when the first switch and the second switch are set to the fully open state, they constitute the first logic level for direct power-on. When the first switch is set to be on and the second switch is set to be off, it constitutes a second logic level for turning on the power by pressing the power-on button switch. The logic selection switch 4 can also choose to output other logic levels for switching the power-on mode.

Preferably, as shown in FIG. 2 , the power supply terminal of the power-on control FPGA unit is connected to the output terminal of the switching power supply through the second rectification and transformation unit, and the power supply terminal of the second rectification and transformation unit is connected to the output terminal of the switching power supply. The enabling end of the second rectifier and transformer unit is connected to the output end of the switching power supply through the third resistor, and the power end of the power-on control FPGA unit is connected to the output end of the second rectifier and transformer unit. The third resistor divides the voltage so that the enable terminal of the second rectifier and transformer unit is always in a high level state (enable normally open). In this embodiment, the second rectifier and transformer unit adopts a rectifier and transformer chip whose model is IS6605.

Preferably, one end of the power-on key switch is grounded, the first level detection terminal is connected to the non-ground terminal of the power-on key switch, and the turn-on level detected by the first level detection terminal after the user presses the power-on key switch is low power When the user does not press the power-on key switch, the disconnection level detected by the first level detection terminal is a high level.

Preferably, the mainboard control unit includes a network port isolation transformer. The switching expansion unit 3 is connected to the network port isolation transformer, and the switching expansion unit 3 is used to connect or disconnect the network interface of the first external interface unit 1 and the network port isolation transformer, and is used to connect or disconnect the first external interface. The connection between the network interface of the external interface unit 2 and the network port isolation transformer. Specifically, as shown in FIGS. 4 to 7 , the number of network port isolation transformers in this embodiment is four, and the models used for the four network port isolation transformers are all SG24002G, which are the first network port isolation transformer U44 and the third Isolation transformer U45 for the second network port, isolation transformer U46 for the third network port and isolation transformer U47 for the fourth network port, TD1+ port and TD1- port, TD2+ port and TD2- port, TD3+ port and TD3- port of the four network port isolation transformers , TD4+ port and TD4- port are used to connect with PHY module, used to send or receive PHY differential data, MX1+ port and MX1- port, MX2+ port and MX2- port, MX3+ port and MX3- port of the four network port isolation transformers The port, the MX4+ port and the MX4- port are all connected to the switching extension unit 3 for sending the transformed PHY differential data to the network interface of the first external interface unit 1 or the network interface of the second external interface unit 2, and The data input from the network interface of the first external interface unit 1 or the network interface of the second external interface unit 2 is input into the network port isolation transformer for voltage transformation processing. The switching extension unit 3 is divided into four parts, the first part is connected to the isolation transformer U44 of the first network port, the second part is connected to the isolation transformer U45 of the second network port, the third part is connected to the isolation transformer U46 of the third network port, and the fourth part is connected to the isolation transformer U46 of the third network port. Connect to the fourth network port isolation transformer U47.

As shown in FIG. 4 , the first part of the switching expansion unit 3 includes two sets of switching resistors, the first set of switching resistors is located on the communication path between the network interface of the first external interface unit 1 and the first network port isolation transformer U44, and the second set of switching resistors The switching resistor is located on the communication path between the network interface of the second external interface unit 2 and the first network interface isolation transformer U44. The TCT1 port of the first network port isolation transformer U44 is grounded through the first capacitor C841, the TCT2 port of the first network port isolation transformer U44 is grounded through the second capacitor C842, and the TCT3 port of the first network port isolation transformer U44 is grounded through the third capacitor C843 , the TCT4 port of the first network port isolation transformer U44 is grounded through the fourth capacitor C848, the MCT1 port of the first network port isolation transformer U44 is connected to the first end of the fourth resistor R549, and the second end of the fourth resistor R549 is connected to the fifth The capacitor C844 is grounded, the MCT2 port of the first network port isolation transformer U44 is connected to the first end of the fifth resistor R550, the second end of the fifth resistor R550 is grounded through the fifth capacitor C844, and the MCT3 port of the first network port isolation transformer U44 It is connected to the first end of the sixth resistor R551, the second end of the sixth resistor R551 is grounded through the fifth capacitor C844, the MCT4 port of the isolation transformer U44 of the first network port is connected to the first end of the seventh resistor R553, and the seventh resistor The second end of R553 is grounded through the fifth capacitor C844. The first group of switching resistors includes an eighth resistor R2773, a ninth resistor R2774, a tenth resistor R2776, an eleventh resistor R2775, a twelfth resistor R2778, a thirteenth resistor R2777, a fourteenth resistor R2780 and a fifteenth resistor R2779 . The first end of the eighth resistor R2773 is connected to the MX1+ port of the first network port isolation transformer U44, the first end of the ninth resistor R2774 is connected to the MX1- port of the first network port isolation transformer U44, and the first end of the tenth resistor R2776 is connected to the MX1- port of the first network port isolation transformer U44. The terminal is connected to the MX2+ port of the isolation transformer U44 of the first network port, the first terminal of the eleventh resistor R2775 is connected to the MX2- port of the isolation transformer U44 of the first network port, and the first terminal of the twelfth resistor R2778 is connected to the first network port The first end of the thirteenth resistor R2777 is connected to the MX3- port of the first network port isolation transformer U44, and the first end of the fourteenth resistor R2780 is connected to the first network port isolation transformer U44. The MX4+ port is connected, and the second end of the fifteenth resistor R2779 is connected to the MX4- port of the isolation transformer U44 of the first network port. The second end of the eighth resistor R2773, the second end of the ninth resistor R2774, the second end of the tenth resistor R2776, the second end of the eleventh resistor R2775, the second end of the twelfth resistor R2778, the thirteenth The second end of the resistor R2777, the second end of the fourteenth resistor R2780 and the second end of the fifteenth resistor R2779 are all connected to the network interface of the first external interface unit. The second group of switching resistors includes a sixteenth resistor R2765, a seventeenth resistor R2766, an eighteenth resistor R2767, a nineteenth resistor R2768, a twentieth resistor R2769, a twenty-first resistor R2770, a twenty-second resistor R2771 and The twenty-third resistor R2772. The first end of the sixteenth resistor R2765 is connected to the MX1+ port of the isolation transformer U44 for the first network port, the first end of the seventeenth resistor R2766 is connected to the MX1- port of the isolation transformer U44 for the first network port, and the eighteenth resistor R2767 The first end is connected to the MX2+ port of the first network port isolation transformer U44, the first end of the nineteenth resistor R2768 is connected to the MX2- port of the first network port isolation transformer U44, and the first end of the twentieth resistor R2769 is connected to The MX3+ port of the first network port isolation transformer U44 is connected, the first end of the twenty-first resistor R2770 is connected to the MX3- port of the first network port isolation transformer U44, and the first end of the twenty-second resistor R2771 is connected to the first network port The port is connected to the MX4+ port of the isolation transformer U44, and the second end of the twenty-third resistor R2772 is connected to the MX4- port of the isolation transformer U44 of the first network port. The second end of the sixteenth resistor R2765, the second end of the seventeenth resistor R2766, the second end of the eighteenth resistor R2767, the second end of the nineteenth resistor R2768, the second end of the twentieth resistor R2769, The second end of the twenty-first resistor R2770, the second end of the twenty-second resistor R2771, and the second end of the twenty-third resistor R2772 are all connected to the network interface of the second external interface unit.

As shown in Figure 5, the second part of the switching extension unit also includes two sets of switching resistors. The first set of switching resistors is located on the communication path between the network interface of the first external interface unit and the isolation transformer U45 of the second network port. The switching resistor is located on the communication path between the network interface of the second external interface unit and the second network interface isolation transformer U45. The TCT1 port of the isolation transformer U45 of the second network port is grounded through the sixth capacitor C853, the TCT2 port of the isolation transformer U45 of the second network port is grounded through the seventh capacitor C854, and the TCT3 port of the isolation transformer U45 of the second network port is grounded through the eighth capacitor C855 , the TCT4 port of the isolation transformer U45 of the second network port is grounded through the ninth capacitor C860, the MCT1 port of the isolation transformer U45 of the second network port is connected to the first end of the twenty-fourth resistor R556, and the second port of the twenty-fourth resistor R556 is connected to the ground. The terminal is grounded through the tenth capacitor C864, the MCT2 port of the second network port isolation transformer U45 is connected to the first terminal of the twenty-fifth resistor R557, the second terminal of the twenty-fifth resistor R557 is grounded through the tenth capacitor C864, and the second terminal is connected to the ground through the tenth capacitor C864. The MCT3 port of the network port isolation transformer U45 is connected to the first end of the twenty-sixth resistor R558, the second end of the twenty-sixth resistor R558 is grounded through the tenth capacitor C864, and the MCT4 port of the second network port isolation transformer U45 is connected to the first end of the twenty-sixth resistor R558. The first end of the twenty-seventh resistor R559 is connected, and the second end of the twenty-seventh resistor R559 is grounded through the tenth capacitor C864. The first group of switching resistors includes the twenty-eighth resistor R2790, the twenty-ninth resistor R2789, the thirty-first resistor R2792, the thirty-first resistor R2791, the thirty-second resistor R2794, the thirty-third resistor R2793, and the thirty-third resistor R2793. Four resistors R2795 and a thirty-fifth resistor R2796. The first end of the twenty-eighth resistor R2790 is connected to the MX1+ port of the isolation transformer U45 for the second network port, the first end of the twenty-ninth resistor R2789 is connected to the MX1- port of the isolation transformer U45 for the second network port, and the thirtieth The first end of the resistor R2792 is connected to the MX2+ port of the isolation transformer U45 of the second network port, the first end of the thirty-first resistor R2791 is connected to the MX2- port of the isolation transformer U45 of the second network port, and the The first end is connected to the MX3+ port of the isolation transformer U45 of the second network port, the first end of the thirty-third resistor R2793 is connected to the MX3- port of the isolation transformer U45 of the second network port, and the first end of the thirty-fourth resistor R2795 It is connected to the MX4+ port of the isolation transformer U45 of the second network port, and the first end of the thirty-fifth resistor R2796 is connected to the MX4- port of the isolation transformer U45 of the second network port. The second end of the twenty-eighth resistor R2790, the second end of the twenty-ninth resistor R2789, the second end of the thirtieth resistor R2792, the second end of the thirty-first resistor R2791, the second end of the thirty-second resistor R2794 The second end, the second end of the thirty-third resistor R2793, the second end of the thirty-fourth resistor R2795, and the second end of the thirty-fifth resistor R2796 are all connected to the network interface of the first external interface unit. The second group of switching resistors includes the thirty-sixth resistor R2781, the thirty-seventh resistor R2782, the thirty-eighth resistor R2783, the thirty-ninth resistor R2784, the fortieth resistor R2785, the forty-first resistor R2786, and the fortieth resistor R2786. Two resistors R2787 and a forty-third resistor R2788. The first end of the thirty-sixth resistor R2781 is connected to the MX1+ port of the isolation transformer U45 for the second network port, and the first end of the thirty-seventh resistor R2782 is connected to the MX1- port of the isolation transformer U45 for the second network port. The first end of the eighth resistor R2783 is connected to the MX2+ port of the isolation transformer U45 of the second network port, the first end of the thirty-ninth resistor R2784 is connected to the MX2- port of the isolation transformer U45 of the second network port, and the fortieth resistor R2785 The first end is connected to the MX3+ port of the isolation transformer U45 of the second network port, the first end of the forty-first resistor R2786 is connected to the MX3- port of the isolation transformer U45 of the second network port, and the first end of the forty-second resistor R2787 It is connected to the MX4+ port of the isolation transformer U45 of the second network port, and the first end of the forty-third resistor R2788 is connected to the MX4- port of the isolation transformer U45 of the second network port. The second end of the thirty-sixth resistor R2781, the second end of the thirty-seventh resistor R2782, the second end of the thirty-eighth resistor R2783, the second end of the thirty-ninth resistor R2784, the second end of the fortieth resistor R2785 The second end, the second end of the forty-first resistor R2786, the second end of the forty-second resistor R2787, and the second end of the forty-third resistor R2788 are all connected to the network interface of the second external interface unit.

As shown in Figure 6, the third part of the switching extension unit also includes two sets of switching resistors, the first set of switching resistors is located on the communication path between the network interface of the first external interface unit and the third network port isolation transformer U46, and the second set of switching resistors The switching resistor is located on the communication path between the network interface of the second external interface unit and the isolation transformer U46 of the third network interface. The TCT1 port of the isolation transformer U46 of the third network port is grounded through the eleventh capacitor C869, the TCT2 port of the isolation transformer U46 of the third network port is grounded through the twelfth capacitor C870, and the TCT3 port of the isolation transformer U46 of the third network port is connected to the ground through the thirteenth capacitor C870. The capacitor C871 is grounded, the TCT4 port of the isolation transformer U46 of the third network port is grounded through the fourteenth capacitor C875, the MCT1 port of the isolation transformer U46 of the third network port is connected to the first end of the forty-fourth resistor R563, and the forty-fourth resistor is connected to the ground. The second end of R563 is grounded through the fifteenth capacitor C876, the MCT2 port of the third network port isolation transformer U46 is connected to the first end of the forty-fifth resistor R564, and the second end of the forty-fifth resistor R564 is connected through the fifteenth The capacitor C876 is grounded, the MCT3 port of the isolation transformer U46 of the third network port is connected to the first end of the forty-sixth resistor R565, the second end of the forty-sixth resistor R565 is grounded through the fifteenth capacitor C876, and the third network port is isolated The MCT4 port of the transformer U46 is connected to the first end of the forty-seventh resistor R568, and the second end of the forty-seventh resistor R568 is grounded through the fifteenth capacitor C876. The first group of switching resistors includes the forty-eighth resistor R2805, the forty-ninth resistor R2806, the fiftieth resistor R2808, the fifty-first resistor R2807, the fifty-second resistor R2810, the fifty-third resistor R2809, and the fifty-third resistor R2809. Four resistors R2811 and fifty-fifth resistors R2812. The first end of the forty-eighth resistor R2805 is connected to the MX1+ port of the third network port isolation transformer U46, the first end of the forty-ninth resistor R2806 is connected to the MX1- port of the third network port isolation transformer U46, and the fifty The first end of the resistor R2808 is connected to the MX2+ port of the third network port isolation transformer U46, the first end of the fifty-first resistor R2807 is connected to the MX2- port of the third network port isolation transformer U46, and the fifty-second resistor R2810 The first end is connected to the MX3+ port of the isolation transformer U46 of the third network port, the first end of the fifty-third resistor R2809 is connected to the MX3- port of the isolation transformer U46 of the third network port, and the first end of the fifty-fourth resistor R2811 It is connected to the MX4+ port of the third network port isolation transformer U46, and the first end of the fifty-fifth resistor R2812 is connected to the MX4- port of the third network port isolation transformer U46. The second end of the forty-eighth resistor R2805, the second end of the forty-ninth resistor R2806, the second end of the fiftieth resistor R2808, the second end of the fifty-first resistor R2807, the second end of the fifty-second resistor R2810 The second end, the second end of the fifty-third resistor R2809, the second end of the fifty-fourth resistor R2811, and the second end of the fifty-fifth resistor R2812 are all connected to the network interface of the first external interface unit. The second group of switching resistors includes the fifty-sixth resistor R2797, the fifty-seventh resistor R2798, the fifty-eighth resistor R2799, the fifty-ninth resistor R2800, the sixtieth resistor R2801, the sixty-first resistor R2802, and the sixtieth resistor R2802. Two resistors R2803 and sixty-third resistors R2804. The first end of the fifty-sixth resistor R2797 is connected to the MX1+ port of the third network port isolation transformer U46, and the first end of the fifty-seventh resistor R2798 is connected to the MX1- port of the third network port isolation transformer U46. The first end of the eighth resistor R2799 is connected to the MX2+ port of the third network port isolation transformer U46, the first end of the fifty-ninth resistor R2800 is connected to the MX2- port of the third network port isolation transformer U46, and the sixtieth resistor R2801's The first end is connected to the MX3+ port of the isolation transformer U46 of the third network port, the first end of the sixty-first resistor R2802 is connected to the MX3- port of the isolation transformer U46 of the third network port, and the first end of the sixty-second resistor R2803 It is connected to the MX4+ port of the isolation transformer U46 of the third network port, and the first end of the sixty-third resistor R2804 is connected to the MX4- port of the isolation transformer U46 of the third network port. The second end of the fifty-sixth resistor R2797, the second end of the fifty-seventh resistor R2798, the second end of the fifty-eighth resistor R2799, the second end of the fifty-ninth resistor R2800, the second end of the sixtieth resistor R2801 The second terminal, the second terminal of the sixty-first resistor R2802, the second terminal of the sixty-second resistor R2803, and the second terminal of the sixty-third resistor R2804 are all connected to the network interface of the second external interface unit.

As shown in FIG. 7 , the fourth part of the switching expansion unit 3 also includes two sets of switching resistors. The first set of switching resistors is located on the communication path between the network interface of the first external interface unit 1 and the fourth network port isolation transformer U47. The two groups of switching resistors are located on the communication path between the network interface of the second external interface unit 2 and the fourth network interface isolation transformer U47. The TCT1 port of the isolation transformer U47 of the fourth network port is grounded through the sixteenth capacitor C877, the TCT2 port of the isolation transformer U47 of the fourth network port is grounded through the seventeenth capacitor C885, and the TCT3 port of the isolation transformer U47 of the fourth network port is connected to the ground through the eighteenth capacitor. Capacitor C902 is grounded, the TCT4 port of the fourth network port isolation transformer U47 is grounded through the nineteenth capacitor C903, the MCT1 port of the fourth network port isolation transformer U47 is connected to the first end of the sixty-fourth resistor R574, and the sixty-fourth resistor is connected to the ground. The second end of R574 is grounded through the twentieth capacitor C904, the MCT2 port of the fourth network port isolation transformer U47 is connected to the first end of the sixty-fifth resistor R575, and the second end of the sixty-fifth resistor R575 is connected to the twentieth Capacitor C904 is grounded, the MCT3 port of the fourth network port isolation transformer U47 is connected to the first end of the sixty-sixth resistor R576, the second end of the sixty-sixth resistor R576 is grounded through the twentieth capacitor C904, and the fourth network port is isolated The MCT4 port of the transformer U47 is connected to the first end of the sixty-seventh resistor R580, and the second end of the sixty-seventh resistor R580 is grounded through the twentieth capacitor C904. The first group of switching resistors includes the sixty-eighth resistor R2821, the sixty-ninth resistor R2822, the seventieth resistor R2824, the seventy-first resistor R2823, the seventy-second resistor R2826, the seventy-third resistor R2825, and the seventieth resistor R2825. Four resistors R2828 and seventy-fifth resistors R2827. The first end of the sixty-eighth resistor R2821 is connected to the MX1+ port of the fourth network port isolation transformer U47, the first end of the sixty-ninth resistor R2822 is connected to the MX1- port of the fourth network port isolation transformer U47, and the seventieth The first end of resistor R2824 is connected to the MX2+ port of the fourth network port isolation transformer U47, the first end of the seventy-first resistor R2823 is connected to the MX2- port of the fourth network port isolation transformer U47, and the seventy-second resistor R2826 is connected to the MX2- port of the fourth network port isolation transformer U47. The first end is connected to the MX3+ port of the fourth network port isolation transformer U47, the first end of the seventy-third resistor R2825 is connected to the MX3- port of the fourth network port isolation transformer U47, and the first end of the seventy-fourth resistor R2828 It is connected to the MX4+ port of the fourth network port isolation transformer U47, and the first end of the seventy-fifth resistor R2827 is connected to the MX4- port of the fourth network port isolation transformer U47. The second end of the sixty-eighth resistor R2821, the second end of the sixty-ninth resistor R2822, the second end of the seventieth resistor R2824, the second end of the seventy-first resistor R2823, the second end of the seventy-second resistor R2826 The second end, the second end of the seventy-third resistor R2825, the second end of the seventy-fourth resistor R2828, and the second end of the seventy-fifth resistor R2827 are all connected to the network interface of the first external interface unit. The second group of switching resistors includes the 76th resistor R2814, the 77th resistor R2813, the 78th resistor R2815, the 79th resistor R2816, the 80th resistor R2818, the 81st resistor R2817, the 80th resistor Two resistors R2819 and an eighty-third resistor R2820. The first end of the seventy-sixth resistor R2814 is connected to the MX1+ port of the fourth network port isolation transformer U47, the first end of the seventy-seventh resistor R2813 is connected to the MX1- port of the fourth network port isolation transformer U47, and the seventieth The first end of the eighth resistor R2815 is connected to the MX2+ port of the fourth network port isolation transformer U47, the first end of the seventy-ninth resistor R2816 is connected to the MX2- port of the fourth network port isolation transformer U47, and the eightyth resistor R2818's The first end is connected to the MX3+ port of the fourth network port isolation transformer U47, the first end of the eighty-first resistor R2817 is connected to the MX3- port of the fourth network port isolation transformer U47, and the first end of the eighty-second resistor R2819 It is connected to the MX4+ port of the fourth network port isolation transformer U47, and the first end of the eighty-third resistor R2820 is connected to the MX4- port of the fourth network port isolation transformer U47. The second end of the seventy-sixth resistor R2814, the second end of the seventy-seventh resistor R2813, the second end of the seventy-eighth resistor R2815, the second end of the seventy-ninth resistor R2816, the second end of the eightyth resistor R2818 The second terminal, the second terminal of the eighty-first resistor R2817, the second terminal of the eighty-second resistor R2819, and the second terminal of the eighty-third resistor R2820 are all connected to the network interface of the second external interface unit.

The first set of switching resistors and the second set of switching resistors are selected and attached according to the needs of different installation positions of users. When the first group of switching resistors from the first part to the fourth part of the switching expansion unit is selected, the network interface in the first external interface unit 1 is connected with the network port isolation transformer, and the network interface in the first external interface unit 1 is isolated from the network port Data transmission between transformers. When the second group of switching resistors from the first part to the fourth part of the expansion unit is switched, the network interface in the second external interface unit 2 is connected with the network port isolation transformer, and the network interface in the second external interface unit 2 is isolated from the network port Data transmission between transformers.

The working principle of the present invention is:

First, the realization principle of the compatibility of multiple installation positions of the computer motherboard is: because the number of USB interfaces supported by the computer motherboard can be

Realize multiple, so through the connection between the motherboard control unit and the first external interface unit 1 and the connection with the second external interface unit 2, the interfaces such as USB are divided into the first external interface unit 1 and the second external interface unit located on the opposite sides of the computer motherboard. 2. External interface unit 2. However, because the number of network interfaces that the computer motherboard can support is limited, the present invention adopts the switching expansion unit 3 to perform the gating switching of the network interfaces. When the user needs the first installation position, the switching extension unit 3 selects the network interface in the first external interface unit 1, and when the user needs the second installation position, the switching expansion unit 3 selects the network interface in the second external interface unit 2 Except that the network interfaces in different external interface units need to be switched, other external interfaces in different external interface units are all channels.

Second, the realization principle that the computer motherboard is compatible with multiple power-on modes is: the second level detection terminal of the power-on control FPGA unit detects the level of the first terminal of the first switch, and the third level detection terminal detects the first terminal of the second switch. terminal level. When both detected levels are high, the power-on control FPGA unit directly generates a power-on control signal. When it is detected that the level of the first switch is high and the level of the second switch is low, if the level detected by the first level detection terminal of the power-on control FPGA unit is the power-on of the power-on key switch If it is flat, the power-on control FPGA unit generates a power-on control signal. After the first rectifier and transformer unit receives the power-on control signal output by the power-on control FPGA unit, the first rectifier and transformer unit becomes the working state, and outputs the transformed first voltage signal to the power terminal of the mainboard control unit , the mainboard control unit receives power and executes the computer booting action.

The foregoing are only preferred embodiments of the present invention, and it should be understood that the present invention is not limited to the forms disclosed herein, and should not be construed as an exclusion of other embodiments, but may be used in various other combinations, modifications, and environments, and Modifications can be made within the scope of the concepts described herein, from the above teachings or from skill or knowledge in the relevant field. However, modifications and changes made by those skilled in the art do not depart from the spirit and scope of the present invention, and should all fall within the protection scope of the appended claims of the present invention.

Claims (9)

1. a high-compatibility computer motherboard, the computer motherboard is respectively used to connect with the switching power supply of the computer and the power-on key switch, it is characterized in that, the computer motherboard comprises a motherboard body; the motherboard body is provided with a motherboard control unit, power-on control FPGA unit, first rectification and transformation unit, switching expansion unit, logic selection switch, multiple first external interface units and multiple second external interface units; The motherboard body is also provided with a plurality of mounting structures for mounting the computer motherboard on the chassis; the logic selection switch is used to output the first logic level or the second logic level; The power-on control FPGA unit is respectively connected with the logic selection switch and the power-on key switch, and is used to detect the first logic level, the second logic level and the turn-on level of the power-on key switch, and generating a power-on control signal when the first logic level is detected, and generating a power-on control signal when the second logic level is detected and an on-level of a power-on key switch is detected; The power-on control FPGA unit is also used for connecting with the switching power supply; the first rectifier and transformer unit is used for connecting with the switching power supply; The first rectifier and transformer unit is also connected to the power-on control FPGA unit and the motherboard control unit, respectively, and the first rectifier and transformer unit receives the power-on control signal and generates a first voltage signal, and the The mainboard control unit receives the first voltage signal and executes the computer booting action; The mainboard control unit is respectively connected with the switching extension unit, each of the first external interface units and each of the second external interface units; The switching expansion unit is respectively connected with the network interface of each of the first external interface units and the network interface of each of the second external interface units; the switching expansion unit is used to connect or disconnect the first external interface unit. The connection between the network interface and the mainboard control unit, and the connection between the network interface for connecting or disconnecting the second external interface unit and the mainboard control unit. 2. a kind of high-compatibility computer motherboard according to claim 1 is characterized in that, described power-on control FPGA unit has a power supply terminal, a first level detection terminal, a second level detection terminal, and a third power supply terminal. A level detection terminal and an enable control terminal, the power supply terminal of the power-on control FPGA unit is used for connecting with the output terminal of the switching power supply, and the first level detection terminal is used for connecting with the power-on key switch, so The second level detection terminal is connected to the first level output terminal of the logic selection switch, the third level detection terminal is connected to the second level output terminal of the logic selection switch, and the power-on control The enable control terminal of the FPGA unit is connected to the enable terminal of the first rectifier and transformer unit, the enable control terminal of the power-on control FPGA unit is used for outputting the power-on control signal, and the first rectifier transformer unit is used for outputting the power-on control signal. The power supply terminal of the voltage unit is connected to the output terminal of the switching power supply, and the output terminal of the first rectifier and transformer unit is connected to the power supply terminal of the mainboard control unit. 3. The high-compatibility computer motherboard according to claim 2, wherein the logic selection switch comprises a first switch and a second switch; the second level detection terminal and the first switch The first end of the second switch is connected to the third level detection end; the first end of the first switch is connected to the power supply end of the power-on control FPGA unit through the first resistor The first end of the second switch is connected to the power supply end of the power-on control FPGA unit through the second resistor, and the second end of the first switch and the second end of the second switch are both grounded. 4. A kind of high-compatibility computer motherboard according to claim 2, is characterized in that, the power supply end of described power-on control FPGA unit is connected with the output end of described switching power supply through the second rectification and transformation unit; The power terminal of the second rectifier and transformer unit is connected to the output terminal of the switching power supply, and the enable terminal of the second rectifier and transformer unit is connected to the output terminal of the switching power supply through a third resistor. The power supply terminal of the control FPGA unit is connected to the output terminal of the second rectification and transformation unit. 5 . The computer motherboard with high compatibility according to claim 2 , wherein one end of the power-on key switch is grounded, and the first level detection terminal is connected to a non-ground terminal of the power-on key switch. 6 . . 6 . The computer motherboard with high compatibility according to claim 1 , wherein the network interface of the first external interface unit adopts an IEEE802.3 interface connector. 7 . 7 . The computer motherboard with high compatibility according to claim 1 , wherein the network interface of the second external interface unit adopts a VPX interface connector. 8 . 8. The high-compatibility computer motherboard according to claim 1, wherein the motherboard control unit comprises a network port isolation transformer; the switching expansion unit is connected with the network port isolation transformer; the The switching extension unit is used to connect or disconnect the network interface of the first external interface unit and the connection between the network port isolation transformer, and to connect or disconnect the network interface of the second external interface unit and the network port isolation transformer. connection between. 9 . The computer motherboard with high compatibility according to claim 1 , wherein the mounting structure comprises a plurality of mounting holes. 10 .

Images