CN114360437A - Display device, display control method and device and storage medium - Google Patents
Display device, display control method and device and storage medium Download PDFInfo
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Abstract
A display control method and device, a display device and a storage medium are provided, wherein the display device comprises: the display device comprises a controller and a display panel, wherein the controller is configured to determine a first data voltage range and a black insertion proportion corresponding to a target gray scale according to a preset corresponding relation between the gray scale and a data voltage and the black insertion proportion when the target gray scale of a current frame of the sub-pixel is in a first gray scale range, and control a first part of driving time interval to be displayed in the first data voltage range, a second part of driving time interval to be displayed in the data voltage corresponding to a zero gray scale, and the number of the driving time interval of the second part of driving time interval is determined according to the black insertion proportion. The scheme provided by the embodiment controls the light emitting time by controlling the part of the driving time to display the zero gray scale, and can realize the display under the lower gray scale under the larger current.
Description
Technical Field
Embodiments of the present disclosure relate to, but not limited to, display technologies, and more particularly, to a display device, a display control method and apparatus, and a storage medium.
Background
Micro Light-Emitting diodes (Micro LEDs for short) gradually become a prospective technology of global attention, but due to the influence of the characteristics of the Light-Emitting diodes (LEDs), the uniformity of brightness is poor under low current density, and the difficulty in realizing low gray scale is high.
Disclosure of Invention
The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.
The embodiment of the application provides a display device, a display control method and device and a storage medium, and realizes low-gray-scale display.
In one aspect, an embodiment of the present application provides a display device, including: the display panel comprises a plurality of sub-pixels, one frame of display time of the display panel comprises a plurality of driving time periods, and each sub-pixel corresponds to part of the driving time periods;
the controller is configured to determine a first data voltage range and a black insertion proportion corresponding to a target gray scale according to a preset corresponding relation between the gray scale and a data voltage and a black insertion proportion when the target gray scale of the current frame of the sub-pixel is in a first gray scale range, control the sub-pixel to display in the first data voltage range in a first part of driving time period, display in a data voltage corresponding to a zero gray scale in a second part of driving time period, and determine the number of the driving time periods in the second part of driving time period according to the black insertion proportion.
In an exemplary embodiment, the sub-pixel includes a pixel driving circuit and a light emitting element, the pixel driving circuit includes a current control sub-circuit and a light emitting period control sub-circuit, the current control sub-circuit connects a display data terminal and a first node; the light-emitting duration control sub-circuit is connected with a control data end, the first node and the light-emitting element, and the circuit control sub-circuit is set to receive a signal of a display data end, determine the current intensity of a driving current according to the signal of the display data end and generate the driving current to pass through the first node to the light-emitting duration control sub-circuit; the luminous time sub-circuit is set to receive a signal of a control data end, and the connection between the current control sub-circuit and the luminous element is switched on or off according to the signal of the control data end so as to control the luminous time of the luminous element to be a first time or a second time;
the controller is further configured to send a first duration control signal to the control data terminal to control the light emitting duration of the light emitting element to be a first duration when the target gray scale of the current frame of the sub-pixel is in a first gray scale range.
In an exemplary embodiment, the controller is further configured to,
when the target gray scale of the current frame of the sub-pixel is in a second gray scale range, determining a second data voltage range corresponding to the target gray scale according to a preset corresponding relation between the gray scale and the data voltage, controlling the sub-pixel to display in the second data voltage range in all driving periods corresponding to the sub-pixel, and sending a first time length control signal to the control data terminal to control the light emitting time length of the light emitting element to be a first time length;
when the target gray scale of the current frame of the sub-pixel is in a third gray scale range, determining a third data voltage range corresponding to the target gray scale according to a preset corresponding relation between the gray scale and the data voltage, controlling all driving time periods corresponding to the sub-pixel to be displayed in the third data voltage range, and sending a second time length control signal to the control data terminal to control the light emitting time length of the light emitting element to be a second time length; wherein the second duration is greater than the first duration.
In an exemplary embodiment, the sub-pixels in the same row of the plurality of sub-pixels form a sub-pixel row, and n sub-pixel rows adjacent to each other in the column direction form a sub-pixel group; in the same sub-pixel group, sub-pixels positioned in the same sub-pixel row correspond to the same driving time period, and sub-pixels positioned in different sub-pixel rows correspond to different driving time periods;
the display panel further includes a plurality of shift register circuits in one-to-one correspondence with the sub-pixel groups, the shift register circuits being configured to: the scan signals are sequentially supplied to a plurality of sub-pixel rows within one sub-pixel group.
In an exemplary embodiment, the sub-pixels of the display panel are divided into a plurality of sub-pixel blocks distributed in an array, each sub-pixel block comprises the same number of sub-pixels, and the sub-pixels of the same sub-pixel block belong to the same sub-pixel group;
the display device further comprises a plurality of driving circuits in one-to-one correspondence with the sub-pixel blocks, the driving circuits are connected with the pixel driving circuit of each sub-pixel of the sub-pixel block corresponding to the driving circuits, the pixel driving circuits are further connected with a first power supply end, and the driving circuits are configured to provide power signals for the first power supply end of the pixel driving circuits and provide data signals for the display data end and the control data end of the pixel driving circuits respectively.
In an exemplary embodiment, the gray scales of the first gray scale range, the second gray scale range and the third gray scale range may sequentially increase, the first data voltage range, the second data voltage range and the third data voltage range may sequentially increase, or the first data voltage range and the second data voltage range may overlap.
In another aspect, an embodiment of the present application provides a display control method, where the display control method is applied to a display panel, the display panel includes a plurality of sub-pixels, a display time of one frame of the display panel includes a plurality of driving periods, and each sub-pixel corresponds to a part of the driving period, and the display control method includes:
when the target gray scale of the current frame of the sub-pixel is in a first gray scale range, determining a first data voltage range and a black insertion proportion corresponding to the target gray scale according to a preset corresponding relation between the gray scale and data voltage and the black insertion proportion, controlling the sub-pixel to be in a driving time period corresponding to the sub-pixel, wherein a first part of the driving time period is displayed in the first data voltage range, a second part of the driving time period is displayed in the data voltage corresponding to zero gray scale, and the number of the driving time periods of the second part of the driving time period is determined according to the black insertion proportion.
In an exemplary embodiment, the driving period includes a writing phase and a light emitting phase, and the display control method further includes: and when the target gray scale of the current frame of the sub-pixel is in a first gray scale range, controlling the light-emitting stage to be a first duration in the driving time period corresponding to the sub-pixel.
In an exemplary embodiment, the display control method further includes:
when the target gray scale of the current frame of the sub-pixel is in a second gray scale range, determining a second data voltage range corresponding to the target gray scale according to a preset corresponding relation between the gray scale and the data voltage, controlling all driving time periods corresponding to the sub-pixel to display in the second data voltage range, and controlling the driving time period corresponding to the sub-pixel to have a first duration in the light-emitting stage;
when the target gray scale of the current frame of the sub-pixel is in a third gray scale range, determining a third data voltage range corresponding to the target gray scale according to a preset corresponding relation between the gray scale and the data voltage, controlling all driving time periods corresponding to the sub-pixel to display in the third data voltage range, and controlling the driving time period corresponding to the sub-pixel to have a second time period in the light-emitting stage; wherein the second duration is greater than the first duration.
In another aspect, an embodiment of the present application provides a display control apparatus, including a memory and a processor, where the memory stores a program, and the program, when read and executed by the processor, implements the display control method.
In still another aspect, an embodiment of the present application provides a computer-readable storage medium storing one or more programs, which are executable by one or more processors to implement the above-described display control method.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure particularly pointed out in the written description and drawings.
Other aspects will be apparent upon reading and understanding the attached drawings and detailed description.
Drawings
The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the example serve to explain the principles of the invention and not to limit the invention.
Fig. 1 is a schematic diagram of a pixel driving circuit according to an embodiment;
fig. 2 is a schematic view of a display device according to an embodiment of the present disclosure;
FIG. 3 is a schematic diagram of a black insertion scale according to an embodiment;
FIG. 4 is a schematic view of a display device according to an embodiment;
FIG. 5a is a schematic diagram of a pixel driving circuit according to an embodiment;
FIG. 5b is a schematic diagram of a pixel driving circuit according to another embodiment;
FIG. 5c is a schematic diagram of a driving timing sequence of a pixel driving circuit according to an embodiment;
FIG. 5d is a schematic diagram of a driving timing sequence of a pixel driving circuit according to another embodiment;
FIG. 6 is a circuit division diagram of a shift register according to an embodiment;
FIG. 7 is a schematic diagram of a display device according to an embodiment;
fig. 8 is a schematic view of a display device according to another embodiment.
Detailed Description
Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the present application, the embodiments and features of the embodiments may be arbitrarily combined with each other without conflict.
The steps illustrated in the flow charts of the figures may be performed in a computer system such as a set of computer-executable instructions. Also, while a logical order is shown in the flow diagrams, in some cases, the steps shown or described may be performed in an order different than here.
Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs.
In the drawings, the size of each component, the thickness of layers, or regions may be exaggerated for clarity. Therefore, the embodiments of the present disclosure are not necessarily limited to the dimensions, and the shapes and sizes of the respective components in the drawings do not reflect a true scale. Further, the drawings schematically show ideal examples, and the embodiments of the present disclosure are not limited to the shapes or numerical values shown in the drawings. The ordinal numbers such as "first", "second", "third", etc., in this disclosure are provided to avoid confusion among the constituent elements, and do not indicate any order, number, or importance.
In the present disclosure, a transistor refers to an element including at least three terminals of a gate electrode, a drain electrode, and a source electrode. The transistor has a channel region between a drain electrode (drain electrode terminal, drain region, or drain electrode) and a source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, the channel region, and the source electrode in this order. In the present disclosure, the channel region refers to a region through which current mainly flows.
In the present disclosure, the first electrode may be a drain electrode and the second electrode may be a source electrode, or the first electrode may be a source electrode and the second electrode may be a drain electrode. In the case of using transistors of opposite polarities, or in the case of changing the direction of current flow during circuit operation, the functions of the "source electrode" and the "drain electrode" may be interchanged. Therefore, in the present disclosure, "source electrode" and "drain electrode" may be interchanged with each other.
Due to the influence of the characteristics of the LED, the uniformity of brightness is poor under low current density, the low gray scale realization difficulty is high, and a driving scheme realizes low gray scale by matching current amplitude with time driving. Fig. 1 is a schematic diagram of a pixel driving circuit. As shown in fig. 1, the pixel driving circuit includes a current control sub-circuit 10 and a time length control sub-circuit 20, the current control sub-circuit 10 generates a driving current, the magnitude of which is controlled by a signal of a display DATA terminal DATA _ I, and the time length control sub-circuit 20 controls the current control sub-circuit 10 and the light emitting element to be turned on and off, thereby controlling a time signal, the magnitude of which is related to a signal of a control DATA terminal DATA _ T. However, when the maximum current provided by the backplane end is limited, to realize full gray scale display, a plurality of different time length control modules are needed, and a plurality of different time length modules need to occupy wiring area or occupy time signals, so that the design is more complicated, and a conventional driving circuit can only realize 2 kinds of light emitting periods (duty). For example, the gray scale of 0 to 255 is usually more than 20 gray scales and less than 20 gray scales can be realized by using high current and time duration control. The embodiment of the application provides a driving scheme, and a black frame insertion method is used to realize lower gray levels (such as 0-20 gray levels). In the solution provided in the embodiment of the present application, the Light Emitting element may be a Light Emitting Diode, such as a micro led or a mini Light Emitting Diode (miniLED), an Organic Light-Emitting Diode (OLED), and the like.
Fig. 2 is a schematic view of a display device according to an embodiment of the present disclosure. As shown in fig. 2, a display device provided in an embodiment of the present application includes:
the display panel 100 comprises a display panel 100 and a controller 200, the controller 200 can be connected with the display panel 100 through a flexible circuit board 300, the display panel 100 comprises a plurality of sub-pixels, one frame of display time of the display panel 100 comprises a plurality of driving time periods, and each sub-pixel corresponds to part of the driving time periods;
the controller 200 is configured to determine a first data voltage range and a black insertion ratio corresponding to a target gray scale according to a preset corresponding relationship between the gray scale and a data voltage and a black insertion ratio when the target gray scale of the current frame of the sub-pixel is in a first gray scale range, control the sub-pixel to display in the first data voltage range in a first part of driving time period, display in a data voltage corresponding to a zero gray scale in a second part of driving time period, and determine the number of the driving time periods in the second part of driving time period according to the black insertion ratio.
In the scheme provided by the embodiment, the display control light emitting duration is performed by controlling the partial driving time period of the sub-pixel to perform the display at the zero gray scale, so that the display at the lower gray scale can be realized at a larger current.
In an exemplary embodiment, when the first part of the driving period is displayed in the first data voltage range, the luminance of the sub-pixel is not the luminance corresponding to the target gray scale, when the first part of the driving period is displayed in the first data voltage range, the luminance of the sub-pixel is greater than the luminance corresponding to the target gray scale, the luminance obtained by integrating the luminance value of the first part of the driving period and the luminance value of the second part of the driving period is the luminance corresponding to the target gray scale, for example, when the target gray scale value is 10, when the first part of the driving period is displayed in the first data voltage range, the luminance of the sub-pixel may be the luminance at the gray scale value of 15, the second part of the driving period is displayed at the luminance at the gray scale of zero, the luminance of the first part of the driving period and the second part of the driving period is averaged to be the luminance at the target gray scale value of 10, and the current corresponding to the luminance at the gray scale value of 15 is greater than the luminance at the gray scale value of 10, therefore, the scheme provided by the embodiment can realize the display of lower gray scales through larger driving current.
In an exemplary embodiment, the determining of the number of driving periods of the second partial driving period according to the black insertion ratio may include: the ratio of the number of the driving periods of the second part of the driving periods to the total number of the driving periods corresponding to the sub-pixels is the black insertion ratio or is closest to the black insertion ratio.
In an exemplary embodiment, the first partial driving period may include a plurality of continuous or discontinuous driving periods, and the second partial driving period may include a plurality of continuous or discontinuous driving periods, for example, driving periods in which display is performed with the first data voltage range and driving periods in which display is performed with a data voltage corresponding to a zero gray scale are distributed alternately; or after the first part of driving time interval for displaying in the first data voltage range is completely executed, the second part of driving time interval for displaying in the data voltage corresponding to the zero gray scale is executed.
In an exemplary embodiment, the first gray scale range has a gray scale value of 0 to 20; this is merely an example and other ranges are possible.
In an exemplary embodiment, the corresponding relationship between the gray scale and the data voltage and the black frame insertion ratio may be stored, and the first data voltage range and the black frame insertion ratio corresponding to the target gray scale may be obtained by searching the corresponding relationship.
Fig. 3 is a schematic diagram illustrating a corresponding relationship between different gray levels and black insertion ratios according to an embodiment. As shown in fig. 3, includes:
grayscale L1 (i.e., grayscale value of 1): the black insertion ratio may be 99%, that is, 99% of the driving periods corresponding to the sub-pixels are displayed with the data voltage corresponding to the zero gray scale, and 1% of the driving periods are displayed with the data voltage corresponding to the gray scale L30 within the first data voltage range;
grayscale L3 (i.e., grayscale value of 3): the black insertion ratio may be 75%, that is, 75% of the driving periods corresponding to the sub-pixels are displayed with the data voltage corresponding to the zero gray scale, and 25% of the driving periods are displayed with the data voltage corresponding to the gray scale L30 within the first data voltage range; for example, the driving period may be 3 consecutive driving periods in which the display is performed with the data voltage corresponding to the zero gray level after every driving period in which the display is performed with the data voltage corresponding to the gray level L30 in the first data voltage range, which is only an example here, and other modes may be used.
Grayscale L10 (i.e., grayscale value of 10): the black insertion ratio may be 50%, that is, 50% of the driving periods corresponding to the sub-pixels are displayed with the data voltage corresponding to the zero gray scale, and 50% of the driving periods are displayed with the data voltage corresponding to the gray scale L30 in the first data voltage range; for example, a driving period in which display is performed each with a data voltage corresponding to the gray level L30 in the first data voltage range, followed by 1 driving period in which display is performed with a data voltage corresponding to the zero gray level, and so on,
the black insertion ratio described above is merely an example, and other ratios may be set as necessary.
The controller 200 may be a Processor in a display device, and the Processor may be a Central Processing Unit (CPU), a general purpose Processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA), or any combination of other programmable logic devices, transistor logic devices, and hardware components. Combinations of computing functions can be included, for example, including one or more microprocessor combinations, combinations of DSPs and microprocessors, and the like.
In an exemplary embodiment, the display time of one frame is an image refresh period of the display device (for example, the display panel needs to display 60 frames in 1 second, and the display time of one frame is 1/60 seconds), and one driving period allocated to each row of pixels is slightly smaller than the display time of one frame of frames; the scanning frequency of the display panel should be at least greater than 60 × N hertz (Hz), where N is the number of rows of sub-pixels included in the display panel. Here, only an example, the one-frame display time and the driving period may be other values.
In an exemplary embodiment, as shown in fig. 4 and fig. 5a, the sub-pixel further includes a pixel driving circuit 30 and a light emitting element Microled, the pixel driving circuit 30 includes a current control sub-circuit 10 and a light emitting duration control sub-circuit 20, the current control sub-circuit 10 connects the display data terminal D _ a and the first node a; the light-emitting duration control sub-circuit 20 is connected to the control data terminal D _ B, the first node a and a first pole of the light-emitting element Microled, and a second pole of the light-emitting element Microled is connected to the second power terminal VL 2. The current control sub-circuit 10 is configured to receive a signal of a display data terminal D _ a, determine a current intensity of a driving current according to the signal of the display data terminal D _ a, and generate the driving current to the light-emitting duration control sub-circuit 20 through the first node; the light emitting duration sub-circuit 20 is configured to receive the signal of the control data terminal D _ B, and turn on or off the connection between the current control sub-circuit 10 and the light emitting element Microled according to the signal of the control data terminal D _ B, so as to control the light emitting duration of the light emitting element Microled to be a first duration or a second duration.
The controller 200 is further configured to send a first duration control signal to the control data terminal D _ B to control the light emitting duration of the light emitting element to be a first duration when the target gray scale of the current frame of the sub-pixel is in a first gray scale range, and further send a data voltage value in a first data voltage range to the display data terminal D _ a during a first part of the driving period, and input a data voltage corresponding to a zero gray scale to the display data terminal D _ a during a second part of the driving period.
In this embodiment, the display of the gray scale in the first gray scale range is realized by combining the time length control in addition to the black insertion, and since the uniformity of the luminance is poor at low current density, the driving current can be increased by combining the time length control, and the driving is performed by using high current, so that the uniformity of the display luminance is increased, and the display effect is enhanced.
The first electrode of the light emitting element micro led is, for example, a positive electrode, and the second electrode of the light emitting element micro led is, for example, a negative electrode.
Fig. 5b is a schematic diagram of a pixel driving circuit according to an embodiment. As shown in fig. 5b, the current control sub-circuit 10 includes a first transistor T1, a driving transistor Td, a fifth transistor T5 to a seventh transistor T7, a second capacitor C2; the duration control sub-circuit 20 includes second to fourth transistors T2 to T4, a first capacitor C1, wherein:
a control electrode of the first transistor T1 is connected to the light emitting control terminal EM, a first electrode thereof is connected to the first power terminal VL1, and a second electrode thereof is connected to the third node C;
a control electrode of the fifth transistor T5 is connected to the first scan signal terminal G _ a, a first electrode is connected to the display data terminal D _ a, and a second electrode is connected to the third node C;
a control electrode of the sixth transistor T6 is connected to the first scan signal terminal G _ a, a first electrode is connected to the first node a, and a second electrode is connected to the node B;
a control electrode of the seventh transistor T7 is connected to the reset signal terminal RS, a first electrode is connected to the initial signal terminal VINT, and a second electrode is connected to the second node B;
a control electrode of the driving transistor Td is connected to the node B, a first electrode is connected to the third node C, and a second electrode is connected to the first node a;
one end of the second capacitor C2 is connected with a fourth power supply end V2, and the other end is connected with a second node B;
a control electrode of the second transistor T2 is connected to the emission control terminal EM, a first electrode is connected to the first node a, and a second electrode is connected to a first electrode of the fourth transistor T4;
a control electrode of the third transistor T3 is connected to the second scan signal terminal G _ B, a first electrode is connected to the control data terminal D _ B, and a second electrode is connected to the fourth node D;
a control electrode of the fourth transistor T4 is connected to the fourth node D, a second electrode of the fourth transistor T4 is connected to a first electrode of a light emitting element micro led, and the second electrode of the light emitting element micro led is connected to a second power supply terminal VL 2;
one end of the first capacitor C1 is connected to the fourth node D, and the other end is connected to the third voltage terminal V1.
The first power source terminal VL1 is at a high level, for example, and the second power source terminal VL2 is at a low level, for example. The pixel driving circuit described above is merely an example, and the embodiment of the present application is not limited thereto, and a pixel driving circuit capable of controlling a time period may be implemented.
Fig. 5c is a driving timing chart of the driving circuit. One driving period includes a first reset period t1, a first write period t2, a first light emitting period t3, a second reset period t4, a second write period t5 and a second light emitting period t6, the light emitting time of the first light emitting period t3 is a first time, the light emitting time of the second light emitting period is a second time, and light emission in one of the light emitting periods is controlled by controlling the data terminal D _ B. The driving process of the above pixel driving circuit is described with only one reset phase, write phase, and emission phase. The driving process of the pixel driving circuit is as follows:
in the reset period T1, an on signal is input to the reset signal terminal RS, an off signal is input to the first scan signal terminal G _ a, the second scan signal terminal G _ B, and the emission control terminal EM, the seventh transistor T7 is turned on, and the voltage of the initialization signal terminal VINT is written into the node B. The on signal refers to a signal that can turn on the transistor when applied to the gate of the transistor, and the off signal refers to a signal that can turn off the transistor when applied to the gate of the transistor. Taking the P-type transistor as an example, the on signal is a low level signal, and the off signal is a high level signal.
In the data write phase t2, an on signal is input to the first scan signal terminal G _ a and the second scan signal terminal G _ B), and an off signal is input to the reset signal terminal RSRS and the emission control terminal EM. In this stage, the data signal of the display data terminal D _ a is sequentially written into the second node B through the fifth transistor T5, the driving transistor Td and the sixth transistor T6, and the compensation data is also written into the second node B, i.e., stored in the second capacitor C2, and the voltage of the control data terminal is written into the fourth node D and stored in the first capacitor C1. The magnitude of the driving current is determined by the gate-source voltage difference of the driving transistor Td.
In the light emitting period T3, when the driving transistor T3 is turned on by the second capacitor C2 and the fourth transistor T4 is turned on by the first capacitor C1, the current is written into the light emitting element micro led through the first transistor T1, the driving transistor Td, the second transistor T2 and the fourth transistor T4 in sequence, so that the light emitting element micro led emits light.
FIG. 5d is a timing diagram of the driving of the display with the data voltage corresponding to the zero gray level. As shown in fig. 5D, the data voltage of the control data terminal D _ B is 0, for example.
In an exemplary embodiment, the controller 200 is further configured to,
when the target gray scale of the current frame of the sub-pixel is in a second gray scale range, determining a second data voltage range corresponding to the target gray scale according to a preset corresponding relation between the gray scale and the data voltage, controlling the sub-pixel to display in the second data voltage range in all driving periods corresponding to the sub-pixel, and sending a first time length control signal to the control data terminal to control the light emitting time length of the light emitting element to be a first time length;
when the target gray scale of the current frame of the sub-pixel is in a third gray scale range, determining a third data voltage range corresponding to the target gray scale according to a preset corresponding relation between the gray scale and the data voltage, controlling all driving time periods corresponding to the sub-pixel to be displayed in the third data voltage range, and sending a second time length control signal to the control data terminal to control the light emitting time length of the light emitting element to be a second time length; wherein the second duration is greater than the first duration.
The gray scales of the first gray scale range, the second gray scale range and the third gray scale range may be sequentially increased, and the first data voltage range, the second data voltage range and the third data voltage range may be sequentially increased, or there may be overlap, for example, the first data voltage range and the second data voltage range overlap, and different gray scale display is realized by different light emitting durations. In this embodiment, full gray scale display is realized by two time length controls and black insertion. Namely:
in the first gray scale range, the light-emitting duration is the first light-emitting duration, and gray scale display is realized by matching with black insertion (namely, displaying by using data voltage corresponding to zero gray scale in part of driving time interval);
in the second gray scale range, the light-emitting duration is the first light-emitting duration, and gray scale display is realized without black insertion;
in the third gray scale range, the light emitting duration is the second light emitting duration (longer than the first light emitting duration), and gray scale display is realized without black insertion.
In this embodiment, by performing the duration control, a higher driving current can be used than a scheme in which the duration control is not performed, so that the light emitting element operates in an interval in which the color coordinates and the main wavelength of light emission are stable, and the display uniformity is improved.
In another embodiment, more duration control may be used in combination with black insertion to achieve gray scale display, for example, in a first gray scale range, the lighting duration is a first lighting duration, and the black insertion is used in cooperation to achieve gray scale display; in the second gray scale range, the light-emitting duration is the second light-emitting duration, and gray scale display is realized without black insertion; in the third gray scale range, the light emitting duration is the third light emitting duration (longer than the second light emitting duration), gray scale display is realized without black insertion, and the like.
In one embodiment, the third gray scale range may be a high gray scale region (gray scale values of 100-255), the second gray scale range may be a low gray scale region (gray scale values of 20-100), and the first gray scale range may be an ultra-low gray scale region (gray scale values of 0-20). The above grayscale ranges are merely examples, and may be set as other grayscale ranges as needed.
In an exemplary embodiment, the display panel may further include one shift register circuit or a plurality of shift register circuits. When the display panel comprises a shift register circuit, and the display panel displays a frame of picture, the shift register circuit is configured to: and circularly providing scanning signals to the sub-pixel rows of the display panel, and providing the scanning signals for K times to each sub-pixel row, wherein K is the number of driving periods corresponding to each sub-pixel. Assuming that the display panel includes N rows of sub-pixels, in displaying a frame of picture, the display may be performed sequentially line by line starting from the first row of sub-pixels to the nth row of sub-pixels, and then sequentially performed again from the 1 st row to the nth row, and the cycle is performed K times.
It is to be understood that one shift register described herein refers to a shift register group including scan signals supplied to the first scan signal terminal G _ a, the second scan signal terminal G _ B, and the emission control terminal EM, respectively, in the pixel driving circuit shown in fig. 5B.
In an exemplary embodiment, n subpixel rows consecutive in the column direction constitute one subpixel group 40; in the same sub-pixel group 40, the sub-pixels in the same sub-pixel row correspond to the same driving time period, and the sub-pixels in different sub-pixel rows correspond to different driving time periods. As shown in fig. 6, the display panel 100 further includes a plurality of shift register circuits 400 corresponding to the sub-pixel groups 40 one to one, the shift register circuits 400 being configured to: the scan signals are sequentially supplied to a plurality of sub-pixel rows within one sub-pixel group 40.
In the scheme provided by this embodiment, by using a plurality of shift register circuits 400, a plurality of sub-pixel rows can be simultaneously turned on, thereby increasing the scanning frequency.
In an exemplary embodiment, the shift register circuit 400 may be implemented by using a plurality of cascaded shift registers, and is similar to a shift register circuit that uses one shift register circuit to drive the whole display panel, and is not described again.
In an exemplary embodiment, the plurality of sub-pixel rows included in the sub-pixel group 40 may be a continuous plurality of sub-pixel rows, or may be a discontinuous plurality of sub-pixel rows, which is not limited in this embodiment.
For example, the sub-pixels of the display panel may be divided into M sub-pixel groups, each of the M sub-pixel groups may include the same number of sub-pixel rows, or different numbers of sub-pixel rows, and the sub-pixel rows of each sub-pixel group may be a continuous plurality of sub-pixel rows, or may be a discontinuous plurality of sub-pixel rows. According to the scheme provided by the embodiment, the plurality of sub-pixel rows are driven simultaneously, and compared with the mode that only one sub-pixel row is driven at each time, the driving time can be shortened, the scanning frequency is increased, the driving time period corresponding to each sub-pixel row can be increased, and black insertion is easily realized according to the black insertion proportion. For example, when M is 10, the scanning frequency can be increased by 10 times, for example, from 60Hz to 600Hz, thereby facilitating the implementation of black insertion. Each subpixel group may be driven by a separate one of shift register circuits (GOAs), and the display panel uses M independent GOAs. Each GOA may include a cascade of multiple shift registers. Alternatively, the display panel may use a GOA capable of simultaneously driving a plurality of rows, which is not limited in this embodiment. In an exemplary embodiment, each sub-pixel group includes a plurality of sub-pixel rows in series, and each sub-pixel group includes the same number of sub-pixel rows. In an exemplary embodiment, the sub-pixel blocks may be divided in other manners, for example, each sub-pixel block may include different numbers of sub-pixels, and each sub-pixel block includes the same number of sub-pixels, so that compared to a scheme in which the number of sub-pixels included in different sub-pixel blocks is different, the reduction of the current-resistance-voltage drop is more consistent, and the display uniformity is better.
In an exemplary embodiment, the sub-pixels of the same sub-pixel block belong to the same sub-pixel group, that is, the sub-pixels of the same sub-pixel block are driven by one GOA, so that a plurality of pixel rows displayed simultaneously are driven by different GOAs, respectively, and the current resistance drop is reduced. The sub-pixels of the sub-pixel blocks may belong to the same sub-pixel group, for example, the sub-pixel blocks of the same column may belong to the same sub-pixel group.
Fig. 8 is a schematic diagram illustrating the division of sub-pixel blocks and sub-pixel groups according to an embodiment. As shown in fig. 8, in the present embodiment, the display panel includes 160 × 180 pixels, each pixel includes 3 sub-pixels, such as a red sub-pixel, a green sub-pixel and a blue sub-pixel, so that the display panel includes 160 × 3 × 180 sub-pixels. The sub-pixels are divided into 480 sub-pixel blocks 50 (e.g., the sub-pixel block 51/52/53), 48 sub-pixel blocks are distributed transversely, 10 sub-pixel blocks are distributed longitudinally, and each sub-pixel block contains 10 × 18 sub-pixels. Each sub-pixel block is connected to a driving circuit 60, the driving circuit 60 may be implemented using a small integrated circuit (micro IC), and the driving circuit 60 is configured to generate Data signals (Data), power signals (VDD, VSS), and the like, which may include Data signals of a display Data terminal and a control Data terminal, to be supplied to the connected sub-pixel block. In an exemplary embodiment, each driving circuit 60 is numbered to facilitate the external IC to store the output data according to the number of the driving circuit 60, so that the 480 sub-pixel blocks become 480 individual driving units, which can be driven simultaneously. In this embodiment, the power signal of each driving circuit is controlled individually, the load on each power signal is 1/480, and the current resistance voltage drop of each sub-pixel block is much smaller than that when only 1 IC is used as a driving circuit to provide power signals for the sub-pixels of the entire panel. In this embodiment, the sub-pixel rows of the display panel are divided into 10 sub-pixel groups 40, each sub-pixel group 40 is driven by using one GOA, and the 10 sub-pixel groups can be driven simultaneously, so that the scanning frequency is increased to 10 times that when the whole display panel is driven by using one GOA. For example, the sub-pixels of the sub-pixel block 51 all belong to the sub-pixel group 41, and therefore, when a plurality of sub-pixel groups are simultaneously driven, a plurality of rows of simultaneously driven sub-pixels belong to different sub-pixel groups and belong to different sub-pixel blocks, and each sub-pixel block has independent data signals and independent power signals, so that a plurality of rows of simultaneously driven sub-pixels can be driven by using independent data signals and independent power signals, thereby reducing current resistance drop. In another embodiment, the same subpixel group may include a plurality of longitudinal subpixel blocks, for example, the subpixel block 51 may be divided into two subpixel blocks, each subpixel block includes 5 × 18 subpixels, and each subpixel block is bound to a driving circuit. The number of sub-pixels 160 × 3 × 180 included in the display panel is merely an example, and the display panel may have other resolutions. The division manner of the sub-pixel groups, the division manner of the sub-pixel blocks is only an example, and other division manners may be used as needed.
In another embodiment, independent multiple driving circuits can be omitted, and data lines can be added to each column of each sub-pixel group, so that excessive current resistance voltage drop when multiple rows are driven simultaneously can be avoided. Taking fig. 6 as an example, when the display panel is divided into 10 sub-pixel groups, N data lines (N is the number of sub-pixel columns) are provided for each sub-pixel group, and 10 × N data lines are required for 10 sub-pixel groups. Compared with this scheme, a scheme using a plurality of independent driving circuits (small ICs) has fewer data lines and is easier to implement.
According to the scheme provided by the embodiment, the independent power supply signal and the independent data signal are provided for each sub-pixel block, and when a plurality of sub-pixel rows are displayed simultaneously, the phenomenon that the voltage drop of current resistance is too large can be avoided, and the display effect is improved.
In another embodiment, each sub-pixel block may comprise a different number of sub-pixels. The sub-pixel blocks may not be distributed in an array.
An embodiment of the present application provides a display control method, including:
step 901, when the target gray scale of the current frame of the sub-pixel is in the first gray scale range, determining the first data voltage range and the black insertion ratio corresponding to the target gray scale according to the corresponding relationship between the preset gray scale and the data voltage and the black insertion ratio,
and 902, controlling the sub-pixels to display in the first data voltage range in the driving time period corresponding to the sub-pixels in a first part of the driving time period, and displaying in the data voltage corresponding to the zero gray scale in a second part of the driving time period, wherein the number of the driving time periods in the second part of the driving time period is determined according to the black insertion ratio.
The scheme provided by the embodiment controls the light-emitting time by inserting black, so that the display under a lower gray scale can be realized under a larger current. The scheme provided by the embodiment can be applied to the display of a micro display panel, but is not limited to the display.
In an exemplary embodiment, the display panel includes a plurality of sub-pixels distributed in an array, the plurality of sub-pixels are divided into a plurality of sub-pixel blocks distributed in an array, and each sub-pixel block includes the same number of sub-pixels;
the method further comprises the following steps: and when the display panel is controlled to display, providing independent power signals and data signals for each sub-pixel block.
Compared with the scheme of intensively providing the power supply signal and the data signal for the whole display panel, the scheme provided by the embodiment can reduce the current resistance Drop (IR Drop) and improve the display effect. When a plurality of rows are driven simultaneously, if a power supply signal and a data signal are supplied in a concentrated manner, the current resistance drop is large, and therefore, the display effect can be improved by supplying the independent power supply signal and the independent data signal.
An embodiment of the present application provides a display control apparatus, including a memory and a processor, where the memory stores a program, and the program, when read and executed by the processor, implements the display control method.
An embodiment of the present application provides a computer-readable storage medium storing one or more programs, which are executable by one or more processors to implement the above-described display control method. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, Digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can accessed by a computer.
In an exemplary embodiment, the display device may be: the display device can be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like, and can be a miniLED, a MicroLED, an Organic Light Emitting Diode (OLED) and other display devices.
Although the embodiments of the present invention have been described above, the above description is only for the convenience of understanding the present invention, and is not intended to limit the present invention. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (11)
1. A display device, comprising: the display panel comprises a plurality of sub-pixels, one frame of display time of the display panel comprises a plurality of driving time periods, and each sub-pixel corresponds to part of the driving time periods;
the controller is configured to determine a first data voltage range and a black insertion proportion corresponding to a target gray scale according to a preset corresponding relation between the gray scale and a data voltage and a black insertion proportion when the target gray scale of the current frame of the sub-pixel is in a first gray scale range, control the sub-pixel to display in the first data voltage range in a first part of driving time period, display in a data voltage corresponding to a zero gray scale in a second part of driving time period, and determine the number of the driving time periods in the second part of driving time period according to the black insertion proportion.
2. The display device according to claim 1, wherein the sub-pixel includes a pixel drive circuit and a light emitting element, the pixel drive circuit includes a current control sub-circuit and a light emission period control sub-circuit, the current control sub-circuit connects a display data terminal and a first node; the light-emitting duration control sub-circuit is connected with a control data terminal, the first node and the light-emitting element, and is configured to receive a signal of the display data terminal, determine the current intensity of a driving current according to the signal of the display data terminal, and generate the driving current to the light-emitting duration control sub-circuit through the first node; the light-emitting duration sub-circuit is configured to receive a signal of the control data terminal, and to turn on or off the connection between the current control sub-circuit and the light-emitting element according to the signal of the control data terminal, so as to control the light-emitting duration of the light-emitting element to be a first duration or a second duration;
the controller is further configured to send a first duration control signal to the control data terminal to control the light emitting duration of the light emitting element to be a first duration when the target gray scale of the current frame of the sub-pixel is in a first gray scale range.
3. The display device according to claim 2, wherein the controller is further configured to,
when the target gray scale of the current frame of the sub-pixel is in a second gray scale range, determining a second data voltage range corresponding to the target gray scale according to a preset corresponding relation between the gray scale and the data voltage, controlling the sub-pixel to display in the second data voltage range in all driving periods corresponding to the sub-pixel, and sending a first time length control signal to the control data terminal to control the light emitting time length of the light emitting element to be a first time length;
when the target gray scale of the current frame of the sub-pixel is in a third gray scale range, determining a third data voltage range corresponding to the target gray scale according to a preset corresponding relation between the gray scale and the data voltage, controlling all driving time periods corresponding to the sub-pixel to be displayed in the third data voltage range, and sending a second time length control signal to the control data terminal to control the light emitting time length of the light emitting element to be a second time length; wherein the second duration is greater than the first duration.
4. The display device according to claim 2, wherein the sub-pixels in the same row of the plurality of sub-pixels form a sub-pixel row, and n sub-pixel rows consecutive in a column direction form a sub-pixel group; in the same sub-pixel group, sub-pixels positioned in the same sub-pixel row correspond to the same driving time period, and sub-pixels positioned in different sub-pixel rows correspond to different driving time periods;
the display panel further includes a plurality of shift register circuits in one-to-one correspondence with the sub-pixel groups, the shift register circuits being configured to: the scan signals are sequentially supplied to a plurality of sub-pixel rows within one sub-pixel group.
5. The display device according to claim 4, wherein the sub-pixels of the display panel are divided into a plurality of sub-pixel blocks distributed in an array, each sub-pixel block comprises the same number of sub-pixels, and the sub-pixels of the same sub-pixel block belong to the same sub-pixel group;
the display device further comprises a plurality of driving circuits in one-to-one correspondence with the sub-pixel blocks, the driving circuits are connected with the pixel driving circuit of each sub-pixel of the sub-pixel block corresponding to the driving circuits, the pixel driving circuits are further connected with a first power supply end, and the driving circuits are configured to provide power signals for the first power supply end of the pixel driving circuits and provide data signals for the display data end and the control data end of the pixel driving circuits respectively.
6. The display device according to claim 3, wherein the gray levels of the first gray scale range, the second gray scale range, and the third gray scale range may sequentially increase, the first data voltage range, the second data voltage range, and the third data voltage range may sequentially increase, or the first data voltage range and the second data voltage range overlap.
7. A display control method is applied to a display panel, the display panel comprises a plurality of sub-pixels, a display time of one frame of the display panel comprises a plurality of driving periods, and each sub-pixel corresponds to a part of the driving periods, and the display control method comprises the following steps:
when the target gray scale of the current frame of the sub-pixel is in a first gray scale range, determining a first data voltage range and a black insertion proportion corresponding to the target gray scale according to a preset corresponding relation between the gray scale and data voltage and the black insertion proportion, controlling the sub-pixel to be in a driving time period corresponding to the sub-pixel, wherein a first part of the driving time period is displayed in the first data voltage range, a second part of the driving time period is displayed in the data voltage corresponding to zero gray scale, and the number of the driving time periods of the second part of the driving time period is determined according to the black insertion proportion.
8. The display control method according to claim 7, wherein the driving period includes a writing phase and a light-emitting phase, the display control method further comprising: and when the target gray scale of the current frame of the sub-pixel is in a first gray scale range, controlling the light-emitting stage to be a first duration in the driving time period corresponding to the sub-pixel.
9. The display control method according to claim 8, characterized in that the display control method further comprises:
when the target gray scale of the current frame of the sub-pixel is in a second gray scale range, determining a second data voltage range corresponding to the target gray scale according to a preset corresponding relation between the gray scale and the data voltage, controlling all driving time periods corresponding to the sub-pixel to display in the second data voltage range, and controlling the driving time period corresponding to the sub-pixel to have a first duration in the light-emitting stage;
when the target gray scale of the current frame of the sub-pixel is in a third gray scale range, determining a third data voltage range corresponding to the target gray scale according to a preset corresponding relation between the gray scale and the data voltage, controlling all driving time periods corresponding to the sub-pixel to display in the third data voltage range, and controlling the driving time period corresponding to the sub-pixel to have a second time period in the light-emitting stage; wherein the second duration is greater than the first duration.
10. A display control apparatus comprising a memory and a processor, the memory storing a program which, when read and executed by the processor, implements the display control method according to any one of claims 7 to 9.
11. A computer-readable storage medium storing one or more programs, the one or more programs being executable by one or more processors to implement the display control method according to any one of claims 7 to 9.
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