CN114355312A - Radar control method and device, laser radar and storage medium - Google Patents
Radar control method and device, laser radar and storage medium Download PDFInfo
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Abstract
The application relates to a radar control method, a radar control device, a laser radar and a storage medium. The method comprises the following steps: the bus power supply comprises an interface circuit, a signal processing device and a bus power supply, wherein the interface circuit receives state switching information sent by external equipment, the interface circuit sends the received state switching information to the signal processing device, the signal processing device is used for generating corresponding enabling signals according to the state switching information and sending the enabling signals to the bus power supply, and the bus power supply enters a corresponding power supply state according to the level state of the enabling signals. External equipment is used for making laser radar get into the state switching information of dormant state or awakening state to interface circuit transmission based on to laser radar work demand, and then operates bus power source through signal processing device and get into the power supply and close or the power supply is opened to make laser radar get into dormant state or awakening state, avoid laser radar to be in operating condition for a long time, still can postpone laser radar's life when the energy saving.
Description
Technical Field
The present application relates to the field of laser radar technology, and in particular, to a radar control method, apparatus, laser radar, and storage medium.
Background
Laser Radar (english) is a Radar system that detects characteristic quantities such as a position and a speed of a target by emitting a Laser beam. The working principle is that a detection signal (laser beam) is emitted to a target, then a received signal (target echo) reflected from the target is compared with the emitted signal, and after appropriate processing, relevant information of the target, such as target distance, azimuth, height, speed, attitude, even shape and other parameters, can be obtained, so that the targets of airplanes, missiles and the like are detected, tracked and identified.
The laser radar in the related technology is powered by the vehicle, the working state is kept when the vehicle normally runs to provide road condition information for the vehicle, low power consumption can not be kept when the vehicle does not need the road condition information, and the laser radar wastes energy and can also influence the service life of the laser radar when working for a long time.
Disclosure of Invention
In order to solve the technical problem, the application provides a radar control method, a radar control device, a laser radar and a storage medium.
In a first aspect, the present application provides a radar control method applied to a radar control system, where the radar sleep wake-up system includes a signal processing device, a bus power supply and an interface circuit, the signal processing device is electrically connected to the interface circuit and the bus power supply, respectively, and the method includes:
the interface circuit receives state switching information sent by external equipment and sends the state switching information to the signal processing device;
the signal processing device generates an enabling signal according to the state switching information and sends the enabling signal to the bus power supply;
the bus power supply enters a corresponding power supply state according to the level state of the enabling signal; the power supply state comprises power supply starting and power supply closing, when the power supply state is power supply starting, the bus power supply drives the radar working circuit to enter a wake-up state, and when the power supply state is power supply closing, the bus power supply drives the radar working circuit to enter a sleep state.
In a second aspect, the present application provides a lidar comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, the processor implementing the following steps when executing the computer program:
the interface circuit receives state switching information sent by external equipment and sends the state switching information to the signal processing device;
the signal processing device generates an enabling signal according to the state switching information and sends the enabling signal to the bus power supply;
the bus power supply enters a corresponding power supply state according to the level state of the enabling signal; the power supply state comprises power supply starting and power supply closing, when the power supply state is power supply starting, the bus power supply drives the radar working circuit to enter a wake-up state, and when the power supply state is power supply closing, the bus power supply drives the radar working circuit to enter a sleep state.
In a third aspect, the present application provides a computer-readable storage medium comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, the processor implementing the following steps when executing the computer program:
the interface circuit receives state switching information sent by external equipment and sends the state switching information to the signal processing device;
the signal processing device generates an enabling signal according to the state switching information and sends the enabling signal to the bus power supply;
the bus power supply enters a corresponding power supply state according to the level state of the enabling signal; the power supply state comprises power supply starting and power supply closing, when the power supply state is power supply starting, the bus power supply drives the radar working circuit to enter a wake-up state, and when the power supply state is power supply closing, the bus power supply drives the radar working circuit to enter a sleep state.
The radar control method, the radar control device, the laser radar and the storage medium comprise the following steps: receiving state switching information sent by external equipment through an interface circuit, sending the received state switching information to a signal processing device by the interface circuit, generating a corresponding enabling signal according to the state switching information by the signal processing device, sending the enabling signal to a bus power supply, enabling the bus power supply to enter a corresponding power supply state according to the level state of the enabling signal, electrically connecting the bus power supply with a radar working circuit, and driving the radar working circuit to enter a wake-up state when the bus power supply is powered on, namely enabling the laser radar to be in the wake-up state; when the bus power supply is powered off, the radar working circuit is driven to enter a dormant state, namely, the laser radar is in the dormant state. Based on the method, the external equipment sends state switching information for enabling the laser radar to enter a dormant state or an awakening state to the interface circuit based on the working requirement of the laser radar, and then the bus power supply is operated to enter power supply closing or power supply opening through the signal processing device, so that the laser radar enters the dormant state or the awakening state, the laser radar is prevented from being in the working state for a long time, energy is saved, and meanwhile the service life of the laser radar can be prolonged.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and together with the description, serve to explain the principles of the invention.
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive exercise.
FIG. 1 is a diagram of an exemplary radar control system;
FIG. 2 is a schematic flow chart of a radar control method in one embodiment;
FIG. 3 is a schematic diagram of the structure within the radar control system in one embodiment;
FIG. 4 is a schematic diagram of the structure within the radar control system in one embodiment;
FIG. 5 is a schematic diagram of the structure within the radar control system in one embodiment;
fig. 6 is a block diagram of a laser radar apparatus in one embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Fig. 1 is an application environment diagram of a radar control method in one embodiment. Referring to fig. 1, the radar control method is applied to a laser radar, the laser radar includes a radar control system and a radar working circuit 140, the radar control system is electrically connected with the radar working circuit 140, the radar control system is used for driving the radar working circuit 140 to enter a sleep state or a wake-up state, and when the radar working circuit 140 enters the sleep state, the whole laser radar enters the sleep state; when the radar working circuit 140 enters the wake-up state, the entire laser radar enters the wake-up state. The radar control system comprises an interface circuit 110, a signal processing device 120 and a bus power supply 130, wherein the signal processing device 120 is electrically connected with the interface circuit 110 and the bus power supply 130 respectively, and the bus power supply 130 is electrically connected with a radar working circuit 140.
The interface circuit 110 is composed of components and/or integrated circuits having an electrical signal transmission function and a data transmission function. The signal processing device 120 is comprised of a chip and/or an integrated circuit having data processing capabilities. The bus power supply 130 is comprised of chips and/or integrated circuits that have power conversion capabilities and power transmission capabilities.
In one embodiment, fig. 2 is a flow chart illustrating a radar control method in one embodiment, and referring to fig. 2, a radar control method is provided. The present embodiment is mainly illustrated by applying the method to the radar control system in fig. 1, where the radar control method specifically includes the following steps:
in step S210, the interface circuit 110 receives the state switching information sent by the external device 100, and sends the state switching information to the signal processing device 120.
Specifically, the external device 100 refers to a device such as a vehicle, an aircraft, a robot, and the like, which needs to apply a laser radar, the external device 100 provides a main power supply for the laser radar through the interface circuit 110, and simultaneously transmits state switching information to the laser radar through the interface circuit 110, the state switching information is used for indicating a working requirement of the external device 100 for the laser radar, and the state switching information includes information of different data types, such as a power-on reset signal, a sleep instruction, a WAKE instruction, and the like, where the power-on reset signal is recorded as a WAKE signal, for example, the external device 100 is a vehicle, and when the vehicle does not need the laser radar to provide road condition information, the interface circuit 110 receives the state switching information sent by the vehicle and used for indicating that the laser radar enters the sleep state; when the vehicle needs the laser radar to provide the road condition information, the interface circuit 110 receives the state switching information which is sent by the vehicle and used for indicating the laser radar to enter the wake-up state. Interface circuit 110 also provides an interface for the lidar to communicate with an external network.
In step S220, the signal processing device 120 generates an enable signal according to the state switching information, and sends the enable signal to the bus power supply 130.
Specifically, the signal processor transmits an enable signal to an enable pin of the bus power supply 130 corresponding to the power chip, where the enable signal is used to trigger a corresponding function of the power chip enable pin.
In step S230, the bus power supply 130 enters a corresponding power supply state according to the level state of the enable signal.
Specifically, the level state includes a high level and a low level, the power supply state of the bus power supply 130 includes power supply on and power supply off, a corresponding relationship is preset between the level state of the enable signal and the power supply state, specifically, the power supply state corresponding to the enable signal when the enable signal is the high level is power supply on, the power supply state corresponding to the enable signal when the enable signal is the low level is power supply off, the power supply state corresponding to the enable signal when the enable signal is the low level is power supply on, and the power supply state corresponding to the enable signal when the enable signal is the high level is power supply off. Therefore, the power supply state corresponding to the level state of the enabling signal is determined according to the corresponding relation between the level state of the enabling signal and the power supply state.
In this embodiment, when the enable signal is at a high level, the power supply state is power supply on, and the bus power supply 130 drives the radar operating circuit 140 to enter the wake-up state; when the enable signal is at a low level, the power supply state is power off, and the bus power supply 130 drives the radar operating circuit 140 to enter a sleep state. Realize laser radar in this way and switch between awakening state and dormancy state, avoid laser radar to be in operating condition for a long time, still can postpone laser radar's life when the energy saving.
In one embodiment, the signal processing device 120 includes a main control chip 121 and a decoding chip 122, and the main control chip 121 and the decoding chip 122 are electrically connected to the bus power supply 130 respectively.
Specifically, referring to fig. 3, the master control chip 121 is a core control chip of the laser radar, and is configured to perform data analysis processing on the state switching information, and the master control chip 121 may select chips with models of XAZU2EG, XAZU5EV, STM32, and the like. The main control chip 121 is electrically connected to the decoding chip 122, the decoding chip 122 includes a low power consumption module and a communication module, the decoding chip 122 can receive ethernet data through the communication module and decode the ethernet data, that is, the ethernet data is converted into serial stream data, the serial stream data is encoded according to the encoding rule of the physical layer, the encoded data is converted into a digital signal to be output, that is, when the decoding chip 122 receives the data, the analog signal is converted into a digital signal, and the digital signal is decoded to obtain data, which is then sent out through the MII interface. The low power consumption module in the decoding chip 122 is used for controlling the level state of the enable signal. The decoding chip may be a PHY chip including a low power module. The decoding chip can be selected from BCM89881, 88Q2220 and other chips.
In one embodiment, the signal processing device 120 generates an enable signal according to the state switching information, including: the main control chip 121 recognizes the level state indicated by the state switching information, and generates an enable signal when the level state indicated by the state switching information is the first level state.
Specifically, the main control chip 121 recognizes the level state indicated by the state switching information, the level state indicated by the state switching information includes a low level and a high level, and the main control chip 121 only when the level state indicated by the state switching information is the first level state, the corresponding enable signal is generated, the first level state is a trigger level state of the main control chip 121 for generating the enable signal, the first level state may be specifically a low level or a high level, which means that the main control chip 121 can only trigger to generate the enable signal when the level state indicated by the state switching information is the low level or the high level, that is, the main control chip 121 can trigger the generation of the enable signal only in one level state, for example, the first level state is high level, the main control chip 121 can trigger generation of the enable signal only when receiving the state switching information of the high level, and cannot trigger generation of the enable signal when receiving the state switching information of the low level.
If the first level state includes a low level and a high level, it indicates that the main control chip 121 can trigger to generate a corresponding enable signal in both level states, for example, the main control chip 121 triggers to generate an enable signal in a corresponding third level state when receiving the state switching information of the low level, the main control chip 121 triggers to generate an enable signal in a corresponding fourth level state when receiving the state switching information of the high level, and the third level state is different from the fourth level state, that is, the main control chip 121 triggers to generate enable signals in different level states when receiving the state switching information of different level states.
In one embodiment, the signal processing device 120 generates an enable signal according to the state switching information, including: the decoding chip 122 recognizes the level state indicated by the state switching information, and generates an enable signal when the level state indicated by the state switching information is a second level state.
Specifically, the decoding chip 122 recognizes a level state indicated by the state switching information, the decoding chip 122 generates a corresponding enable signal only when the level state indicated by the state switching information is a second level state, where the second level state is a trigger level state of the decoding chip 122 for generating the enable signal, and the second level state may specifically be a low level or a high level, which indicates that the decoding chip 122 can trigger generation of the enable signal only when the level state indicated by the state switching information is the low level or the high level, that is, the decoding chip 122 can trigger generation of the enable signal only in two level states, for example, when the second level state is the low level, the decoding chip 122 can trigger generation of the enable signal when receiving the low level state switching information, and cannot trigger generation of the enable signal when receiving the high level state switching information.
If the second level state includes a low level and a high level, it indicates that the decoding chip 122 can trigger to generate a corresponding enable signal in both level states, for example, the decoding chip 122 triggers to generate an enable signal in a corresponding third level state when receiving the state switching information of the low level, the decoding chip 122 triggers to generate an enable signal in a corresponding fourth level state when receiving the state switching information of the high level, and the third level state is different from the fourth level state, that is, the decoding chip 122 triggers to generate an enable signal in different level states when receiving the state switching information of different level states.
In combination with the above embodiment, the first level state and the second level state may be different level states or the same level state. In a case where the first level state and the second level state may be different level states, for example, when the first level state is a low level, the second level state is a high level; when the first level state is a high level, the second level state is a low level. That is, the main control chip 121 and the decoding chip 122 respectively respond to the state switching information of different level states, for example, the main control chip 121 is triggered by the state switching information of high level and the decoding chip 122 is triggered by the state switching information of low level, or alternatively, the main control chip 121 is triggered by the state switching information of low level and the decoding chip 122 is triggered by the state switching information of high level. Then the main control chip 121 is triggered to make the laser radar enter a sleep state, and the decoding chip 122 is triggered to make the laser radar enter an awake state; or, the main control chip 121 is triggered to make the lidar enter a wake-up state, and the decoding chip 122 is triggered to make the lidar enter a sleep state. Specifically, the rule setting can be performed according to the actual scene.
When the first level state and the second level state are the same level state, the main control chip 121 may generate a corresponding enable signal according to the state switching information, and the decoding chip 122 may also generate a corresponding enable signal according to the state switching information. Namely, the laser radar can enter a sleep state or an awake state through two modes of the main control chip 121 and the decoding chip 122, and when the main control chip 121 is abnormal or the decoding chip 122 is abnormal, the working state of the laser radar can still be switched through a normal chip. In a specific embodiment, the signal processing device 120 generates the enable signal of the corresponding level state according to the level state indicated by the state switching information.
Specifically, when the state switching information is the power-on reset signal, the enable signal in the corresponding level state is generated according to the level state of the power-on reset signal, that is, a preset corresponding relationship is preset between the level state of the power-on reset signal and the level state of the enable signal, specifically, the enable signal corresponding to the power-on reset signal in the high level is in the high level, the enable signal corresponding to the power-on reset signal in the low level is in the low level, or the enable signal corresponding to the power-on reset signal in the low level is in the high level, and the enable signal corresponding to the power-on reset signal in the high level is in the low level.
For example, if the corresponding enable signal is at a high level when the power-on reset signal is at a high level, the main control chip 121 generates a high-level enable signal according to the high-level power-on reset signal when the power-on reset signal is at a high level. The decoding chip 122 generates the enable signal in a corresponding level state according to the power-on reset signal according to the corresponding relationship between the level state of the power-on reset signal and the level state of the enable signal, similarly to the main control chip 121. The enable signal of high level sends bus power supply 130 to, and the power supply state of bus power supply 130 is updated and is opened for the power supply, and bus power supply 130 begins to supply power for radar working circuit 140, makes radar working circuit 140 get into the state of awakening, and the laser radar complete machine gets into the state of awakening promptly.
In one embodiment, the signal processing device 120 generates an enable signal according to the state switching information, including: the main control chip 121 generates a register control instruction according to the state switching information, and sends the register control instruction to the decoding chip 122; after the decoding chip 122 executes the register control instruction, the enable signal is generated.
Specifically, in this embodiment, the state switching information is a power-on reset signal, the main control chip 121 may receive the power-on reset signal through the interface circuit 110, generate a register control instruction according to the power-on reset signal, and send the register control instruction to the decoding chip 122, where the register control instruction is used to adjust a sleep wake-up register in the decoding chip 122, the decoding chip 122 executes the register control instruction, that is, adjusts the sleep wake-up register in the decoding chip 122 according to a parameter corresponding to the register control instruction, and the decoding chip 122 may generate a corresponding enable signal according to the adjusted sleep wake-up register.
Illustratively, when the main control chip 121 receives a low-level power-on reset signal, the main control chip 121 adjusts parameters of a sleep wake-up register in the control decoding chip 122, the decoding chip 122 can generate a low-level enable signal based on the adjusted sleep wake-up register, the decoding chip 122 sends the low-level enable signal to the bus power supply 130, and updates the power supply state of the bus power supply 130 to power off, so as to drive the radar working circuit 140 to enter a sleep state, that is, to make the entire laser radar enter the sleep state.
In one embodiment, the signal processing device 120 generates an enable signal according to the state switching information, including: the decoding chip 122 decodes the state switching information; wherein, the state switching information is information acquired by the interface circuit 110 from an ethernet; when the decoding chip 122 successfully decodes the state switching information, an enable signal is generated.
Specifically, the state switching information may be a sleep instruction or a wake-up instruction acquired by the interface circuit 110 from the ethernet, and when a transmission protocol corresponding to the sleep instruction or the wake-up instruction matches a communication protocol supported by the decoding chip 122, the decoding chip 122 may successfully decode the sleep instruction or the wake-up instruction, that is, the decoding chip 122 may convert the sleep instruction or the wake-up instruction into a corresponding digital signal and output the digital signal, where the digital signal is an enable signal.
Illustratively, when the decoding chip 122 receives a sleep command from the ethernet through the interface circuit 110, after the decoding chip 122 successfully decodes the sleep command, a low-level enable signal is generated, the decoding chip 122 sends the low-level enable signal to the bus power supply 130, the bus power supply 130 updates the power supply state to power off according to the low-level enable signal, the bus power supply 130 stops supplying power to the radar working circuit 140, so that the radar working circuit 140 enters the sleep state, that is, the entire laser radar enters the sleep state; when the decoding chip 122 receives the wake-up instruction from the ethernet through the interface circuit 110, the decoding chip 122 generates a high-level enable signal after successfully decoding the wake-up instruction, the decoding chip 122 sends the high-level enable signal to the bus power supply 130, the bus power supply 130 updates the power supply state to power supply on according to the high-level enable signal, the bus power supply 130 starts to supply power to the radar working circuit 140, so that the radar working circuit 140 enters the wake-up state, that is, the laser radar complete machine enters the wake-up state.
In one embodiment, after the decoding chip 122 decodes the state switching information, the method further includes: when the decoding chip 122 fails to decode the state switching information, the state switching information is sent to the main control chip 121; the main control chip 121 generates a register control instruction corresponding to the state switching information, and sends the register instruction to the decoding chip 122; after the decoding chip 122 executes the register control instruction, an enable signal is generated.
Specifically, the decoding chip 122 fails to decode the status switching information, which indicates that the transmission protocol corresponding to the status switching information fails to match the communication protocol corresponding to the decoding chip 122, the decoding chip 122 cannot convert the status switching information into a corresponding digital signal, that is, the decoding chip 122 cannot directly output the corresponding enable signal according to the state switching information, the state switching information which cannot be decoded successfully is sent to the main control chip 121, the main control chip 121 generates the corresponding register control instruction according to the state switching information, the main control chip 121 further sends the register control instruction to the decoding chip 122, the decoding chip 122 executes the register control instruction, that is, the decoding chip 122 adjusts the sleep/wake-up register therein according to the parameter corresponding to the register control instruction, and the decoding chip 122 generates a corresponding enable signal based on the sleep/wake-up register after the parameter adjustment.
Illustratively, the state switching information is a sleep instruction, but the decoding chip 122 cannot convert the sleep instruction into a corresponding low-level enable signal, the decoding chip 122 sends the sleep instruction to the main control chip 121 through the internal communication module, the main control chip 121 generates a register control instruction according to the sleep instruction and sends the register control instruction to the decoding chip 122, the decoding chip 122 executes the register control instruction and then generates a low-level enable signal, the decoding chip 122 outputs the low-level enable signal to the bus power supply 130, the bus power supply 130 updates the power supply state to power off according to the low-level enable signal, that is, the power supply for the radar working circuit 140 is stopped, so that the radar working circuit 140 enters the sleep state, even if the entire laser radar enters the sleep state.
In one embodiment, referring to fig. 4, the radar control system further includes an independent power source 150, wherein the independent power source 150 is electrically connected to the interface circuit 110 and the decoding chip 122, respectively; the method further comprises the following steps: the independent power supply 150 outputs a driving voltage to the decoding chip 122 when the radar operating circuit 140 enters the sleep state.
In particular, the independent power source 150 may be composed of any component and/or integrated circuit capable of storing electrical energy and providing electrical energy to the decoding chip 122. When the laser radar is in the wake-up state, the independent power supply 150 receives the electric energy provided by the external device 100 through the interface circuit 110 for storing energy, and at this time, the decoding chip 122 can directly receive the electric energy provided by the external device 100 through the interface circuit 110 without the independent power supply 150 supplying power to the decoding chip 122; when laser radar is in the dormant state, utilize the inside electric energy of storing of independent power source 150 to decode chip 122 output driving voltage this moment, driving voltage is used for supplying power for the low-power consumption module in decoding chip 122 to maintain laser radar and be in the low-power consumption state.
In this embodiment, only five parts, namely the interface circuit 110, the main control chip 121, the decoding chip 122, the independent power supply 150 and the bus power supply 130, form the radar control system to realize the sleep awakening of the laser radar, the radar control system has a simple structure and a simple connection relationship, numerous complex devices are not required to be utilized, and a redundant chip with a sleep awakening function is not required to be introduced, so that the design cost for realizing the sleep awakening of the laser radar can be reduced.
In one embodiment, the method further comprises: when the bus power supply 130 receives the state switching information sent by the interface circuit 110, the bus power supply enters a corresponding power supply state according to the level state indicated by the state switching information.
Specifically, as shown in fig. 5, the bus power supply 130 is electrically connected to the interface circuit 110, that is, the bus power supply 130 may also receive the state switching information from the interface circuit 110, for example, when the state switching information is a power-on reset signal, the bus power supply 130 enters a corresponding power supply state according to the level state of the power-on reset signal, for example, the bus power supply 130 enters a power supply off state according to the low-level power-on reset signal, and enters a power supply on state according to the high-level power-on reset signal; or, the power supply is started according to the low-level power-on reset signal, and the power supply is stopped according to the high-level power-on reset signal.
In order to ensure that the enable pin of the power chip in the bus power supply 130 can maintain a corresponding state according to the power-on reset signal, the power-on reset signal is also sent to the main control chip 121, the main control chip 121 generates a corresponding enable signal according to the power-on reset signal, and the main control chip 121 sends the enable signal to the bus power supply 130, where the enable signal is used to enable the enable pin of the power chip in the bus power supply 130 to maintain a corresponding state according to the level state of the power-on reset signal.
Illustratively, the bus power supply 130 receives a high-level power-on reset signal sent by the interface circuit 110, the bus power supply 130 enters power supply start according to the high-level power-on reset signal, at this time, the main control chip 121 also generates a high-level enable signal according to the high-level power-on reset signal, the main control chip 121 sends the high-level enable signal to the bus power supply 130, and the high-level enable signal is used for preventing the level of an enable pin of the power supply chip from being influenced by interference and pulled down, so as to maintain the enable pin in a high-level state.
Based on the above embodiment, the master control chip 121 and the decoding chip 122 can be used to implement various ways to make the lidar enter the sleep state or the wake-up state, and four implementation ways are first taken as an example:
mode 1
Dormancy: the interface circuit 110 sends the low-level power-on reset signal to the main control chip 121 and the decoding chip 122, after the main control chip 121 identifies and determines that the power-on reset signal is at the low level, the main control chip 121 generates a register control instruction according to the low-level power-on reset signal, and sends the register control instruction to the decoding chip 122, so that the decoding chip 122 executes the register control instruction, the decoding chip 122 adjusts a sleep wake-up register therein according to a parameter corresponding to the register control instruction, the decoding chip 122 generates a low-level enable signal according to the sleep wake-up register after the parameter adjustment, the decoding chip 122 sends the low-level enable signal to the bus power supply 130, the low-level enable signal enables the bus power supply 130 to enter a power supply shutdown state, and then the laser radar whole machine enters a sleep state.
And (4) awakening: the interface circuit 110 sends the high-level power-on reset signal to the main control chip 121 and the decoding chip 122, the main control chip 121 does not act on the high-level power-on reset signal, the decoding chip 122 generates a high-level enable signal according to the high-level power-on reset signal, the high-level enable signal enables the bus power supply 130 to enter a power supply starting state, and then the laser radar complete machine enters an awakening state.
Namely, the main control chip is triggered to act by a low-level power-on reset signal and does not act on a high-level power-on reset signal in advance; the decoding chip is triggered to act by the power-on reset signal with high level, but does not act on the power-on reset signal with low level. The main control chip can be triggered by a high-level power-on reset signal, the decoding chip is triggered by a low-level power-on reset signal, and the triggering action between the level state and the chip can be designed in a user-defined mode according to the actual scene.
Mode 2
Dormancy: the interface circuit 110 sends the low-level power-on reset signal to the decoding chip 122, and sends the sleep instruction obtained from the ethernet to the decoding chip 122, the decoding chip 122 does not act on the low-level power-on reset signal, when the decoding chip 122 fails to decode the sleep instruction, that is, the communication protocol corresponding to the decoding chip 122 does not match with the transmission protocol corresponding to the sleep instruction, the decoding chip 122 sends the sleep instruction to the main control chip 121, the main control chip 121 generates a corresponding register control instruction according to the sleep instruction, the main control chip 121 sends the register control instruction to the decoding chip 122, a sleep wakeup register in the decoding chip 122 is operated, the decoding chip 122 generates a low-level enable signal based on the adjusted sleep wakeup register, so that the bus power supply 130 enters a power supply shutdown state, and the laser radar enters a sleep state.
And (4) awakening: the interface circuit 110 sends the high-level power-on reset signal to the main control chip 121 and the decoding chip 122, the main control chip 121 does not act on the high-level power-on reset signal, the decoding chip 122 generates a high-level enable signal according to the high-level power-on reset signal, the high-level enable signal enables the bus power supply 130 to enter a power supply starting state, and then the laser radar complete machine enters an awakening state.
Mode 3
Dormancy: when the main control chip 121 receives the low-level power-on reset signal sent by the interface circuit 110, the main control chip 121 may determine that the power-on reset signal reaches the low-level threshold, generate a low-level enable signal, and send the low-level enable signal to the bus power supply 130 to pull down the voltage of an enable pin of the power chip in the bus power supply 130, so that the bus power supply 130 enters a power supply shutdown state, and the laser radar enters a sleep state.
And (4) awakening: when the bus power supply 130 receives the high-level power-on reset signal from the interface circuit 110, the bus power supply 130 is powered on, and after the laser radar complete machine is started, the main control chip 121 generates a high-level enable signal according to the high-level power-on reset signal and sends the high-level enable signal to the bus power supply 130, so that the voltage of an enable pin of a power chip in the bus power supply 130 is prevented from being lowered, and the laser radar is ensured to be kept in a starting state.
Mode 4
Dormancy: the interface circuit 110 sends the sleep instruction received from the ethernet to the decoding chip 122, after the decoding chip 122 successfully decodes the sleep instruction, the decoding chip 122 generates a low-level enable signal according to the sleep instruction, and the low-level enable signal enables the bus power supply 130 to enter a power supply shutdown state, so that the laser radar enters a sleep state.
And (4) awakening: the interface circuit 110 sends the wake-up instruction received from the ethernet to the decoding chip 122, after the decoding chip 122 successfully decodes the wake-up instruction, the decoding chip 122 generates a high-level enable signal according to the wake-up instruction, and the high-level enable signal enables the bus power supply 130 to enter a power supply start state, so that the laser radar enters a wake-up state.
The above method of only showing partial laser radar implementation dormancy awakening is exemplified, and still can utilize the form that at least one or more modes combine in the above-mentioned embodiment in order to realize laser radar dormancy awakening, and it is here not repeated much, can realize through main control chip 121, decode chip 122 and bus power 130 that laser radar carries out dormancy awakening in different modes, be adapted to different scene demands, avoid laser radar to be in operating condition for a long time, thereby still can postpone laser radar's life when realizing the energy saving.
Fig. 2 is a flow chart illustrating a radar control method according to an embodiment. It should be understood that, although the steps in the flowchart of fig. 2 are shown in order as indicated by the arrows, the steps are not necessarily performed in order as indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least a portion of the steps in fig. 2 may include multiple sub-steps or multiple stages that are not necessarily performed at the same time, but may be performed at different times, and the order of performance of the sub-steps or stages is not necessarily sequential, but may be performed in turn or alternately with other steps or at least a portion of the sub-steps or stages of other steps.
Fig. 6 shows an internal structural view of the lidar apparatus in one embodiment. As shown in fig. 6, the lidar device includes a processor and a memory connected by a system bus. Wherein the memory includes a non-volatile storage medium and an internal memory. The non-volatile storage medium of the laser radar apparatus stores an operating system and may also store a computer program which, when executed by the processor, causes the processor to implement the radar control method. The internal memory may also have stored therein a computer program that, when executed by the processor, causes the processor to perform the radar control method. It will be appreciated by those skilled in the art that the configuration shown in fig. 6 is a block diagram of only a portion of the configuration associated with the present application and does not constitute a limitation on the lidar apparatus to which the present application is applied, and that a particular lidar apparatus may include more or less components than shown in the drawings, or may combine certain components, or have a different arrangement of components.
In one embodiment, the radar control system provided herein may be implemented in the form of a computer program that is executable on a lidar device such as that shown in fig. 6. The memory of the laser radar apparatus may store therein respective program modules constituting the radar control system, and the computer program constituted by the respective program modules causes the processor to execute the steps in the radar control method of the embodiments of the present application described in the present specification.
The laser radar apparatus shown in fig. 6 may receive the state switching information transmitted from the external apparatus 100 through the interface circuit 110 in the radar control system shown in fig. 1 and transmit the state switching information to the signal processing device 120. The lidar device may generate an enable signal according to the state switching information through the signal processing device 120, and transmit the enable signal to the bus power supply 130. The laser radar equipment can enter a corresponding power supply state according to the level state of the enabling signal through the bus power supply 130; the level state comprises a high level and a low level, the power supply state comprises power supply opening and power supply closing, when the power supply state is power supply opening, the bus power supply 130 drives the radar working circuit 140 to enter a wake-up state, and when the power supply state is power supply closing, the bus power supply 130 drives the radar working circuit 140 to enter a sleep state.
In one embodiment, a lidar device is provided that comprises a memory, a processor, and a computer program stored on the memory and executable on the processor, the processor implementing the method of any of the above embodiments when executing the computer program.
In an embodiment, a computer-readable storage medium is provided, on which a computer program is stored, which computer program, when being executed by a processor, carries out the method of any of the above embodiments.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by instructing the relevant hardware through a computer program, which can be stored in a non-volatile computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in the embodiments provided herein may include non-volatile and/or volatile memory, among others. Non-volatile memory can include read-only memory (ROM), Programmable ROM (PROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), double-rate SDRAM (DDRSDRAM), Enhanced SDRAM (ESDRAM), synchronous Link (Synchlink) DRAM (SLDRAM), Rambus Direct RAM (RDRAM), direct bus dynamic RAM (DRDRAM), and bus dynamic RAM (RDRAM).
It is noted that, in this document, relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The foregoing are merely exemplary embodiments of the present invention, which enable those skilled in the art to understand or practice the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (11)
1. A radar control method is applied to a radar control system, the radar control system comprises a signal processing device, a bus power supply and an interface circuit, the signal processing device is respectively and electrically connected with the interface circuit and the bus power supply, and the method comprises the following steps:
the interface circuit receives state switching information sent by external equipment and sends the state switching information to the signal processing device;
the signal processing device generates an enabling signal according to the state switching information and sends the enabling signal to the bus power supply;
the bus power supply enters a corresponding power supply state according to the level state of the enabling signal; the power supply state comprises power supply starting and power supply closing, when the power supply state is power supply starting, the bus power supply drives the radar working circuit to enter a wake-up state, and when the power supply state is power supply closing, the bus power supply drives the radar working circuit to enter a sleep state.
2. The method of claim 1, wherein the signal processing device comprises a main control chip and a decoding chip, and the main control chip and the decoding chip are electrically connected to the bus power supply respectively.
3. The method of claim 2, wherein the signal processing device generates an enable signal according to the state switching information, comprising:
and the main control chip identifies the level state indicated by the state switching information, and generates an enabling signal when the level state indicated by the state switching information is the first level state.
4. The method of claim 2, wherein the signal processing device generates an enable signal according to the state switching information, comprising:
the decoding chip identifies the level state indicated by the state switching information, and generates an enabling signal when the level state indicated by the state switching information is a second level state.
5. The method of claim 2, wherein the signal processing device generates an enable signal according to the state switching information, comprising:
the main control chip generates a register control instruction according to the state switching information and sends the register control instruction to the decoding chip;
and after the decoding chip executes the register control instruction, generating the enabling signal.
6. The method of claim 2, wherein the signal processing device generates an enable signal according to the state switching information, comprising:
the decoding chip decodes the state switching information; wherein, the state switching information is the information acquired by the interface circuit from the Ethernet;
and when the decoding chip successfully decodes the state switching information, an enabling signal is generated.
7. The method of claim 6, wherein after the decoding chip performs decoding processing on the state switching information, the method further comprises:
when the decoding chip fails to decode the state switching information, the state switching information is sent to the main control chip;
the master control chip generates a register control instruction corresponding to the state switching information and sends the register instruction to the decoding chip;
and after the decoding chip executes the register control instruction, an enabling signal is generated.
8. The method of claim 2, wherein the radar control system further comprises an independent power supply electrically connected to the interface circuit and the decoding chip, respectively; the method further comprises the following steps:
and the independent power supply outputs driving voltage to the decoding chip when the radar working circuit enters the dormant state.
9. The method of claim 1, further comprising:
and when the bus power supply receives the state switching information sent by the interface circuit, the bus power supply enters a corresponding power supply state according to the level state indicated by the state switching information.
10. Lidar comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the steps of the method of any of claims 1 to 9 are implemented when the computer program is executed by the processor.
11. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the method of any one of claims 1 to 9.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116643280A (en) * | 2023-07-27 | 2023-08-25 | 禾昆科技(北京)有限公司 | Radar control device and radar control method |
| CN115118534B (en) * | 2022-06-07 | 2023-11-17 | 合肥移瑞通信技术有限公司 | Low-power-consumption state control method, device, terminal and storage medium of MBB equipment |
| CN117250495A (en) * | 2023-11-16 | 2023-12-19 | 广州三晶电气股份有限公司 | Key adhesion detection device |
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- 2021-12-10 CN CN202111508216.5A patent/CN114355312A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115118534B (en) * | 2022-06-07 | 2023-11-17 | 合肥移瑞通信技术有限公司 | Low-power-consumption state control method, device, terminal and storage medium of MBB equipment |
| CN116643280A (en) * | 2023-07-27 | 2023-08-25 | 禾昆科技(北京)有限公司 | Radar control device and radar control method |
| CN116643280B (en) * | 2023-07-27 | 2023-10-13 | 禾昆科技(北京)有限公司 | Radar control device and radar control method |
| CN117250495A (en) * | 2023-11-16 | 2023-12-19 | 广州三晶电气股份有限公司 | Key adhesion detection device |
| CN117250495B (en) * | 2023-11-16 | 2024-04-26 | 广州三晶电气股份有限公司 | Key adhesion detection device |
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