CN114242890A - Ultrasonic transducer unit, ultrasonic transducer array and preparation method thereof - Google Patents

Abstract

The invention discloses an ultrasonic transducer unit, an ultrasonic transducer array and a preparation method thereof, relating to the technical field of capacitive micro-mechanical ultrasonic transduction, wherein the ultrasonic transducer unit in the ultrasonic transducer array comprises: the device comprises an upper substrate and a lower substrate which are mutually bonded, wherein the upper substrate sequentially comprises a first device layer, a first insulating layer and at least one patterned upper electrode from bottom to top; the lower substrate is an SOI substrate and sequentially comprises a lower electrode, a second insulating layer, a second substrate, a third insulating layer and an isolated island-shaped second device layer from bottom to top; at least one groove is formed on the upper surface of the island-shaped second device layer, and the groove and the upper surface of the island-shaped second device layer are covered with a fourth insulating layer; through holes are formed in the third insulating layer and the second substrate below the island-shaped second device layer, the second insulating layer covers the lower surface of the second substrate and the side walls of the through holes, and the lower electrode covers the through holes. The invention can effectively improve the sensitivity of the ultrasonic transducer array.

Description

Ultrasonic transducer unit, ultrasonic transducer array and preparation method thereof

Technical Field

The invention relates to the technical field of capacitive micro-mechanical ultrasonic transduction, in particular to an ultrasonic transducer unit, an ultrasonic transducer array and a preparation method thereof.

Background

A Capacitive Micromachined Ultrasonic Transducer (CMUT) is a parallel plate capacitor, which is mainly composed of an upper plate, a lower plate, an insulating layer between the two plates, and a cavity in the insulating layer. The upper polar plate is a movable diaphragm and is mainly manufactured by depositing an aluminum film on silicon; the lower plate is fixed and immovable and is usually made by depositing an aluminum film on a highly doped silicon substrate.

In the mode of transmitting ultrasonic waves, direct current bias voltage and alternating current excitation are required to be applied between the upper polar plate and the lower polar plate through the aluminum film, so that the upper polar plate vibrates to generate and transmit ultrasonic waves. In a mode of receiving ultrasonic waves, direct-current bias voltage needs to be applied between the upper pole plate and the lower pole plate through the aluminum film, the received ultrasonic waves enable the upper pole plate to vibrate, so that the size of a cavity between the two pole plates changes, capacitance changes are caused, and an alternating-current signal is generated between the two pole plates.

The plurality of CMUTs form a planar two-dimensional array in a row-column alignment manner, and the received ultrasonic waves are processed to form a three-dimensional image, so that the method has wide application. All ultrasonic transducer units in the existing ultrasonic transducer array share one whole lower polar plate, and in the working process, the ultrasonic transducer units can mutually influence each other, and once a problem or a defect occurs in a certain local area, the normal work of other ultrasonic transducer units can be influenced.

Disclosure of Invention

The invention provides an ultrasonic transducer unit, an ultrasonic transducer array and a preparation method thereof, which are used for overcoming the technical problems in the prior art, so that each ultrasonic transducer unit can work independently without mutual interference, and the sensitivity of the whole ultrasonic transducer array is improved.

The present invention provides an ultrasonic transducer unit comprising: the device comprises an upper substrate and a lower substrate which are mutually bonded, wherein the upper substrate sequentially comprises a first device layer, a first insulating layer and at least one patterned upper electrode from bottom to top; the lower substrate is an SOI substrate and sequentially comprises a lower electrode, a second insulating layer, a second substrate, a third insulating layer and an isolated island-shaped second device layer from bottom to top; at least one groove is formed on the upper surface of the island-shaped second device layer, and a fourth insulating layer covers the groove and the upper surface of the island-shaped second device layer; through holes are formed in the third insulating layer and the second substrate below the island-shaped second device layer, the second insulating layer covers the lower surface of the second substrate and the side walls of the through holes, and the lower electrode covers the through holes.

Further, the first device layer is formed by removing the substrate and the insulating layer of the SOI substrate.

Optionally, the grooves correspond to the upper electrodes one to one.

Optionally, the area of the upper electrode is smaller than or equal to the area of the corresponding groove.

Optionally, a center position of the upper electrode coincides with a center position of the corresponding groove, and a center position of the via hole coincides with a center position of the island-shaped second device layer.

Further, the lower electrode extends on the second insulating layer on the lower surface of the second substrate to form a flip-chip process connection point.

Further, the lower substrate further comprises an isolation groove surrounding the island-shaped second device layer, the third insulating layer is exposed at the bottom of the isolation groove, and the isolation groove is used for electrically insulating the island-shaped second device layer from the adjacent island-shaped second device layer.

The ultrasonic transducer array provided by the invention comprises a plurality of ultrasonic transducer units arranged in an array, wherein all the ultrasonic transducer units share the first device layer, the oxidation insulating layer, the second substrate and the third insulating layer; all the isolation grooves are communicated to form a net shape; the island-shaped second device layers of the adjacent ultrasonic transducer units are electrically insulated by the isolation grooves.

Further, among the upper electrodes of all the ultrasonic transducer units, the upper electrodes located in the same column are electrically connected by a longitudinal interconnection line, and the upper electrodes located in the same row are electrically connected by a transverse interconnection line.

The invention provides a preparation method of an ultrasonic transducer array, which comprises the following steps: (1) etching a reticular isolation groove on the second device layer of the second SOI substrate until the third insulating layer is exposed to form a plurality of isolated island-shaped second device layers; (2) after depositing an oxide insulation layer on the upper surface of the island-shaped second device layer, etching at least one groove until the island-shaped second device layer is exposed, and then depositing the oxide insulation layer on the surface of the groove, wherein the oxide insulation layer on the surface of the groove and the upper surface of the island-shaped second device layer form a fourth insulation layer; (3) bonding a first device layer of a first SOI substrate and the surface of the second SOI substrate with the groove; (4) forming a through hole on a second substrate of the second SOI substrate; (5) depositing a second insulating layer on the surface of the second substrate and the inner surface of the through hole, and continuously etching the second insulating layer at the bottom of the through hole and the third insulating layer of the second SOI substrate until the island-shaped second device layer is exposed; (6) forming a lower electrode covering the through hole; (7) sequentially removing the substrate and the insulating layer on the first device layer of the first SOI substrate; (8) and sequentially forming a first insulating layer and a patterned upper electrode on the first device layer.

Optionally, the step (6) comprises: covering a conductive metal on the surface of the second insulating layer to enable the conductive metal to fill the through hole; polishing the surface of the conductive metal to be flat; and patterning the conductive metal to enable the conductive metal to extend on the second insulating layer on the lower surface of the second substrate to form a flip-chip process connection point.

Optionally, the step (8) comprises: sequentially forming the first insulating and conductive metal layers on the first device layer; and etching the conductive metal layer to form the patterned upper electrode.

Further, the surface of the island-shaped second device layer is square.

Further, the upper electrode has a flat cylindrical shape.

Further, the through hole is cylindrical in shape.

In the ultrasonic transducer unit, the ultrasonic transducer array and the preparation method thereof provided by the invention, the lower substrate of the ultrasonic transducer unit adopts an SOI substrate, wherein the second device layer is formed into an island isolated from the second device layer of the adjacent ultrasonic transducer unit, at least one groove is formed on the upper surface of the island-shaped second device layer, the surface of the groove and the upper surface of the island-shaped second device layer are both covered with a fourth insulating layer, a cavity is formed between the insulated groove and the first device layer of the bonded upper substrate, and the first device layer is formed into a vibration film for transmitting ultrasonic waves.

A through hole is formed in the second substrate, which is arranged below the island-shaped second device layer and is separated by the third insulating layer, the through hole is filled with a lower electrode, and the second insulating layer is separated between the lower electrode and the second substrate, so that the single lower electrode can be in ohmic contact with the lower surface of the single island-shaped second device layer and is electrically insulated from the second substrate. The upper surface of the upper substrate is formed with a patterned upper electrode, and the ultrasonic transducer unit can independently realize the functions of transmitting and receiving ultrasonic waves by applying a bias voltage between the upper electrode and the lower electrode of the ultrasonic transducer unit.

In the ultrasonic transducer array formed by the ultrasonic transducer units, because each ultrasonic transducer unit is provided with an independent lower electrode, each ultrasonic transducer unit is independently controlled and is not influenced by other ultrasonic transducers, the anti-interference performance of the ultrasonic transducer units is improved, and the sensitivity of the whole ultrasonic transducer array is also improved.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.

Fig. 1 is a schematic cross-sectional view of an ultrasound transducer unit according to an embodiment of the present invention;

fig. 2 is a schematic partial cross-sectional view of an ultrasound transducer array according to an embodiment of the present invention;

FIG. 3 is a schematic top view of a portion of an ultrasound transducer array according to an embodiment of the present invention;

fig. 4 is a schematic top view of a portion of a lower substrate of an ultrasonic transducer array, on which a surface with a groove is formed according to an embodiment of the present invention;

fig. 5a to 5k are schematic partial cross-sectional views of structures formed in steps of a method for manufacturing an ultrasound transducer array according to an embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

In order to make the technical solution of the present invention clearer, embodiments of the present invention are described in detail below with reference to the accompanying drawings.

Fig. 1 is a schematic cross-sectional view of an ultrasound transducer unit C according to an embodiment of the present invention, as shown in fig. 1, the ultrasound transducer unit C in this embodiment includes: an upper substrate 11 and a lower substrate 12 bonded to each other, wherein the upper substrate 11 includes, in order from bottom to top, a first device layer 111, a first insulating layer 112, and at least one patterned upper electrode 113.

The lower substrate 12 is an SOI substrate, and includes, in order from bottom to top, a lower electrode 121, a second insulating layer 122, a second substrate 123, a third insulating layer 124, and an isolated island-shaped second device layer 125. At least one groove a is formed on the upper surface of the island-shaped second device layer 125, and the groove a and the upper surface of the island-shaped second device layer 125 are covered with a fourth insulating layer 126. A via hole B is formed in the third insulating layer 124 and the second substrate 123 under the island-shaped second device layer 125, and the second insulating layer 122 covers the lower surface of the second substrate 123 and the sidewall of the via hole B. The lower electrode 121 covers the through hole B.

The SOI is called a Silicon-On-Insulator, that is, Silicon On an insulating substrate, in which a buried oxide layer is introduced between top Silicon and the substrate, the top Silicon is a semiconductor thin film, which is called a device layer, and is used for manufacturing a semiconductor device, the buried oxide layer in the middle is called an insulating layer, and the substrate is located at the bottom.

The material has incomparable advantages compared with bulk silicon by forming a semiconductor film on an insulating layer: the dielectric isolation of components in the integrated circuit can be realized, and the parasitic latch-up effect in a bulk silicon CMOS circuit is thoroughly eliminated; the integrated circuit made of the material also has the advantages of small parasitic capacitance, high integration density, high speed, simple process, small short channel effect, particular application to low-voltage and low-power consumption circuits and the like.

The lower substrate in the embodiment of the invention adopts the SOI substrate, so that the prepared ultrasonic transducer array has the advantages.

The second device layer 125 in the SOI substrate is formed as an island isolated from the second device layer of the adjacent ultrasonic transducer unit, at least one recess a is formed on the upper surface of the island-shaped second device layer 125, the recess a surface and the upper surface of the island-shaped second device layer 125 are covered with a fourth insulating layer 126, a vacuum cavity is formed between the insulating recess a and the first device layer 111 of the bonded upper substrate 11, and the first device layer 111 is formed as a vibration film for transmitting ultrasonic waves.

A via hole B is formed in the second substrate 123 below the island-shaped second device layer 125 with the third insulating layer 124 interposed therebetween, the via hole B is filled with the lower electrode 121, and the second insulating layer 122 is interposed between the lower electrode 121 and the second substrate 123, so that the single lower electrode 121 can make ohmic contact with the lower surface of the single island-shaped second device layer 125 and be electrically insulated from the second substrate 123. The upper substrate 11 has a patterned upper electrode 113 formed on an upper surface thereof, and the ultrasonic transducer unit can independently perform ultrasonic wave transmitting and receiving functions by applying a bias voltage between the upper electrode 113 and the lower electrode 121 of the ultrasonic transducer unit.

In the ultrasonic transducer array formed by the ultrasonic transducer units, because each ultrasonic transducer unit is provided with the independent lower electrode 121, the ultrasonic transducer units are independently controlled and are not influenced by other ultrasonic transducer units, the anti-interference performance of the ultrasonic transducer units is improved, and the sensitivity of the whole ultrasonic transducer array is also improved.

In the ultrasonic transducer unit, the first device layer 111 may be formed by removing a substrate and an insulating layer from an SOI substrate. In the conventional ultrasonic transducer unit, a layer of silicon or silicon nitride is directly deposited above the groove to serve as a first device layer, but the thickness of the formed first device layer is not uniform.

In addition, the grooves a may correspond one-to-one to the upper electrodes 113, that is, one groove a corresponds to one upper electrode 113, and the upper electrode 113 is different from the full-plate-shaped upper electrode used in the related art in that it is patterned. Only the upper electrode is correspondingly arranged above the groove a, and preferably, the area of the upper electrode 113 is smaller than or equal to the area of the corresponding groove a, so that not only can a certain interval be ensured between the upper electrodes 113 corresponding to each groove a, the surface area of the upper electrode be reduced, the manufacturing cost be saved, but also the electric signal on the upper electrode 113 can be accurately applied to the first device layer 111 above the corresponding groove a.

In order to simplify the manufacturing process, the recess a is generally formed in a cylindrical shape, the corresponding upper electrode 113 is also generally formed in a flat cylindrical shape, and the size of the area of the upper electrode 113 can be flexibly designed, and when the area is small, the conduction efficiency of the electrical signal is high but the energy is small, and when the area is large, the conduction efficiency of the electrical signal is low but the energy is large.

Preferably, the center position of the upper electrode 113 is consistent with the center position of the corresponding groove a, and if the groove a is cylindrical, the upper electrode 113 is flat cylindrical, and the center positions of the two are consistent, that is, the central axes of the two are overlapped together.

Meanwhile, the center position of the via hole B may coincide with the center position of the island-shaped second device layer 125. Also, in order to simplify the manufacturing process, the through hole B is generally formed in a cylindrical shape, the surface of the island-shaped second device layer 125 is formed in a square shape, and the center position of the through hole B coincides with the center position of the island-shaped second device layer 125, that is, the central axes of the two coincide. The lower electrode 121 in the through hole B interacts with the upper electrode 113 of the upper substrate 11, so that when the first device layer 111 above the groove a deforms due to an electrical signal or an ultrasonic signal, the position with the largest deformation is on the central axis, thereby ensuring the optimal performance of the ultrasonic transducer unit.

In the ultrasonic transducer unit, the lower electrode 121 extends on the second insulating layer 122 on the lower surface of the second substrate 123 to form a flip-chip process connection point, so that the contact area of the lower electrode 121 is increased, and the lower electrode 121 of the ultrasonic transducer array is conveniently soldered on a printed circuit board or a substrate by using a flip-chip process. In general, the connection point of the flip-chip process is not aligned with the through hole B as shown in fig. 1, so that the lower electrode 121 in the through hole B is prevented from being pulled out when the ultrasonic transducer array is detached from the printed circuit board or the substrate, thereby damaging the ultrasonic transducer array.

In addition, after the connecting point of the flip-chip process is connected with the printed circuit board or the substrate, the connecting point can be led to the integrated circuit chip, so that the interconnection of the island-shaped second device layers 125, the interconnection of the bottom through holes B, the interconnection of the lower electrodes 121 and the interconnection of the small-area sensing signals are realized.

It should be noted that: the shapes of the recess a, the upper electrode 113, the island-shaped second device layer 125, and the via B provided by the embodiment of the present invention are not limited to the above shapes, and may be other shapes known to those skilled in the art to simplify the manufacturing process and improve the sensing performance.

In the above embodiment, the lower substrate 12 may further include an isolation groove 127 surrounding the island-shaped second device layer 125, a bottom of the isolation groove 127 exposing the third insulating layer 124, and the isolation groove 127 for electrically isolating the island-shaped second device layer 125 from an adjacent island-shaped second device layer.

As can be seen from the above, the second device layer 125 is in the form of isolated islands, and adjacent isolated islands are isolated and insulated from each other. When the ultrasonic transducer array works, the isolated island is taken as a unit, so that the local sensing capability of the ultrasonic transducer array is enhanced, and the accurate position of the pressure (sound pressure or touch pressure) can be determined on a two-dimensional plane or a three-dimensional space. Meanwhile, if local problems or defects exist, the overall performance cannot be influenced.

At least one groove A manufactured on each isolated island forms a groove A array, and the height and the diameter of each groove A can be flexibly controlled, so that the vibration frequency can be conveniently adjusted. All the isolated islands share one first device layer 111 (vibration film), all the grooves a of each isolated island share one lower plate 121, the lower plate 121 is formed on the surface of the second substrate 123 of the lower substrate 12 and in the through holes B, and the second substrate 123 is still a whole and is common to all the isolated islands, which not only can make the structure firm, but also can simplify the manufacturing process. The integrated structure and the discrete function of the ultrasonic transducer array are realized.

Fig. 2 to 4 are schematic diagrams of an ultrasound transducer array provided in an embodiment of the present invention. As shown in fig. 1 to 4, the ultrasonic transducer array includes a plurality of the above-mentioned ultrasonic transducer cells C arranged in an array, and all the ultrasonic transducer cells C share a first device layer 111, an oxide insulating layer 112, a second insulating layer 122, a second substrate 123, and a third insulating layer 124; all the isolation grooves 127 are communicated to form a net shape; the island-shaped second device layers of the adjacent ultrasonic transducer cells C are electrically insulated from each other by the isolation groove 127.

The ultrasonic transducer array provided by the present invention adopts the ultrasonic transducer unit provided by the above embodiment, in the ultrasonic transducer unit, the lower substrate adopts an SOI substrate, the second device layer 125 in the SOI substrate is formed into an island isolated from the second device layer of the adjacent ultrasonic transducer unit, the upper surface of the island-shaped second device layer 125 is formed with at least one groove a, and the surface of the groove a and the upper surface of the island-shaped second device layer 125 are both covered with the fourth insulating layer 126, a vacuum cavity is formed between the insulated groove a and the first device layer 111 of the bonded upper substrate 11, and the first device layer 111 is formed into a vibration film for transmitting ultrasonic waves.

A via hole B is formed in the second substrate 123 below the island-shaped second device layer 125 with the third insulating layer 124 interposed therebetween, the via hole B is filled with the lower electrode 121, and the second insulating layer 122 is interposed between the lower electrode 121 and the second substrate 123, so that the single lower electrode 121 can make ohmic contact with the lower surface of the single island-shaped second device layer 125 and be electrically insulated from the second substrate 123. The upper substrate 11 has a patterned upper electrode 113 formed on an upper surface thereof, and the ultrasonic transducer unit can independently perform ultrasonic wave transmitting and receiving functions by applying a bias voltage between the upper electrode 113 and the lower electrode 121 of the ultrasonic transducer unit.

In the ultrasonic transducer array formed by the ultrasonic transducer units C, because each ultrasonic transducer unit C is formed with the independent lower electrode 121, each ultrasonic transducer unit C is independently controlled without being influenced by other ultrasonic transducer units C, the anti-interference performance of the ultrasonic transducer unit C is improved, and the sensitivity of the whole ultrasonic transducer array is also improved.

In the ultrasonic transducer array, as shown in fig. 3, of the upper electrodes 113 of all the ultrasonic transducer cells C, the upper electrodes 113 located in the same column are electrically connected by a longitudinal interconnection line L1, and the upper electrodes 113 located in the same row are electrically connected by a lateral interconnection line L2.

It should be noted that: in order to clearly show the positional relationship of the upper electrode 113 and the island-shaped second device layer 125, a solid outline of the island-shaped second device layer 125 is shown in fig. 3. In practice, the upper electrode 113 is formed over a first insulating layer (not shown in fig. 3) covering the underlying structure, and the island-shaped second device layer 125 is not actually visible in the perspective shown in fig. 3. In addition, the ellipses between adjacent ultrasound transducer cells C in fig. 3 indicate that there are a plurality of ultrasound transducer cells C not shown, and the ellipses inside the ultrasound transducer cells C indicate that the actual number of the upper electrodes 113 is not limited to the number shown in fig. 3, and may be a plurality.

Also to be noted are: the ellipses between adjacent ultrasound transducer cells C in fig. 4 indicate that there are a plurality of ultrasound transducer cells C not shown, and the ellipses inside the ultrasound transducer cells C indicate that the actual number of the grooves a is not limited to the number shown in fig. 3, and may be plural.

In operation, all the upper electrodes 113 are uniformly supplied with power through all the longitudinal interconnection lines L1 and the lateral interconnection lines L2, while each of the lower electrodes 121 is individually supplied with power. The ultrasound transducer array may be used for transmitting ultrasound waves and for receiving ultrasound waves. In both the transmit and receive ultrasonic modes, a Direct Current (DC) bias voltage is applied between the upper and lower electrodes.

In the transmit ultrasound mode, an Alternating Current (AC) voltage is applied superimposed on the DC bias voltage, and the DC bias voltage is greater than the AC voltage. The AC voltage generates a varying electrostatic attraction between the upper substrate 11 and the lower substrate 12, which pushes the first device layer (vibration film) to vibrate and emit ultrasonic waves.

In a receiving ultrasonic wave mode, on an ultrasonic transducer array applied with a DC bias voltage, a first device layer (vibration film) above a vacuum cavity bends downwards and keeps still, incident ultrasonic waves reach the first device layer (vibration film) to cause the first device layer (vibration film) to vibrate, and a cavity gap changes, so that the capacitance of an ultrasonic transducer unit changes, and finally, the inflow and outflow of electric charges are caused, and the purpose of detecting the incident ultrasonic waves is achieved by detecting the inflow and outflow conditions of the electric charges.

In the ultrasonic transducer array, the patterned upper electrodes 113 form a certain interval between the adjacent upper electrodes, so that the surface area of the upper electrodes 113 is reduced, and the manufacturing cost is saved. The upper electrodes of each row and each column are connected together through an interconnecting wire, so that the manufacturing and power supply are convenient. The defects of signal interference among leads, high wiring error rate, large loss, large occupied area and the like caused by the independent leads of each upper electrode in the prior art are overcome, the frequency stability of the island-shaped second device layer 125 serving as a vibrating film is improved, the frequency deviation is reduced, the realization of sub-megahertz frequency is facilitated, and the sensitivity and the reliability of transmitting and receiving ultrasonic waves by the ultrasonic transducer array are improved.

Meanwhile, the lower electrode 121 makes ohmic contact with the island-shaped second device layer 125 in the via hole B, improving conductivity therebetween.

The embodiment of the invention also provides a preparation method of the ultrasonic transducer array, which is used for manufacturing the ultrasonic transducer array described in the embodiment. Fig. 5a to 5k are partial cross-sectional views schematically illustrating the structure formed at each step in the manufacturing method. As shown in fig. 5a to 5k, the preparation method includes the following steps.

Step one, etching a reticular isolation groove E on the second device layer of the second SOI substrate D until the third insulating layer 52 is exposed, and forming a plurality of isolated island-shaped second device layers 51.

Specifically, as shown in fig. 5a and 5b, a clean SOI silicon wafer is first used as the second SOI substrate D, the second device layer 51 may be highly doped silicon (Si), and after a surface native oxide layer (not shown) is removed, a mesh-like interconnected isolation trench E is etched on the second device layer 51 by using an etching method, so as to fabricate an isolated island array. Each isolated island may be a cube. The isolation trenches E are etched until the third insulating layer 52 is exposed, and the highly doped silicon (Si) in the isolation trenches E of the mesh interconnection is completely etched away, so that the obtained isolated islands are insulated from each other and do not interfere with each other.

And step two, after depositing an oxide insulating layer on the upper surface of the island-shaped second device layer 51, etching at least one groove A until the island-shaped second device layer 51 is exposed, and then depositing an oxide insulating layer on the surface of the groove A, wherein the oxide insulating layer on the surface of the groove A and the upper surface of the island-shaped second device layer 51 form a fourth insulating layer 53.

Among them, silicon dioxide is preferably used for the oxide insulating layer, so that the manufacturing process can be simplified and the manufacturing cost can be reduced, but other insulating materials known to those skilled in the art can be used.

As shown in fig. 5c, an oxide insulating layer of silicon dioxide or other material is deposited on the island-shaped second device layer 51 and on the isolation trenches E of the mesh interconnection. The oxide insulating layer covers all the isolated islands and the isolation trenches E.

As shown in fig. 5d, the front surface of each isolated island is patterned to form a groove a by using photolithography and etching techniques, and an array of grooves a on the isolated island is etched. Then, a silicon dioxide layer or an oxide insulating layer made of other materials is thermally oxidized, and the layer is tightly attached to the upper surface of the groove A. The oxide insulating layer on the surface of the groove a and the upper surface of the island-shaped second device layer 51 constitutes a fourth insulating layer 53 as an insulating protective layer. The pretreatment of the second SOI substrate D is completed.

And step three, bonding the first device layer 54 of the first SOI substrate F and the surface of the second SOI substrate D with the groove A.

As shown in fig. 5F, a clean SOI silicon wafer is taken as the first SOI substrate F, the first device layer 54 is made of highly doped silicon or lowly doped silicon, after the surface native oxide layer is removed, the first device layer 54 of the first SOI substrate F and the surface with the groove a of the pretreated second SOI substrate D are bonded in a vacuum state by using a silicon wafer bonding process technology, so as to form a vacuum sealed cavity, and the vacuum state in the sealed cavity can be maintained for a long time by using the process, so that the performance of the ultrasonic transducer is improved. And bonding to obtain a connection body of the first SOI substrate F and the second SOI substrate D.

Step four, forming a through hole B in the second substrate 55 of the second SOI substrate D.

Specifically, as shown in fig. 5g, the connecting body processed in step three is turned over, so that the second SOI substrate D faces upward, and a through hole B is formed in the second substrate 55 by an etching process, so that the bottom of the through hole B is exposed out of the third insulating layer 52.

And step five, depositing a second insulating layer 56 on the surface of the second substrate 55 and the inner surface of the through hole B, and continuously etching the second insulating layer 56 at the bottom of the through hole B and the third insulating layer 52 of the second SOI substrate D until the island-shaped second device layer 51 is exposed.

As shown in detail in fig. 5 h.

And step six, forming a lower electrode 57, wherein the lower electrode 57 covers the through hole B.

As shown in fig. 5i, the lower electrode 57 in the via B is in direct contact with the island-shaped second device layer 51 to form an ohmic contact, thereby increasing the conductivity therebetween.

And step seven, sequentially removing the substrate and the insulating layer on the first device layer 54 of the first SOI substrate F.

As shown in fig. 5j, the structure formed in step six is turned over so that the first SOI substrate faces upward, and a first device layer 54 with uniform thickness and flat surface is formed through step seven, and the first device layer 54 is used as a vibration film for transmitting ultrasonic waves, and the volume in the cavity is changed by vibration deformation, so that the capacitance of the ultrasonic transducer unit is changed.

Step eight, sequentially forming a first insulating layer 58 and a patterned upper electrode 59 on the first device layer 54.

As shown in particular in fig. 5 k.

In the ultrasonic transducer array manufactured by the manufacturing method of the ultrasonic transducer array provided by the embodiment of the invention, the SOI substrate is adopted, the second device layer 51 in the second SOI substrate D is formed into an island isolated from the second device layer of the adjacent ultrasonic transducer unit, at least one groove a is formed on the upper surface of the island-shaped second device layer 51, the surface of the groove a and the upper surface of the island-shaped second device layer 51 are both covered with the fourth insulating layer 53, a vacuum cavity is formed between the insulated groove a and the first device layer 54 of the bonded first SOI substrate E, and the first device layer 54 is formed into a vibration film for transmitting ultrasonic waves.

A via hole B is formed in the second substrate 55 below the island-shaped second device layer 51 with the third insulating layer 52 interposed therebetween, the via hole B is filled with a lower electrode 57, and the second insulating layer 56 is interposed between the lower electrode 57 and the second substrate 55, so that the single lower electrode 57 can make ohmic contact with the lower surface of the single island-shaped second device layer 51 while being electrically insulated from the second substrate 55. The first device layer 54 has a patterned upper electrode 59 formed on an upper surface thereof, and the ultrasonic transducer cells in the ultrasonic transducer array can independently perform ultrasonic wave transmitting and receiving functions by applying a bias voltage between the upper electrode 59 and the lower electrode 57 of the ultrasonic transducer cells.

In the ultrasonic transducer array, because each ultrasonic transducer unit is provided with the independent lower electrode 57, each ultrasonic transducer unit is independently controlled without being influenced by other ultrasonic transducer units, the anti-interference performance of the ultrasonic transducer units is improved, and the sensitivity of the whole ultrasonic transducer array is also improved.

In addition, the manufacturing method forms the reticular isolation grooves on the second device layer of the second SOI substrate D through the etching process, so that each isolated island-shaped second device layer 51 is formed, the process is simple, and the structure and the performance of each formed isolated island are good in consistency.

In the manufacturing method provided in the above embodiment, step six may specifically include: covering the surface of the second insulating layer 56 with a conductive metal, so that the conductive metal fills the through hole B; polishing the surface of the conductive metal to be flat; the conductive metal is patterned to extend over the second insulating layer 56 on the lower surface of the second substrate 55 to form flip-chip process connection points.

The fabrication of the lower electrode 57 is completed by extending the conductive metal in the via hole over the surface of the second insulating layer 56 to form a flip-chip connection point. The flip-chip process connection points increase the contact area of the lower electrode 57, which facilitates the flip-chip process for soldering the lower electrode 57 of the ultrasonic transducer array on a printed circuit board or a substrate. In general, the flip-chip process connection point is not aligned with the through hole B as shown in fig. 5, so that the lower electrode 57 in the through hole B is prevented from being pulled out when the ultrasonic transducer array is detached from the printed circuit board or the substrate, thereby damaging the ultrasonic transducer array.

In addition, the lower electrode is manufactured on the second substrate 55 of the second SOI substrate D, only an etching process is needed, and a traditional Through Silicon Via (TSV) process is not needed, so that the process complexity and the manufacturing difficulty are reduced, and the yield is improved. Meanwhile, the area of the substrate is saved, and ohmic contact is formed between the isolated island-shaped second device layer 51 and the lower electrode 57, so that the conductivity is improved.

In the manufacturing method provided in the above embodiment, step eight may specifically include: sequentially forming a first insulating layer 58 and a conductive metal layer on the first device layer 54; the conductive metal layer is etched to form a patterned upper electrode 59.

In the process of forming the patterned upper electrodes, the upper electrodes 59 in the same row are connected with each other through the transverse interconnection lines and the upper electrodes 59 in the same column are connected with each other through the longitudinal interconnection lines, and the interconnection lines and the upper electrodes 59 can be formed in the same etching step, so that the realization method is simple, and the connection is firm.

In order to simplify the manufacturing process and increase the yield, the island-shaped second device layer 51 surface may be formed in a square shape, the upper electrode 59 may be formed in a flat cylindrical shape, and the via hole B may be formed in a cylindrical shape.

Of course, the shapes of the upper electrode 59, the island-shaped second device layer 51, and the via hole B are not limited to the above shapes, and may be other shapes known to those skilled in the art that can simplify the manufacturing process and improve the sensing performance.

Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.

Claims (15)

1. An ultrasonic transducer unit, comprising: the device comprises an upper substrate and a lower substrate which are mutually bonded, wherein the upper substrate sequentially comprises a first device layer, a first insulating layer and at least one patterned upper electrode from bottom to top;

the lower substrate is an SOI substrate and sequentially comprises a lower electrode, a second insulating layer, a second substrate, a third insulating layer and an isolated island-shaped second device layer from bottom to top; at least one groove is formed on the upper surface of the island-shaped second device layer, and a fourth insulating layer covers the groove and the upper surface of the island-shaped second device layer; through holes are formed in the third insulating layer and the second substrate below the island-shaped second device layer, the second insulating layer covers the lower surface of the second substrate and the side walls of the through holes, and the lower electrode covers the through holes.

2. The ultrasonic transducer cell of claim 1, wherein the first device layer is formed after removing a substrate and an insulating layer for an SOI substrate.

3. The ultrasonic transducer unit according to claim 1 or 2, wherein the grooves correspond one-to-one to the upper electrodes.

4. The ultrasound transducer unit of claim 3, wherein an area of the upper electrode is less than or equal to an area of the corresponding groove.

5. The ultrasonic transducer unit according to claim 3, wherein a center position of the upper electrode coincides with a center position of the corresponding groove, and a center position of the via hole coincides with a center position of the island-shaped second device layer.

6. The ultrasonic transducer unit according to claim 1 or 2, wherein the lower electrode extends on the second insulating layer on the lower surface of the second substrate to form a flip-chip process connection point.

7. The ultrasonic transducer unit according to claim 1 or 2, wherein the lower substrate further comprises an isolation trench surrounding the island-shaped second device layer, a bottom of the isolation trench exposing the third insulating layer, the isolation trench for electrically insulating the island-shaped second device layer from an adjacent island-shaped second device layer.

8. An ultrasonic transducer array, comprising a plurality of ultrasonic transducer cells as claimed in any one of claims 1 to 7 arranged in an array, wherein all of the ultrasonic transducer cells share the first device layer, the oxide insulating layer, the second substrate and the third insulating layer; all the isolation grooves are communicated to form a net shape; the island-shaped second device layers of the adjacent ultrasonic transducer units are electrically insulated by the isolation grooves.

9. The ultrasound transducer array according to claim 8, wherein among the upper electrodes of all the ultrasound transducer units, the upper electrodes located in a same column are electrically connected by a longitudinal interconnect line, and the upper electrodes located in a same row are electrically connected by a lateral interconnect line.

10. A method for preparing an ultrasonic transducer array, comprising:

(1) etching a reticular isolation groove on the second device layer of the second SOI substrate until the third insulating layer is exposed to form a plurality of isolated island-shaped second device layers;

(2) after depositing an oxide insulation layer on the upper surface of the island-shaped second device layer, etching at least one groove until the island-shaped second device layer is exposed, and then depositing the oxide insulation layer on the surface of the groove, wherein the oxide insulation layer on the surface of the groove and the upper surface of the island-shaped second device layer form a fourth insulation layer;

(3) bonding a first device layer of a first SOI substrate and the surface of the second SOI substrate with the groove;

(4) forming a through hole on a second substrate of the second SOI substrate;

(5) depositing a second insulating layer on the surface of the second substrate and the inner surface of the through hole, and continuously etching the second insulating layer at the bottom of the through hole and the third insulating layer of the second SOI substrate until the island-shaped second device layer is exposed;

(6) forming a lower electrode covering the through hole;

(7) sequentially removing the substrate and the insulating layer on the first device layer of the first SOI substrate;

(8) and sequentially forming a first insulating layer and a patterned upper electrode on the first device layer.

11. The method of claim 10, wherein the step (6) comprises: covering a conductive metal on the surface of the second insulating layer to enable the conductive metal to fill the through hole; polishing the surface of the conductive metal to be flat; and patterning the conductive metal to enable the conductive metal to extend on the second insulating layer on the lower surface of the second substrate to form a flip-chip process connection point.

12. The method of claim 10, wherein the step (8) comprises: sequentially forming the first insulating and conductive metal layers on the first device layer;

and etching the conductive metal layer to form the patterned upper electrode.

13. The production method according to any one of claims 10 to 12, wherein the island-shaped second device layer surface is square.

14. The method according to any one of claims 10 to 12, wherein the upper electrode has a flat cylindrical shape.

15. The method according to any one of claims 10 to 12, wherein the through-hole has a cylindrical shape.

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