CN114124821A - Method, device, equipment and storage medium for data transmission between modules in chip - Google Patents

Method, device, equipment and storage medium for data transmission between modules in chip Download PDF

Info

Publication number
CN114124821A
CN114124821A CN202111415344.5A CN202111415344A CN114124821A CN 114124821 A CN114124821 A CN 114124821A CN 202111415344 A CN202111415344 A CN 202111415344A CN 114124821 A CN114124821 A CN 114124821A
Authority
CN
China
Prior art keywords
interface
data transmission
target module
request
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202111415344.5A
Other languages
Chinese (zh)
Other versions
CN114124821B (en
Inventor
庄戌堃
王骞
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shandong Yunhai Guochuang Cloud Computing Equipment Industry Innovation Center Co Ltd
Original Assignee
Shandong Yunhai Guochuang Cloud Computing Equipment Industry Innovation Center Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shandong Yunhai Guochuang Cloud Computing Equipment Industry Innovation Center Co Ltd filed Critical Shandong Yunhai Guochuang Cloud Computing Equipment Industry Innovation Center Co Ltd
Priority to CN202111415344.5A priority Critical patent/CN114124821B/en
Publication of CN114124821A publication Critical patent/CN114124821A/en
Application granted granted Critical
Publication of CN114124821B publication Critical patent/CN114124821B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/16Flow control; Congestion control in connection oriented networks, e.g. frame relay
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/26Flow control; Congestion control using explicit feedback to the source, e.g. choke packets
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/27Evaluation or update of window size, e.g. using information derived from acknowledged [ACK] packets
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/36Flow control; Congestion control by determining packet size, e.g. maximum transfer unit [MTU]
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Communication Control (AREA)

Abstract

The application discloses a method, a device, equipment and a storage medium for data transmission between modules in a chip. The method comprises the following steps: receiving a data transmission request sent by a second target module in the chip through a request interface of the second target module; according to the data transmission request, sending a request response to a response interface of the second target module through a response interface of the second target module so as to establish communication connection between the first target module and the second target module; and sending target data corresponding to the data transmission request to a data transmission interface of the second target module through a data transmission interface of the second target module according to the communication connection. The data transmission can be initiated at any time without occupying a bus, and the data transmission efficiency among modules in the chip is improved.

Description

Method, device, equipment and storage medium for data transmission between modules in chip
Technical Field
The present invention relates to the field of computer technologies, and in particular, to a method, an apparatus, a device, and a storage medium for data transmission between modules in a chip.
Background
Along with the development of science and technology, increasingly stringent requirements are put forward on the functionality, stability and the like of the chip, the chip is also larger in scale and stronger in function, along with more and more modules in the chip, and data transmission among the chip modules becomes more and more important. The data transmission between the modules is used for mutually transmitting information between the modules, and the efficiency and the quality of the data transmission between the modules directly determine whether the whole chip is designed successfully or not, so the data transmission between the modules is very important.
In the prior art, the data transmission method between modules mainly uses two methods, namely a bus and a First Input First Output (FIFO). The bus transmits a request signal to a requested signal, the module requested to be accessed transmits the data to the bus, and the bus transmits the data to the module requested to be accessed, so that the data is transmitted to the bus, and then the bus transmits the data to the module requested to be transmitted, and the data transmission among the modules is completed. The transmission mode has high reliability, but needs to occupy a bus, when the bus is busy, data transmission needs to wait, the timeliness is low, and when a large amount of data needs to be transmitted between two modules, the bus time is always occupied, so that the bus is busy for a long time, and other modules cannot be used. Through the data transmission between the modules in the FIFO mode, when the two modules need to transmit data, the sending module can write data into the FIFO, and the receiving module can take the data out of the FIFO to complete the data transmission between the modules.
Disclosure of Invention
In view of this, an object of the present invention is to provide a method, an apparatus, a device and a medium for data transmission between modules in a chip, which can initiate data transmission at any time without occupying a bus, thereby improving the efficiency of data transmission between modules in the chip. The specific scheme is as follows:
in a first aspect, the present application discloses a method for transmitting data between modules in a chip, comprising:
receiving a data transmission request sent by a second target module in the chip through a request interface of the second target module;
according to the data transmission request, sending a request response to a response interface of the second target module through a response interface of the second target module so as to establish communication connection between the first target module and the second target module;
and sending target data corresponding to the data transmission request to a data transmission interface of the second target module through a data transmission interface of the second target module according to the communication connection.
Optionally, the sending, by the data transmission interface of the second target module, target data corresponding to the data transmission request to the data transmission interface of the second target module includes:
acquiring a data volume acquisition request sent by the second target module through a response interface of the second target module; the data volume acquisition request is a request generated by the second target module according to the data processing state of the second target module;
determining the size of target data according to the data volume acquisition request, and determining corresponding target data according to the data transmission request;
and generating a data packet to be sent according to the size of the target data based on the target data, and sending the data packet to be sent to a data transmission interface of the second target module through a data transmission interface of the data packet to be sent.
Optionally, before the obtaining of the data volume obtaining request sent by the second target module through its own response interface, the method further includes:
determining the size of primary data transmission according to the data transmission configuration information;
and sending target data corresponding to the data transmission request to a data transmission interface of the second target module through a data transmission interface of the second target module according to the size of the first data transmission.
Optionally, after acquiring the data volume acquisition request sent by the second target module through its own response interface, the method further includes:
judging whether the size of the target data in the data volume acquisition request is zero or not;
and if the size of the target data is zero, stopping sending the target data to the second target module.
Optionally, the sending, by the response interface of the second target module, a request response to the response interface of the second target module to establish a communication connection between the first target module and the second target module includes:
sending a request response to a response interface of the second target module through a response interface of the second target module;
and receiving a data response corresponding to the request response, fed back by the second target module, through the response interface of the second target module to establish communication connection between the first target module and the second target module.
Optionally, before receiving, through the request interface of the second target module, a data transmission request sent by the second target module through the request interface of the second target module, the method further includes:
configuring respective input and output type interfaces for the target modules in the chip according to preset interface configuration information so that the first target module and the second target module both comprise the request interface, the response interface and the data transmission interface; the interface configuration information includes an interface format and an interface number.
Optionally, configuring respective input/output type interfaces for the target modules in the chip according to the preset interface configuration information includes:
configuring a request interface for a target module in the chip according to the request interface configuration parameters in the preset interface configuration information to obtain the request interface;
configuring an ACK response interface for a target module in the chip according to a response interface configuration parameter in the preset interface configuration information to obtain the response interface; the response interface configuration parameters comprise a request format corresponding to the request response, a request format corresponding to the data response, and a request format corresponding to the data volume acquisition request;
and configuring a data interface for the target module in the chip according to the data interface configuration parameters in the preset interface configuration information to obtain the data transmission interface.
In a second aspect, the present application discloses an apparatus for transmitting data between modules in a chip, comprising:
the data transmission request acquisition module is used for receiving a data transmission request sent by the second target module in the chip through the request interface of the second target module;
a communication connection establishing module, configured to send a request response to a response interface of the second target module through a response interface thereof according to the data transmission request, so as to establish a communication connection between the first target module and the second target module;
and the data transmission module is used for sending target data corresponding to the data transmission request to the data transmission interface of the second target module through the data transmission interface of the data transmission module according to the communication connection.
In a third aspect, the present application discloses an electronic device, comprising:
a memory for storing a computer program;
and the processor is used for executing the computer program to realize the data transmission method between the modules in the chip.
In a fourth aspect, the present application discloses a computer readable storage medium for storing a computer program; wherein the computer program when executed by the processor implements the method for inter-module data transmission within a chip as described above.
In the application, a first target module in a chip receives a data transmission request sent by a second target module in the chip through a request interface of the first target module through the request interface of the first target module; according to the data transmission request, sending a request response to a response interface of the second target module through a response interface of the second target module so as to establish communication connection between the first target module and the second target module; and sending target data corresponding to the data transmission request to a data transmission interface of the second target module through a data transmission interface of the second target module according to the communication connection. It can be seen from above that, the module is equipped with request interface, answer interface and data transmission interface in this embodiment in the chip, send or receive the data transmission request through self request interface between the different modules in the chip, simultaneously, send the answer response through self answer interface between the different modules in the chip to and carry out data transmission through self data transmission interface between the different modules in the chip, can need not to occupy the bus and initiate data transmission at any time, improved the data transmission efficiency between the modules in the chip.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a flowchart of a method for transmitting data between modules in a chip according to the present application;
fig. 2 is a schematic diagram of a specific inter-chip module data transmission interface structure provided in the present application;
FIG. 3 is a timing diagram illustrating an exemplary inter-chip module data transfer process according to the present disclosure;
FIG. 4 is a schematic structural diagram of an apparatus for transmitting data between modules in a chip according to the present application;
fig. 5 is a block diagram of an electronic device provided in the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the prior art, data transmission between modules through a bus is high in reliability, but the bus needs to be occupied, when the bus is busy, data transmission needs to wait, timeliness is low, and when a large amount of data needs to be transmitted between two modules, bus time is always occupied, so that the bus is busy for a long time, and other modules cannot be used. The method is simple through data transmission between the modules in an FIFO mode, the two modules are connected only through the FIFO mode, and other information interaction is avoided. In order to overcome the technical problem, the application provides a method for transmitting data between modules in a chip, which can initiate data transmission at any time without occupying a bus, and improves the efficiency of data transmission between modules in the chip.
The embodiment of the application discloses a method for transmitting data between modules in a chip, which is applied to a first target module in the chip, and as shown in fig. 1, the method can include the following steps:
step S11: and receiving a data transmission request sent by the second target module in the chip through the self request interface.
In this embodiment, a first target module in the chip is a data sending end, which may also be referred to as a requested end, and the first target module obtains, through a request interface configured in advance, a data transmission request sent by a second target module in the chip through its own request interface, where the second target module is a data receiving end, which may also be referred to as a requested end. That is to say, each of the modules in the chip is configured with a respective request interface, and the request interface is used for sending a data transmission request to another module or receiving a data transmission request sent by another module.
Step S12: and sending a request response to a response interface of the second target module through a response interface of the second target module according to the data transmission request so as to establish communication connection between the first target module and the second target module.
In this embodiment, after receiving the data transmission request, the first target module sends a request response to a response interface of the second target module through its own response interface, where the request response is used to characterize and accept the data transmission request of the second target module, so as to establish a communication connection between the first target module and the second target module. That is, each of the on-chip modules is configured with a respective reply interface for sending a reply response to the other module.
In this embodiment, the sending a request response to the response interface of the second target module through the response interface thereof to establish a communication connection between the first target module and the second target module may include: sending a request response to a response interface of the second target module through a response interface of the second target module; and receiving a data response corresponding to the request response, fed back by the second target module, through the response interface of the second target module to establish communication connection between the first target module and the second target module.
It can be understood that, in the process of establishing a communication connection between a first target module and a second target module, in the first step, the second target module sends a data transmission request to the first target module through a request interface of the second target module; secondly, after receiving the data transmission request, the first target module sends a request response to the second target module through a response interface of the first target module; and thirdly, after receiving the request response, the second target module sends a data response interface to the first target module through a response interface of the second target module so as to represent that the data is ready to be received, and the first target module can start to transmit the data to the second target module until the communication connection between the first target module and the second target module is successfully established.
Step S13: and sending target data corresponding to the data transmission request to a data transmission interface of the second target module through a data transmission interface of the second target module according to the communication connection.
In this embodiment, after the communication connection is successfully established, the first target module transmits the data and the target data corresponding to the data transmission request to the second target module through the data transmission interface of the first target module and the data transmission interface of the second target module. That is, each of the modules in the chip is configured with its own data transmission interface, and the response interface is used for data transmission with other modules.
In this embodiment, the sending, by the data transmission interface of the second target module, the target data corresponding to the data transmission request to the data transmission interface of the second target module may include: acquiring a data volume acquisition request sent by the second target module through a response interface of the second target module; the data volume acquisition request is a request generated by the second target module according to the data processing state of the second target module; determining the size of target data according to the data volume acquisition request, and determining corresponding target data according to the data transmission request; and generating a data packet to be sent according to the size of the target data based on the target data, and sending the data packet to be sent to a data transmission interface of the second target module through a data transmission interface of the data packet to be sent. It can be understood that, in this embodiment, the feedback variable window mechanism is implemented by responding to the data amount obtaining request sent by the interface, where the size of the window is several data transmissions at a time, and the feedback variable window is a variable size that can change several data transmissions at a time. Therefore, the size of single data transmission can be flexibly adjusted, in the prior art, the fixed window is set to be too small, if a sending end sends a datum, a receiving end confirms to receive the datum, the cost is too large, and the transmission rate can be reduced; if the window is set to be too large, for example, 100 data are transmitted each time, and the receiving end can only receive and process 50 data, which may cause data loss and congestion, therefore, the feedback variable window is adopted in the embodiment to effectively solve the problem.
In this embodiment, before receiving, through the request interface of the second target module, a data transmission request sent by the second target module through the request interface of the second target module, the method may further include: configuring respective input and output type interfaces for the target modules in the chip according to preset interface configuration information so that the first target module and the second target module both comprise the request interface, the response interface and the data transmission interface; the interface configuration information includes an interface format and an interface number. Namely, each module in the chip is configured with a respective request interface, a response interface and a data transmission interface, and the types of the three interfaces are input and output type interfaces, namely, half-duplex communication can be supported. In addition, the first target module and the second target module in this embodiment are only generic, and any one module in the chip can be used as a request end and a requested end.
In this embodiment, configuring respective input/output type interfaces for the target modules in the chip according to the preset interface configuration information may include: configuring a request interface for a target module in the chip according to the request interface configuration parameters in the preset interface configuration information to obtain the request interface; configuring an ACK response interface for a target module in the chip according to a response interface configuration parameter in the preset interface configuration information to obtain the response interface; the response interface configuration parameters comprise a request format corresponding to the request response, a request format corresponding to the data response, and a request format corresponding to the data volume acquisition request; and configuring a data interface for the target module in the chip according to the data interface configuration parameters in the preset interface configuration information to obtain the data transmission interface.
It can be understood that, for example, fig. 2 is a schematic diagram of a specific structure of an inter-module DATA transmission interface in a chip, where a request interface configured for each module may specifically be a request interface (REQ interface), and a response interface may specifically be an ack (acknowledgement) response interface and a DATA transmission interface (DATA interface). The REQ interface is configured to transmit a data transmission request signal, bit width is 1bit, a high level is defined as REQ valid, data transmission is requested, a low level is REQ invalid, no data transmission request exists, and the REQ needs to be kept in a high level valid state all the time in the data transmission process. The data transmission interface is used for transmitting data. Bit width is 1bit, and the serial transmission is carried out.
The ACK interface is used for responding to data transmission, the ACK is divided into a request response and a data response, and the specific interface format configuration may be:
ACK [0] represents a request response, the bit width is 1bit, the first target module sends the request response to the second target module, namely the requested module sends the request to the request module, and is used for responding the data transmission request, the high level indicates that the response is successful, otherwise, the request module does not receive the REQ request signal or the requested module cannot transmit the data;
ACK [1] represents data response, bit width is 1bit, the second target module sends the response to the first target module, namely the request module sends the response to the requested module, which is used for responding ACK [0], indicating that the requested end can start sending data, high level indicates response success, otherwise, the request module is no response, namely the request module does not receive response signal of ACK [0] or the request module does not prepare for receiving data;
and the ACK [ N:2] represents a data volume acquisition request, has configurable bit width and is used for feeding back a variable window to control data transmission.
It can be seen that ACK [0] and ACK [0] are request responses for connection establishment between two modules, and ACK [ N:2] is a feedback variable window response signal (N is a set bit width value) for feedback variable window setting control data transmission. Therefore, the speed of data transmission can be controlled by feeding back the setting of the variable window, data transmission is initiated by adopting a mode based on the REQ request, connection is established and data transmission is adjusted through the ACK response signal, and resource waste and transmission blockage are avoided.
In this embodiment, before acquiring the data volume acquisition request sent by the second target module through its own response interface, the method may further include: determining the size of primary data transmission according to the data transmission configuration information; and sending target data corresponding to the data transmission request to a data transmission interface of the second target module through a data transmission interface of the second target module according to the size of the first data transmission. In this embodiment, after acquiring the data volume acquisition request sent by the second target module through its own response interface, the method may further include: judging whether the size of the target data in the data volume acquisition request is zero or not; and if the size of the target data is zero, stopping sending the target data to the second target module.
For example, as shown in fig. 3, the workflow of the feedback variable window is as follows: when data is sent for the first time, the default window size is adopted, namely the default first data transmission size can be set to be 8 bits, at the moment, after the second target module receives the data, the data is responded through ACK [ N:2] and returned to the first target module, the content of the response signal is the number of the data which is expected to be transmitted for the next time, namely after the first 8-bit data is transmitted, if the second target module has the capacity to process more data, the response signals with the N of 16, 24 or 32 and the like are sent through the ACK [ N:2], and the first target module is told that the data with the number of bits can be sent for the next time; if the second target module is not capable of handling so much data or does not already need to transmit data at this point, the first target module is told to reduce data transmission by sending an acknowledgement signal of 4, 2, etc. via ACK N: 2. If ACK [ N:2] sends a response signal with N being 0, the first target module stops sending data after receiving the signal. If the first target module does not receive the ACK signal, the second target module fails to receive the ACK signal, and the first target module retransmits the ACK signal. By setting the feedback variable window, half-duplex data transmission is realized, the data transmission speed can be controlled, resource waste and transmission blockage are avoided, and the data transmission efficiency is improved.
FIG. 3 shows a specific timing diagram for inter-module data transmission within a chip:
(1) assuming that two modules need to perform data transmission, a first target module (a requested module, i.e. a data sending module, i.e. a sending end) and a second target module (a requested data transmission module, i.e. a data receiving module, i.e. a receiving end);
(2) when the receiving end needs the sending end to send data, the receiving end sends a REQ signal to the sending end;
(3) the sending end receives the REQ signal and sends an ACK [0] response signal to the receiving end according to the self condition;
(4) after receiving ACK [0], the receiving end sends ACK [1] response signal to the sending end according to self condition;
(5) after receiving ACK [1], the sending end starts to send data, and the first time sends 8-bit data;
(6) after receiving the data, the receiving end sends ACK [ N:2] to the sending module according to the self condition (if the receiving end needs a large amount of data transmission and has the capacity to process at the moment, a larger value of ACK [ N:2] can be sent to the sending module, if the receiving end does not have the capacity to process more data at the moment or does not need the data transmission, the value of ACK [ N:2] can be smaller or 0);
(7) after receiving ACK [ N:2], the sending end sets the number of data to be sent next time according to the value;
(8) and (5) repeating the steps (6) and (7) until ACK [ N:2] is 0, namely no data transmission is needed.
As can be seen from the above, in this embodiment, a first target module in a chip receives, through a request interface of the first target module, a data transmission request sent by a second target module in the chip through a request interface of the second target module; according to the data transmission request, sending a request response to a response interface of the second target module through a response interface of the second target module so as to establish communication connection between the first target module and the second target module; and sending target data corresponding to the data transmission request to a data transmission interface of the second target module through a data transmission interface of the second target module according to the communication connection. It can be seen from above that, the module is equipped with request interface, answer interface and data transmission interface in this embodiment in the chip, send or receive the data transmission request through self request interface between the different modules in the chip, simultaneously, send the answer response through self answer interface between the different modules in the chip to and carry out data transmission through self data transmission interface between the different modules in the chip, can need not to occupy the bus and initiate data transmission at any time, improved the data transmission efficiency between the modules in the chip.
Correspondingly, an embodiment of the present application further discloses an apparatus for transmitting data between modules in a chip, as shown in fig. 4, the apparatus includes:
a data transmission request obtaining module 11, configured to receive, through a request interface of the second target module, a data transmission request sent by the second target module through the request interface of the second target module;
a communication connection establishing module 12, configured to send a request response to a response interface of the second target module through a response interface thereof according to the data transmission request, so as to establish a communication connection between the first target module and the second target module;
and the data transmission module 13 is configured to send target data corresponding to the data transmission request to the data transmission interface of the second target module through a data transmission interface of the data transmission module according to the communication connection.
As can be seen from the above, in this embodiment, a first target module in a chip receives, through a request interface of the first target module, a data transmission request sent by a second target module in the chip through a request interface of the second target module; according to the data transmission request, sending a request response to a response interface of the second target module through a response interface of the second target module so as to establish communication connection between the first target module and the second target module; and sending target data corresponding to the data transmission request to a data transmission interface of the second target module through a data transmission interface of the second target module according to the communication connection. It can be seen from above that, the module is equipped with request interface, answer interface and data transmission interface in this embodiment in the chip, send or receive the data transmission request through self request interface between the different modules in the chip, simultaneously, send the answer response through self answer interface between the different modules in the chip to and carry out data transmission through self data transmission interface between the different modules in the chip, can need not to occupy the bus and initiate data transmission at any time, improved the data transmission efficiency between the modules in the chip.
In some specific embodiments, the data transmission module 13 may specifically include:
a data amount obtaining request receiving unit, configured to obtain a data amount obtaining request sent by the second target module through a response interface of the second target module; the data volume acquisition request is a request generated by the second target module according to the data processing state of the second target module;
the data determining unit is used for determining the size of target data according to the data volume acquisition request and determining corresponding target data according to the data transmission request;
and the data packet to be sent generating unit is used for generating a data packet to be sent according to the size of the target data based on the target data and sending the data packet to be sent to the data transmission interface of the second target module through the data transmission interface of the data packet to be sent generating unit.
In some specific embodiments, the data transmission module 13 may specifically include:
the primary data transmission size determining unit is used for determining the primary data transmission size according to the data transmission configuration information;
and the data transmission unit is used for sending target data corresponding to the data transmission request to the data transmission interface of the second target module through the data transmission interface of the data transmission unit according to the size of the first data transmission.
In some specific embodiments, the data transmission module 13 may specifically include:
a data size determination unit configured to determine whether the size of the target data in the data amount acquisition request is zero;
and the transmission stopping unit is used for stopping sending the target data to the second target module if the size of the target data is zero.
In some specific embodiments, the communication connection establishing module 12 may specifically include:
a request response sending unit, configured to send a request response to a response interface of the second target module through a response interface of the request response sending unit;
and the data response receiving unit is used for receiving a data response corresponding to the request response fed back by the second target module through the response interface of the data response receiving unit so as to establish communication connection between the first target module and the second target module.
In some embodiments, the inter-module data transmission apparatus in a chip may include:
an interface configuration unit, configured to configure respective input/output type interfaces for the target modules in the chip according to preset interface configuration information, so that the first target module and the second target module both include the request interface, the response interface, and the data transmission interface; the interface configuration information includes an interface format and an interface number.
In some specific embodiments, the interface configuration unit may specifically include:
a request interface configuration unit, configured to configure a request interface for a target module in the chip according to a request interface configuration parameter in the preset interface configuration information to obtain the request interface;
a response interface configuration unit, configured to configure an ACK response interface for the target module in the chip according to a response interface configuration parameter in the preset interface configuration information, so as to obtain the response interface; the response interface configuration parameters comprise a request format corresponding to the request response, a request format corresponding to the data response, and a request format corresponding to the data volume acquisition request;
and the data transmission interface configuration unit is used for configuring a data interface for the target module in the chip according to the data interface configuration parameters in the preset interface configuration information so as to obtain the data transmission interface.
Further, the embodiment of the present application also discloses an electronic device, which is shown in fig. 5, and the content in the drawing cannot be considered as any limitation to the application scope.
Fig. 5 is a schematic structural diagram of an electronic device 20 according to an embodiment of the present disclosure. The electronic device 20 may specifically include: at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input output type interface 25 and a communication bus 26. The memory 22 is configured to store a computer program, and the computer program is loaded and executed by the processor 21 to implement relevant steps in the inter-chip module data transmission method disclosed in any of the foregoing embodiments.
In this embodiment, the power supply 23 is configured to provide a working voltage for each hardware device on the electronic device 20; the communication interface 24 can create a data transmission channel between the electronic device 20 and an external device, and a communication protocol followed by the communication interface is any communication protocol applicable to the technical solution of the present application, and is not specifically limited herein; the input/output type interface 25 is configured to obtain external input data or output data to the outside, and a specific interface type thereof may be selected according to specific application requirements, which is not specifically limited herein.
In addition, the storage 22 is used as a carrier for resource storage, and may be a read-only memory, a random access memory, a magnetic disk or an optical disk, etc., and the resources stored thereon include an operating system 221, a computer program 222, data 223 including a training set, etc., and the storage may be a transient storage or a permanent storage.
The operating system 221 is used for managing and controlling each hardware device and the computer program 222 on the electronic device 20, so as to realize the operation and processing of the mass data 223 in the memory 22 by the processor 21, and may be Windows Server, Netware, Unix, Linux, and the like. The computer program 222 may further include a computer program that can be used to perform other specific tasks in addition to the computer program that can be used to perform the inter-module-on-chip data transmission method performed by the electronic device 20 disclosed in any of the foregoing embodiments.
Further, an embodiment of the present application further discloses a computer storage medium, where computer-executable instructions are stored in the computer storage medium, and when the computer-executable instructions are loaded and executed by a processor, the steps of the inter-module data transmission method in a chip disclosed in any of the foregoing embodiments are implemented.
The embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same or similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in Random Access Memory (RAM), memory, Read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The method, apparatus, device and medium for transmitting data between modules in a chip provided by the present invention are described in detail above, and a specific example is applied in the present document to explain the principle and the implementation of the present invention, and the description of the above embodiment is only used to help understanding the method and the core idea of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.

Claims (10)

1. A method for transmitting data between modules in a chip is characterized in that the method is applied to a first target module in the chip and comprises the following steps:
receiving a data transmission request sent by a second target module in the chip through a request interface of the second target module;
according to the data transmission request, sending a request response to a response interface of the second target module through a response interface of the second target module so as to establish communication connection between the first target module and the second target module;
and sending target data corresponding to the data transmission request to a data transmission interface of the second target module through a data transmission interface of the second target module according to the communication connection.
2. The method according to claim 1, wherein the sending target data corresponding to the data transmission request to the data transmission interface of the second target module through the data transmission interface of the second target module comprises:
acquiring a data volume acquisition request sent by the second target module through a response interface of the second target module; the data volume acquisition request is a request generated by the second target module according to the data processing state of the second target module;
determining the size of target data according to the data volume acquisition request, and determining corresponding target data according to the data transmission request;
and generating a data packet to be sent according to the size of the target data based on the target data, and sending the data packet to be sent to a data transmission interface of the second target module through a data transmission interface of the data packet to be sent.
3. The method according to claim 2, wherein before the obtaining the request for obtaining the data amount sent by the second target module through its own response interface, the method further comprises:
determining the size of primary data transmission according to the data transmission configuration information;
and sending target data corresponding to the data transmission request to a data transmission interface of the second target module through a data transmission interface of the second target module according to the size of the first data transmission.
4. The method according to claim 2, wherein after acquiring the data volume acquisition request sent by the second target module through its own response interface, the method further comprises:
judging whether the size of the target data in the data volume acquisition request is zero or not;
and if the size of the target data is zero, stopping sending the target data to the second target module.
5. The method according to claim 2, wherein the sending a request response to the response interface of the second target module through its response interface to establish the communication connection between the first target module and the second target module comprises:
sending a request response to a response interface of the second target module through a response interface of the second target module;
and receiving a data response corresponding to the request response, fed back by the second target module, through the response interface of the second target module to establish communication connection between the first target module and the second target module.
6. The method according to claim 5, wherein before receiving, via the request interface of the second target module, a data transmission request sent by the second target module via the request interface of the second target module, the method further comprises:
configuring respective input and output type interfaces for the target modules in the chip according to preset interface configuration information so that the first target module and the second target module both comprise the request interface, the response interface and the data transmission interface; the interface configuration information includes an interface format and an interface number.
7. The method according to claim 5, wherein configuring respective input/output type interfaces for the target modules in the chip according to the preset interface configuration information comprises:
configuring a request interface for a target module in the chip according to the request interface configuration parameters in the preset interface configuration information to obtain the request interface;
configuring an ACK response interface for a target module in the chip according to a response interface configuration parameter in the preset interface configuration information to obtain the response interface; the response interface configuration parameters comprise a request format corresponding to the request response, a request format corresponding to the data response, and a request format corresponding to the data volume acquisition request;
and configuring a data interface for the target module in the chip according to the data interface configuration parameters in the preset interface configuration information to obtain the data transmission interface.
8. An inter-module data transmission apparatus in a chip, applied to a first target module in the chip, comprising:
the data transmission request acquisition module is used for receiving a data transmission request sent by the second target module in the chip through the request interface of the second target module;
a communication connection establishing module, configured to send a request response to a response interface of the second target module through a response interface thereof according to the data transmission request, so as to establish a communication connection between the first target module and the second target module;
and the data transmission module is used for sending target data corresponding to the data transmission request to the data transmission interface of the second target module through the data transmission interface of the data transmission module according to the communication connection.
9. An electronic device, comprising:
a memory for storing a computer program;
a processor for executing the computer program to implement the method of inter-module-on-chip data transmission according to any one of claims 1 to 7.
10. A computer-readable storage medium for storing a computer program; wherein the computer program when executed by the processor implements the inter-module-on-chip data transmission method as claimed in any one of claims 1 to 7.
CN202111415344.5A 2021-11-25 2021-11-25 Method, device, equipment and storage medium for transmitting data between modules in chip Active CN114124821B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202111415344.5A CN114124821B (en) 2021-11-25 2021-11-25 Method, device, equipment and storage medium for transmitting data between modules in chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111415344.5A CN114124821B (en) 2021-11-25 2021-11-25 Method, device, equipment and storage medium for transmitting data between modules in chip

Publications (2)

Publication Number Publication Date
CN114124821A true CN114124821A (en) 2022-03-01
CN114124821B CN114124821B (en) 2024-03-22

Family

ID=80373265

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111415344.5A Active CN114124821B (en) 2021-11-25 2021-11-25 Method, device, equipment and storage medium for transmitting data between modules in chip

Country Status (1)

Country Link
CN (1) CN114124821B (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105379345A (en) * 2014-03-24 2016-03-02 华为技术有限公司 Method for transmitting physical layer data and data transmission device
US20180074991A1 (en) * 2015-03-30 2018-03-15 Sony Semiconductor Solutions Corporation Asynchronous interface
US20210211237A1 (en) * 2020-01-06 2021-07-08 Qualcomm Incorporated Hybrid automatic repeat/request-acknowledgement codebook determination with different downlink assignment indicator bitwidth
CN113468092A (en) * 2020-03-31 2021-10-01 比亚迪半导体股份有限公司 High-speed SPI communication device
CN113570050A (en) * 2021-08-03 2021-10-29 浙江大学 Bidirectional asynchronous synchronous first-in first-out adapter

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105379345A (en) * 2014-03-24 2016-03-02 华为技术有限公司 Method for transmitting physical layer data and data transmission device
US20180074991A1 (en) * 2015-03-30 2018-03-15 Sony Semiconductor Solutions Corporation Asynchronous interface
US20210211237A1 (en) * 2020-01-06 2021-07-08 Qualcomm Incorporated Hybrid automatic repeat/request-acknowledgement codebook determination with different downlink assignment indicator bitwidth
CN113468092A (en) * 2020-03-31 2021-10-01 比亚迪半导体股份有限公司 High-speed SPI communication device
CN113570050A (en) * 2021-08-03 2021-10-29 浙江大学 Bidirectional asynchronous synchronous first-in first-out adapter

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
杨川;崔少辉;刘杰;方丹;: "基于PCI9656的PXI总线接口设计与实现", 电子测量技术, no. 10 *

Also Published As

Publication number Publication date
CN114124821B (en) 2024-03-22

Similar Documents

Publication Publication Date Title
US7945673B2 (en) Reduced wireless internet connect time
US9560116B2 (en) Network device, system, method, and storage medium
CN115118524B (en) Interface equipment and free intercommunication data transparent transmission method, system and device of Internet of things
CN113965307A (en) Full-duplex SPI communication method based on arbitration line
CN113055193B (en) Data multicast transmission method, device, equipment and storage medium
CN108366129B (en) USB data transmission method, device and USB are from device adapter
CN109756464B (en) Communication method, server and client
CN113784388A (en) Data transmission method, device, equipment and storage medium
CN114124821A (en) Method, device, equipment and storage medium for data transmission between modules in chip
JPH069361B2 (en) Message transmission method
CN110213155B (en) Communication processing method, communication processing device, related equipment and storage medium
CN112637121B (en) Data port updating method and device, electronic equipment and readable storage medium
CN105912477B (en) A kind of method, apparatus and system that catalogue is read
JPH0511938A (en) High-functional parallel port interface
CN115208794B (en) Timer adjustment method, device, equipment and medium of Profibus-DP protocol
JP2001229147A (en) Inter-cpu communication control method and portable information terminal
CN110572440A (en) Method and device for data transmission, household appliance and storage medium
CN117857657A (en) Data transmission method, device, equipment and medium based on USART protocol
CN111278011B (en) Network distribution method of intelligent sound box and intelligent sound box
EP4376488A1 (en) Method and apparatus for accessing cell served by base station, storage medium, and electronic apparatus
CN112511603B (en) Data port updating method and device, electronic equipment and readable storage medium
CN112532699B (en) Data port updating method and device, electronic equipment and readable storage medium
US20230062868A1 (en) Communication apparatus and method having data transmission sorting mechanism
JP2000022743A (en) Asynchronous data communication method
CN114817116A (en) Baud rate synchronization method, device, equipment and medium

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant